// +FHDR------------------------------------------------------------
//                 Copyright (c) 2022 SmartLogic.
//                       ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename      : lib_debug_init.c
// Author        : xianfeng.du
// Created On    : 2023-09-23
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "typedef.h"
#include "lib_debug_init.h"
#include "ucp_utility.h"
#include "msg_transfer_layer.h"
#include "ucp_port.h"

#define SPU_APE_NUM     (8)

extern int smart_irq_debug_init(uint32_t debug_base_addr, uint32_t len_bytes);
extern int smart_hq_debug_init( uint32_t debug_base_addr, uint32_t len_bytes);

/*
return : 0     -- OK
         0x001 -- interrupt error
         0x010 -- hw queue error
*/
int32_t spu_lib_debug_init(uint8_t core_id)
{
    int32_t ret = 0;
    int32_t ret_val = 0;

    /* interrupt */
    ret = smart_irq_debug_init((DBG_DDR_IRQ_ADDR_BASE + core_id*DBG_DDR_IRQ_LEN), DBG_DDR_IRQ_LEN);
    if (0 != ret)
    {
        debug_write(DBG_DDR_ERR_IDX(core_id, 10), ret);
        ret_val += 1;
    }

    /* hw queue */
    ret = smart_hq_debug_init((DBG_DDR_HW_ADDR_BASE + core_id*DBG_DDR_HW_LEN), DBG_DDR_HW_LEN);  // 推荐384，实际512
    if (0 != ret)
    {
        debug_write(DBG_DDR_ERR_IDX(core_id, 46), ret);     // ape0: 0xb7e24080
        ret_val += 1 << 1;
    }

    return ret_val;
}

int32_t spu_get_oam_handle_id(uint8_t inst_id)
{
    HandleId_t handler;
    handler.port_id = get_ucp_port_id();
    handler.inst_id = inst_id;
    handler.type_id = OAM;

    return handler.value;
}

