#include "ucp_js_subcrg.h"
#include "ucp_cpri.h"
#include "ucp_csu.h"
#include "cpri_csu.h"
#include "ucp_drv_common.h"
#include "cpri_driver.h"
#include "ape_csu.h"
#include "cpri_csu_api.h"

void cpri_csu_init(void)
{
	JECS_CSU_LATCHALFULL = 0x6;
	JECS_CSU_LATCHALFULL = 0x80000040;
	JECS_CSU_EM_BS_SMSEL_PREDATANUM = (0x1<<14) | (0x7<<5) | 0xF;
	JECS_CSU_EM_BS_SMSEL_PREDATANUM = (0x3<<14) | (0x3<<5) | 0x4;
	
	JECS_CSU_ALMOSTFULLSENDTHRED = 0x100040;   // almostfull1=0x40, sendthred1=0x10
	JECS_CSU_ALMOSTFULLSENDTHRED = 0x80048010; // almostfull1=0x10, sendthred1=0x4

//	JECS_CSU_FINDDMATAG = 0x60; // DMA搬移完成才能查到结束状态
	JECS_CSU_TAGMASK0 = 0xFFFFFFFF;
}

int32_t cpri_csu_task_lookup(uint8_t task_tag)
{
	return (do_read_volatile((uint32_t*)(&JECS_CSU_DMASTATUS)) & (task_tag));
}
#if 0
void cpri_csu_axc_init_notiming(void)
{
	uint32_t basic_frame_byte = 0;
	uint32_t cycleNum = 8;
	uint32_t i;
	// 以option8, 4T4R为例
	// ID0,ID5，包含1拍，1拍16bit
	// ID1~ID4，包含8拍，1拍64bit
	// 1个基本帧包含2*2+32*8=260B的有效数据
	basic_frame_byte = (ID0_SIZE+ID5_SIZE)*2 + (ID1_SIZE+ID2_SIZE+ID3_SIZE+ID4_SIZE)*8;
//	ECPRI_RST_CFG_REG |= BIT24;

	// rx
	// port info
	JECS_CSU_CPRIRX0RFPSET	   = ID_NUM-1; // 可以使用的port数，使用输入i_rx_axc_id选择PortInfo参数
	JECS_CSU_CPRIRX0PORTINFO0  = ((ID0_SIZE*8*2)<<1)+(8*2<<22);	// 小端模式，连续读取16bit，16bit有效
	JECS_CSU_CPRIRX0PORTINFO1  = ((ID1_SIZE*8*8)<<1)+(0<<22);	// 小端模式，连续读取64bit，64bit有效
	JECS_CSU_CPRIRX0PORTINFO2  = ((ID2_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO3  = ((ID3_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO4  = ((ID4_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO5  = ((ID5_SIZE*8*2)<<1)+(8*2<<22);
	// latch info
	JECS_CSU_CPRIRX0LATCHINFOL0 = ID0_SIZE*2*8;	// latch一次，读取16bit
	JECS_CSU_CPRIRX0LATCHINFOH0 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM0   = cycleNum-1;	// 对应每个latch，8个cycle对齐一次
	JECS_CSU_CPRIRX0LATCHINFOL1 = ID1_SIZE*8*8;	// latch一次，读取64bit
	JECS_CSU_CPRIRX0LATCHINFOH1 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM1   = cycleNum-1;	// 对应每个latch，8个cycle对齐一次
	JECS_CSU_CPRIRX0LATCHINFOL2 = ID2_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH2 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM2   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL3 = ID3_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH3 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM3   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL4 = ID4_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH4 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM4   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL5 = ID5_SIZE*2*8;
	JECS_CSU_CPRIRX0LATCHINFOH5 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM5   = cycleNum-1;
	// start work
	JECS_CSU_CPRIRX0ONWORK = /*(1<<16)+*/ID_NUM-1;	// rx csu start work, 使用IDNUM个latch
	JECS_CSU_ALMOSTFULLSENDTHRED = 0x100040; 	// almostfull1=0x40, sendthred1=0x10

	// set dma buffer
	JECS_CSU_DMAADDRL0 = CSU_RX_DESC_ADDR; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH0 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM0 = ID_NUM; 		// allnum is id num，每个ID段，是一个链表节点

	// 设置链表节点cmd
	uint32_t rxListCmdL;
	uint32_t rxListCmdH;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	rxListCmdL = (1<<4)+(0<<5)+(3<<6); 
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit36=1，读操作为对应AxC的rfp后第一组DMA请求
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	rxListCmdH = 1+(1<<2)+(1<<4)+(1<<11)+(1<<13);

	// rx: cpri -> ddr
	stCsuLinkDesc1L3D* pLinkDesc = NULL;
	for(i = 0; i < ID_NUM; i++)
	{
		int32_t idSize = 0;
		if((i==0) || (i==5))
		{
			idSize = 1*2;
		}
		else
		{
			idSize = 8*8;
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*i;
		stCsuLinkDesc1L3D stLinkDesc;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize * cycleNum;
		stLinkDesc.dmaYStep = idSize * cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize * cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*HYPER_FRAME_NUM;	// 15个超帧
		stLinkDesc.dmaCGran = 1;	// 读侧，新的无线帧开始
		stLinkDesc.dmaGran = i; 	// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = CSU_RX_AXC_ADDR + i*ID_DATA_STEP; // 每个AxC ID，15个超帧的数据量，64B*256*15
		stLinkDesc.dmaXNum = idSize * cycleNum;
		stLinkDesc.dmaYStep = idSize * cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize * cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*HYPER_FRAME_NUM;	// 15个超帧
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
//	clean_cache(CSU_RX_DESC_ADDR, 64*ID_NUM);

	// tx
	// port info
	JECS_CSU_CPRITX0RFPSET 	= 0x40001; //RfpPoint=0x1 can send 4//push 4 basic frame at 1st tx_axc_rfp
	JECS_CSU_CPRITX0PORTINFO0  = ((ID0_SIZE*8*2)<<1)+(8*2<<20)+(0<<26); // 小端，连续读取16bit，16bit有效，o_tx_axc_id=0
	JECS_CSU_CPRITX0PORTINFO1  = ((ID1_SIZE*8*8)<<1)+(0<<20)+(1<<26); // 小端，连续读取16bit，64bit有效，o_tx_axc_id=1
	JECS_CSU_CPRITX0PORTINFO2  = ((ID2_SIZE*8*8)<<1)+(0<<20)+(2<<26);
	JECS_CSU_CPRITX0PORTINFO3  = ((ID3_SIZE*8*8)<<1)+(0<<20)+(3<<26);
	JECS_CSU_CPRITX0PORTINFO4  = ((ID4_SIZE*8*8)<<1)+(0<<20)+(4<<26);
	JECS_CSU_CPRITX0PORTINFO5  = ((ID5_SIZE*8*2)<<1)+(8*2<<20)+(5<<26);
	// latch info
	JECS_CSU_CPRITX0LATCHINFOL0 = ID0_SIZE*2*8;	// latch一次读取16bit
	JECS_CSU_CPRITX0LATCHINFOM0 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH0 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL1 = ID1_SIZE*8*8;	// latch一次读取64bit
	JECS_CSU_CPRITX0LATCHINFOM1 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH1 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL2 = ID2_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM2 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH2 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL3 = ID3_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM3 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH3 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL4 = ID4_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM4 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH4 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL5 = ID5_SIZE*2*8;
	JECS_CSU_CPRITX0LATCHINFOM5 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH5 = 0x380028;
	// start work
	// 使用6个latch缓存数据，循环使用6个portinfo的信息，第一个rfp从port0开始
	JECS_CSU_CPRITX0ONWORK = /*(1<<16)+*/((ID_NUM-1)<<8)+(ID_NUM-1);
	// set dma buffer
	JECS_CSU_DMAADDRL1 = CSU_TX_DESC_ADDR; // DDR or SM
	JECS_CSU_DMAADDRH1 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM1 = ID_NUM;  // allnum is id num

	// 设置链表节点CMD
	uint32_t txListCmdL;
	uint32_t txListCmdH;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	txListCmdL = (1<<4)+(0<<5)+(3<<6);
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	txListCmdH = 1+(1<<2)+(1<<11)+(1<<13);

	// tx: ddr -> cpri
	for(i = 0; i < ID_NUM; i++)
	{
		int32_t idSize = 0;
		int32_t idCGran = 0;
		if(0 == i)
		{
			idSize = 1*2;
		}
		else if (5 == i)
		{
			idSize = 1*2;
			idCGran = 1; // 该DMA为rfp的最后一个bit所在的DMA，但不一定是该rfp段最后一个DMA
		}
		else
		{
			idSize = 8*8;
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*i;
		stCsuLinkDesc1L3D stLinkDesc;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = CSU_TX_AXC_ADDR + i*ID_DATA_STEP; // 每个AxC ID，15个超帧的数据量，64B*256*15
		stLinkDesc.dmaXNum = idSize * cycleNum;
		stLinkDesc.dmaYStep = idSize * cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize * cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*HYPER_FRAME_NUM;	// 15个超帧
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize * cycleNum;
		stLinkDesc.dmaYStep = idSize * cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize * cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*HYPER_FRAME_NUM;	// 15个超帧
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
//	clean_cache(CSU_TX_DESC_ADDR, 64*ID_NUM);
}

void cpri_csu_axcctrl_init_notiming()
{
	uint32_t basic_frame_ctrlaxc_byte;
	uint32_t txCapStartNum = 1;
	uint32_t rfpStartNum = 0;
	uint32_t rxCapStartNum = 1;

	basic_frame_ctrlaxc_byte = 16; // option8, 128bit
//	print_f("ctrlaxc_byte in bf is ", basic_frame_ctrlaxc_byte);
	
	//rx ctrl axc dma config
	// reg dma
	JECS_CSU_DMAADDRL2 = 0; // addr_s
	JECS_CSU_DMAADDRH2 = 0;
	JECS_CSU_DMAYNUMXNUM2 = 0x10040;        // xnum=0x10,ynum=1,1 basic frame
	JECS_CSU_DMAYSTEPL2 = 0x40;				// ystep=xnum
	JECS_CSU_DMAZSTEPL2 = 0x40;				// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM2 = 0x58000000+ basic_frame_ctrlaxc_byte*4*4*HYPER_FRAME_NUM; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL3 = CSU_RX_CTRL_ADDR;	// addr_d
	JECS_CSU_DMAYNUMXNUM3 = 0x10000 + 0x100;// xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL3 = 0x100;			// ystep=xnum
	JECS_CSU_DMAZSTEPL3 = 0x100;			// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM3 = 0xF0000000 + basic_frame_ctrlaxc_byte*4*4*HYPER_FRAME_NUM; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE
	JECS_CSU_ALMOSTFULLSENDTHRED = 0x80048010; //almostfull1=0x10, sendthred1=0x4

	//tx ctrl axc dma config
	JECS_CSU_DMAADDRL4 = CSU_TX_CTRL_ADDR; // addr_s
	JECS_CSU_DMAADDRH4 = 0;
	JECS_CSU_DMAYNUMXNUM4 = 0x10100;       // xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL4 = 0x100;           // ystep=xnum
	JECS_CSU_DMAZSTEPL4 = 0x100;           // zstep = ystep
	// read global, dma size = 0xF
	JECS_CSU_DMASIZEGRANALLNUM4 = 0xF0000000+ basic_frame_ctrlaxc_byte*4*4*HYPER_FRAME_NUM; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL5 = 0;				   // addr_d
	JECS_CSU_DMAYNUMXNUM5 = 0x10000+ 0x40; // xnum=0x10,ynum=1,1 basic frame
	JECS_CSU_DMAYSTEPL5 = 0x40; 		   // ystep=xnum
	JECS_CSU_DMAZSTEPL5 = 0x40;            // zstep = ystep
	// size = 5, cgran=1, gran=0
	JECS_CSU_DMASIZEGRANALLNUM5 = 0x58000000 + basic_frame_ctrlaxc_byte*4*4*HYPER_FRAME_NUM; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE
	
	//tx start and rx capture num config
	
	// 收到rx_aux_rfp后，等待rx_axc_ctrl_num==RfpStartNum开始工作
	// 满足RfpStartNum之后，再满足rx_axc_ctrl_num==CapStartNum，开始接收数据
	// 满足CapStartNum时，表示一个DMA的开始，必须和DMA中命令Bit36==1的DMA对齐才可执行
	JECS_CSU_CPRIRX1ONWORK = /*0x10000 + */(rxCapStartNum<<8) + rfpStartNum; // NUM0 is RfpStartNum, NUM1 is CapStartNum
	
	// 收到tx_aux_rfp之后，等待tx_axc_ctrl_num==TxCapStartNum，开始接收数据，只有第一次rfp有效
	JECS_CSU_CPRITX1ONWORK = /*0x10000 + */(txCapStartNum<<8);         // TxCapStartNum
	
}

void cpri_csu_start_notiming(void)
{
	uint32_t txCapStartNum = 1;
	uint32_t rfpStartNum = 0;
	uint32_t rxCapStartNum = 1;
	//send rx axc ctrl cmd
	JECS_CSU_CMDHIGHDATA = (1 << 4); 							// 读操作为对应AxC的rfp后的第一组DMA请求
	JECS_CSU_CMDFIFO2 = (1<<4)+(1<<5)+(2<<8)+(3<<13)+(1<<18);	// 普通DMA，多维传输，cache模式, sbuffid=2, dbuffid=3, tag=1
//	JECS_CSU_CMDFIFO3 = (1<<0)+(1<<2)+(1<<4)+(1<<5)+(2<<8)+(2<<13)+(1<<18);	// 普通DMA，多维传输，cache模式，sbuffid=4,dbuffid=5,tag=2
	//send tx axc ctrl cmd
	JECS_CSU_CMDHIGHDATA = 0;
	JECS_CSU_CMDFIFO3 = (1<<4)+(1<<5)+(4<<8)+(5<<13)+(2<<18);	// 普通DMA，多维传输，cache模式，sbuffid=4,dbuffid=5,tag=2
//	JECS_CSU_CMDFIFO3 = (1<<0)+(1<<2)+(1<<4)+(1<<5)+(4<<8)+(5<<13)+(2<<18);	// 普通DMA，多维传输，cache模式，sbuffid=4,dbuffid=5,tag=2
	// 收到rx_aux_rfp后，等待rx_axc_ctrl_num==RfpStartNum开始工作
	// 满足RfpStartNum之后，再满足rx_axc_ctrl_num==rxCapStartNum，开始接收数据
	// 满足rxCapStartNum时，表示一个DMA的开始，必须和DMA中命令Bit36==1的DMA对齐才可执行
	JECS_CSU_CPRIRX1ONWORK = (1<<16) + (rxCapStartNum<<8) + rfpStartNum; // NUM0 is RfpStartNum, NUM1 is CapStartNum

	// 收到tx_aux_rfp之后，等待tx_axc_ctrl_num==TxCapStartNum，开始tx数据，只有第一次rfp有效
	JECS_CSU_CPRITX1ONWORK = (1<<16) + (txCapStartNum<<8);         // TxCapStartNum

	stCsuDmaCmdL cpriCmdL;
	memset(&cpriCmdL, 0, sizeof(stCsuDmaCmdL));
	// rx cmd
	// 读一级链表，写一级链表，多维DMA，非cache模式，src buf=0，tag=31
//	JECS_CSU_CMDFIFO0 = 1+(1<<2)+(1<<4)+(0<<5)+(3<<6)+(0<<8)+(31<<18);    //rlist=1,wlist=1,3den=1,AXI0 or AXI1???,continue=2'b11,sbuffid=4,tag=31
	cpriCmdL.rCmd = 1;
	cpriCmdL.wCmd = 1;
	cpriCmdL.dmaType = 1;
	cpriCmdL.continueLast = 1;
	cpriCmdL.continueNext = 1;
	cpriCmdL.idSrc = 0;
	cpriCmdL.dmaTag = 31;
//	STORE_EX_W((UINT32*)(&JECS_CSU_CMDFIFO0), *(UINT32*)(&cpriCmdL));
	JECS_CSU_CMDFIFO0 = *((uint32_t*)(&cpriCmdL));

	// tx cmd
//	JECS_CSU_CMDFIFO1 = 1+(1<<2)+(1<<4)+(0<<5)+(3<<6)+(1<<8)+(28<<18);    //rlist=1,wlist=1,3den=1,AXI0 or AXI1???,continue=2'b11,sbuffid=4,tag=28
	cpriCmdL.idSrc = 1;
	cpriCmdL.dmaTag = 28;
//	STORE_EX_W((UINT32*)(&JECS_CSU_CMDFIFO1), *(UINT32*)(&cpriCmdL));
	JECS_CSU_CMDFIFO1 = *((uint32_t*)(&cpriCmdL));

	// ONWORK register only read
	JECS_CSU_CPRIRX0ONWORK = (1<<16)+ID_NUM-1;	// rx csu start work, 使用IDNUM个latch
	JECS_CSU_CPRITX0ONWORK = (1<<16)+((ID_NUM-1)<<8)+(ID_NUM-1);
}

void cpri_csu_axc_init_timing(void)
{
	uint32_t basic_frame_byte = 0;
	uint32_t cycleNum = 8; // 32; //8;
	// 以option8, 4T4R为例
	// ID0，包含1拍，1拍16bit
	// ID1~ID4，包含8拍，1拍64bit
	// 1个基本帧包含1*2+32*8=258B的有效数据
	basic_frame_byte = (ID0_SIZE+ID5_SIZE)*2 + (ID1_SIZE+ID2_SIZE+ID3_SIZE+ID4_SIZE)*8;
//	ECPRI_RST_CFG_REG |= BIT24;

	cpri_csu_axc_link_init_timing(); // 链表节点描述符初始化

	// rx
	// port info
	JECS_CSU_CPRIRX0RFPSET	   = ID_NUM-1; // 可以使用的port数，使用输入i_rx_axc_id选择PortInfo参数
	JECS_CSU_CPRIRX0PORTINFO0  = ((ID0_SIZE*8*2)<<1)+(8*2<<22);	// 小端模式，连续读取16bit，16bit有效
	JECS_CSU_CPRIRX0PORTINFO1  = ((ID1_SIZE*8*8)<<1)+(0<<22);	// 小端模式，连续读取64bit，64bit有效
	JECS_CSU_CPRIRX0PORTINFO2  = ((ID2_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO3  = ((ID3_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO4  = ((ID4_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO5  = ((ID5_SIZE*8*2)<<1)+(8*2<<22);	// 小端模式，连续读取16bit，16bit有效
	// latch info
	JECS_CSU_CPRIRX0LATCHINFOL0 = ID0_SIZE*2*8;	// latch一次，读取16bit
	JECS_CSU_CPRIRX0LATCHINFOH0 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM0   = cycleNum-1;	// 对应每个latch，8个cycle对齐一次
	JECS_CSU_CPRIRX0LATCHINFOL1 = ID1_SIZE*8*8;	// latch一次，读取64bit
	JECS_CSU_CPRIRX0LATCHINFOH1 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM1   = cycleNum-1;	// 对应每个latch，8个cycle对齐一次
	JECS_CSU_CPRIRX0LATCHINFOL2 = ID2_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH2 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM2   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL3 = ID3_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH3 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM3   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL4 = ID4_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH4 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM4   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL5 = ID5_SIZE*2*8;	// latch一次，读取16bit
	JECS_CSU_CPRIRX0LATCHINFOH5 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM5   = cycleNum-1;	// 对应每个latch，8个cycle对齐一次

	JECS_CSU_CPRIRX0ONWORK = ID_NUM-1;	// rx csu , 使用IDNUM个latch
	JECS_CSU_ALMOSTFULLSENDTHRED = 0x100040; 	// almostfull1=0x40, sendthred1=0x10

	// set dma buffer
	JECS_CSU_DMAADDRL0 = CSU_RX_DESC_ADDR; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH0 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM0 = ID_NUM; // allnum is id num，每个ID段，是一个链表节点

	JECS_CSU_DMAADDRL1 = CSU_RX_DESC_ADDR + (sizeof(stCsuLinkDesc1L3D))*2*ID_NUM; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH1 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM1 = ID_NUM; // allnum is id num，每个ID段，是一个链表节点

	// tx
	// port info
	JECS_CSU_CPRITX0RFPSET 	= 0x40001; //RfpPoint=0x1 can send 4//push 4 basic frame at 1st tx_axc_rfp
	JECS_CSU_CPRITX0PORTINFO0  = ((ID0_SIZE*8*2)<<1)+((8*2)<<20)+(0<<26); // 小端，连续读取16bit，16bit有效，o_tx_axc_id=0
	JECS_CSU_CPRITX0PORTINFO1  = ((ID1_SIZE*8*8)<<1)+(0<<20)+(1<<26); // 小端，连续读取16bit，64bit有效，o_tx_axc_id=1
	JECS_CSU_CPRITX0PORTINFO2  = ((ID2_SIZE*8*8)<<1)+(0<<20)+(2<<26);
	JECS_CSU_CPRITX0PORTINFO3  = ((ID3_SIZE*8*8)<<1)+(0<<20)+(3<<26);
	JECS_CSU_CPRITX0PORTINFO4  = ((ID4_SIZE*8*8)<<1)+(0<<20)+(4<<26);
	JECS_CSU_CPRITX0PORTINFO5  = ((ID5_SIZE*8*2)<<1)+((8*2)<<20)+(5<<26);
	// latch info
	JECS_CSU_CPRITX0LATCHINFOL0 = ID0_SIZE*2*8;	// latch一次读取16bit
	JECS_CSU_CPRITX0LATCHINFOM0 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH0 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL1 = ID1_SIZE*8*8;	// latch一次读取64bit
	JECS_CSU_CPRITX0LATCHINFOM1 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH1 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL2 = ID2_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM2 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH2 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL3 = ID3_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM3 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH3 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL4 = ID4_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM4 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH4 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL5 = ID5_SIZE*2*8;
	JECS_CSU_CPRITX0LATCHINFOM5 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH5 = 0x380028;
	// 使用6个latch缓存数据，循环使用6个portinfo的信息，第一个rfp从port0开始
	JECS_CSU_CPRITX0ONWORK = ((ID_NUM-1)<<8)+(ID_NUM-1);
	// set dma buffer
	JECS_CSU_DMAADDRL10 = CSU_TX_DESC_ADDR; // DDR or SM
	JECS_CSU_DMAADDRH10 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM10 = ID_NUM;  // allnum is id num

	JECS_CSU_DMAADDRL11 = CSU_TX_DESC_ADDR + (sizeof(stCsuLinkDesc1L3D))*2*ID_NUM; // DDR or SM
	JECS_CSU_DMAADDRH11 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM11 = ID_NUM;  // allnum is id num
}

void cpri_csu_axc_link_init_timing()
{
	// 设置链表节点cmd
	uint32_t cycleNum = 8; // 32; //8;
	uint32_t rxListCmdL;
	uint32_t rxListCmdH;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	rxListCmdL = (1<<4)+(0<<5)+(3<<6);
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit36=1，读操作为对应AxC的rfp后第一组DMA请求
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	rxListCmdH = 1+(1<<2)+(1<<4)+(1<<11)+(1<<13);

	stCsuLinkDesc1L3D* pLinkDesc = NULL;
	stCsuLinkDesc1L3D stLinkDesc;
	int32_t idSize = 0;
	int32_t idCGran = 0;
	uint32_t srcAddr = 0;
	uint32_t dstAddr = 0;

	// rx: cpri -> ddr
	// 5ms，第1个链表
	int32_t i = 0;
	for(i = 0; i < ID_NUM; i++)
	{
		idCGran = 1; // 新的无线帧开始
		if(0 == i || 5 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF有4个AxC 64B*4
		}
		dstAddr = CSU_RX_AXC_ADDR + i*ID_DATA_STEP;
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*(256*75);	// 75 hyper frame
		stLinkDesc.dmaCGran = idCGran;	// 读侧，新的无线帧开始
		stLinkDesc.dmaGran = i; 		// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;		// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*(256*75);	// 75 hyper frame
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

	// 第2个链表
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	rxListCmdL = (1<<4)+(0<<5)+(3<<6);
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit36=1，读操作为对应AxC的rfp后第一组DMA请求
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	rxListCmdH = 1+(1<<2)+(0<<4)+(1<<11)+(1<<13);
	for(i = 0; i < ID_NUM; i++)
	{
		idCGran = 0;
		if(0 == i || 5 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF每个AxC 64B
		}
	//	dstAddr = CSU_RX_AXC_ADDR + 0x800000 + i*ID_DATA_STEP;
		dstAddr = CSU_RX_AXC_ADDR + ID_NUM*ID_DATA_STEP + i*ID_DATA_STEP;
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*ID_NUM+ 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*(256*75);
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*ID_NUM + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*(256*75);
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

	// 设置链表节点CMD
	uint32_t txListCmdL;
	uint32_t txListCmdH;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	txListCmdL = (1<<4)+(0<<5)+(3<<6);
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	txListCmdH = 1+(1<<2)+(1<<11)+(1<<13);

	idSize = 0;
	idCGran = 0;

	// tx: ddr -> cpri
	// 偶时隙的前7个符号，第1个链表
	for(i = 0; i < ID_NUM; i++)
	{
		if(0 == i || 5 == i)
		{
			idSize = 1*2; // 压缩因子，一个BF 2B
		}
		else
		{
			idSize = 8*8; // AxC数据，一个BF每个AxC 64B
		}
		srcAddr = CSU_TX_AXC_ADDR + i*ID_DATA_STEP;
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*75;	// tdd
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0; // 每个AxC ID，75个超帧的数据量，64B*256*75
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*75;	// 前7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

	// 第2个链表
	for(i = 0; i < ID_NUM; i++)
	{
		if(0 == i)
		{
			idSize = 1*2; // 压缩因子，一个BF 2B
		}
		else if (5 == i)
		{
			idSize = 1*2;
			idCGran = 1; // 该DMA为rfp的最后一个bit所在的DMA，但不一定是该rfp段最后一个DMA
		}
		else
		{
			idSize = 8*8; // AxC数据，一个BF每个AxC 64B
		}
//		srcAddr = CSU_TX_AXC_ADDR + i*ID_DATA_STEP;
		srcAddr = CSU_TX_AXC_ADDR + i*ID_DATA_STEP + ID_NUM*ID_DATA_STEP;
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*ID_NUM + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*75;	// 75 hyper frame
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*ID_NUM + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize*cycleNum;
		stLinkDesc.dmaYStep = idSize*cycleNum;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize*cycleNum;
		stLinkDesc.dmaAllNum = idSize*256*75;	// 后7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
}
#endif

void cpri_csu_axcctrl_init_timing()
{
	uint32_t basic_frame_ctrlaxc_byte;
#if 0
	uint32_t txCapStartNum = 1;
	uint32_t rfpStartNum = 0;
	uint32_t rxCapStartNum = 1;
#endif
	basic_frame_ctrlaxc_byte = 16; // option8, 128bit
//	printf("ctrlaxc_byte in bf is %d", basic_frame_ctrlaxc_byte);

	//rx ctrl axc dma config
	// reg dma
	JECS_CSU_DMAADDRL20 = 0; // addr_s
	JECS_CSU_DMAADDRH20 = 0;
	JECS_CSU_DMAYNUMXNUM20 = 0x10040;        // xnum=0x40,ynum=1,4 basic frames
	JECS_CSU_DMAYSTEPL20 = 0x40;				// ystep=xnum
	JECS_CSU_DMAZSTEPL20 = 0x40;				// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM20 = 0x58000000+ basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL21 = CSU_RX_CTRL_ADDR;	// addr_d
	JECS_CSU_DMAYNUMXNUM21 = 0x10000 + 0x100;// xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL21 = 0x100;			// ystep=xnum
	JECS_CSU_DMAZSTEPL21 = 0x100;			// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM21 = 0xF0000000 + basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE

	JECS_CSU_DMAADDRL22 = 0; // addr_s
	JECS_CSU_DMAADDRH22 = 0;
	JECS_CSU_DMAYNUMXNUM22 = 0x10040;        // xnum=0x40,ynum=1,4 basic frames
	JECS_CSU_DMAYSTEPL22 = 0x40;				// ystep=xnum
	JECS_CSU_DMAZSTEPL22 = 0x40;				// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM22 = 0x58000000+ basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL23 = CSU_RX_CTRL_ADDR + basic_frame_ctrlaxc_byte*4*4*75;	// addr_d
	JECS_CSU_DMAYNUMXNUM23 = 0x10000 + 0x100;// xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL23 = 0x100;			// ystep=xnum
	JECS_CSU_DMAZSTEPL23 = 0x100;			// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM23 = 0xF0000000 + basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE

	JECS_CSU_ALMOSTFULLSENDTHRED = 0x80048010; //almostfull1=0x10, sendthred1=0x4

	//tx ctrl axc dma config
	JECS_CSU_DMAADDRL24 = CSU_TX_CTRL_ADDR; // addr_s
	JECS_CSU_DMAADDRH24 = 0;
	JECS_CSU_DMAYNUMXNUM24 = 0x10100;        // xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL24 = 0x100;           // ystep=xnum
	JECS_CSU_DMAZSTEPL24 = 0x100;           // zstep = ystep
	// read global, dma size = 0xF
	JECS_CSU_DMASIZEGRANALLNUM24 = 0xF0000000+ basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL25 = 0;				   // addr_d
	JECS_CSU_DMAADDRH25 = 0;
	JECS_CSU_DMAYNUMXNUM25 = 0x10000+ 0x40; // xnum=0x40,ynum=1,4 basic frame
	JECS_CSU_DMAYSTEPL25 = 0x40; 		   // ystep=xnum
	JECS_CSU_DMAZSTEPL25 = 0x40;            // zstep = ystep
	// size = 5, cgran=1, gran=0
	JECS_CSU_DMASIZEGRANALLNUM25 = 0x58000000 + basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE

	JECS_CSU_DMAADDRL26 = CSU_TX_CTRL_ADDR + basic_frame_ctrlaxc_byte*4*4*75; // addr_s
	JECS_CSU_DMAADDRH26 = 0;
	JECS_CSU_DMAYNUMXNUM26 = 0x10100;        // xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL26 = 0x100;           // ystep=xnum
	JECS_CSU_DMAZSTEPL26 = 0x100;           // zstep = ystep
	// read global, dma size = 0xF
	JECS_CSU_DMASIZEGRANALLNUM26 = 0xF0000000+ basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL27 = 0;				   // addr_d
	JECS_CSU_DMAADDRH27 = 0;
	JECS_CSU_DMAYNUMXNUM27 = 0x10000+ 0x40; // xnum=0x40,ynum=1,4 basic frame
	JECS_CSU_DMAYSTEPL27 = 0x40; 		   // ystep=xnum
	JECS_CSU_DMAZSTEPL27 = 0x40;            // zstep = ystep
	// size = 5, cgran=1, gran=0
	JECS_CSU_DMASIZEGRANALLNUM27 = 0x58000000 + basic_frame_ctrlaxc_byte*4*4*75; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE
#if 0
	//tx start and rx capture num config

	// 收到rx_aux_rfp后，等待rx_axc_ctrl_num==RfpStartNum开始工作
	// 满足RfpStartNum之后，再满足rx_axc_ctrl_num==CapStartNum，开始接收数据
	// 满足CapStartNum时，表示一个DMA的开始，必须和DMA中命令Bit36==1的DMA对齐才可执行
	JECS_CSU_CPRIRX1ONWORK = (rxCapStartNum<<8) + rfpStartNum; // NUM0 is RfpStartNum, NUM1 is CapStartNum

	// 收到tx_aux_rfp之后，等待tx_axc_ctrl_num==TxCapStartNum，开始接收数据，只有第一次rfp有效
	JECS_CSU_CPRITX1ONWORK = (txCapStartNum<<8);         // TxCapStartNum
#endif
}

void cpri_csu_start_timing(void)
{

	uint32_t txCapStartNum = 1;
	uint32_t rfpStartNum = 0;
	uint32_t rxCapStartNum = 1;
#if 0
	//send rx axc ctrl cmd
	JECS_CSU_CMDHIGHDATA = (1 << 4); 							// 读操作为对应AxC的rfp后的第一组DMA请求
	JECS_CSU_CMDFIFO2 = (1<<4)+(1<<5)+(20<<8)+(21<<13)+(1<<18);	// 普通DMA，多维传输，cache模式, sbuffid=2, dbuffid=3, tag=1
	JECS_CSU_CMDHIGHDATA = 0;
	JECS_CSU_CMDFIFO2 = (1<<4)+(1<<5)+(22<<8)+(23<<13)+(1<<18);	// 普通DMA，多维传输，cache模式，sbuffid=4,dbuffid=5,tag=2
	//send tx axc ctrl cmd
	JECS_CSU_CMDHIGHDATA = 0;
	JECS_CSU_CMDFIFO3 = (1<<4)+(1<<5)+(24<<8)+(25<<13)+(2<<18);	// 普通DMA，多维传输，cache模式，sbuffid=4,dbuffid=5,tag=2
	JECS_CSU_CMDFIFO3 = (1<<4)+(1<<5)+(26<<8)+(27<<13)+(2<<18);	// 普通DMA，多维传输，cache模式，sbuffid=4,dbuffid=5,tag=2
//	JECS_CSU_CMDFIFO3 = (1<<0)+(1<<2)+(1<<4)+(1<<5)+(4<<8)+(5<<13)+(2<<18);	// 普通DMA，多维传输，cache模式，sbuffid=4,dbuffid=5,tag=2
	// 收到rx_aux_rfp后，等待rx_axc_ctrl_num==RfpStartNum开始工作
	// 满足RfpStartNum之后，再满足rx_axc_ctrl_num==rxCapStartNum，开始接收数据
	// 满足rxCapStartNum时，表示一个DMA的开始，必须和DMA中命令Bit36==1的DMA对齐才可执行
	JECS_CSU_CPRIRX1ONWORK = (1<<16) + (rxCapStartNum<<8) + rfpStartNum; // NUM0 is RfpStartNum, NUM1 is CapStartNum

	// 收到tx_aux_rfp之后，等待tx_axc_ctrl_num==TxCapStartNum，开始tx数据，只有第一次rfp有效
	JECS_CSU_CPRITX1ONWORK = (1<<16) + (txCapStartNum<<8);         // TxCapStartNum
#endif

	UCP_API_CPRI_CSU_RxAxcCtrl_Fifo2Cmd((1 << 4),((1<<4)+(1<<5)+(20<<8)+(21<<13)+(1<<18)));
	UCP_API_CPRI_CSU_RxAxcCtrl_Fifo2Cmd(0,((1<<4)+(1<<5)+(22<<8)+(23<<13)+(1<<18)));
	UCP_API_CPRI_CSU_TxAxcCtrl_Fifo3Cmd(0,((1<<4)+(1<<5)+(24<<8)+(25<<13)+(2<<18)));
	UCP_API_CPRI_CSU_TxAxcCtrl_Fifo3Cmd(0,((1<<4)+(1<<5)+(26<<8)+(27<<13)+(2<<18)));
	UCP_API_CPRI_CSU_RXCtrlAxc_ChannelCtrl(1,rxCapStartNum,rfpStartNum);
	UCP_API_CPRI_CSU_TXCtrlAxc_ChannelCtrl(1,txCapStartNum);
#if 0
	stCsuDmaCmdL cpriCmdL;
	memset(&cpriCmdL, 0, sizeof(stCsuDmaCmdL));
	// rx cmd
	// 读一级链表，写一级链表，多维DMA，非cache模式，src buf=0，tag=31
//	JECS_CSU_CMDFIFO0 = 1+(1<<2)+(1<<4)+(0<<5)+(3<<6)+(0<<8)+(31<<18);    //rlist=1,wlist=1,3den=1,AXI0 or AXI1???,continue=2'b11,sbuffid=4,tag=31
	cpriCmdL.rCmd = 1;
	cpriCmdL.wCmd = 1;
	cpriCmdL.dmaType = 1;
	cpriCmdL.continueLast = 1;
	cpriCmdL.continueNext = 1;
	cpriCmdL.idSrc = 0;
	cpriCmdL.dmaTag = 11;
	do_write((&JECS_CSU_CMDHIGHDATA), 0x10);
	do_write((&JECS_CSU_CMDFIFO0), *((uint32_t*)(&cpriCmdL)));

	cpriCmdL.idSrc = 1;
	cpriCmdL.dmaTag = 12;
//	JECS_CSU_CMDFIFO0 = *((uint32_t*)(&cpriCmdL));
	do_write((&JECS_CSU_CMDFIFO0), *((uint32_t*)(&cpriCmdL)));

	// tx cmd
//	JECS_CSU_CMDFIFO1 = 1+(1<<2)+(1<<4)+(0<<5)+(3<<6)+(1<<8)+(28<<18);    //rlist=1,wlist=1,3den=1,AXI0 or AXI1???,continue=2'b11,sbuffid=4,tag=28
	cpriCmdL.idSrc = 10;
	cpriCmdL.dmaTag = 21;
//	JECS_CSU_CMDFIFO1 = *((uint32_t*)(&cpriCmdL));
	do_write((&JECS_CSU_CMDFIFO1), *((uint32_t*)(&cpriCmdL)));

	cpriCmdL.idSrc = 11;
	cpriCmdL.dmaTag = 22;
//	JECS_CSU_CMDFIFO1 = *((uint32_t*)(&cpriCmdL));
	do_write((&JECS_CSU_CMDFIFO1), *((uint32_t*)(&cpriCmdL)));

	// ONWORK register only read
	JECS_CSU_CPRIRX0ONWORK = (1<<16)+ID_NUM-1;	// rx csu start work, 使用IDNUM个latch
	JECS_CSU_CPRITX0ONWORK = (1<<16)+((ID_NUM-1)<<8)+(ID_NUM-1);

	start_cpri_map();
#endif
}

#if 0
void cpri_csu_axc_init_7d2u(void)
{
	uint32_t basic_frame_byte = 0;
	uint32_t cycleNum = 1;
	// 以option8, 4T4R为例
	// ID0，包含1拍，1拍16bit
	// ID1~ID4，包含8拍，1拍64bit
	// 1个基本帧包含1*2+32*8=258B的有效数据
	basic_frame_byte = ID0_SIZE*2 + (ID1_SIZE+ID2_SIZE+ID3_SIZE+ID4_SIZE)*8;
//	ECPRI_RST_CFG_REG |= BIT24;

	cpri_csu_axc_link_init_timing(); // 链表节点描述符初始化

	// rx
	// port info
	JECS_CSU_CPRIRX0RFPSET	   = ID_NUM_TIMING-1; // 可以使用的port数，使用输入i_rx_axc_id选择PortInfo参数
	JECS_CSU_CPRIRX0PORTINFO0  = ((ID0_SIZE*8*2)<<1)+(8*2<<22);	// 小端模式，连续读取16bit，16bit有效
	JECS_CSU_CPRIRX0PORTINFO1  = ((ID1_SIZE*8*8)<<1)+(0<<22);	// 小端模式，连续读取64bit，64bit有效
	JECS_CSU_CPRIRX0PORTINFO2  = ((ID2_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO3  = ((ID3_SIZE*8*8)<<1)+(0<<22);
	JECS_CSU_CPRIRX0PORTINFO4  = ((ID4_SIZE*8*8)<<1)+(0<<22);
	// latch info
	JECS_CSU_CPRIRX0LATCHINFOL0 = ID0_SIZE*2*8;	// latch一次，读取16bit
	JECS_CSU_CPRIRX0LATCHINFOH0 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM0   = cycleNum-1;	// 对应每个latch，8个cycle对齐一次
	JECS_CSU_CPRIRX0LATCHINFOL1 = ID1_SIZE*8*8;	// latch一次，读取64bit
	JECS_CSU_CPRIRX0LATCHINFOH1 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM1   = cycleNum-1;	// 对应每个latch，8个cycle对齐一次
	JECS_CSU_CPRIRX0LATCHINFOL2 = ID2_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH2 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM2   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL3 = ID3_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH3 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM3   = cycleNum-1;
	JECS_CSU_CPRIRX0LATCHINFOL4 = ID4_SIZE*8*8;
	JECS_CSU_CPRIRX0LATCHINFOH4 = 0x38281808;
	JECS_CSU_CPRIRX0CYCLENUM4   = cycleNum-1;
	// start work
	JECS_CSU_CPRIRX0ONWORK = (1<<16)+ID_NUM_TIMING-1;	// rx csu start work, 使用IDNUM个latch
	JECS_CSU_ALMOSTFULLSENDTHRED = 0x100040; 	// almostfull1=0x40, sendthred1=0x10

	// set dma buffer
	JECS_CSU_DMAADDRL0 = CSU_RX_DESC_ADDR; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH0 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM0 = ID_NUM_TIMING; // allnum is id num，每个ID段，是一个链表节点

	JECS_CSU_DMAADDRL1 = CSU_RX_DESC_ADDR + 64*ID_NUM_TIMING; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH1 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM1 = ID_NUM_TIMING; // allnum is id num，每个ID段，是一个链表节点

	JECS_CSU_DMAADDRL2 = CSU_RX_DESC_ADDR + 2*64*ID_NUM_TIMING; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH2 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM2 = ID_NUM_TIMING; // allnum is id num，每个ID段，是一个链表节点

	JECS_CSU_DMAADDRL3 = CSU_RX_DESC_ADDR + 3*64*ID_NUM_TIMING; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH3 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM3 = ID_NUM_TIMING; // allnum is id num，每个ID段，是一个链表节点

	JECS_CSU_DMAADDRL4 = CSU_RX_DESC_ADDR + 4*64*ID_NUM_TIMING; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH4 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM4 = ID_NUM_TIMING; // allnum is id num，每个ID段，是一个链表节点

	JECS_CSU_DMAADDRL5 = CSU_RX_DESC_ADDR + 5*64*ID_NUM_TIMING; 		// DDR or SM，链表节点描述符，存放地址
	JECS_CSU_DMAADDRH5 = 0; 					// DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM5 = ID_NUM_TIMING; // allnum is id num，每个ID段，是一个链表节点


	// tx
	// port info
	JECS_CSU_CPRITX0RFPSET 	= 0x40001; //RfpPoint=0x1 can send 4//push 4 basic frame at 1st tx_axc_rfp
	JECS_CSU_CPRITX0PORTINFO0  = ((ID0_SIZE*8*2)<<1)+(8*2<<20)+(0<<26); // 小端，连续读取16bit，16bit有效，o_tx_axc_id=0
	JECS_CSU_CPRITX0PORTINFO1  = ((ID1_SIZE*8*8)<<1)+(0<<20)+(1<<26); // 小端，连续读取16bit，64bit有效，o_tx_axc_id=1
	JECS_CSU_CPRITX0PORTINFO2  = ((ID2_SIZE*8*8)<<1)+(0<<20)+(2<<26);
	JECS_CSU_CPRITX0PORTINFO3  = ((ID3_SIZE*8*8)<<1)+(0<<20)+(3<<26);
	JECS_CSU_CPRITX0PORTINFO4  = ((ID4_SIZE*8*8)<<1)+(0<<20)+(4<<26);
	// latch info
	JECS_CSU_CPRITX0LATCHINFOL0 = ID0_SIZE*2*8;	// latch一次读取16bit
	JECS_CSU_CPRITX0LATCHINFOM0 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH0 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL1 = ID1_SIZE*8*8;	// latch一次读取64bit
	JECS_CSU_CPRITX0LATCHINFOM1 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH1 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL2 = ID2_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM2 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH2 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL3 = ID3_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM3 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH3 = 0x380028;
	JECS_CSU_CPRITX0LATCHINFOL4 = ID4_SIZE*8*8;
	JECS_CSU_CPRITX0LATCHINFOM4 = 0x180008;
	JECS_CSU_CPRITX0LATCHINFOH4 = 0x380028;
	// start work
	// 使用5个latch缓存数据，循环使用6个portinfo的信息，第一个rfp从port0开始
	JECS_CSU_CPRITX0ONWORK = (1<<16)+((ID_NUM_TIMING-1)<<8)+(ID_NUM_TIMING-1);
	// set dma buffer
	JECS_CSU_DMAADDRL10 = CSU_TX_DESC_ADDR; // DDR or SM
	JECS_CSU_DMAADDRH10 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM10 = ID_NUM;  // allnum is id num

	JECS_CSU_DMAADDRL11 = CSU_TX_DESC_ADDR + 64*ID_NUM_TIMING; // DDR or SM
	JECS_CSU_DMAADDRH11 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM11 = ID_NUM;  // allnum is id num

	JECS_CSU_DMAADDRL12 = CSU_TX_DESC_ADDR + 2*64*ID_NUM_TIMING; // DDR or SM
	JECS_CSU_DMAADDRH12 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM12 = ID_NUM;  // allnum is id num

	JECS_CSU_DMAADDRL13 = CSU_TX_DESC_ADDR + 3*64*ID_NUM_TIMING; // DDR or SM
	JECS_CSU_DMAADDRH13 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM13 = ID_NUM;  // allnum is id num

	JECS_CSU_DMAADDRL14 = CSU_TX_DESC_ADDR + 4*64*ID_NUM_TIMING; // DDR or SM
	JECS_CSU_DMAADDRH14 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM14 = ID_NUM;  // allnum is id num

	JECS_CSU_DMAADDRL15 = CSU_TX_DESC_ADDR + 5*64*ID_NUM_TIMING; // DDR or SM
	JECS_CSU_DMAADDRH15 = 0; //DDR or SM
	JECS_CSU_DMASIZEGRANALLNUM15 = ID_NUM;  // allnum is id num
}

void cpri_csu_axc_link_init_timing_7d2u()
{
	// 设置链表节点cmd
	uint32_t rxListCmdL;
	uint32_t rxListCmdH;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	rxListCmdL = (1<<4)+(0<<5)+(3<<6); 
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit36=1，读操作为对应AxC的rfp后第一组DMA请求
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	rxListCmdH = 1+(1<<2)+(1<<4)+(1<<11)+(1<<13);

	stCsuLinkDesc1L3D* pLinkDesc = NULL;
	stCsuLinkDesc1L3D stLinkDesc;
	int32_t idSize = 0;
	int32_t idCGran = 0;
	uint32_t srcAddr = 0;
	uint32_t dstAddr = 0;
	
	// rx: cpri -> ddr
	// 前7个下行时隙+特殊时隙的前10个符号，第1个链表
	int32_t i = 0;
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		idCGran = 1; // 新的无线帧开始
		if(0 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
			dstAddr = CSU_DUMMY1; // 特殊时隙的压缩因子的起始地址，(7*7.5*256+139+137*9)*2B=14812*2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF有4个AxC 64B*4
			dstAddr = CSU_DUMMY1 + (7*7.5*256+139+137*9)*2 + (i-1)*64*(7*7.5*256+139+137*9); // 7个下行时隙+特殊时隙的前10个符号的4个AxC的数据
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(7*7.5*256+139+137*9);	// 7个下行时隙+特殊时隙的前10个符号
		stLinkDesc.dmaCGran = idCGran;	// 读侧，新的无线帧开始
		stLinkDesc.dmaGran = i; 		// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;		// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(7*7.5*256+139+137*9);	// 7个下行时隙+特殊时隙的前10个符号
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	int32_t rxComFactorLen = 2*256*15 + 2*(137*4); // 接收的压缩因子长度，8776B
	idCGran = 0;
	// 特殊时隙的后4个符号，第2个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
			dstAddr = CSU_RX_AXC_ADDR; // 特殊时隙的后4个符号的压缩因子的起始地址，4*137*2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF每个AxC 64B
			dstAddr = CSU_RX_AXC_ADDR + rxComFactorLen + (i-1)*64*(137*4); // 特殊时隙的后4个符号的4个AxC的数据
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*137*4;	// 后4个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 2*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*137*4;	// 后4个符号
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	// 偶时隙的前7个符号，第3个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
			dstAddr = CSU_RX_AXC_ADDR + 4*137*2; // 偶时隙的前7个符号的压缩因子的起始地址，(139+6*137)*2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF每个AxC 64B
			dstAddr = CSU_RX_AXC_ADDR + rxComFactorLen + 4*64*137*4 + (i-1)*64*(139+137*6); // 偶时隙的前7个符号的AxC的数据
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 4*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(139+137*6);	// 前7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 4*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(139+137*6);	// 前7个符号
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	// 偶时隙的后7个符号，第4个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
			dstAddr = CSU_RX_AXC_ADDR + 4*137*2 + (139+6*137)*2; // 偶时隙的后7个符号的压缩因子的起始地址，(7*137)*2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF每个AxC 64B
			dstAddr = CSU_RX_AXC_ADDR + rxComFactorLen + 4*64*137*4 + 4*64*(139+137*6) + (i-1)*64*(137*7); // 偶时隙的后7个符号的AxC的数据
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 6*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(137*7);	// 后7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 6*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(137*7);	// 后7个符号
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	// 奇时隙的前7个符号，第3个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
			dstAddr = CSU_RX_AXC_ADDR + 4*137*2 + 7.5*256*2; // 奇时隙的前7个符号的压缩因子的起始地址，(139+6*137)*2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF每个AxC 64B
			dstAddr = CSU_RX_AXC_ADDR + rxComFactorLen + 4*64*(137*4+7.5*256) + (i-1)*64*(139+137*6); // 奇时隙的前7个符号的AxC的数据
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 8*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(139+137*6);	// 前7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 8*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(139+137*6);	// 前7个符号
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	// 奇时隙的后7个符号，第4个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
			dstAddr = CSU_RX_AXC_ADDR + 4*137*2 + 7.5*256*2 + (139+6*137)*2; // 奇时隙的后7个符号的压缩因子的起始地址，(7*137)*2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF每个AxC 64B
			dstAddr = CSU_RX_AXC_ADDR + rxComFactorLen + 4*64*(137*4+7.5*256) + 4*64*(139+137*6) + (i-1)*64*(137*7); // 奇时隙的后7个符号的AxC的数据
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 10*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(137*7);	// 后7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次从哪个latch读出
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_RX_DESC_ADDR + 10*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = dstAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(137*7);	// 后7个符号
		stLinkDesc.dmaSize = 0xF;	// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
//	clean_cache(CSU_RX_DESC_ADDR, 64*ID_NUM_TIMING*6); // 6个链表，每个链表5个节点，共30个节点，60个描述符
	
	// 设置链表节点CMD
	uint32_t txListCmdL;
	uint32_t txListCmdH;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	txListCmdL = (1<<4)+(0<<5)+(3<<6);
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	txListCmdH = 1+(1<<2)+(1<<11)+(1<<13);

	int32_t txComFactorLen = 2*256*15 + 2*(139+137*5); // 发送的压缩因子长度，9328B
	idSize = 0;
	idCGran = 0;
	
	// tx: ddr -> cpri
	// 偶时隙的前7个符号，第1个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2; // 压缩因子，一个BF 2B
			srcAddr = CSU_TX_AXC_ADDR; // 2个时隙的压缩因子,2B*256*15
		}
		else
		{
			idSize = 8*8; // AxC数据，一个BF每个AxC 64B
			srcAddr = CSU_TX_AXC_ADDR + txComFactorLen + (i-1)*64*(139+137*6); // 前7个符号的每个AxC的数据，961个BF，61504B，30752个样点
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*139 + idSize*137*6;	// 前7个符号
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0; // 每个AxC ID，15个超帧的数据量，64B*256*15
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*139 + idSize*137*6;	// 前7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

	// 偶时隙的后7个符号，第2个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2; // 压缩因子，一个BF 2B
			srcAddr = CSU_TX_AXC_ADDR + 2*(139+137*6); // 偶时隙的后7个符号的压缩因子的起始地址
		}
		else
		{
			idSize = 8*8; // AxC数据，一个BF每个AxC 64B
			srcAddr = CSU_TX_AXC_ADDR + txComFactorLen + 4*64*(139+137*6) + (i-1)*64*(137*7); // 偶时隙的后7个符号的天线数据,959个BF，61376B,30688个样点
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*137*7;	// 后7个符号
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 2*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*137*7;	// 后7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

	// 奇时隙的前7个符号，第3个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2; // 压缩因子，一个BF 2B
			srcAddr = CSU_TX_AXC_ADDR + 2*256*7.5; // 第2个时隙的压缩因子的起始地址
		}
		else
		{
			idSize = 8*8; // AxC数据，一个BF每个AxC 64B
			srcAddr = CSU_TX_AXC_ADDR + txComFactorLen + 4*64*(256*7.5) + (i-1)*64*(139+137*6); // 前7个符号的每个AxC的数据，961个BF，61504B，30752个样点
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 4*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*139 + idSize*137*6;	// 前7个符号
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 4*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0; 
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*139 + idSize*137*6;	// 前7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

	// 奇时隙的后7个符号，第4个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2; // 压缩因子，一个BF 2B
			srcAddr = CSU_TX_AXC_ADDR + 2*256*7.5 + 2*(139+137*6); // 奇时隙的后7个符号的压缩因子的起始地址
		}
		else
		{
			idSize = 8*8; // AxC数据，一个BF每个AxC 64B
			srcAddr = CSU_TX_AXC_ADDR + txComFactorLen + 4*64*(139+137*6) + (i-1)*64*(137*7); // 奇时隙的后7个符号的天线数据
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 6*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*137*7;	// 后7个符号
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 6*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*137*7;	// 后7个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

	// 特殊时隙的前6个符号，第5个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2; // 压缩因子，一个BF 2B
			srcAddr = CSU_TX_AXC_ADDR + 2*256*15; // 特殊时隙的压缩因子的起始地址
		}
		else
		{
			idSize = 8*8; // AxC数据，一个BF每个AxC 64B
			srcAddr = CSU_TX_AXC_ADDR + txComFactorLen + 4*64*(256*15) + (i-1)*64*(139+137*5); // 前6个符号的每个AxC的数据，824个BF，52736B，26368个样点
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 8*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*139 + idSize*137*5;	// 前6个符号
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 8*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0; 
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*139 + idSize*137*5;	// 前6个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	// 特殊时隙的后8个符号+2个上行时隙，第6个链表
	for(i = 0; i < ID_NUM_TIMING; i++)
	{
		if(0 == i)
		{
			idSize = 1*2;	// 压缩因子，一个BF 2B
			srcAddr = CSU_DUMMY0; //CSU_TX_DUMMY_ADDR; // 特殊时隙的压缩因子的起始地址，(137*8+15*256)*2B=4936*2B
		}
		else
		{
			idSize = 8*8;	// AxC数据，一个BF有4个AxC 64B*4
			srcAddr = CSU_DUMMY0; //CSU_TX_DUMMY_ADDR + (137*8+15*256)*2 + (i-1)*64*(2*7.5*256+137*8); // 后8个符号+2个上行时隙的4个AxC的数据
			idCGran = 1; 	// 该DMA为rfp的最后一个bit所在的DMA，但不一定是该rfp段最后一个DMA
		}
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 10*ID_NUM_TIMING + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = srcAddr;
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = 0; // idSize;
		stLinkDesc.dmaAllNum = idSize*(137*8+15*256);	// 后8个符号
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)CSU_TX_DESC_ADDR + 10*ID_NUM_TIMING + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0; 
		stLinkDesc.dmaXNum = idSize;
		stLinkDesc.dmaYStep = idSize;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = idSize;
		stLinkDesc.dmaAllNum = idSize*(137*8+15*256);	// 后8个符号
		stLinkDesc.dmaCGran = idCGran;
		stLinkDesc.dmaGran = i; 	// 本次写入哪个latch
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}

//	clean_cache(CSU_TX_DESC_ADDR, 64*(ID_NUM_TIMING*6)); // 6个链表，每个链表各5个节点，共30个节点，60个描述符
}

void cpri_csu_axcctrl_init_timing_7d2u()
{
	uint32_t basic_frame_ctrlaxc_byte;
	uint32_t NUM = 0;
	uint32_t NUM0 = 0;
	uint32_t NUM1 = 0;

	basic_frame_ctrlaxc_byte = 16; // option8, 128bit
//	printf("ctrlaxc_byte in bf is %d", basic_frame_ctrlaxc_byte);
	
	//rx ctrl axc dma config
	// reg dma
	JECS_CSU_DMAADDRL20 = 0; // addr_s
	JECS_CSU_DMAADDRH20 = 0;
	JECS_CSU_DMAYNUMXNUM20 = 0x10010;        // xnum=0x10,ynum=1,1 basic frame
	JECS_CSU_DMAYSTEPL20 = 0x10;				// ystep=xnum
	JECS_CSU_DMAZSTEPL20 = 0x10;				// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM20 = 0x08000000+ basic_frame_ctrlaxc_byte*4*4*150; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL21 = CSU_RX_CTRL_ADDR;	// addr_d
	JECS_CSU_DMAYNUMXNUM21 = 0x10000 + 0x100;// xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL21 = 0x100;			// ystep=xnum
	JECS_CSU_DMAZSTEPL21 = 0x100;			// zstep = ystep
	JECS_CSU_DMASIZEGRANALLNUM21 = 0xF0000000 + basic_frame_ctrlaxc_byte*4*4*150; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE
	
	JECS_CSU_ALMOSTFULLSENDTHRED = 0x80048010; //almostfull1=0x10, sendthred1=0x4

	//tx ctrl axc dma config
	JECS_CSU_DMAADDRL22 = CSU_TX_CTRL_ADDR; // addr_s
	JECS_CSU_DMAADDRH22 = 0;
	JECS_CSU_DMAYNUMXNUM22 = 0x10100;        // xnum=0x100,ynum=1,1 hyper frame
	JECS_CSU_DMAYSTEPL22 = 0x100;           // ystep=xnum
	JECS_CSU_DMAZSTEPL22 = 0x100;           // zstep = ystep
	// read global, dma size = 0xF
	JECS_CSU_DMASIZEGRANALLNUM22 = 0xF0000000+ basic_frame_ctrlaxc_byte*4*4*150; //allnum=0x57800,gran = 0, size=f, don¡¯t care size,gran
	JECS_CSU_DMAADDRL23 = 0;				   // addr_d
	JECS_CSU_DMAADDRH23 = 0;
	JECS_CSU_DMAYNUMXNUM23 = 0x10000+ 0x10; // xnum=0x10,ynum=1,1 basic frame
	JECS_CSU_DMAYSTEPL23 = 0x10; 		   // ystep=xnum
	JECS_CSU_DMAZSTEPL23 = 0x10;            // zstep = ystep
	// size = 5, cgran=1, gran=0
	JECS_CSU_DMASIZEGRANALLNUM23 = 0x08000000 + basic_frame_ctrlaxc_byte*4*4*150; //allnum=0x57800,gran=0x8,size=5, don¡¯t care sizE
	
	//tx start and rx capture num config
	
	// 收到rx_aux_rfp后，等待rx_axc_ctrl_num==RfpStartNum开始工作
	// 满足RfpStartNum之后，再满足rx_axc_ctrl_num==CapStartNum，开始接收数据
	// 满足CapStartNum时，表示一个DMA的开始，必须和DMA中命令Bit36==1的DMA对齐才可执行
	JECS_CSU_CPRIRX1ONWORK = 0x10000 + (NUM1<<8) + NUM0; // NUM0 is RfpStartNum, NUM1 is CapStartNum
	
	// 收到tx_aux_rfp之后，等待tx_axc_ctrl_num==TxCapStartNum，开始接收数据，只有第一次rfp有效
	JECS_CSU_CPRITX1ONWORK = 0x10000 + (NUM<<8);         // TxCapStartNum
}

void cpri_csu_start_timing_7d2u(void)
{
	stCsuDmaCmdL cpriCmdL;
	*(uint32_t*)(&cpriCmdL) = 0;

	// rx cmd
	// 1 link
	// 读一级链表，写一级链表，多维DMA，非cache模式，src buf=0，tag=31
	cpriCmdL.rCmd = 1;
	cpriCmdL.wCmd = 1;
	cpriCmdL.dmaType = 1;
	cpriCmdL.continueLast = 1;
	cpriCmdL.continueNext = 1;
	cpriCmdL.idSrc = 0;
	cpriCmdL.dmaTag = 31;
	// bit32=1，读操作完成一个xNum换下一个DMA
	// bit34=1，写操作完成一个xNum换下一个DMA
	// bit36=1，读操作为对应AxC的rfp后第一组DMA请求
	// bit43=1，写操作链式循环
	// bit45=1，读操作链式循环
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<4)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 2 link
	cpriCmdL.idSrc = 1;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 3 link
	cpriCmdL.idSrc = 2;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 4 link
	cpriCmdL.idSrc = 3;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 5 link
	cpriCmdL.idSrc = 4;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 6 link
	cpriCmdL.idSrc = 5;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);

	// 3 link
	cpriCmdL.idSrc = 2;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 4 link
	cpriCmdL.idSrc = 3;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 5 link
	cpriCmdL.idSrc = 4;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	// 6 link
	cpriCmdL.idSrc = 5;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO0 = *(uint32_t*)(&cpriCmdL);
	
	// tx cmd
	// 1 link
	cpriCmdL.idSrc = 0x10;
	cpriCmdL.dmaTag = 28;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 2 link
	cpriCmdL.idSrc = 0x11;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 3 link
	cpriCmdL.idSrc = 0x12;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 4 link
	cpriCmdL.idSrc = 0x13;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);

	// 1 link
	cpriCmdL.idSrc = 0x10;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 2 link
	cpriCmdL.idSrc = 0x11;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 3 link
	cpriCmdL.idSrc = 0x12;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 4 link
	cpriCmdL.idSrc = 0x13;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	
	// 1 link
	cpriCmdL.idSrc = 0x10;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 2 link
	cpriCmdL.idSrc = 0x11;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 3 link
	cpriCmdL.idSrc = 0x12;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 4 link
	cpriCmdL.idSrc = 0x13;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	
	// 1 link
	cpriCmdL.idSrc = 0x10;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 2 link
	cpriCmdL.idSrc = 0x11;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	
	// 5 link
	cpriCmdL.idSrc = 0x14;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);
	// 6 link
	cpriCmdL.idSrc = 0x15;
	JECS_CSU_CMDHIGHDATA = 1+(1<<2)+(1<<11)+(1<<13);
	JECS_CSU_CMDFIFO1 = *(uint32_t*)(&cpriCmdL);

	//send rx axc ctrl cmd
	JECS_CSU_CMDHIGHDATA = (1 << 4); 							// 读操作为对应AxC的rfp后的第一组DMA请求
	JECS_CSU_CMDFIFO2 = (1<<4)+(1<<5)+(20<<8)+(21<<13)+(1<<18);	// 普通DMA，多维传输，cache模式, sbuffid=20, dbuffid=21, tag=1
	//send tx axc ctrl cmd
	JECS_CSU_CMDHIGHDATA = 0;
	JECS_CSU_CMDFIFO3 = (1<<4)+(1<<5)+(22<<8)+(23<<13)+(2<<18);	// 普通DMA，多维传输，cache模式，sbuffid=22,dbuffid=23,tag=2
}
#endif


