//******************** (C) COPYRIGHT 2020 SmartLogic*******************************
// FileName           : pet_ctrl.h
// Author             : lijian, jian.li@smartlogictech.com
// Date First Issued  : 2020-05-08 07:44:13 AM
// Last Modified      : 2022-04-13 12:31:08 PM
// Description        :
// ------------------------------------------------------------
// Modification History:
// Version    Date       Author    Modification Description
//
//**********************************************************************************
#ifndef __PET_CTRL_C_H__
#define __PET_CTRL_C_H__

#define PET_CTRL_BASE                          0x091D0000
#define PET_CRG_BASE                           0x091F0000





#define PET_PLL_CTL_REG0                          (*((volatile uint32_t *)(PET_CRG_BASE + 0x00)))
#define PET_PLL_CTL_REG1                          (*((volatile uint32_t *)(PET_CRG_BASE + 0x04)))
#define PET_PLL_CTL_REG2                          (*((volatile uint32_t *)(PET_CRG_BASE + 0x08)))
#define PET_PLL_CTL_REG3                          (*((volatile uint32_t *)(PET_CRG_BASE + 0x0C)))
#define PET_PLL_CTL_REG4                          (*((volatile uint32_t *)(PET_CRG_BASE + 0x10)))

#define PET_PLLSEL                                (*((volatile uint32_t *)(PET_CRG_BASE + 4*5)))
#define PET_ECPRI_PCS_RXCLK_CFG                   (*((volatile uint32_t *)(PET_CRG_BASE + 4*6)))
#define PET_TMAC_DEVCLK_TX_CFG                    (*((volatile uint32_t *)(PET_CRG_BASE + 4*7)))
#define PET_TMAC_DEVCLK_RX_CFG                    (*((volatile uint32_t *)(PET_CRG_BASE + 4*8)))

#define PET_ECPRI_APBACLK_CFG                     (*((volatile uint32_t *)(PET_CRG_BASE + 4*12)))
#define PET_ECPRI_SWITCH_SCHCLK_CFG               (*((volatile uint32_t *)(PET_CRG_BASE + 4*13)))
#define PET_ECPRI_SWITCH_MAECORECLK_CFG           (*((volatile uint32_t *)(PET_CRG_BASE + 4*14)))
#define PET_ECPRI_PCS_TXCLK_CFG                   (*((volatile uint32_t *)(PET_CRG_BASE + 4*15)))
#define PET_ETH_CLK_EEE_CFG                       (*((volatile uint32_t *)(PET_CRG_BASE + 4*16)))
#define PET_ETHPLL_TEST_CLK_CFG                   (*((volatile uint32_t *)(PET_CRG_BASE + 4*17)))
#define PET_MANTICORE0_RST_CFG                    (*((volatile uint32_t *)(PET_CRG_BASE + 4*19)))
#define PET_MANTICORE1_RST_CFG                    (*((volatile uint32_t *)(PET_CRG_BASE + 4*20)))
#define PET_MANTICORE2_RST_CFG                    (*((volatile uint32_t *)(PET_CRG_BASE + 4*21)))
#define PET_MANTICORE3_RST_CFG                    (*((volatile uint32_t *)(PET_CRG_BASE + 4*22)))
#define PET_MANTICORE4_RST_CFG                    (*((volatile uint32_t *)(PET_CRG_BASE + 4*23)))
#define PET_EQ0_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*24)))

#define PET_EQ1_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*25)))
#define PET_EQ2_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*26)))
#define PET_EQ3_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*27)))
#define PET_PAMRX0_RST_CFG                        (*((volatile uint32_t *)(PET_CRG_BASE + 4*28)))
#define PET_PAMRX1_RST_CFG                        (*((volatile uint32_t *)(PET_CRG_BASE + 4*29)))
#define PET_PAMRX2_RST_CFG                        (*((volatile uint32_t *)(PET_CRG_BASE + 4*30)))
#define PET_PAMRX3_RST_CFG                        (*((volatile uint32_t *)(PET_CRG_BASE + 4*31)))
#define PET_RX0_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*32)))
#define PET_RX1_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*33)))
#define PET_RX2_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*34)))
#define PET_RX3_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*35)))
#define PET_TX0_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*36)))
#define PET_TX1_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*37)))
#define PET_TX2_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*38)))
#define PET_TX3_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*39)))
#define PET_PWR_RST_CFG                           (*((volatile uint32_t *)(PET_CRG_BASE + 4*40)))
#define PET_PCIE_RST_CFG                          (*((volatile uint32_t *)(PET_CRG_BASE + 4*41)))

#define PET_CTRL_REG00                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*0)))
#define PET_RFM_M0_AWUSER                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*1)))
#define PET_RFM_M0_WUSER                      (*((volatile uint32_t *)(PET_CTRL_BASE + 4*2)))
#define PET_RFM_M0_ARUSER                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*3)))
#define PET_RFM_M1_AWUSER                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*4)))
#define PET_RFM_M1_WUSER                      (*((volatile uint32_t *)(PET_CTRL_BASE + 4*5)))
#define PET_RFM_M1_ARUSER                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*6)))
#define PET_TEST_CTRL                         (*((volatile uint32_t *)(PET_CTRL_BASE + 4*7)))
#define PET_RFM_ADDR                          (*((volatile uint32_t *)(PET_CTRL_BASE + 4*8)))
#define PET_TESTCLK_SEL                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*9)))
#define PET_ADDR0_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*10)))
#define PET_ADDR0_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*20)))
#define PET_ADDR0_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*30)))
#define PET_ADDR0_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*40)))
#define PET_ADDR1_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*11)))
#define PET_ADDR1_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*21)))
#define PET_ADDR1_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*31)))
#define PET_ADDR1_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*41)))
#define PET_ADDR2_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*12)))
#define PET_ADDR2_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*22)))
#define PET_ADDR2_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*32)))
#define PET_ADDR2_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*42)))
#define PET_ADDR3_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*13)))
#define PET_ADDR3_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*23)))
#define PET_ADDR3_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*33)))
#define PET_ADDR3_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*43)))
#define PET_ADDR4_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*14)))
#define PET_ADDR4_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*24)))
#define PET_ADDR4_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*34)))
#define PET_ADDR4_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*44)))
#define PET_ADDR5_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*15)))
#define PET_ADDR5_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*25)))
#define PET_ADDR5_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*35)))
#define PET_ADDR5_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*45)))
#define PET_ADDR6_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*16)))
#define PET_ADDR6_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*26)))
#define PET_ADDR6_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*36)))
#define PET_ADDR6_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*46)))
#define PET_ADDR7_START_H                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*17)))
#define PET_ADDR7_START_L                     (*((volatile uint32_t *)(PET_CTRL_BASE + 4*27)))
#define PET_ADDR7_END_H                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*37)))
#define PET_ADDR7_END_L                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*47)))
#define PET_PCIE_AWUSER                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*50)))
#define PET_PCIE_WUSER                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*51)))
#define PET_PCIE_ARUSER                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*52)))
#define PET_SMMU_REGION                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*53)))
#define PET_TMAC_AWUSER                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*54)))
#define PET_TMAC_WUSER                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*55)))
#define PET_TMAC_ARUSER                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*56)))
#define PET_CCM_CTRL                          (*((volatile uint32_t *)(PET_CTRL_BASE + 4*57)))
#define PET_SPACC_ADDR                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*58)))
#define PET_PHY_BS_CTRL                       (*((volatile uint32_t *)(PET_CTRL_BASE + 4*59)))
#define PET_DDR_AWUSER                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*60)))
#define PET_DDR_WUSER                         (*((volatile uint32_t *)(PET_CTRL_BASE + 4*61)))
#define PET_DDR_ARUSER                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*62)))
#define PET_DDR_CTRL                          (*((volatile uint32_t *)(PET_CTRL_BASE + 4*63)))
#define PET_SM_AWUSER                         (*((volatile uint32_t *)(PET_CTRL_BASE + 4*64)))
#define PET_SM_WUSER                          (*((volatile uint32_t *)(PET_CTRL_BASE + 4*65)))
#define PET_SM_ARUSER                         (*((volatile uint32_t *)(PET_CTRL_BASE + 4*66)))
#define PET_SM_CTRL                           (*((volatile uint32_t *)(PET_CTRL_BASE + 4*67)))
#define PET_PCIE_BUSER                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*68)))
#define PET_PCIE_RUSER                        (*((volatile uint32_t *)(PET_CTRL_BASE + 4*69)))

#define PETRFM_INT_MASK0_PTR					((volatile uint32_t *)(PET_CTRL_BASE + 70*4))
#define PETRFM_INT_MASK0                      (*((volatile uint32_t *)(PET_CTRL_BASE + 70*4)))
#define PETRFM_INT_MASK1                      (*((volatile uint32_t *)(PET_CTRL_BASE + 71*4)))
#define PETRFM_INT_MASK2                      (*((volatile uint32_t *)(PET_CTRL_BASE + 72*4)))
#define PETRFM_INT_MASK3                      (*((volatile uint32_t *)(PET_CTRL_BASE + 73*4)))
#define PETRFM_INT_MASK4                      (*((volatile uint32_t *)(PET_CTRL_BASE + 74*4)))
#define PETRFM_INT_MASK5                      (*((volatile uint32_t *)(PET_CTRL_BASE + 75*4)))
#define PETRFM_INT_MASK6                      (*((volatile uint32_t *)(PET_CTRL_BASE + 76*4)))
#define PETRFM_INT_MASK7                      (*((volatile uint32_t *)(PET_CTRL_BASE + 77*4)))
#define PETRFM_INT_MASK8                      (*((volatile uint32_t *)(PET_CTRL_BASE + 78*4)))
#define PETRFM_INT_MASK9                      (*((volatile uint32_t *)(PET_CTRL_BASE + 79*4)))
#define PETRFM_INT_MASK10                     (*((volatile uint32_t *)(PET_CTRL_BASE + 80*4)))
#define PETRFM_INT_MASK11                     (*((volatile uint32_t *)(PET_CTRL_BASE + 81*4)))
#define PETRFM_INT_MASK12                     (*((volatile uint32_t *)(PET_CTRL_BASE + 82*4)))
#define PETRFM_INT_MASK13                     (*((volatile uint32_t *)(PET_CTRL_BASE + 83*4)))
#define PETRFM_INT_MASK14                     (*((volatile uint32_t *)(PET_CTRL_BASE + 84*4)))
#define PETRFM_INT_MASK15                     (*((volatile uint32_t *)(PET_CTRL_BASE + 85*4)))
#define PPET_AWUSER_AP_DMA_BM                 (*((volatile uint32_t *)(PET_CTRL_BASE + 86*4)))
#define PPET_WUSER_AP_DMA_BM                  (*((volatile uint32_t *)(PET_CTRL_BASE + 87*4)))
#define PPET_ARUSER_AP_DMA_BM                 (*((volatile uint32_t *)(PET_CTRL_BASE + 88*4)))
#define PPET_REGION_AP_DMA_BM                 (*((volatile uint32_t *)(PET_CTRL_BASE + 89*4)))
#define PET_CTC_INTRREG0                      (*((volatile uint32_t *)(PET_CTRL_BASE + 90*4)))
#define PET_CTC_INTRREG1                      (*((volatile uint32_t *)(PET_CTRL_BASE + 91*4)))
#define PET_CTC_INTRREG2                      (*((volatile uint32_t *)(PET_CTRL_BASE + 92*4)))
#define PET_CTC_INTRREG3                      (*((volatile uint32_t *)(PET_CTRL_BASE + 93*4)))
#define PET_CTC_INTRREG4                      (*((volatile uint32_t *)(PET_CTRL_BASE + 94*4)))
#define PET_CTC_INTRREG5                      (*((volatile uint32_t *)(PET_CTRL_BASE + 95*4)))
#define PET_CTC_INTRREG6                      (*((volatile uint32_t *)(PET_CTRL_BASE + 96*4)))
#define EIP2_QOS                              (*((volatile uint32_t *)(PET_CTRL_BASE + 97*4)))
#define EIP2_AWUSER                           (*((volatile uint32_t *)(PET_CTRL_BASE + 116*4)))
#define EIP2_WUSER                            (*((volatile uint32_t *)(PET_CTRL_BASE + 117*4)))
#define EIP2_ARUSER                           (*((volatile uint32_t *)(PET_CTRL_BASE + 118*4)))

#endif
