//******************** (C) COPYRIGHT 2019 SmartLogic*******************************
// FileName           : dw_apb_wdt.h
// Author             : lijian, jian.li@smartlogictech.com
// Date First Issued  : 2019-03-29 02:39:38 PM
// Last Modified      : 2020-02-21 10:08:45 AM
// Description        :
// ------------------------------------------------------------
// Modification History:
// Version    Date       Author    Modification Description
//
//**********************************************************************************
#ifndef __WDT_H__
#define __WDT_H__

#define DW_APB_WDT0_BASE                    0x04400000
#define DW_APB_WDT1_BASE                    0x04408000

#define WDT0ControlReg_Offset               0x00
#define WDT0TimeoutRangeReg_Offset          0x04
#define WDT0CurrentCounterValueReg_Offset   0x08
#define WDT0CounterResetReg_Offset          0x0C
#define WDT0StatReg_Offset                  0x10
#define WDT0EOIReg_Offset                   0x14
#define WDT0VIDReg_Offset                   0x18

#define WDT0COMP_PARAMS_5_Offset            0xe4
#define WDT0COMP_PARAMS_4_Offset            0xe8
#define WDT0COMP_PARAMS_3_Offset            0xec
#define WDT0COMP_PARAMS_2_Offset            0xf0
#define WDT0COMP_PARAMS_1_Offset            0xf4
#define WDT0COMP_VERSION_Offset             0xf8
#define WDT0COMP_TYPE_Offset                0xfc

#define WDT0_CR                    (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0ControlReg_Offset            )))
#define WDT0_TORR                  (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0TimeoutRangeReg_Offset       )))
#define WDT0_CCVR                  (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0CurrentCounterValueReg_Offset)))
#define WDT0_CRR                   (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0CounterResetReg_Offset       )))
#define WDT0_STAT                  (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0StatReg_Offset               )))
#define WDT0_EOI                   (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0EOIReg_Offset                )))
#define WDT0_VID                   (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0VIDReg_Offset                )))
#define WDT0_COMP_PARAMS_5         (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0COMP_PARAMS_5_Offset         )))
#define WDT0_COMP_PARAMS_4         (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0COMP_PARAMS_4_Offset         )))
#define WDT0_COMP_PARAMS_3         (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0COMP_PARAMS_3_Offset         )))
#define WDT0_COMP_PARAMS_2         (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0COMP_PARAMS_2_Offset         )))
#define WDT0_COMP_PARAMS_1         (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0COMP_PARAMS_1_Offset         )))
#define WDT0_COMP_VERSION          (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0COMP_VERSION_Offset          )))
#define WDT0_COMP_TYPE             (*((volatile uint32_t *)(DW_APB_WDT0_BASE + WDT0COMP_TYPE_Offset             )))
#define WDT0PING_1BIT_WR           (WDT0_CR)

#define WDT1ControlReg_Offset               0x00
#define WDT1TimeoutRangeReg_Offset          0x04
#define WDT1CurrentCounterValueReg_Offset   0x08
#define WDT1CounterResetReg_Offset          0x0C
#define WDT1StatReg_Offset                  0x10
#define WDT1EOIReg_Offset                   0x14
#define WDT1VIDReg_Offset                   0x18

#define WDT1COMP_PARAMS_5_Offset            0xe4
#define WDT1COMP_PARAMS_4_Offset            0xe8
#define WDT1COMP_PARAMS_3_Offset            0xec
#define WDT1COMP_PARAMS_2_Offset            0xf0
#define WDT1COMP_PARAMS_1_Offset            0xf4
#define WDT1COMP_VERSION_Offset             0xf8
#define WDT1COMP_TYPE_Offset                0xfc

#define WDT1_CR                    (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1ControlReg_Offset            )))
#define WDT1_TORR                  (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1TimeoutRangeReg_Offset       )))
#define WDT1_CCVR                  (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1CurrentCounterValueReg_Offset)))
#define WDT1_CRR                   (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1CounterResetReg_Offset       )))
#define WDT1_STAT                  (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1StatReg_Offset               )))
#define WDT1_EOI                   (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1EOIReg_Offset                )))
#define WDT1_VID                   (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1VIDReg_Offset                )))
#define WDT1_COMP_PARAMS_5         (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1COMP_PARAMS_5_Offset         )))
#define WDT1_COMP_PARAMS_4         (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1COMP_PARAMS_4_Offset         )))
#define WDT1_COMP_PARAMS_3         (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1COMP_PARAMS_3_Offset         )))
#define WDT1_COMP_PARAMS_2         (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1COMP_PARAMS_2_Offset         )))
#define WDT1_COMP_PARAMS_1         (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1COMP_PARAMS_1_Offset         )))
#define WDT1_COMP_VERSION          (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1COMP_VERSION_Offset          )))
#define WDT1_COMP_TYPE             (*((volatile uint32_t *)(DW_APB_WDT1_BASE + WDT1COMP_TYPE_Offset             )))
#define WDT1PING_1BIT_WR           (WDT1_CR)



#endif
