#include "jesd_csu.h"
#include "jesd204.h"
#include "ape_csu.h"
#include "ucp_csu.h"
#include "ucp_utility.h"
#include "ucp_drv_common.h"
#include "gpio_drv.h"
#include "inter_vector.h"
#include "phy_para.h"

stJesdCsuPara gJesdCsuPara;
stJesdListPara gJesdTxListPara[JESD_CH_NUM][JESD_LIST_NUM];
stJesdListPara gJesdRxListPara[JESD_CH_NUM][JESD_LIST_NUM];

uint32_t gJesdOrxCsuIntCnt = 0;
uint32_t gJesdListInitFinished = 0;

//extern uint32_t gJesdTFMode;
extern void phy_sniffer_data_proc();

void isr_jesd_orx_csu()
{
	if (JS_CSU_ALLPENDEVENT1 & BIT14)
	{
		gJesdOrxCsuIntCnt++;
		debug_write((DBG_DDR_IDX_DRV_BASE+58), gJesdOrxCsuIntCnt); // 0xE8

		JS_CSU_TAGMASK2 &= (~BIT2);
	    JS_CSU_EVENTINTCLEAR = 46;
		
		debug_write((DBG_DDR_IDX_DRV_BASE+62), GET_STC_CNT()); // 0xF8
	    set_jesd_rf_state(JESD_ANT_ORX, GPIO_OFF);
	    set_jesd_rf_state(JESD_RF_ORX, GPIO_OFF);
	    set_jesd_rf_state(JESD_TRANS_ORX, GPIO_OFF);

		// phy callback
		phy_sniffer_data_proc();
	}
}

int32_t jesd_para_init()
{
	volatile uint32_t  *reg_addr = NULL;

    reg_addr = &JS_CSU_DMAADDRL0;  
    for(int index = 0; index < 16 * 8; index++)
    {
        do_write((reg_addr+index), 0); 
	}

    memset(&gJesdTxListPara[0][0], 0, sizeof(stJesdListPara)*JESD_CH_NUM*JESD_LIST_NUM); 
    memset(&gJesdRxListPara[0][0], 0, sizeof(stJesdListPara)*JESD_CH_NUM*JESD_LIST_NUM); 
	memset(&gJesdCsuPara, 0, sizeof(stJesdCsuPara));

	gJesdCsuPara.n = JS_204B_CONVERTER_BITS;
	gJesdCsuPara.cs = JS_204B_CS_BITS;
	gJesdCsuPara.cf = JS_204B_CF_VAL;
	if (0 == gJesdCsuPara.cf)
	{
		gJesdCsuPara.nTotal = JS_204B_CONVERTER_BITS + JS_204B_CS_BITS;
	}
	else
	{
		gJesdCsuPara.nTotal = JS_204B_CONVERTER_BITS;
	}
	if (0 != (gJesdCsuPara.nTotal%4))
	{
		gJesdCsuPara.nTotal = ((gJesdCsuPara.nTotal>>2)+1) << 2;
	}
	
    return 0;
}

int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode)
{
	if ((0 == antNum) || (8 < antNum))
	{
		return -1;
	}
	if (7 < margin)
	{
		return -1;
	}

	gJesdCsuPara.antNum = antNum;
	gJesdCsuPara.m = antNum*2;
	gJesdCsuPara.seq = antNum;
	gJesdCsuPara.margin = margin;
	gJesdCsuPara.tfMode = tfMode;
	
	//	[ 1: 0] -> CS
	//	[ 6: 4] -> Margin
	//	[15: 8] -> Num, (16+2*Num)=2*N
	//	[23:16] -> N*M
	//	[25:24] -> SeqNum
	//	[27:26] -> M/2-1
	if (4 < antNum)
	{
		gJesdCsuPara.m = gJesdCsuPara.m >> 1;
		gJesdCsuPara.seq = gJesdCsuPara.seq >> 1;
	}
	
	uint32_t val = (((gJesdCsuPara.m>>1)-1)<<26)+((gJesdCsuPara.seq-1)<<24)+(((gJesdCsuPara.nTotal*gJesdCsuPara.m)/gJesdCsuPara.seq)<<16)+((gJesdCsuPara.n-8)<<8)+(margin<<4)+gJesdCsuPara.cs;
	do_write((&JS_CSU_JESDTX0SET), val);
	//debug_write((DBG_DDR_IDX_DRV_BASE+216), val); // 0x360
	if (2 >= antNum)
	{
	    uint8_t seqRx = 1;
	    val = (((gJesdCsuPara.m>>1)-1)<<26)+((seqRx-1)<<24)+(((gJesdCsuPara.nTotal*gJesdCsuPara.m)/seqRx)<<16)+((gJesdCsuPara.n-8)<<8)+(margin<<4)+gJesdCsuPara.cs;
	}
	do_write((&JS_CSU_JESDRX0SET), val);
	do_write((&JS_CSU_FINDDMATAG), 0x60);						// st wait wr resp
	do_write((&JS_CSU_ALMOSTFULLSENDTHRED), 0x00040010); 		// [30:16]sendthred,<4, stop write; [14:0]almostfull, >=0x400,start write, 256bit as unit
	//do_write((&JS_CSU_ALMOSTFULLSENDTHRED), 0x00000010); 		// [30:16]sendthred,<4, stop write; [14:0]almostfull, >=0x400,start write, 256bit as unit
	do_write((&JS_CSU_EM_BS_SMSEL_PREDATANUM), ((0x1<<14) | (0x5<<5) | 0x8));
	if (4 < antNum)
	{
		do_write((&JS_CSU_JESDRX1SET), val);
		do_write((&JS_CSU_JESDTX1SET), val);
		do_write((&JS_CSU_ALMOSTFULLSENDTHRED), 0x80048010); 	// [30:16]sendthred,<4, stop write; [14:0]almostfull, >=0x400,start write
		do_write((&JS_CSU_EM_BS_SMSEL_PREDATANUM), ((0x3<<14) | (0x5<<5) | 0x8));
	}
	
	return 0;
}

int32_t jesd_orx_csu_init(uint8_t margin)
{
    gJesdCsuPara.orxMargin = margin;
	//uint32_t val = (((gJesdCsuPara.m>>1)-1)<<26)+((gJesdCsuPara.seq-1)<<24)+(((gJesdCsuPara.nTotal*gJesdCsuPara.m)/gJesdCsuPara.seq)<<16)+((gJesdCsuPara.n-8)<<8)+(gJesdCsuPara.margin<<4)+gJesdCsuPara.cs;
	uint32_t val = (((JS_204B_ORX_M>>1)-1)<<26)+((gJesdCsuPara.nTotal*JS_204B_ORX_M)<<16)+((gJesdCsuPara.n-8)<<8)+(margin<<4)+gJesdCsuPara.cs;
	do_write((&JS_CSU_JESDRX1SET), val);
	do_write((&JS_CSU_FINDDMATAG), 0x60);						// st wait wr resp
	do_write((&JS_CSU_ALMOSTFULLSENDTHRED), 0x80048010);	// [30:16]sendthred,<4, stop write; [14:0]almostfull, >=0x400,start write
	do_write((&JS_CSU_EM_BS_SMSEL_PREDATANUM), ((0x3<<14) | (0x5<<5) | 0x8));

	int32_t ret = smart_irq_request(139, isr_jesd_orx_csu);
	if (0 != ret)
	{
		debug_write((DBG_DDR_IDX_DRV_BASE+121), ret);
	}
	JS_CSU_INTMASK |= BIT14;
	JS_CSU_TAGMASK2 &= (~BIT2);
	JS_CSU_EVENTINTCLEAR = 46;

	return 0;
}

int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint32_t almostfull_threshold)
{
	uint32_t val = (ch << 31) | (send_threshold << 16) | (ch << 15) | almostfull_threshold;
	do_write((&JS_CSU_ALMOSTFULLSENDTHRED), val); 

	return 0;
}


/***********************************************************************************
	 ch			  list		    RegGroup		CmdFIFO		tagId = RegGroupId
	rx0			0/1/2/3			0/4/8/12		    0			0/4/8/12
	tx0			0/1/2/3			1/5/9/13			1			1/5/9/13
	rx1			0/1/2/3			2/6/10/14			2			2/6/10/14
	tx1			0/1/2/3			3/7/11/15			3			3/7/11/15
************************************************************************************/

int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
{
	int32_t ret = 0;
	if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum) || (JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
	{
		return -1;
	}

	uint8_t orxFlag = 0;
	ret = jesd_csu_rx_list_init(listAddr, nodeNum, pListNode, nChId, nListId, orxFlag);
	if (-1 == ret)
	{
		return -2;
	}
	
	ret = jesd_csu_rx_dmaReg_Cfg(nChId, nListId);
	if (-1 == ret)
	{
		return -3;
	}

	return ret;
}

int32_t jesd_csu_orx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nListId)
{
	int32_t ret = 0;
	if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum) || (JESD_LIST_NUM <= nListId))
	{
		return -1;
	}

	uint8_t nChId = 1;
	uint8_t orxFlag = 1;
	ret = jesd_csu_rx_list_init(listAddr, nodeNum, pListNode, nChId, nListId, orxFlag);
	if (-1 == ret)
	{
		return -2;
	}
	
	ret = jesd_csu_rx_dmaReg_Cfg(nChId, nListId);
	if (-1 == ret)
	{
		return -3;
	}

	return ret;
}

int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
{
	int32_t ret = 0;
	if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum) || (JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
	{
		return -1;
	}
	
	ret = jesd_csu_tx_list_init(listAddr, nodeNum, pListNode, nChId, nListId);
	if (-1 == ret)
	{
		return -2;
	}
	
	ret = jesd_csu_tx_dmaReg_Cfg(nChId, nListId);
	if (-1 == ret)
	{
		return -3;
	}

	return ret;
}


int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId, uint8_t orxFlag)
{
	uint8_t mrg = (1 == orxFlag) ? (gJesdCsuPara.orxMargin) : (gJesdCsuPara.margin);
	uint8_t seq = (1 == orxFlag) ? (1) : (gJesdCsuPara.seq);
	
	// 设置链表节点cmd
	uint32_t rxListCmdL = 0;
	uint32_t rxListCmdH = 0;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	rxListCmdL = (1<<4)+(0<<5)+(3<<6); 

	gJesdRxListPara[nChId][nListId].listAddr = listAddr;
	gJesdRxListPara[nChId][nListId].listNodeNum = nodeNum;

	stCsuLinkDesc1L3D* pLinkDesc = NULL;
	stCsuLinkDesc1L3D stLinkDesc;
	
	// rx: jesd -> ddr
	// 前7个下行时隙+特殊时隙的前6个符号
	int32_t i = 0;
	for(i = 0; i < nodeNum; i++)
	{
		if (0 == i)
		{
		    rxListCmdL = (1<<4)+(0<<5)+(3<<6)+(1<<23); 
		}
		else
		{
			rxListCmdL = (1<<4)+(0<<5)+(3<<6);
		}
		uint32_t yStep = (1 == orxFlag) ? (0x20 * (1<<mrg)) : (pListNode[i].yStep);
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)listAddr + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = 0x20;
		stLinkDesc.dmaYStep = 0x20;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = 0x20;
		stLinkDesc.dmaAllNum = pListNode[i].allNum;
		
	    if ((FDD_MODE != gJesdCsuPara.tfMode) && (1 != orxFlag))
    	{
		    stLinkDesc.dmaCGran = 1;  // endframe mode
    	}
		else
		{
		    stLinkDesc.dmaCGran = 0;
		}
		
		stLinkDesc.dmaGran = 0;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)listAddr + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = rxListCmdL;
		stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = pListNode[i].dataAddr;
		stLinkDesc.dmaXNum = 0x20 * (1<<mrg);	// 32*(2^margin)
		if ((2 >= gJesdCsuPara.antNum) && (1 != orxFlag))
		{
		    stLinkDesc.dmaYStep = stLinkDesc.dmaXNum;
			stLinkDesc.dmaYNum = pListNode[i].allNum / stLinkDesc.dmaXNum;
			stLinkDesc.dmaZStep = pListNode[i].allNum;
		}
		else
		{
		    stLinkDesc.dmaYStep = yStep; // pListNode[i].yStep;
		    stLinkDesc.dmaYNum = seq;
		    stLinkDesc.dmaZStep = 0x20 * (1<<mrg);	// 32*(2^margin)
		}
		stLinkDesc.dmaAllNum = pListNode[i].allNum;
		stLinkDesc.dmaSize = 0xF;		// write global
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	return 0;
}

int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
{
	uint8_t mrg = gJesdCsuPara.margin;
	// 设置链表节点CMD
	uint32_t txListCmdL = 0;
	uint32_t txListCmdH = 0;
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	txListCmdL = (1<<4)+(0<<5)+(3<<6);

	gJesdTxListPara[nChId][nListId].listAddr = listAddr;
	gJesdTxListPara[nChId][nListId].listNodeNum = nodeNum;

	stCsuLinkDesc1L3D* pLinkDesc = NULL;
	stCsuLinkDesc1L3D stLinkDesc;
	
	// tx: ddr -> jesd
	int32_t i = 0;
	for(i = 0; i < nodeNum; i++)
	{
		// src
		pLinkDesc = (stCsuLinkDesc1L3D*)listAddr + 2*i;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = pListNode[i].dataAddr;
		stLinkDesc.dmaXNum = 0x20*(1<<mrg);	// 32*(2^margin)
		stLinkDesc.dmaYStep = pListNode[i].yStep;
		stLinkDesc.dmaYNum = gJesdCsuPara.seq;
		stLinkDesc.dmaZStep = 0x20*(1<<mrg);	// 32*(2^margin)
		stLinkDesc.dmaAllNum = pListNode[i].allNum;
		stLinkDesc.dmaSize = 0xF;
		stLinkDesc.nAddrMode = 0;	// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
		// dst
		pLinkDesc = (stCsuLinkDesc1L3D*)listAddr + 2*i + 1;
		memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
		stLinkDesc.cmdFifoL = txListCmdL;
		stLinkDesc.cmdFifoH = txListCmdH & 0x3FFF;
		stLinkDesc.dmaAddrL = 0;
		stLinkDesc.dmaXNum = 0x20;
		stLinkDesc.dmaYStep = 0x20;
		stLinkDesc.dmaYNum = 1;
		stLinkDesc.dmaZStep = 0x20;
		stLinkDesc.dmaAllNum = pListNode[i].allNum;
		stLinkDesc.dmaSize = 0;	// 0x8;// 
	    if (FDD_MODE == gJesdCsuPara.tfMode)
    	{
		    stLinkDesc.dmaCGran = 0;
    	}
		else
		{
		    stLinkDesc.dmaCGran = 1;
		}
		
		stLinkDesc.dmaGran = 0;
		stLinkDesc.nAddrMode = 0;		// list addr is contiguous
		memcpy_ext(pLinkDesc, &stLinkDesc, sizeof(stCsuLinkDesc1L3D));
	}
	
	return 0;
}

// 链表第一个节点置位flush，清latch
int32_t jesd_csu_rx_list_desc0_flush(uint8_t nChId, uint8_t nListId)
{
	// 设置链表节点cmd
	// bit4=1，多维DMA
	// bit5=0，普通模式
	// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
	uint32_t rxListCmdL = (1<<4)+(0<<5)+(3<<6); 

	stCsuLinkDesc1L3D* pLinkDesc = (stCsuLinkDesc1L3D*)gJesdRxListPara[nChId][nListId].listAddr;
	pLinkDesc->cmdFifoL = rxListCmdL;

	debug_write((DBG_DDR_IDX_DRV_BASE+124), rxListCmdL); // 0x1F0
	debug_write((DBG_DDR_IDX_DRV_BASE+125), (uint32_t)(pLinkDesc)); // 0x110

    return 0;
}


int32_t jesd_csu_rx_dmaReg_Cfg(uint8_t nChId, uint8_t nListId) // uint32_t listAddr, uint32_t nodeNum)
{
	if ((JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
	{
	    return -1;
	}
	uint8_t nRegId = (nChId << 1) + (nListId << 2);
	uint32_t offset_w = (nRegId<<3);
	// set dma buffer
	do_write(((uint32_t*)(&JS_CSU_DMAADDRL0)+offset_w), gJesdRxListPara[nChId][nListId].listAddr); 			// DDR or SM
	do_write(((uint32_t*)(&JS_CSU_DMAADDRH0)+offset_w), 0); 											// DDR or SM
	do_write(((uint32_t*)(&JS_CSU_DMASIZEGRANALLNUM0)+offset_w), gJesdRxListPara[nChId][nListId].listNodeNum);	// allnum is id num

	return 0;
}

int32_t jesd_csu_tx_dmaReg_Cfg(uint8_t nChId, uint8_t nListId) // uint32_t listAddr, uint32_t nodeNum)
{
	if ((JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
	{
	    return -1;
	}
	uint8_t nRegId = (nChId << 1) + (nListId << 2);
	uint32_t offset_w = (nRegId<<3);
	// set dma buffer
	do_write(((uint32_t*)(&JS_CSU_DMAADDRL1)+offset_w), gJesdTxListPara[nChId][nListId].listAddr); 			// DDR or SM
	do_write(((uint32_t*)(&JS_CSU_DMAADDRH1)+offset_w), 0); 											// DDR or SM
	do_write(((uint32_t*)(&JS_CSU_DMASIZEGRANALLNUM1)+offset_w), gJesdTxListPara[nChId][nListId].listNodeNum);	// allnum is id num

	return 0;
}

int32_t jesd_csu_rx_start_ch(uint8_t nChId, uint8_t nListId)
{
    if ((0 == gJesdRxListPara[nChId][nListId].listAddr) && (0 == gJesdRxListPara[nChId][nListId].listNodeNum))
	{
	    return -1; // list not init
	}

	stCsuDmaCmdL cpriCmdL;
	*(uint32_t*)(&cpriCmdL) = 0;

	uint8_t nRegId = (nChId << 1) + (nListId << 2);
	// rx cmd
	// 1 link
	// 读一级链表，写一级链表，多维DMA，非cache模式，src buf=0，tag=0
	cpriCmdL.rCmd = 1;
	cpriCmdL.wCmd = 1;
	cpriCmdL.dmaType = 1;
	cpriCmdL.cacheMode = 1;
	cpriCmdL.continueLast = 0;
	cpriCmdL.continueNext = 0;
	cpriCmdL.idSrc = nRegId;
	cpriCmdL.dmaTag = nRegId;
	//cpriCmdL.flush = 1;
	
	do_write(&(JS_CSU_CMDHIGHDATA), 0);
	do_write(((uint32_t*)&(JS_CSU_CMDFIFO0)+(nChId<<1)), *(uint32_t*)(&cpriCmdL));
	
	gJesdListInitFinished++;
	
	return 0;
}

int32_t jesd_csu_tx_start_ch(uint8_t nChId, uint8_t nListId)
{
    if ((0 == gJesdTxListPara[nChId][nListId].listAddr) && (0 == gJesdTxListPara[nChId][nListId].listNodeNum))
	{
	    return -1; // list not init
	}
	
	stCsuDmaCmdL cpriCmdL;
	*(uint32_t*)(&cpriCmdL) = 0;

	uint8_t nRegId = 1 + (nChId << 1) + (nListId << 2);
	// tx cmd
	// 1 link
	// 读一级链表，写一级链表，多维DMA，非cache模式，src buf=1，tag=1
	cpriCmdL.rCmd = 1;
	cpriCmdL.wCmd = 1;
	cpriCmdL.dmaType = 1;
	cpriCmdL.cacheMode = 1;
	cpriCmdL.continueLast = 1;
	cpriCmdL.continueNext = 1;
	cpriCmdL.idSrc = nRegId;
	cpriCmdL.dmaTag = nRegId;
	//cpriCmdL.flush = 1;
	
	do_write(&(JS_CSU_CMDHIGHDATA), 0);
	do_write(((uint32_t*)&(JS_CSU_CMDFIFO1)+(nChId<<1)), (*(uint32_t*)(&cpriCmdL)));
	
	return 0;
}

int32_t jesd_csu_tx_start(uint8_t nListId)
{
	jesd_csu_tx_start_ch(0, nListId);
	if (4 < gJesdCsuPara.antNum)
	{
		jesd_csu_tx_start_ch(1, nListId);
	}

	return 0;
}

int32_t jesd_csu_rx_start(uint8_t nListId)
{
	jesd_csu_rx_start_ch(0, nListId);
	if (4 < gJesdCsuPara.antNum)
	{
		jesd_csu_rx_start_ch(1, nListId);
	}

	return 0;
}

//uint32_t gOrxCsuStartCnt = 0;
int32_t jesd_csu_orx_start(uint8_t nListId)
{
	int32_t ret = jesd_csu_rx_start_ch(1, nListId);
	if (0 == ret)
	{
	    do_write(&(JS_CSU_TAGMASK2), BIT2);
		//gOrxCsuStartCnt++;
	    //debug_write((DBG_DDR_IDX_DRV_BASE+51), gOrxCsuStartCnt); // 0xCC
	}
	else
	{
		//debug_write((DBG_DDR_IDX_DRV_BASE+52), gJesdRxListPara[1][0].listAddr); // 0xD0
		//debug_write((DBG_DDR_IDX_DRV_BASE+53), gJesdRxListPara[1][0].listNodeNum); // 0xD4
		return -1;
	}

	return 0;
}

int32_t jesd_csu_stat_lookup(uint8_t tag)
{
	if (31 < tag)
	{
		return -1;
	}
	return ((do_read_volatile(&JS_CSU_DMASTATUS)>>tag)&0x1);
}

int32_t jesd_csu_clear_list()
{
	memset(&gJesdTxListPara[0][0], 0, sizeof(stJesdListPara)*JESD_CH_NUM*JESD_LIST_NUM); 
	memset(&gJesdRxListPara[0][0], 0, sizeof(stJesdListPara)*JESD_CH_NUM*JESD_LIST_NUM); 
	gJesdListInitFinished = 0;
	
    return 0;
}

