//******************** (C) COPYRIGHT 2019 SmartLogic*******************************
// FileName           : func_lib_ape.c
// Author             : lijian, jian.li@smartlogictech.com
// Date First Issued  : 2019-03-29 08:48:11 AM
// Last Modified      : 2022-04-11 07:02:10 PM
// Description        :
// ------------------------------------------------------------
// Modification History:
// Version    Date       Author    Modification Description
//
//**********************************************************************************
#include "ucp_sfr_c.h"
#include "func_lib_ape.h"
#include "pet_ctrl.h"
#include "ucp_js_ctrl.h"
#include "csu.h"
void ERR (void) {
 //   SIMULATION_END_RFM = 0x1234567F;
 //   while(1);
//	osp_printf("ERR\r\n");

}

void FINISH (void) {
 //   SIMULATION_END_RFM = 0x1234567C;
 //   while(1);
}

void output_char(char c)
{
    volatile char *tube = (volatile char *) 0x0931ff20u;
    *tube = c;
}
/*
void print(char * pstr){
    int i;
    for(i=0;pstr[i]!='\0';i++){
        output_char(pstr[i]);
    }
    output_char('\n');
}
*/

void print(char * pstr){
//	osp_printf(pstr);
//	osp_printf("\n\r");
}
//APC0-3 0-3 PETRFM 4 JECSRFM 5 APRFM6
//assign raw_aprfm_in_intr[37:0]    = gic500_spi[37:0];
//assign raw_aprfm_in_intr[107:38]  = gic500_spi[131:62];
//assign raw_aprfm_in_intr[117:108] = gic500_spi[153:144];
//assign raw_aprfm_in_intr[503:118] = gic500_spi[569:184];
//assign raw_aprfm_in_intr[504] = sysc_ctc8_intr[0];
//assign raw_aprfm_in_intr[505] = sysc_ctc9_intr[0];
//assign raw_aprfm_in_intr[506] = sysc_ctc10_intr[0];
//assign raw_aprfm_in_intr[507] = sysc_ctc11_intr[0];
//assign raw_aprfm_in_intr[508] = sysc_ctc12_intr[0];
//assign raw_aprfm_in_intr[509] = sysc_ctc13_intr[0];
//assign raw_aprfm_in_intr[510] = sysc_ctc14_intr[0];
//assign raw_aprfm_in_intr[511] = sysc_ctc15_intr[0];

#if 0 
void EN_APCIRQ(UINT32 num,UINT32 ape_num){
   UINT32 remain_32,div_32,temp_num;

   if(ape_num >= 6){
         print("APRFM WRONG APE NUM");
        ERR();
   }
   temp_num = num;
   div_32     =  temp_num/32;
   remain_32  =  temp_num%32;

   if(ape_num ==4){
  (*((volatile UINT32 *)(PET_CTRL_BASE + 70*4 + div_32*4 ))) = (1<<remain_32);
   __ucps2_synch(1);
  if((*((volatile UINT32 *)(PET_CTRL_BASE + 70*4 + div_32*4 ))) != (1<<remain_32)){ERR();}
  }else if(ape_num == 5){
  (*((volatile UINT32 *)(JECS_CTRL_BASE + 10*4 + div_32*4 ))) = (1<<remain_32);
   __ucps2_synch(1);
  if((*((volatile UINT32 *)(JECS_CTRL_BASE + 10*4 + div_32*4 ))) != (1<<remain_32)){ERR();}
  }else{
  (*((volatile UINT32 *)(SYSCFG_BASE_ADDR + 180*4 + div_32*4 + ape_num*64))) = (1<<remain_32);
   __ucps2_synch(1);
  if((*((volatile UINT32 *)(SYSCFG_BASE_ADDR + 180*4 + div_32*4 + ape_num*64))) != (1<<remain_32))
  {
	  osp_printf("error mask bit\r\n");
	  ERR();
  }
   else
   {
	   osp_printf("mask bit ok\r\n");
   }
  }

  if(ape_num == 0){APC0_CSU_ELEVELMASK = (1<<remain_32);}
  if(ape_num == 1){APC1_CSU_ELEVELMASK = (1<<remain_32);}
  if(ape_num == 2){APC2_CSU_ELEVELMASK = (1<<remain_32);}
  if(ape_num == 3){APC3_CSU_ELEVELMASK = (1<<remain_32);}
  if(ape_num == 4){PETRFM_CSU_ELEVELMASK = (1<<remain_32);}
 // if(ape_num == 5){ECSRFM_CSU_ELEVELMASK = (1<<remain_32);}

  APC_CSU_EVENTMASKL  =(1<<remain_32);
  APC_CSU_INTMASKL    =(1<<remain_32);

}


void CHECK_APCIRQ(UINT32 num,UINT32 ape_num){
   UINT32 remain_32,div_32,temp_num;

   if(ape_num >= 6){
         print("APRFM WRONG APE NUM");
        ERR();
   }
   temp_num = num;
   div_32     =  temp_num/32;
   remain_32  =  temp_num%32;

  if(ape_num ==4){
  (*((volatile UINT32 *)(PET_CTRL_BASE + 100*4 + div_32*4 ))) = (1<<remain_32);
   __ucps2_synch(1);
  if((*((volatile UINT32 *)(PET_CTRL_BASE + 70*4 + div_32*4 ))) != (1<<remain_32)){ERR();}
  }else if(ape_num == 5){
  (*((volatile UINT32 *)(JECS_CTRL_BASE + 40*4 + div_32*4 ))) = (1<<remain_32);
   __ucps2_synch(1);
  if((*((volatile UINT32 *)(JECS_CTRL_BASE + 10*4 + div_32*4 ))) != (1<<remain_32)){ERR();}
  }else{
  if(((*((volatile UINT32 *)(SYSCFG_BASE_ADDR + 312*4 + div_32*4 + ape_num*64)))&(1<<remain_32)) != (1<<remain_32)){ERR();}
  }

}


void CLAEN_APCIRQ(UINT32 num){
   UINT32 remain_32,div_32;
   div_32     =  num/32;
   remain_32  =  num%32;

  if(APC_CSU_ALLPENDEVENT0  != (1<<remain_32)){print("ERROR APC IRQ STATUS");ERR();}

  APC_CSU_EVENTINTCLEAR    =(remain_32);

}

void CLAEN_APRFMIRQ(UINT32 num){
   UINT32 remain_32,div_32,temp_num;
    if(num<=37){
        temp_num = num;
    }else if(num>=62 && num<=131){
        temp_num = num - 62 +38;
    }else if(num>=144 && num<=153){
        temp_num = num - 144 +108;
    }else if(num>=184 && num<=577){
        temp_num = num - 184 +118;
    }else{
        temp_num = 0;
        print("APRFM WRONG IRQ NUM");
        ERR();
    }
   div_32     =  temp_num/32;
   remain_32  =  temp_num%32;


  if(APC_CSU_ALLPENDEVENT0  != (1<<remain_32)){print("ERROR APC IRQ STATUS");ERR();}

  APC_CSU_EVENTINTCLEAR    =(remain_32);

}
#endif




void init_fastespma(void){
	/*
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x302b))) |= 0x1;     //RAWLANEAONN_DIG_FAST_FLAGS             FASTALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x322b))) |= 0x1;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x342b))) |= 0x1;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x362binit_fastespma))) |= 0x1;*/

  /*
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x0069))) |= BIT0;       //SUP_DIG_RTUNE_CONFIG                   FAST_RTUNE
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x00A1))) |= BIT3|BIT4;  //SUP_DIG_MPLLA_MPLL_PWR_CTL_CAL_CTRL_1  FAST_MPLL_LOCK FAST_MPLL_PWRUP
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x0070))) |= BIT9;       //SUP_DIG_BG_CTL_BG_PWRUP_TIME_0         FAST_BG_WAIT
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x0074))) |= BIT5;       //SUP_DIG_BG_CTL_REF_PWRUP_TIME_0        FAST_REF_WAIT
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x00C1))) |= BIT3|BIT4;  //SUP_DIG_MPLLB_MPLL_PWR_CTL_CAL_CTRL_1  FAST_MPLL_LOCK FAST_MPLL_PWRUP
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1059))) |= BIT15|BIT7; //LANE0-3_DIG_TX_PWRCTL_TX_PWRUP_TIME_0  FAST_TX_CLK_EN_TIME FAST_TX_REFGEN_EN_TIME
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1259))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1459))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1659))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x105b))) |= BIT11;      //LANEN_DIG_TX_PWRCTL_TX_PWRUP_TIME_2    FAST_TX_ROPLL_EN_TIME
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x125b))) |= BIT11;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x145b))) |= BIT11;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x165b))) |= BIT11;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x105d))) |= BIT15;      //LANEN_DIG_TX_PWRCTL_TX_PWRUP_TIME_4    FAST_TX_SERIAL_EN_TIME
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x125d))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x145d))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x165d))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1061))) |= BIT7|BIT6;  //LANEN_DIG_TX_ROPLL_CTL_ROPLL_OVRD      FAST_ROPLL_LOCK FAST_ROPLL_PWRUP
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1261))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1461))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1661))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1084))) |= BIT10;      //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_0    FAST_RX_SIGDET_EN_WAIT
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1284))) |= BIT10;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1484))) |= BIT10;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1684))) |= BIT10;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1085))) |= BIT9;       //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_1    FAST_RX_VREG_EN
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1285))) |= BIT9;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1485))) |= BIT9;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1685))) |= BIT9;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1086))) |= BIT15;      //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_2    FAST_RX_CLK_DCC_EN
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1286))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1486))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1686))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x10ec))) |= BIT0;       //LANEN_DIG_RX_ADPTCTL_ADPT_CFG_19       FAST_AFE_DFE_SETTLE
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x12ec))) |= BIT0;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x14ec))) |= BIT0;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x16ec))) |= BIT0;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3012)))  = 0xffff;     //RAWLANEAONN_DIG_RX_STARTUP_ALGO_CTL    SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3212)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3412)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3612)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3013)))  = 0xffff;     //AWLANEAONN_DIG_RX_CONT_ALGO_CTL        SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3213)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3413)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3613)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x302b)))  = 0xffff;     //RAWLANEAONN_DIG_FAST_FLAGS             FASTALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x322b)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x342b)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x362b)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3059)))  = 0x0000;     //RAWLANEAONN_DIG_SRAM_REC_CTRL          REC_EN=0
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3259)))  = 0x0000;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3459)))  = 0x0000;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3659)))  = 0x0000;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3062)))  = 0xffff;     //RAWLANEAONX_DIG_RX_STARTUP_ALGO_CTL_1  SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3262)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3462)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3662)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x311e)))  = 0xffff;     //RAWLANEAONX_DIG_RX_STARTUP_ALGO_CTL_2  SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x331e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x351e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x371e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x312e)))  = 0xffff;     //RAWLANEAONX_DIG_SKIP_RX_DFE_FLT_ADAPT  SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x332e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x352e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x372e)))  = 0xffff;
 */
 print("fast es pma done");
}



void init_fastpetpma(void){
	/*
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x302b))) |= 0x1;     //RAWLANEAONN_DIG_FAST_FLAGS             FASTALL
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x322b))) |= 0x1;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x342b))) |= 0x1;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x362b))) |= 0x1;*/
/*
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x0069))) |= BIT0;       //SUP_DIG_RTUNE_CONFIG                   FAST_RTUNE
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x00A1))) |= BIT3|BIT4;  //SUP_DIG_MPLLA_MPLL_PWR_CTL_CAL_CTRL_1  FAST_MPLL_LOCK FAST_MPLL_PWRUP
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x0070))) |= BIT9;       //SUP_DIG_BG_CTL_BG_PWRUP_TIME_0         FAST_BG_WAIT
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x0074))) |= BIT5;       //SUP_DIG_BG_CTL_REF_PWRUP_TIME_0        FAST_REF_WAIT
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x00C1))) |= BIT3|BIT4;  //SUP_DIG_MPLLB_MPLL_PWR_CTL_CAL_CTRL_1  FAST_MPLL_LOCK FAST_MPLL_PWRUP
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1059))) |= BIT15|BIT7; //LANE0-3_DIG_TX_PWRCTL_TX_PWRUP_TIME_0  FAST_TX_CLK_EN_TIME FAST_TX_REFGEN_EN_TIME
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1259))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1459))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1659))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x105b))) |= BIT11;      //LANEN_DIG_TX_PWRCTL_TX_PWRUP_TIME_2    FAST_TX_ROPLL_EN_TIME
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x125b))) |= BIT11;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x145b))) |= BIT11;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x165b))) |= BIT11;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x105d))) |= BIT15;      //LANEN_DIG_TX_PWRCTL_TX_PWRUP_TIME_4    FAST_TX_SERIAL_EN_TIME
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x125d))) |= BIT15;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x145d))) |= BIT15;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x165d))) |= BIT15;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1061))) |= BIT7|BIT6;  //LANEN_DIG_TX_ROPLL_CTL_ROPLL_OVRD      FAST_ROPLL_LOCK FAST_ROPLL_PWRUP
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1261))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1461))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1661))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1084))) |= BIT10;      //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_0    FAST_RX_SIGDET_EN_WAIT
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1284))) |= BIT10;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1484))) |= BIT10;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1684))) |= BIT10;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1085))) |= BIT9;       //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_1    FAST_RX_VREG_EN
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1285))) |= BIT9;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1485))) |= BIT9;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1685))) |= BIT9;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1086))) |= BIT15;      //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_2    FAST_RX_CLK_DCC_EN
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1286))) |= BIT15;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1486))) |= BIT15;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x1686))) |= BIT15;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x10ec))) |= BIT0;       //LANEN_DIG_RX_ADPTCTL_ADPT_CFG_19       FAST_AFE_DFE_SETTLE
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x12ec))) |= BIT0;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x14ec))) |= BIT0;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x16ec))) |= BIT0;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3012)))  = 0xffff;     //RAWLANEAONN_DIG_RX_STARTUP_ALGO_CTL    SKIPALL
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3212)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3412)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3612)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3013)))  = 0xffff;     //AWLANEAONN_DIG_RX_CONT_ALGO_CTL        SKIPALL
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3213)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3413)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3613)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x302b)))  = 0xffff;     //RAWLANEAONN_DIG_FAST_FLAGS             FASTALL
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x322b)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x342b)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x362b)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3059)))  = 0x0000;     //RAWLANEAONN_DIG_SRAM_REC_CTRL          REC_EN=0
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3259)))  = 0x0000;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3459)))  = 0x0000;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3659)))  = 0x0000;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3062)))  = 0xffff;     //RAWLANEAONX_DIG_RX_STARTUP_ALGO_CTL_1  SKIPALL
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3262)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3462)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x3662)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x311e)))  = 0xffff;     //RAWLANEAONX_DIG_RX_STARTUP_ALGO_CTL_2  SKIPALL
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x331e)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x351e)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x371e)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x312e)))  = 0xffff;     //RAWLANEAONX_DIG_SKIP_RX_DFE_FLT_ADAPT  SKIPALL
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x332e)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x352e)))  = 0xffff;
 (*((volatile UINT32 *)(PET_PMA3_CFG + 4*0x372e)))  = 0xffff;
*/
 print("fast pet pma done");
}

void init_fastjspma(void){

 print("fast js pma done");
}

void init_fastjecspma(void){
	/*
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x302b))) |= 0x1;     //RAWLANEAONN_DIG_FAST_FLAGS             FASTALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x322b))) |= 0x1;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x342b))) |= 0x1;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x362b))) |= 0x1;
*/
  /*
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x0069))) |= BIT0;       //SUP_DIG_RTUNE_CONFIG                   FAST_RTUNE
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x00A1))) |= BIT3|BIT4;  //SUP_DIG_MPLLA_MPLL_PWR_CTL_CAL_CTRL_1  FAST_MPLL_LOCK FAST_MPLL_PWRUP
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x0070))) |= BIT9;       //SUP_DIG_BG_CTL_BG_PWRUP_TIME_0         FAST_BG_WAIT
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x0074))) |= BIT5;       //SUP_DIG_BG_CTL_REF_PWRUP_TIME_0        FAST_REF_WAIT
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x00C1))) |= BIT3|BIT4;  //SUP_DIG_MPLLB_MPLL_PWR_CTL_CAL_CTRL_1  FAST_MPLL_LOCK FAST_MPLL_PWRUP
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1059))) |= BIT15|BIT7; //LANE0-3_DIG_TX_PWRCTL_TX_PWRUP_TIME_0  FAST_TX_CLK_EN_TIME FAST_TX_REFGEN_EN_TIME
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1259))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1459))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1659))) |= BIT15|BIT7;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x105b))) |= BIT11;      //LANEN_DIG_TX_PWRCTL_TX_PWRUP_TIME_2    FAST_TX_ROPLL_EN_TIME
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x125b))) |= BIT11;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x145b))) |= BIT11;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x165b))) |= BIT11;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x105d))) |= BIT15;      //LANEN_DIG_TX_PWRCTL_TX_PWRUP_TIME_4    FAST_TX_SERIAL_EN_TIME
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x125d))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x145d))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x165d))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1061))) |= BIT7|BIT6;  //LANEN_DIG_TX_ROPLL_CTL_ROPLL_OVRD      FAST_ROPLL_LOCK FAST_ROPLL_PWRUP
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1261))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1461))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1661))) |= BIT7|BIT6;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1084))) |= BIT10;      //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_0    FAST_RX_SIGDET_EN_WAIT
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1284))) |= BIT10;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1484))) |= BIT10;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1684))) |= BIT10;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1085))) |= BIT9;       //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_1    FAST_RX_VREG_EN
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1285))) |= BIT9;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1485))) |= BIT9;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1685))) |= BIT9;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1086))) |= BIT15;      //LANEN_DIG_RX_PWRCTL_RX_PWRUP_TIME_2    FAST_RX_CLK_DCC_EN
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1286))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1486))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x1686))) |= BIT15;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x10ec))) |= BIT0;       //LANEN_DIG_RX_ADPTCTL_ADPT_CFG_19       FAST_AFE_DFE_SETTLE
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x12ec))) |= BIT0;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x14ec))) |= BIT0;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x16ec))) |= BIT0;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3012)))  = 0xffff;     //RAWLANEAONN_DIG_RX_STARTUP_ALGO_CTL    SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3212)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3412)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3612)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3013)))  = 0xffff;     //AWLANEAONN_DIG_RX_CONT_ALGO_CTL        SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3213)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3413)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3613)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x302b)))  = 0xffff;     //RAWLANEAONN_DIG_FAST_FLAGS             FASTALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x322b)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x342b)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x362b)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3059)))  = 0x0000;     //RAWLANEAONN_DIG_SRAM_REC_CTRL          REC_EN=0
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3259)))  = 0x0000;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3459)))  = 0x0000;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3659)))  = 0x0000;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3062)))  = 0xffff;     //RAWLANEAONX_DIG_RX_STARTUP_ALGO_CTL_1  SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3262)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3462)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x3662)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x311e)))  = 0xffff;     //RAWLANEAONX_DIG_RX_STARTUP_ALGO_CTL_2  SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x331e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x351e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x371e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x312e)))  = 0xffff;     //RAWLANEAONX_DIG_SKIP_RX_DFE_FLT_ADAPT  SKIPALL
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x332e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x352e)))  = 0xffff;
 (*((volatile UINT32 *)(JECS_PMA1_CFG + 4*0x372e)))  = 0xffff;
 */
 print("fast jecs pma done");
}

