/*********************************************************************
 *
 *        Filename:  ucp_js_ctrl.h
 *
 *         Created:  2021-11-08 10:54:34 AM
 *   Last Modified:  2022-01-06 06:48:29 PM
 *          Author:  LiPin , lip2014@ia.ac.cn
 *    Organization:  Beijing Smart Logic Technology Co., Ltd.
 *
 *     Description:
 *
 *
 ********************************************************************/

#ifndef __JS_CTRL__
#define __JS_CTRL__

//The JESD And SRIO SubCtrl Base Addr
#define JS_CTRL_BASE      0x05f50000
//The JESD ECPRI CPRI SRIO SubCtrl Base Addr
#define JECS_CTRL_BASE    0x08460000

//------------------------------------JS SYSTEM--------------------------------//
//JESD And SRIO SubCtrl Reg Addr
#define JS_CTRL_CLK_SEL                             (*((volatile UINT32 *)(JS_CTRL_BASE + 4*18)))   //RW
#define JS_CTRL_TX_TMR_EN_CTRL                      (*((volatile UINT32 *)(JS_CTRL_BASE + 4*19)))   //RW
#define JS_CTRL_PHY_MISC_SEL_0                      (*((volatile UINT32 *)(JS_CTRL_BASE + 4*22)))   //RW
#define JS_CTRL_PHY_INT_CLK_SEL_SUB0                (*((volatile UINT32 *)(JS_CTRL_BASE + 4*23)))   //RW
#define JS_CTRL_PHY_OUT_TEST_CLK_SEL_SUB0           (*((volatile UINT32 *)(JS_CTRL_BASE + 4*24)))   //RW
#define JS_CTRL_PHY_MISC_SEL_1                      (*((volatile UINT32 *)(JS_CTRL_BASE + 4*53)))   //RW
#define JS_CTRL_SRIO0_AWADDR_H                      (*((volatile UINT32 *)(JS_CTRL_BASE + 4*54)))   //RW
#define JS_CTRL_SRIO0_ARADDR_H                      (*((volatile UINT32 *)(JS_CTRL_BASE + 4*55)))   //RW

//------------------------------------ES SYSTEM--------------------------------//
//JESD ECPRI CPRI SRIO SubCtrl Reg Addr
#define JECS_CTRL_RFM_USER0                         (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*0)))   //RW
#define JECS_CTRL_RFM_USER1                         (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*1)))   //RW
#define JECS_CTRL_RFM_USER2                         (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*2)))   //RW
#define JECS_CTRL_RFM_USER3                         (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*3)))   //RW
#define JECS_CTRL_RFM_USER4                         (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*4)))   //RW
#define JECS_CTRL_RFM_USER5                         (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*5)))   //RW
#define JECS_CTRL_RFM_ADDR_CTRL                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*6)))   //RW
#define JECS_CTRL_QOS_M3_SRIO_AXIM                  (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*7)))   //RW
#define JECS_CTRL_PHY_CLK_SEL                       (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*8)))   //RW
#define JECS_CTRL_PROTOCOL_SEL                      (*((volatile UINT32 *)(JECS_CTRL_BASE + 4*9)))   //RW
#define JECS_CTRL_RFM_INT_MASK0                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 10*4)))
#define JECS_CTRL_RFM_INT_MASK1                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 11*4)))
#define JECS_CTRL_RFM_INT_MASK2                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 12*4)))
#define JECS_CTRL_RFM_INT_MASK3                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 13*4)))
#define JECS_CTRL_RFM_INT_MASK4                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 14*4)))
#define JECS_CTRL_RFM_INT_MASK5                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 15*4)))
#define JECS_CTRL_RFM_INT_MASK6                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 16*4)))
#define JECS_CTRL_RFM_INT_MASK7                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 17*4)))
#define JECS_CTRL_RFM_INT_MASK8                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 18*4)))
#define JECS_CTRL_RFM_INT_MASK9                     (*((volatile UINT32 *)(JECS_CTRL_BASE + 19*4)))
#define JECS_CTRL_RFM_INT_MASK10                    (*((volatile UINT32 *)(JECS_CTRL_BASE + 20*4)))
#define JECS_CTRL_RFM_INT_MASK11                    (*((volatile UINT32 *)(JECS_CTRL_BASE + 21*4)))
#define JECS_CTRL_RFM_INT_MASK12                    (*((volatile UINT32 *)(JECS_CTRL_BASE + 22*4)))
#define JECS_CTRL_RFM_INT_MASK13                    (*((volatile UINT32 *)(JECS_CTRL_BASE + 23*4)))
#define JECS_CTRL_RFM_INT_MASK14                    (*((volatile UINT32 *)(JECS_CTRL_BASE + 24*4)))
#define JECS_CTRL_RFM_INT_MASK15                    (*((volatile UINT32 *)(JECS_CTRL_BASE + 25*4)))
#define JECS_CTRL_CTC_INT0                          (*((volatile UINT32 *)(JECS_CTRL_BASE + 26*4)))
#define JECS_CTRL_CTC_INT1                          (*((volatile UINT32 *)(JECS_CTRL_BASE + 27*4)))
#define JECS_CTRL_CTC_INT2                          (*((volatile UINT32 *)(JECS_CTRL_BASE + 28*4)))
#define JECS_CTRL_CTC_INT3                          (*((volatile UINT32 *)(JECS_CTRL_BASE + 29*4)))
#define JECS_CTRL_CTC_INT4                          (*((volatile UINT32 *)(JECS_CTRL_BASE + 30*4)))
#define JECS_CTRL_CTC_INT5                          (*((volatile UINT32 *)(JECS_CTRL_BASE + 31*4)))
#define JECS_CTRL_CTC_INT6                          (*((volatile UINT32 *)(JECS_CTRL_BASE + 32*4)))
#define JECS_CTRL_CPRI_GMAC_PHY_INT                 (*((volatile UINT32 *)(JECS_CTRL_BASE + 33*4)))

#endif
