// +FHDR------------------------------------------------------------
//                 Copyright (c) 2022 SmartLogic.
//                       ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename      : cpri_test_case43.c
// Author        : xinxin.li
// Created On    : 2023-01-11s
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------

#include "typedef.h"
#include "ucp_printf.h"
#include "ucp_utility.h"
#include "ape_csu.h"
#include "jesd_csu.h"
#include "jesd_timer.h"
#include "jesd_csu_nr_7ds2u.h"
#include "jesd_test.h"
#include "jesd_test_case43.h"
#include "rfm1_drv.h"

extern uint32_t antDataPre7[123008]; 
extern uint32_t antDataPost7[122752]; 

extern uint32_t 		gJesdTestMode;
extern uint32_t			gJesdIOMode;
//extern stJesdTimerPara	gJesdTmrPara;
#if 0	
uint32_t 				srcImData[4*1024] = {0};	// 16KB
uint32_t srcImData[8*1024] = {0};	// 32KB
void jesd_tx_data_init()
{
	uint8_t idAnt = 0;
	uint8_t idSlot = 0;
	uint8_t idSymbolBlock = 0;	// symbol0~6, symbol7~13
	uint8_t idSymbol = 0;
	uint16_t idSample = 0;

	uint32_t* pSrcAddr = NULL;
	uint32_t  srcAddr = 0;
	uint32_t  dstAddr = 0;
	uint32_t  dataLen = 0;
	uint16_t  symbolSamCnt = 0;

	uint16_t  f7SamCnt = LONGCP_SAM_CNT + SHORTCP_SAM_CNT*6;
	uint16_t  b7SamCnt = SHORTCP_SAM_CNT*7;

	// IQ data	
	// valid data
	for (idAnt = 0; idAnt < JESD_NR7DS2U_ANT_NUM; idAnt++)
	{
		for (idSlot = 0; idSlot <= 1; idSlot++)
		{
			for (idSymbolBlock = 0; idSymbolBlock <= 1; idSymbolBlock++)
			{
				pSrcAddr = srcImData;
				if ((0 == idSlot) && (0 == idSymbolBlock))	// even slot, symbol0~6
				{
					dstAddr = JESD_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR;
					dataLen = f7SamCnt<<2;
				}
				else if ((0 == idSlot) && (1 == idSymbolBlock))	// even slot, symbol7~13
				{
					dstAddr = JESD_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR;
					dataLen = b7SamCnt<<2;
				}
				else if ((1 == idSlot) && (0 == idSymbolBlock))	// odd slot, symbol0~6
				{
					dstAddr = JESD_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR;
					dataLen = f7SamCnt<<2;
				}
				else if ((1 == idSlot) && (1 == idSymbolBlock))	// odd slot, symbol7~13
				{
					dstAddr = JESD_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR;
					dataLen = b7SamCnt<<2;
				}
				for (idSymbol = 0; idSymbol < 7; idSymbol++)	// symbol
		 		{
		 			if ((0 == idSymbol) && (0 == idSymbolBlock))
	 				{
	 					symbolSamCnt = LONGCP_SAM_CNT;
	 				}
					else
					{
						symbolSamCnt = SHORTCP_SAM_CNT;
					}
					for (idSample = 0; idSample < symbolSamCnt; idSample++)
					{
						*pSrcAddr = (idAnt<<24) | (idSlot<<20) | ((idSymbol+idSymbolBlock*7)<<16) | (idSample);
						pSrcAddr++;
					}
		 		}
				memcpy_ucp((void*)dstAddr,(void*)srcImData, dataLen);
			}
		}
	}

	// dummy data
	// IQ data
	uint32_t tag = 0;
	for (idAnt = 0; idAnt < JESD_NR7DS2U_ANT_NUM; idAnt++)
	{
		// S slot, symbol6, odd slot
		srcAddr = JESD_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR + (idAnt*(f7SamCnt<<2)) + ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*5)<<2);
		dstAddr = JESD_NR7DS2U_TX_DUMMY_AXC1DATA_ADDR + idAnt*JESD_NR7DS2U_TX_DUMMY_AXCDATA_LEN;
		dataLen = (SHORTCP_SAM_CNT)<<2;
		ape_csu_dma_1D_G2L_ch0ch1_transfer(srcAddr, dstAddr, dataLen, tag++, 1);
		// S slot, symbol7~13
		srcAddr = JESD_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR + (idAnt*(b7SamCnt<<2));
		dstAddr += dataLen;
		dataLen = b7SamCnt<<2;
		ape_csu_dma_1D_G2L_ch0ch1_transfer(srcAddr, dstAddr, dataLen, tag++, 1);
		// slot8, even slot, symbol0~6
		srcAddr = JESD_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR + (idAnt*(f7SamCnt<<2));
		dstAddr += dataLen;
		dataLen = f7SamCnt<<2;
		ape_csu_dma_1D_G2L_ch0ch1_transfer(srcAddr, dstAddr, dataLen, tag++, 1);
		// slot8, even slot, symbol7~13
		srcAddr = JESD_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR + (idAnt*(b7SamCnt<<2));
		dstAddr += dataLen;
		dataLen = b7SamCnt<<2;
		ape_csu_dma_1D_G2L_ch0ch1_transfer(srcAddr, dstAddr, dataLen, tag++, 1);
		// slot9, odd slot, symbol0~6
		srcAddr = JESD_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR + (idAnt*(f7SamCnt<<2));
		dstAddr += dataLen;
		dataLen = f7SamCnt<<2;
		ape_csu_dma_1D_G2L_ch0ch1_transfer(srcAddr, dstAddr, dataLen, tag++, 1);
		// slot9, odd slot, symbol7~13
		srcAddr = JESD_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR + (idAnt*(b7SamCnt<<2));
		dstAddr += dataLen;
		dataLen = b7SamCnt<<2;
		ape_csu_dma_1D_G2L_ch0ch1_transfer(srcAddr, dstAddr, dataLen, tag++, 1);
	}
}
#endif

int32_t fh_data_init(void)
{
	gJesdTestMode = JESD_TEST_MODE;
	gJesdIOMode = JESD_CSU_CTRL;
	debug_write((DBG_DDR_IDX_DRV_BASE+192), gJesdTestMode); // 0x300
	debug_write((DBG_DDR_IDX_DRV_BASE+193), gJesdIOMode);	// 0x304
		
	jesd_tx_data_init();//init tx data

	return 0;
}

int32_t fh_drv_init(void)
{
	stFrontHaulDrvPara fhDrvPara;
	memset_ucp(&fhDrvPara, 0, sizeof(stFrontHaulDrvPara));
	
	fhDrvPara.protocolSel = PROTOCOL_JESD;

	fronthaul_drv_cfg(&fhDrvPara);

	return 0;
}

int32_t fh_csu_test_init(void)
{
	if (JESD_CSU_CTRL == gJesdIOMode)
	{
	    jesd_csu_init_nr_7ds2u();
	}
	else if (JESD_IO_CTRL == gJesdIOMode)
	{
		jesd_csu_init_nr_7ds2u_iomode();
	}

	//jesd_pin_ctrl(MTIMER_JESD_RX0_ID);
	//jesd_pin_ctrl(MTIMER_JESD_TX0_ID);

	return 0;
}

void fh_test_case()
{
	jesd_csu_start_nr_7ds2u();
}

void fh_data_check(uint32_t times)
{
	return;
}

void jesd_tx_data_init()
{
	uint8_t antNum = 4;
	uint8_t idAnt = 0;
	uint8_t idSlot = 0;
	uint8_t idSymbolBlock = 0;	// symbol0~6, symbol7~13
	uint32_t  srcAddr = 0;
	uint32_t  dstAddr = 0;
	uint32_t  dataLen = 0;
	uint16_t  samByteCnt = 4;
//	uint32_t  slotSamCnt = LONGCP_SAM_CNT+SHORTCP_SAM_CNT*13;
	uint32_t  f7SamCnt = LONGCP_SAM_CNT+SHORTCP_SAM_CNT*6;
	uint32_t  b7SamCnt = SHORTCP_SAM_CNT*7;

	uint32_t cpyCnt = 0;
	// valid data
	// IQ data	
	samByteCnt = 4;
	for (idAnt = 0; idAnt < antNum; idAnt++)
	{
	for (idSlot = 0; idSlot <= 1; idSlot++)
	{
		for (idSymbolBlock = 0; idSymbolBlock <= 1; idSymbolBlock++)
		{
			if ((0 == idSlot) && (0 == idSymbolBlock))	// even slot, symbol0~6
			{
				dataLen = samByteCnt * f7SamCnt;
				srcAddr = (uint32_t)(&antDataPre7[0]);
					dstAddr = JESD_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR + idAnt*dataLen;
			}
			else if ((0 == idSlot) && (1 == idSymbolBlock))	// even slot, symbol7~13
			{
				dataLen = samByteCnt * b7SamCnt;
				srcAddr = (uint32_t)(&antDataPost7[0]);
					dstAddr = JESD_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR + idAnt*dataLen;
			}
			else if ((1 == idSlot) && (0 == idSymbolBlock))	// odd slot, symbol0~6
			{
				dataLen = samByteCnt * f7SamCnt;
				srcAddr = (uint32_t)(&antDataPre7[0]);
					dstAddr = JESD_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR + idAnt*dataLen;
			}
			else if ((1 == idSlot) && (1 == idSymbolBlock))	// odd slot, symbol7~13
			{
				dataLen = samByteCnt * b7SamCnt;
				srcAddr = (uint32_t)(&antDataPost7[0]);
					dstAddr = JESD_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR + idAnt*dataLen;
			}
				//debug_write((DBG_DDR_IDX_DRV_BASE+256+(cpyCnt<<2)), (uint32_t)srcAddr); // 0x400
				//debug_write((DBG_DDR_IDX_DRV_BASE+256+((cpyCnt<<2)+1)), (uint32_t)dstAddr);
				//debug_write((DBG_DDR_IDX_DRV_BASE+256+((cpyCnt<<2)+2)), (uint32_t)dataLen);
//			memcpy_ucp((void*)dstAddr,(void*)srcAddr, dataLen);
			ape_csu_dma_1D_G2L_ch0ch1_transfer(srcAddr, dstAddr, dataLen, cpyCnt, 1);
			cpyCnt++;
			}
		}
	}
	memset((void*)JESD_NR7DS2U_RX_SLOT_EVEN_DATA_ADDR, 0, 4*(f7SamCnt+b7SamCnt)*samByteCnt);
	memset((void*)JESD_NR7DS2U_RX_SLOT_ODD_DATA_ADDR, 0, 4*(f7SamCnt+b7SamCnt)*samByteCnt);
}

