ENTRY( __ucps2_init ) ;
PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_dstack_bottom = (0x260000 - 0x40)) ;/* DM1 */
PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_d0heap_bottom = 0x220000) ;
PROVIDE(__ucps2_d1heap_bottom = 0x260000) ;
PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
PROVIDE(__ucps2_d7heap_bottom = 0x400000) ;


/****************************************************************
 * The segments definition, which affect the load address of the
 * elf.
 */

PHDRS {
  TEXT PT_LOAD;
  DATA PT_LOAD;
  RODATA PT_LOAD;
  DM0 PT_LOAD;
  DM1 PT_LOAD;
  DDR0 PT_LOAD; 
  LOG PT_LOAD; 
}

/* All text code & data are in IM */
SECTIONS {
  /* All .text & .data & .bss are located in IM */
  . = 0x000000;
  .text 	  :	 {   *(.text.start)
                  ASSERT((. <= 0x40000), "Error: No room for SPU start .text");
               } : TEXT

  .text 	  :	{   *(.text*)
                  ASSERT((. <= 0x40000), "Error: No room for SPU's .text");
              } : TEXT

  /* tag start point for bss */
	__ucps2_bss_start = ALIGN(0x4);
  .sbss     :  {   *(.sbss.1*)  } : DATA
  .sbss     :  {   *(.sbss.2*)  } : DATA
  .sbss     :  {   *(.sbss.4*)  } : DATA
  .sbss     :  {   *(.sbss.8*)  } : DATA
  .sbss     :  {   *(.sbss*)
                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
               } : DATA
  .bss     	:  {   *(.bss*)
                  ASSERT((. <= 0x40000), "Error: No room for .bss");
               } : DATA
	__ucps2_bss_end = ALIGN(0x4);
  .sdata	  :  {   *(.sdata.1*)  } : DATA
  .sdata	  :  {   *(.sdata.2*)  } : DATA
  .sdata	  :  {   *(.sdata.4*)  } : DATA
  .sdata	  :  {   *(.sdata.8*)  } : DATA
  .sdata	  :  {   *(.sdata*)
                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
               } : DATA
  .rodata 	:	 {   *(.rodata*)
                  ASSERT((. <= 0x40000), "Error: No room for .rodata");
               } : RODATA
  HIDDEN(__section_end = ALIGN(4));

  /* tag start point for heap */
	__ucps2_heap_start = ALIGN(0x8);

  /********************************************/
  . = 0x200000;
  HIDDEN(__section_start = .);
  .DM0 :  { *( .DM0 )
           ASSERT((. <= 0x220000), "Error: No room for .DM0");
         } : DM0
  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
  /* tag start point for heap in DM0 */
	__ucps2_d0heap_start = ALIGN(0x8);

  . = 0x240000;
  HIDDEN(__section_start = .);
  .DM1 :  { *( .DM1 )
           ASSERT((. <= 0x260000), "Error: No room for .DM1");
         } : DM1
  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
  __section_end = .;
  /* tag start point for heap in DM1 */
	__ucps2_d1heap_start = ALIGN(0x8);

  __ucps2_d2heap_start = 0x2c0000;
  __ucps2_d3heap_start = 0x300000;
  __ucps2_d4heap_start = 0x340000;
  __ucps2_d5heap_start = 0x380000;
  __ucps2_d6heap_start = 0x3c0000;
  __ucps2_d7heap_start = 0x400000;
  /* Place .LOG section in DDR */
  . = 0xB7B00000;
  HIDDEN(__section_start = .);
  .log  :  { *( .LOG )
                 ASSERT((. <= 0xB7C00000), "Error: No room for log");
              } : LOG
  /*HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);*/
  
  . = 0xb3e00000;
  .ddr0 	  :	{   *(.DDR0)
                  ASSERT((. <= 0xb4200000), "Error: No room for DDR0 section");
              } : DDR0 
  HIDDEN(__section_start = 0xffffffff);
  HIDDEN(__section_end = 0xffffffff);
}

