405 lines
16 KiB
C
405 lines
16 KiB
C
![]() |
/*********************************************************************
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*
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* Filename: mtimer_drv.h
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*
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* Created: 2022-04-28 02:19:34 PM
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* Last Modified: 2022-04-28 02:19:34 PM
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* Author: xinxin.li
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* Organization: Beijing Smart Logic Technology Co., Ltd.
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*
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* Description:
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*
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*
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********************************************************************/
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#ifndef __UCP_MTIMER_H__
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#define __UCP_MTIMER_H__
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#include "ucp_cpri.h"
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#include "jesd204.h"
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#define CPRI_TMR_BASE 0x08550000 // CPRI_AUX_BASE + 0x0C000
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#define ECPRI_TMR_BASE 0x08352000
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#define JS_RX0_TMR_BASE JS_COMC_BASE + 0x6000 // 0x06000000 + 0x6000
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#define JS_RX1_TMR_BASE JS_COMC_BASE + 0x7000
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#define JS_TX0_TMR_BASE JS_COMC_BASE + 0x8000
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#define JS_TX1_TMR_BASE JS_COMC_BASE + 0x9000
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#define MTMR_PIN_CTRL_REG (4*0x00)
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#define MTMR_IO_CTRL_REG (4*0x01)
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#define MTMR_INTC_REG (4*0x02)
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#define MTMR_SCR_CTRL_REG (4*0x03)
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#define MTMR_CTRL_REG (4*0x04)
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#define MTMR_RX_SCRL_0_REG (4*0x05)
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#define MTMR_RX_SCRH_0_REG (4*0x06)
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#define MTMR_TX_SCRL_0_REG (4*0x07)
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#define MTMR_TX_SCRH_0_REG (4*0x08)
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#define MTMR_RX_SCRL_1_REG (4*0x09)
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#define MTMR_RX_SCRH_1_REG (4*0x0A)
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#define MTMR_TX_SCRL_1_REG (4*0x0B)
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#define MTMR_TX_SCRH_1_REG (4*0x0C)
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#define MTMR_TEVENT0_REG (4*0x10)
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#define MTMR_TEVENT1_REG (4*0x11)
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#define MTMR_TEVENT2_REG (4*0x12)
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#define MTMR_TSCR_TRG_REG (4*0x13)
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#define MTMR_TWREQ0_REG (4*0x14)
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#define MTMR_TWREQ1_REG (4*0x15)
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#define MTMR_TWREQ2_REG (4*0x16)
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#define MTMR_TINTE00_REG (4*0x17)
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#define MTMR_TINTF00_REG (4*0x18)
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#define MTMR_TINTE01_REG (4*0x19)
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#define MTMR_TINTF01_REG (4*0x1A)
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#define MTMR_TINTE02_REG (4*0x1B)
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#define MTMR_TINTF02_REG (4*0x1C)
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#define MTMR_TINTE10_REG (4*0x1D)
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#define MTMR_TINTF10_REG (4*0x1E)
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#define MTMR_TINTE11_REG (4*0x1F)
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#define MTMR_TINTF11_REG (4*0x20)
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#define MTMR_TINTE12_REG (4*0x21)
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#define MTMR_TINTF12_REG (4*0x22)
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#define MTMR_TINTE20_REG (4*0x23)
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#define MTMR_TINTF20_REG (4*0x24)
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#define MTMR_TINTE21_REG (4*0x25)
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#define MTMR_TINTF21_REG (4*0x26)
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#define MTMR_TINTE22_REG (4*0x27)
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#define MTMR_TINTF22_REG (4*0x28)
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#define MTMR_TINTE30_REG (4*0x29)
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#define MTMR_TINTF30_REG (4*0x2A)
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#define MTMR_TINTE31_REG (4*0x2B)
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#define MTMR_TINTF31_REG (4*0x2C)
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#define MTMR_TINTE32_REG (4*0x2D)
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#define MTMR_TINTF32_REG (4*0x2E)
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#define MTMR_TINTE40_REG (4*0x2F)
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#define MTMR_TINTF40_REG (4*0x30)
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#define MTMR_TINTE41_REG (4*0x31)
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#define MTMR_TINTF41_REG (4*0x32)
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#define MTMR_TINTE42_REG (4*0x33)
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#define MTMR_TINTF42_REG (4*0x34)
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#define MTMR_TINTE50_REG (4*0x35)
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#define MTMR_TINTF50_REG (4*0x36)
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#define MTMR_TINTE51_REG (4*0x37)
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#define MTMR_TINTF51_REG (4*0x38)
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#define MTMR_TINTE52_REG (4*0x39)
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#define MTMR_TINTF52_REG (4*0x3A)
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#define MTMR_TINTE60_REG (4*0x3B)
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#define MTMR_TINTF60_REG (4*0x3C)
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#define MTMR_TINTE61_REG (4*0x3D)
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#define MTMR_TINTF61_REG (4*0x3E)
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#define MTMR_TINTE62_REG (4*0x3F)
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#define MTMR_TINTF62_REG (4*0x40)
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#define MTMR_TINTE70_REG (4*0x41)
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#define MTMR_TINTF70_REG (4*0x42)
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#define MTMR_TINTE71_REG (4*0x43)
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#define MTMR_TINTF71_REG (4*0x44)
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#define MTMR_TINTE72_REG (4*0x45)
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#define MTMR_TINTF72_REG (4*0x46)
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#define MTMR_TINTE80_REG (4*0x47)
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#define MTMR_TINTF80_REG (4*0x48)
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#define MTMR_TINTE81_REG (4*0x49)
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#define MTMR_TINTF81_REG (4*0x4A)
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#define MTMR_TINTE82_REG (4*0x4B)
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#define MTMR_TINTF82_REG (4*0x4C)
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#define MTMR_TINTE90_REG (4*0x4D)
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#define MTMR_TINTF90_REG (4*0x4E)
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#define MTMR_TINTE91_REG (4*0x4F)
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#define MTMR_TINTF91_REG (4*0x50)
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#define MTMR_TINTE92_REG (4*0x51)
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#define MTMR_TINTF92_REG (4*0x52)
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#define MTMR_TINTEA0_REG (4*0x53)
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#define MTMR_TINTFA0_REG (4*0x54)
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#define MTMR_TINTEA1_REG (4*0x55)
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#define MTMR_TINTFA1_REG (4*0x56)
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#define MTMR_TINTEA2_REG (4*0x57)
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#define MTMR_TINTFA2_REG (4*0x58)
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#define MTMR_TINTEB0_REG (4*0x59)
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#define MTMR_TINTFB0_REG (4*0x5A)
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#define MTMR_TINTEB1_REG (4*0x5B)
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#define MTMR_TINTFB1_REG (4*0x5C)
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#define MTMR_TINTEB2_REG (4*0x5D)
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#define MTMR_TINTFB2_REG (4*0x5E)
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#define MTMR_CEVENT_REG (4*0x5F)
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#define MTMR_CMSK_REG (4*0x60)
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#define MTMR_CINTE0_REG (4*0x61)
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#define MTMR_CINTF0_REG (4*0x62)
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#define MTMR_CINTE1_REG (4*0x63)
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#define MTMR_CINTF1_REG (4*0x64)
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#define MTMR_CINTE2_REG (4*0x65)
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#define MTMR_CINTF2_REG (4*0x66)
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#define MTMR_CINTE3_REG (4*0x67)
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#define MTMR_CINTF3_REG (4*0x68)
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#define MTMR_CINTE4_REG (4*0x69)
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#define MTMR_CINTF4_REG (4*0x6A)
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#define MTMR_CINTE5_REG (4*0x6B)
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#define MTMR_CINTF5_REG (4*0x6C)
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#define MTMR_CINTE6_REG (4*0x6D)
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#define MTMR_CINTF6_REG (4*0x6E)
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#define MTMR_CINTE7_REG (4*0x6F)
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#define MTMR_CINTF7_REG (4*0x70)
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#define MTMR_CINTE8_REG (4*0x71)
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#define MTMR_CINTF8_REG (4*0x72)
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#define MTMR_CINTE9_REG (4*0x73)
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#define MTMR_CINTF9_REG (4*0x74)
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#define MTMR_CINTEA_REG (4*0x75)
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#define MTMR_CINTFA_REG (4*0x76)
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#define MTMR_CINTEB_REG (4*0x77)
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#define MTMR_CINTFB_REG (4*0x78)
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#define MTMR_OVFL_REG (4*0x79)
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#define MTMR_OVFH_REG (4*0x7A)
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#define MTMR_RXEN0_0L_REG (4*0x7B)
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#define MTMR_RXEN0_0H_REG (4*0x7C)
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#define MTMR_RXEN0_1L_REG (4*0x7D)
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#define MTMR_RXEN0_1H_REG (4*0x7E)
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#define MTMR_TXEN0_0L_REG (4*0x7F)
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#define MTMR_TXEN0_0H_REG (4*0x80)
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#define MTMR_TXEN0_1L_REG (4*0x81)
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#define MTMR_TXEN0_1H_REG (4*0x82)
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#define MTMR_RXEN1_0L_REG (4*0x83)
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#define MTMR_RXEN1_0H_REG (4*0x84)
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#define MTMR_RXEN1_1L_REG (4*0x85)
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#define MTMR_RXEN1_1H_REG (4*0x86)
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#define MTMR_TXEN1_0L_REG (4*0x87)
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#define MTMR_TXEN1_0H_REG (4*0x88)
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#define MTMR_TXEN1_1L_REG (4*0x89)
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#define MTMR_TXEN1_1H_REG (4*0x8A)
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#define MTMR_RXEN2CSU0L_REG (4*0x8B)
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#define MTMR_RXEN2CSU0H_REG (4*0x8C)
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#define MTMR_RXEN2CSU1L_REG (4*0x8D)
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#define MTMR_RXEN2CSU1H_REG (4*0x8E)
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#define MTMR_TXEN2CSU0L_REG (4*0x8F)
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#define MTMR_TXEN2CSU0H_REG (4*0x90)
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#define MTMR_TXEN2CSU1L_REG (4*0x91)
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#define MTMR_TXEN2CSU1H_REG (4*0x92)
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#define MTMR_SCRATH0L_REG (4*0x93)
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#define MTMR_SCRATH0H_REG (4*0x94)
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#define MTMR_SCRATH1L_REG (4*0x95)
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#define MTMR_SCRATH1H_REG (4*0x96)
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#define MTMR_RX_SCRL_REG (4*0x97)
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#define MTMR_RX_SCRH_REG (4*0x98)
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#define MTMR_TX_SCRL_REG (4*0x99)
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#define MTMR_TX_SCRH_REG (4*0x9A)
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#define MTMR_1PPSL_REG (4*0x9B)
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#define MTMR_1PPSH_REG (4*0x9C)
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#define MTMR_CPRI_10MS_CTRL (4*0x9D)
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#define MTMR_CPRI_ADJ_L (4*0x9E)
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#define MTMR_CPRI_ADJ_H (4*0x9F)
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#define MTMR_CPRI_10MS_CLR (4*0xA0)
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#define MTMR_RX_SOF0_SCR_L_REG (4*0xA1)
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#define MTMR_RX_SOF0_SCR_H_REG (4*0xA2)
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#define MTMR_RX_SOF1_SCR_L_REG (4*0xA3)
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#define MTMR_RX_SOF1_SCR_H_REG (4*0xA4)
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#define MTMR_RX_SOF2_SCR_L_REG (4*0xA5)
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#define MTMR_RX_SOF2_SCR_H_REG (4*0xA6)
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#define MTMR_RX_SOF3_SCR_L_REG (4*0xA7)
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#define MTMR_RX_SOF3_SCR_H_REG (4*0xA8)
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#define MTMR_RX_EOF0_SCR_L_REG (4*0xA9)
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#define MTMR_RX_EOF0_SCR_H_REG (4*0xAA)
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#define MTMR_RX_EOF1_SCR_L_REG (4*0xAB)
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#define MTMR_RX_EOF1_SCR_H_REG (4*0xAC)
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#define MTMR_RX_EOF2_SCR_L_REG (4*0xAD)
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#define MTMR_RX_EOF2_SCR_H_REG (4*0xAE)
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#define MTMR_RX_EOF3_SCR_L_REG (4*0xAF)
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#define MTMR_RX_EOF3_SCR_H_REG (4*0xB0)
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#define MTMR_RX_SOF_EOF_SCR_EN (4*0xB1)
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#define MTMR_TnL_REG0 (4*0x100+8*0x0)
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#define MTMR_TnL_REG1 (4*0x100+8*0x1)
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#define MTMR_TnL_REG2 (4*0x100+8*0x2)
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#define MTMR_TnL_REG3 (4*0x100+8*0x3)
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#define MTMR_TnL_REG4 (4*0x100+8*0x4)
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#define MTMR_TnL_REG5 (4*0x100+8*0x5)
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#define MTMR_TnL_REG6 (4*0x100+8*0x6)
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#define MTMR_TnL_REG7 (4*0x100+8*0x7)
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#define MTMR_TnL_REG8 (4*0x100+8*0x8)
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#define MTMR_TnL_REG9 (4*0x100+8*0x9)
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#define MTMR_TnL_REG10 (4*0x100+8*0xa)
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#define MTMR_TnL_REG11 (4*0x100+8*0xb)
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#define MTMR_TnL_REG12 (4*0x100+8*0xc)
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#define MTMR_TnL_REG13 (4*0x100+8*0xd)
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#define MTMR_TnL_REG14 (4*0x100+8*0xe)
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#define MTMR_TnL_REG15 (4*0x100+8*0xf)
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#define MTMR_TnL_REG16 (4*0x100+8*0x10)
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#define MTMR_TnL_REG17 (4*0x100+8*0x11)
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#define MTMR_TnL_REG18 (4*0x100+8*0x12)
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#define MTMR_TnL_REG19 (4*0x100+8*0x13)
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#define MTMR_TnL_REG20 (4*0x100+8*0x14)
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#define MTMR_TnL_REG21 (4*0x100+8*0x15)
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#define MTMR_TnL_REG22 (4*0x100+8*0x16)
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#define MTMR_TnL_REG23 (4*0x100+8*0x17)
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#define MTMR_TnL_REG24 (4*0x100+8*0x18)
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#define MTMR_TnL_REG25 (4*0x100+8*0x19)
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#define MTMR_TnL_REG26 (4*0x100+8*0x1a)
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#define MTMR_TnL_REG27 (4*0x100+8*0x1b)
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#define MTMR_TnL_REG28 (4*0x100+8*0x1c)
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#define MTMR_TnL_REG29 (4*0x100+8*0x1d)
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#define MTMR_TnL_REG30 (4*0x100+8*0x1e)
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#define MTMR_TnL_REG31 (4*0x100+8*0x1f)
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#define MTMR_TnL_REG32 (4*0x100+8*0x20)
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#define MTMR_TnL_REG33 (4*0x100+8*0x21)
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#define MTMR_TnL_REG34 (4*0x100+8*0x22)
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#define MTMR_TnL_REG35 (4*0x100+8*0x23)
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#define MTMR_TnL_REG36 (4*0x100+8*0x24)
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#define MTMR_TnL_REG37 (4*0x100+8*0x25)
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#define MTMR_TnL_REG38 (4*0x100+8*0x26)
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#define MTMR_TnL_REG39 (4*0x100+8*0x27)
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#define MTMR_TnL_REG40 (4*0x100+8*0x28)
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#define MTMR_TnL_REG41 (4*0x100+8*0x29)
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#define MTMR_TnL_REG42 (4*0x100+8*0x2a)
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#define MTMR_TnL_REG43 (4*0x100+8*0x2b)
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#define MTMR_TnL_REG44 (4*0x100+8*0x2c)
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#define MTMR_TnL_REG45 (4*0x100+8*0x2d)
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#define MTMR_TnL_REG46 (4*0x100+8*0x2e)
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#define MTMR_TnL_REG47 (4*0x100+8*0x2f)
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#define MTMR_TnL_REG48 (4*0x100+8*0x30)
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#define MTMR_TnL_REG49 (4*0x100+8*0x31)
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#define MTMR_TnL_REG50 (4*0x100+8*0x32)
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#define MTMR_TnL_REG51 (4*0x100+8*0x33)
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#define MTMR_TnL_REG52 (4*0x100+8*0x34)
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#define MTMR_TnL_REG53 (4*0x100+8*0x35)
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#define MTMR_TnL_REG54 (4*0x100+8*0x36)
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#define MTMR_TnL_REG55 (4*0x100+8*0x37)
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#define MTMR_TnL_REG56 (4*0x100+8*0x38)
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#define MTMR_TnL_REG57 (4*0x100+8*0x39)
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#define MTMR_TnL_REG58 (4*0x100+8*0x3a)
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#define MTMR_TnL_REG59 (4*0x100+8*0x3b)
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#define MTMR_TnL_REG60 (4*0x100+8*0x3c)
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#define MTMR_TnL_REG61 (4*0x100+8*0x3d)
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#define MTMR_TnL_REG62 (4*0x100+8*0x3e)
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#define MTMR_TnL_REG63 (4*0x100+8*0x3f)
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#define MTMR_TnL_REG64 (4*0x100+8*0x40)
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#define MTMR_TnL_REG65 (4*0x100+8*0x41)
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||
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#define MTMR_TnL_REG66 (4*0x100+8*0x42)
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||
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#define MTMR_TnL_REG67 (4*0x100+8*0x43)
|
||
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#define MTMR_TnL_REG68 (4*0x100+8*0x44)
|
||
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#define MTMR_TnL_REG69 (4*0x100+8*0x45)
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||
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#define MTMR_TnL_REG70 (4*0x100+8*0x46)
|
||
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#define MTMR_TnL_REG71 (4*0x100+8*0x47)
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||
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#define MTMR_TnL_REG72 (4*0x100+8*0x48)
|
||
|
#define MTMR_TnL_REG73 (4*0x100+8*0x49)
|
||
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#define MTMR_TnL_REG74 (4*0x100+8*0x4a)
|
||
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#define MTMR_TnL_REG75 (4*0x100+8*0x4b)
|
||
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#define MTMR_TnL_REG76 (4*0x100+8*0x4c)
|
||
|
#define MTMR_TnL_REG77 (4*0x100+8*0x4d)
|
||
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#define MTMR_TnL_REG78 (4*0x100+8*0x4e)
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||
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#define MTMR_TnL_REG79 (4*0x100+8*0x4f)
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||
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#define MTMR_TnL_REG80 (4*0x100+8*0x50)
|
||
|
#define MTMR_TnL_REG81 (4*0x100+8*0x51)
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||
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#define MTMR_TnL_REG82 (4*0x100+8*0x52)
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||
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#define MTMR_TnL_REG83 (4*0x100+8*0x53)
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||
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#define MTMR_TnL_REG84 (4*0x100+8*0x54)
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||
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#define MTMR_TnL_REG85 (4*0x100+8*0x55)
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||
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#define MTMR_TnL_REG86 (4*0x100+8*0x56)
|
||
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#define MTMR_TnL_REG87 (4*0x100+8*0x57)
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||
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#define MTMR_TnL_REG88 (4*0x100+8*0x58)
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||
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#define MTMR_TnL_REG89 (4*0x100+8*0x59)
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||
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#define MTMR_TnL_REG90 (4*0x100+8*0x5a)
|
||
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#define MTMR_TnL_REG91 (4*0x100+8*0x5b)
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||
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#define MTMR_TnL_REG92 (4*0x100+8*0x5c)
|
||
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#define MTMR_TnL_REG93 (4*0x100+8*0x5d)
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||
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#define MTMR_TnL_REG94 (4*0x100+8*0x5e)
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||
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#define MTMR_TnL_REG95 (4*0x100+8*0x5f)
|
||
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|
||
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||
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||
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#define MTMR_TnH_REG0 (4*0x100+8*0x0 + 0x4)
|
||
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#define MTMR_TnH_REG1 (4*0x100+8*0x1 + 0x4)
|
||
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#define MTMR_TnH_REG2 (4*0x100+8*0x2 + 0x4)
|
||
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#define MTMR_TnH_REG3 (4*0x100+8*0x3 + 0x4)
|
||
|
#define MTMR_TnH_REG4 (4*0x100+8*0x4 + 0x4)
|
||
|
#define MTMR_TnH_REG5 (4*0x100+8*0x5 + 0x4)
|
||
|
#define MTMR_TnH_REG6 (4*0x100+8*0x6 + 0x4)
|
||
|
#define MTMR_TnH_REG7 (4*0x100+8*0x7 + 0x4)
|
||
|
#define MTMR_TnH_REG8 (4*0x100+8*0x8 + 0x4)
|
||
|
#define MTMR_TnH_REG9 (4*0x100+8*0x9 + 0x4)
|
||
|
#define MTMR_TnH_REG10 (4*0x100+8*0xa + 0x4)
|
||
|
#define MTMR_TnH_REG11 (4*0x100+8*0xb + 0x4)
|
||
|
#define MTMR_TnH_REG12 (4*0x100+8*0xc + 0x4)
|
||
|
#define MTMR_TnH_REG13 (4*0x100+8*0xd + 0x4)
|
||
|
#define MTMR_TnH_REG14 (4*0x100+8*0xe + 0x4)
|
||
|
#define MTMR_TnH_REG15 (4*0x100+8*0xf + 0x4)
|
||
|
#define MTMR_TnH_REG16 (4*0x100+8*0x10 + 0x4)
|
||
|
#define MTMR_TnH_REG17 (4*0x100+8*0x11 + 0x4)
|
||
|
#define MTMR_TnH_REG18 (4*0x100+8*0x12 + 0x4)
|
||
|
#define MTMR_TnH_REG19 (4*0x100+8*0x13 + 0x4)
|
||
|
#define MTMR_TnH_REG20 (4*0x100+8*0x14 + 0x4)
|
||
|
#define MTMR_TnH_REG21 (4*0x100+8*0x15 + 0x4)
|
||
|
#define MTMR_TnH_REG22 (4*0x100+8*0x16 + 0x4)
|
||
|
#define MTMR_TnH_REG23 (4*0x100+8*0x17 + 0x4)
|
||
|
#define MTMR_TnH_REG24 (4*0x100+8*0x18 + 0x4)
|
||
|
#define MTMR_TnH_REG25 (4*0x100+8*0x19 + 0x4)
|
||
|
#define MTMR_TnH_REG26 (4*0x100+8*0x1a + 0x4)
|
||
|
#define MTMR_TnH_REG27 (4*0x100+8*0x1b + 0x4)
|
||
|
#define MTMR_TnH_REG28 (4*0x100+8*0x1c + 0x4)
|
||
|
#define MTMR_TnH_REG29 (4*0x100+8*0x1d + 0x4)
|
||
|
#define MTMR_TnH_REG30 (4*0x100+8*0x1e + 0x4)
|
||
|
#define MTMR_TnH_REG31 (4*0x100+8*0x1f + 0x4)
|
||
|
#define MTMR_TnH_REG32 (4*0x100+8*0x20 + 0x4)
|
||
|
#define MTMR_TnH_REG33 (4*0x100+8*0x21 + 0x4)
|
||
|
#define MTMR_TnH_REG34 (4*0x100+8*0x22 + 0x4)
|
||
|
#define MTMR_TnH_REG35 (4*0x100+8*0x23 + 0x4)
|
||
|
#define MTMR_TnH_REG36 (4*0x100+8*0x24 + 0x4)
|
||
|
#define MTMR_TnH_REG37 (4*0x100+8*0x25 + 0x4)
|
||
|
#define MTMR_TnH_REG38 (4*0x100+8*0x26 + 0x4)
|
||
|
#define MTMR_TnH_REG39 (4*0x100+8*0x27 + 0x4)
|
||
|
#define MTMR_TnH_REG40 (4*0x100+8*0x28 + 0x4)
|
||
|
#define MTMR_TnH_REG41 (4*0x100+8*0x29 + 0x4)
|
||
|
#define MTMR_TnH_REG42 (4*0x100+8*0x2a + 0x4)
|
||
|
#define MTMR_TnH_REG43 (4*0x100+8*0x2b + 0x4)
|
||
|
#define MTMR_TnH_REG44 (4*0x100+8*0x2c + 0x4)
|
||
|
#define MTMR_TnH_REG45 (4*0x100+8*0x2d + 0x4)
|
||
|
#define MTMR_TnH_REG46 (4*0x100+8*0x2e + 0x4)
|
||
|
#define MTMR_TnH_REG47 (4*0x100+8*0x2f + 0x4)
|
||
|
#define MTMR_TnH_REG48 (4*0x100+8*0x30 + 0x4)
|
||
|
#define MTMR_TnH_REG49 (4*0x100+8*0x31 + 0x4)
|
||
|
#define MTMR_TnH_REG50 (4*0x100+8*0x32 + 0x4)
|
||
|
#define MTMR_TnH_REG51 (4*0x100+8*0x33 + 0x4)
|
||
|
#define MTMR_TnH_REG52 (4*0x100+8*0x34 + 0x4)
|
||
|
#define MTMR_TnH_REG53 (4*0x100+8*0x35 + 0x4)
|
||
|
#define MTMR_TnH_REG54 (4*0x100+8*0x36 + 0x4)
|
||
|
#define MTMR_TnH_REG55 (4*0x100+8*0x37 + 0x4)
|
||
|
#define MTMR_TnH_REG56 (4*0x100+8*0x38 + 0x4)
|
||
|
#define MTMR_TnH_REG57 (4*0x100+8*0x39 + 0x4)
|
||
|
#define MTMR_TnH_REG58 (4*0x100+8*0x3a + 0x4)
|
||
|
#define MTMR_TnH_REG59 (4*0x100+8*0x3b + 0x4)
|
||
|
#define MTMR_TnH_REG60 (4*0x100+8*0x3c + 0x4)
|
||
|
#define MTMR_TnH_REG61 (4*0x100+8*0x3d + 0x4)
|
||
|
#define MTMR_TnH_REG62 (4*0x100+8*0x3e + 0x4)
|
||
|
#define MTMR_TnH_REG63 (4*0x100+8*0x3f + 0x4)
|
||
|
#define MTMR_TnH_REG64 (4*0x100+8*0x40 + 0x4)
|
||
|
#define MTMR_TnH_REG65 (4*0x100+8*0x41 + 0x4)
|
||
|
#define MTMR_TnH_REG66 (4*0x100+8*0x42 + 0x4)
|
||
|
#define MTMR_TnH_REG67 (4*0x100+8*0x43 + 0x4)
|
||
|
#define MTMR_TnH_REG68 (4*0x100+8*0x44 + 0x4)
|
||
|
#define MTMR_TnH_REG69 (4*0x100+8*0x45 + 0x4)
|
||
|
#define MTMR_TnH_REG70 (4*0x100+8*0x46 + 0x4)
|
||
|
#define MTMR_TnH_REG71 (4*0x100+8*0x47 + 0x4)
|
||
|
#define MTMR_TnH_REG72 (4*0x100+8*0x48 + 0x4)
|
||
|
#define MTMR_TnH_REG73 (4*0x100+8*0x49 + 0x4)
|
||
|
#define MTMR_TnH_REG74 (4*0x100+8*0x4a + 0x4)
|
||
|
#define MTMR_TnH_REG75 (4*0x100+8*0x4b + 0x4)
|
||
|
#define MTMR_TnH_REG76 (4*0x100+8*0x4c + 0x4)
|
||
|
#define MTMR_TnH_REG77 (4*0x100+8*0x4d + 0x4)
|
||
|
#define MTMR_TnH_REG78 (4*0x100+8*0x4e + 0x4)
|
||
|
#define MTMR_TnH_REG79 (4*0x100+8*0x4f + 0x4)
|
||
|
#define MTMR_TnH_REG80 (4*0x100+8*0x50 + 0x4)
|
||
|
#define MTMR_TnH_REG81 (4*0x100+8*0x51 + 0x4)
|
||
|
#define MTMR_TnH_REG82 (4*0x100+8*0x52 + 0x4)
|
||
|
#define MTMR_TnH_REG83 (4*0x100+8*0x53 + 0x4)
|
||
|
#define MTMR_TnH_REG84 (4*0x100+8*0x54 + 0x4)
|
||
|
#define MTMR_TnH_REG85 (4*0x100+8*0x55 + 0x4)
|
||
|
#define MTMR_TnH_REG86 (4*0x100+8*0x56 + 0x4)
|
||
|
#define MTMR_TnH_REG87 (4*0x100+8*0x57 + 0x4)
|
||
|
#define MTMR_TnH_REG88 (4*0x100+8*0x58 + 0x4)
|
||
|
#define MTMR_TnH_REG89 (4*0x100+8*0x59 + 0x4)
|
||
|
#define MTMR_TnH_REG90 (4*0x100+8*0x5a + 0x4)
|
||
|
#define MTMR_TnH_REG91 (4*0x100+8*0x5b + 0x4)
|
||
|
#define MTMR_TnH_REG92 (4*0x100+8*0x5c + 0x4)
|
||
|
#define MTMR_TnH_REG93 (4*0x100+8*0x5d + 0x4)
|
||
|
#define MTMR_TnH_REG94 (4*0x100+8*0x5e + 0x4)
|
||
|
#define MTMR_TnH_REG95 (4*0x100+8*0x5f + 0x4)
|
||
|
|
||
|
|
||
|
#endif
|
||
|
|