84 lines
5.9 KiB
C
84 lines
5.9 KiB
C
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/*********************************************************************
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*
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* Filename: ucp_js_ctrl.h
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*
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* Created: 2021-11-08 10:54:34 AM
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* Last Modified: 2022-01-06 06:48:29 PM
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* Author: LiPin , lip2014@ia.ac.cn
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* Organization: Beijing Smart Logic Technology Co., Ltd.
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*
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* Description:
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*
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*
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********************************************************************/
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#ifndef __JS_CTRL__
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#define __JS_CTRL__
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//The JESD And SRIO SubCtrl Base Addr
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#define JS_CTRL_BASE 0x05f50000
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//The JESD ECPRI CPRI SRIO SubCtrl Base Addr
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#define JECS_CTRL_BASE 0x08460000
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//------------------------------------JS SYSTEM--------------------------------//
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//JESD And SRIO SubCtrl Reg Addr
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#define JS_CTRL_CLK_SEL (*((volatile uint32_t *)(JS_CTRL_BASE + 4*18))) //RW
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#define JS_CTRL_TX_TMR_EN_CTRL (*((volatile uint32_t *)(JS_CTRL_BASE + 4*19))) //RW
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#define JS_PHY_BS_CTRL (*((volatile uint32_t *)(JS_CTRL_BASE + 4*20)))
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#define JS_CTRL_PHY_MISC_SEL_0 (*((volatile uint32_t *)(JS_CTRL_BASE + 4*22))) //RW
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#define JS_CTRL_PHY_INT_CLK_SEL_SUB0 (*((volatile uint32_t *)(JS_CTRL_BASE + 4*23))) //RW
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#define JS_CTRL_PHY_OUT_TEST_CLK_SEL_SUB0 (*((volatile uint32_t *)(JS_CTRL_BASE + 4*24))) //RW
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#define JS_CTRL_PHY_MISC_SEL_1 (*((volatile uint32_t *)(JS_CTRL_BASE + 4*53))) //RW
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#define JS_CTRL_SRIO0_AWADDR_H (*((volatile uint32_t *)(JS_CTRL_BASE + 4*54))) //RW
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#define JS_CTRL_SRIO0_ARADDR_H (*((volatile uint32_t *)(JS_CTRL_BASE + 4*55))) //RW
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//------------------------------------ES SYSTEM--------------------------------//
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//JESD ECPRI CPRI SRIO SubCtrl Reg Addr
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#define JECS_CTRL_RFM_USER0 (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*0))) //RW
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#define JECS_CTRL_RFM_USER1 (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*1))) //RW
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#define JECS_CTRL_RFM_USER2 (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*2))) //RW
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#define JECS_CTRL_RFM_USER3 (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*3))) //RW
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#define JECS_CTRL_RFM_USER4 (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*4))) //RW
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#define JECS_CTRL_RFM_USER5 (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*5))) //RW
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#define JECS_CTRL_RFM_ADDR_CTRL (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*6))) //RW
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#define JECS_CTRL_QOS_M3_SRIO_AXIM (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*7))) //RW
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#define JECS_CTRL_PHY_CLK_SEL (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*8))) //RW
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#define JECS_CTRL_PROTOCOL_SEL (*((volatile uint32_t *)(JECS_CTRL_BASE + 4*9))) //RW
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#define JECS_CTRL_RFM_INT_MASK0_PTR ((volatile uint32_t *)(JECS_CTRL_BASE + 10*4))
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#define JECS_CTRL_RFM_INT_MASK0 (*((volatile uint32_t *)(JECS_CTRL_BASE + 10*4)))
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#define JECS_CTRL_RFM_INT_MASK1 (*((volatile uint32_t *)(JECS_CTRL_BASE + 11*4)))
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#define JECS_CTRL_RFM_INT_MASK2 (*((volatile uint32_t *)(JECS_CTRL_BASE + 12*4)))
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#define JECS_CTRL_RFM_INT_MASK3 (*((volatile uint32_t *)(JECS_CTRL_BASE + 13*4)))
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#define JECS_CTRL_RFM_INT_MASK4 (*((volatile uint32_t *)(JECS_CTRL_BASE + 14*4)))
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#define JECS_CTRL_RFM_INT_MASK5 (*((volatile uint32_t *)(JECS_CTRL_BASE + 15*4)))
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#define JECS_CTRL_RFM_INT_MASK6 (*((volatile uint32_t *)(JECS_CTRL_BASE + 16*4)))
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#define JECS_CTRL_RFM_INT_MASK7 (*((volatile uint32_t *)(JECS_CTRL_BASE + 17*4)))
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#define JECS_CTRL_RFM_INT_MASK8 (*((volatile uint32_t *)(JECS_CTRL_BASE + 18*4)))
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#define JECS_CTRL_RFM_INT_MASK9 (*((volatile uint32_t *)(JECS_CTRL_BASE + 19*4)))
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#define JECS_CTRL_RFM_INT_MASK10 (*((volatile uint32_t *)(JECS_CTRL_BASE + 20*4)))
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#define JECS_CTRL_RFM_INT_MASK11 (*((volatile uint32_t *)(JECS_CTRL_BASE + 21*4)))
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#define JECS_CTRL_RFM_INT_MASK12 (*((volatile uint32_t *)(JECS_CTRL_BASE + 22*4)))
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#define JECS_CTRL_RFM_INT_MASK13 (*((volatile uint32_t *)(JECS_CTRL_BASE + 23*4)))
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#define JECS_CTRL_RFM_INT_MASK14 (*((volatile uint32_t *)(JECS_CTRL_BASE + 24*4)))
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#define JECS_CTRL_RFM_INT_MASK15 (*((volatile uint32_t *)(JECS_CTRL_BASE + 25*4)))
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#define JECS_CTRL_CTC_INT0 (*((volatile uint32_t *)(JECS_CTRL_BASE + 26*4)))
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#define JECS_CTRL_CTC_INT1 (*((volatile uint32_t *)(JECS_CTRL_BASE + 27*4)))
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#define JECS_CTRL_CTC_INT2 (*((volatile uint32_t *)(JECS_CTRL_BASE + 28*4)))
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#define JECS_CTRL_CTC_INT3 (*((volatile uint32_t *)(JECS_CTRL_BASE + 29*4)))
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#define JECS_CTRL_CTC_INT4 (*((volatile uint32_t *)(JECS_CTRL_BASE + 30*4)))
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#define JECS_CTRL_CTC_INT5 (*((volatile uint32_t *)(JECS_CTRL_BASE + 31*4)))
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#define JECS_CTRL_CTC_INT6 (*((volatile uint32_t *)(JECS_CTRL_BASE + 32*4)))
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#define JECS_CTRL_CPRI_GMAC_PHY_INT (*((volatile uint32_t *)(JECS_CTRL_BASE + 33*4)))
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#define JECS_PHY_BS_CTRL (*((volatile uint32_t *)(JECS_CTRL_BASE + 34*4)))
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#define JECS_CTRL_ECPRI_QOSH (*((volatile uint32_t *)(JECS_CTRL_BASE + 35*4)))
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#define JECS_CTRL_ECPRI_QOSL (*((volatile uint32_t *)(JECS_CTRL_BASE + 36*4)))
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#define JECS_CTRL_CSU_BUS_CTRL (*((volatile uint32_t *)(JECS_CTRL_BASE + 37*4)))
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#define JECS_CTRL_CPRI_PAD_CTRL (*((volatile uint32_t *)(JECS_CTRL_BASE + 38*4)))
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#define JECS_CTRL_REG39 (*((volatile uint32_t *)(JECS_CTRL_BASE + 39*4)))
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#endif
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