172 lines
3.9 KiB
C
172 lines
3.9 KiB
C
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#ifndef _INC_MTIMER_COM_H_
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#define _INC_MTIMER_COM_H_
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#define APE_NUM (4) //4
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#define FIBER_MIN_DELAY 2
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#define INT_DELAY 4 // 6 // // us
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#define EDMA_OFFSET 50 // 6 // 8 // 2 // us
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#define CPRI_RE_TOFFSET 0 // 100 // 200 // ns // Toffset, to be change
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#define CPRI_T2A 100 // 1 // 10 // ns
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#define CPRI_RNDTRIP_EXCABLE_DELAY_MAX 5000 // ns
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#define CPRI_RNDCABLE_DELAY_PRECISION 16.276 // ns, cable delay precision
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#define CPRI_TX_SERDES_DELAY 103 // serdes datasheet, table5-1
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#define CPRI_RX_SERDES_DELAY 74 // serdes datasheet, table5-3
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typedef enum _tagMTmrIntID
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{
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MTMR_INT_SLOT_OFFSET = 0,
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MTMR_INT_10ms = 1,
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MTMR_INT_TDD_OFFSET = 2,
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MTMR_INT_RFM0_SLOT,
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MTMR_INT_APE0_SLOT,
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MTMR_INT_APE1_SLOT,
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MTMR_INT_APE2_SLOT,
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MTMR_INT_APE3_SLOT,
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MTMR_INT_APE4_SLOT,
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MTMR_INT_APE5_SLOT,
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MTMR_INT_APE6_SLOT,
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MTMR_INT_APE7_SLOT
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}MTmrIntID;
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typedef enum _tagMTmrTID
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{
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MTMR_10ms_OFFSET = 0,
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MTMR_CSU_CH,
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MTMR_TDD_OFFSET,
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MTMR_TXSLOT_OFFSET,
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MTMR_RXSLOT_OFFSET,
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MTMR_APE0_TXSLOT, // 5
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MTMR_APE0_RXSLOT,
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MTMR_APE1_TXSLOT, // 7
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MTMR_APE1_RXSLOT,
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MTMR_APE2_TXSLOT, // 9
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MTMR_APE2_RXSLOT,
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MTMR_APE3_TXSLOT, // 11
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MTMR_APE3_RXSLOT,
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MTMR_APE4_TXSLOT, // 13
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MTMR_APE4_RXSLOT,
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MTMR_APE5_TXSLOT, // 15
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MTMR_APE5_RXSLOT,
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MTMR_APE6_TXSLOT, // 17
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MTMR_APE6_RXSLOT,
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MTMR_APE7_TXSLOT, // 19
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MTMR_APE7_RXSLOT,
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MTMR_RFM0_TXSLOT, // 21
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MTMR_RFM0_RXSLOT,
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MTMR_CSU_INSERT = 24,
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MTMR_TDD_OFFSET_10000 = 25,
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#ifdef DISTRIBUTED_BS
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MTMR_TDD_OFFSET_2500 = 26,
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MTMR_TDD_OFFSET_7500 = 27,
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#endif
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#ifdef INTEGRATED_BS
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MTMR_JESD_RXON = 26,
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MTMR_JESD_RXOFF = 27,
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#endif
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MTMR_JESD_TXOFF = 28,
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MTMR_JESD_TXON = 29,
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MTMR_LTE_FAPI = 30,
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}MTmrTID;
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typedef enum _tagMTmrCID
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{
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MTMR_CEVENT_CNT32L = 0,
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MTMR_CEVENT_CNT16M,
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MTMR_CEVENT_CNT14H,
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MTMR_CEVENT_RXEN2CSU0 = 11,
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MTMR_CEVENT_RXEN2CSU1,
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MTMR_CEVENT_TXEN2CSU0,
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MTMR_CEVENT_TXEN2CSU1,
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MTMR_CEVENT_1PPS = 17
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}MTmrCID;
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typedef enum
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{
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FH_NO_ALARM = 0,
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CPRI_ALARM_LINKSTATUS,
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ALARM_SFN_CAL,
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ALARM_SLOT_CNT,
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CPRI_ALARM_RNDTRIP,
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CPRI_ALARM_CABLE
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}FhAlarmStatus;
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typedef struct _tagFhAlarmStat
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{
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uint32_t alarmFlag;
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uint32_t alarmSfnCalCnt;
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uint32_t alarmMeasureCnt;
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}stFhAlarmStat;
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typedef struct _tagMtimerPara{
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// timerʱ<72><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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uint32_t tmrClk;
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uint32_t tmrMsPeriod;
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uint32_t tmrUsPeriod;
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uint32_t tmr100UsPeriod;
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// timer cfg para
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uint32_t tempL_max;
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uint32_t tempM_max;
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uint32_t tempH_max;
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// scratch count
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uint32_t tmrScrCnt;
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// phy para
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uint32_t scsId;
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uint16_t runCoreId;
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uint16_t reCfgFlag;
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uint32_t slotPeriod; // slot period, us as unit
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uint32_t tddPeriod; // tdd period, us as unit
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uint32_t tddSlotNum; // slot num of every tdd period
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uint32_t slotMaxNum;
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}stMtimerPara;
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typedef struct _tagMtimerIntStat{
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// int cnt
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uint32_t tmrIntCnt;
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uint32_t slotIntCnt;
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uint32_t tddOffsetIntCnt;
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uint32_t insOffsetIntCnt;
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uint32_t sfnIntCnt;
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uint32_t sfnOffsetIntCnt;
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uint32_t lteFapiIntCnt;
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uint32_t pp1sIntCnt;
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uint32_t csuEnCnt;
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uint32_t txSlotIntCnt;
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uint32_t rxSlotIntCnt;
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// int flag
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uint32_t sfnOffsetIntFlag;
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}stMtimerIntStat;
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typedef struct _tagMtimerPhyPara{
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ϶<CAB1><CFB6><EFBFBD><EFBFBD>
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uint32_t slotMaxNum;
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uint32_t reserved1;
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uint32_t txSlotNum;
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uint32_t rxSlotNum;
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uint32_t txSfnNum;
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uint32_t rxSfnNum;
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uint64_t txSlotTiming;
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uint64_t rxSlotTiming;
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}stMtimerPhyPara;
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typedef struct _tagMtimerSfnCal{
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int32_t pp1sLockFlagPre; // <20><>һ<EFBFBD><D2BB>pp1sʱ<73>̼<EFBFBD>¼<EFBFBD><C2BC>pp1s<31><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
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int32_t pp1sLockFlag; // pp1s<31><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>arm<72><6D><EFBFBD><EFBFBD>Ϣ֪ͨ
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uint32_t sfnCalCnt; // sfn cnt from arm<72><6D>for sfn calibration of ape
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int32_t startCalFlag; // calibration flag
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int32_t sfnCalFinished; // calibration flag
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uint32_t sfnValidFlag; // sfn valid flag from arm
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uint32_t sfnFlipFlag; // sfn flip flag from arm
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uint32_t sfnFlipFlagPre;
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int32_t sfnCalBeta;
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float sfnCalAlpha;
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}stMtimerSfnCal;
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#endif /* _INC_MTIMER_COM_H_ */
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