YB_Platform/inc/drv_ape.h

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#ifndef __DRV_APE_INTERFACE_H__
#define __DRV_APE_INTERFACE_H__
/****************************UCP2.0 Platform start***********************************/
#define STC_LOCAL_TIME_BASE (0x08568000 + 0x4014)
#define GET_STC_CNT() (LOAD_EX_V_W(STC_LOCAL_TIME_BASE))
/*
delay_us
num
*/
void delay_us(uint32_t num);
/**************************************************/
/* PORT ID相关 */
/**************************************************/
/*
get_ucp_port_id
port id
*/
uint32_t get_ucp_port_id();
/**************************************************/
/* 核ID相关 */
/**************************************************/
/*
get_core_id
id
*/
uint32_t get_core_id(void);
/**************************************************/
/* 初始化接口 */
/**************************************************/
/***************************************************************/
// 以下接口为帕拉丁临时验证带OSP的版本使用最好按声明的顺序依次调用。
// 具体可参见驱动的phy_drv_init接口该接口只是驱动临时使用物理层可根据自己需求适配修改。
/***************************************************************/
// pet sm初始化该接口只需八个核中的一个核调用即可放在main函数的最前面
void pet_sm_init();
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/***************************************************************/
// 以下接口为帕拉丁临时验证带OSP的版本使用最好按声明的顺序依次调用。
// 具体可参见phy_init.s.c中的tod_int_init接口。
/***************************************************************/
// stc timer tod中断初始化该接口只需八个核中的一个核调用即可放在osp初始化的钩子函数tod_int_init中
void stc_timer_todint_init(void);
/***************************************************************/
/**************************************************/
/* 其他接口 */
/**************************************************/
/*
get_tx_nr_sfn
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*/
int get_tx_nr_sfn();
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/*
get_tx_lte_sfn
*/
int get_tx_lte_sfn();
/*
get_tx_nr_slot
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*/
int get_tx_nr_slot();
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/*
get_tx_lte_subframe
*/
int get_tx_lte_subframe();
/*
get_rx_nr_sfn
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*/
int get_rx_nr_sfn();
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/*
get_rx_lte_sfn
*/
int get_rx_lte_sfn();
/*
get_rx_nr_slot
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*/
int get_rx_nr_slot();
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/*
get_rx_lte_subframe
*/
int get_rx_lte_subframe();
/*
get_tx_nr_slot_cycle
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ns
*/
int get_tx_nr_slot_cycle();
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/*
get_tx_lte_slot_cycle
scs
ns
*/
int get_tx_lte_subframe_cycle();
/*
get_rx_nr_slot_cycle
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ns
*/
int get_rx_nr_slot_cycle();
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/*
get_rx_lte_slot_cycle
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ns
*/
int get_rx_lte_subframe_cycle();
/*
get_cpri_delay
*delay: cpri的接收延迟量us
cpri的接收延迟量
*/
void get_cpri_delay(uint32_t* delay);
/*
get_cpri_advance
*advance: cpri的发送提前量us
cpri的发送提前量
*/
void get_cpri_advance(uint32_t* advance);
/*
send_cpri_csu_stop_cmd
cpri csu stop
*/
int32_t send_cpri_csu_stop_cmd();
/*
send_cpri_csu_start_cmd
cpri csu start
*/
int32_t send_cpri_csu_start_cmd();
/**************************************************/
/* ape cnt相关 */
/**************************************************/
extern int apeid_cnt_ad_val[8];
#define GET_CNT_VAL(apeid) LOAD_EX_V_W((volatile uint32_t*)(apeid_cnt_ad_val[apeid]))
/**************************************************/
/* ape csu相关 */
/**************************************************/
#define APC_DMA_REG_NUM 16
#define DMA_DIR_L2G 0
#define DMA_DIR_G2L 1
#define DMA_DIR_G2G 1
#define DMA_REG_GROUP0 0
#define DMA_REG_GROUP1 1
#define DMA_REG_GROUP2 2
#define DMA_REG_GROUP3 3
//ape-csu dma chain define
#define MAX_CHAIN_LEN (16)
#define APC_DMA_CHAIN_L2_SIZE_WORD (4)
#define APC_DMA_CHAIN_L1_3D_SIZE_WORD (8)
#define APC_DMA_CHAIN_L1_1D_SIZE_WORD (4)
/* apc-dma chain level2 info */
// word0
// cmdData Low 32bit
#define APC_DMA_CHAIN_L2_CMDDATAL_WORD_OFFSET (0)
#define APC_DMA_CHAIN_L2_CMDDATAL_BIT_OFFSET (0)
// word1
// bit26:24: next node address High 3bit
// bit17:16: base address for level1 chain High 2bit
// bit15:0: number of nodes for level1 chain 16bit
#define APC_DMA_CHAIN_L2_NXTADDRH_L1_BASEADDRH_NUMNODES_WORD_OFFSET (1)
#define APC_DMA_CHAIN_L2_L1_NUMNODES_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L2_L1_BASEADDRH_BIT_OFFSET (16)
#define APC_DMA_CHAIN_L2_NXTADDRH_BIT_OFFSET (24)
// word2
// base address for level1 chain Low 32bit
#define APC_DMA_CHAIN_LEVEL2_L1_BASEADDR_L32_WORD_OFFSET (2)
#define APC_DMA_CHAIN_LEVEL2_L1_BASEADDR_L32_BIT_OFFSET (0)
// word3
// bit31: node address mode 1bit
// bit30:0: next node address Low 31bit
#define APC_DMA_CHAIN_L2_ADDRMODE_NXTADDRL_WORD_OFFSET (3)
#define APC_DMA_CHAIN_L2_NXTADDR_L31_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L2_ADDRMODE_BIT_OFFSET (31)
/* apc-dma chain level1 2-3d info */
// word0
// cmdData Low 32bit
#define APC_DMA_CHAIN_L1_3D_CMDDATAL_WORD_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_CMDDATAL_BIT_OFFSET (0)
// word1
// xAddr Low 32bit
#define APC_DMA_CHAIN_L1_3D_XADDRL_WORD_OFFSET (1)
#define APC_DMA_CHAIN_L1_3D_XADDRL_BIT_OFFSET (0)
// word2
// bit29:16: cmdData High 14bit
// bit15:0: xNum 16bit
#define APC_DMA_CHAIN_L1_3D_CMDDATAH_XNUM_WORD_OFFSET (2)
#define APC_DMA_CHAIN_L1_3D_XNUM_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_CMDDATAH_BIT_OFFSET (16)
// word3
// yStep 32bit
#define APC_DMA_CHAIN_L1_3D_YSTEP_WORD_OFFSET (3)
#define APC_DMA_CHAIN_L1_3D_YSTEP_BIT_OFFSET (0)
// word4
// bit30:28: next node address High 3bit
// bit25:24: xAddr High 2bit
// bit23:20: GRAN
// bit19:16: SIZE
// bit15:0: YNum
#define APC_DMA_CHAIN_L1_3D_NXTADDRH_XADDRH_GRANSIZE_YNUM_WORD_OFFSET (4)
#define APC_DMA_CHAIN_L1_3D_YNUM_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_SIZE_BIT_OFFSET (16)
#define APC_DMA_CHAIN_L1_3D_GRAN_BIT_OFFSET (20)
#define APC_DMA_CHAIN_L1_3D_XADDRH_BIT_OFFSET (24)
#define APC_DMA_CHAIN_L1_3D_NXTADDRH_BIT_OFFSET (28)
// word5
// zStep 32bit
#define APC_DMA_CHAIN_L1_3D_ZSTEP_WORD_OFFSET (5)
#define APC_DMA_CHAIN_L1_3D_ZSTEP_BIT_OFFSET (0)
// word6
// AllNum 32bit (valid field is bit23:0)
#define APC_DMA_CHAIN_L1_3D_ALLNUM_WORD_OFFSET (6)
#define APC_DMA_CHAIN_L1_3D_ALLNUM_BIT_OFFSET (0)
// word7
// bit31: node address mode 1bit
// bit30:0: next node address Low 31bit
#define APC_DMA_CHAIN_L1_3D_ADDRMODE_NXTADDRL_WORD_OFFSET (7)
#define APC_DMA_CHAIN_L1_3D_NXTADDRL_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_ADDRMODE_BIT_OFFSET (31)
/* apc-dma chain level1 1d info */
// word0
// cmdData Low 32bit
#define APC_DMA_CHAIN_L1_1D_CMDDATAL_WORD_OFFSET (0)
#define APC_DMA_CHAIN_L1_1D_CMDDATAL_BIT_OFFSET (0)
// word1
// xAddr Low 32bit
#define APC_DMA_CHAIN_L1_1D_XADDRL_WORD_OFFSET (1)
#define APC_DMA_CHAIN_L1_1D_XADDRL_BIT_OFFSET (0)
// word2
// bit31:30: xAddr High 2bit
// bit29:16: cmdData High 14bit
// bit15:0: AllNum 16bit (MaxBytes 65535)
#define APC_DMA_CHAIN_L1_1D_XADDRH_CMDDATAH_ALLNUM_WORD_OFFSET (2)
#define APC_DMA_CHAIN_L1_1D_ALLNUM_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_1D_CMDDATAH_BIT_OFFSET (16)
#define APC_DMA_CHAIN_L1_1D_XADDRH_BIT_OFFSET (30)
// word3
// bit31: node address mode 1bit
// bit30:0: next node address Low 31bit
#define APC_DMA_CHAIN_L1_1D_ADDRMODE_NXTADDRL_WORD_OFFSET (3)
#define APC_DMA_CHAIN_L1_1D_NXTADDRL_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_1D_ADDRMODE_BIT_OFFSET (31)
//-------------------------------------------------------------
//struct define
//-------------------------------------------------------------
// cus dma 寄存器方式,结构体参数
typedef struct _tagCsuDmaReg
{
uint32_t dmaAddrL;
uint32_t dmaAddrH;
uint32_t dmaYStepL;
uint32_t dmaYStepH;
uint32_t dmaZStepL;
uint32_t dmaZStepH;
uint16_t dmaXNum;
uint16_t dmaYNum;
uint32_t dmaAllNum : 24;
uint32_t dmaGran : 4;
uint32_t dmaSize : 4;
}stCsuDmaReg;
typedef struct _tagCsuDmaCmdL
{
uint32_t rCmd : 2; // 0:普通DMA1:一级DMA2:一级DMA并等待ActNum3:二级DMA
uint32_t wCmd : 2;
uint32_t dmaType : 1; // 0:一维1:多维
uint32_t cacheMode : 1; // 0:common mode, 1:cache mode
uint32_t continueNext : 1; // continue the next dma
uint32_t continueLast : 1; // continue the last dma
uint32_t idSrc : 5; // src buffer id
uint32_t idDst : 5; // dst buffer id
uint32_t dmaTag : 5; // tag
uint32_t flush : 1;
uint32_t ecpriEnd : 3;
uint32_t zNumValid : 1;
uint32_t allOrYNum : 2;
uint32_t allNumSel : 1;
uint32_t stall : 1; // stall信号是否在传输之前触发stall中断
}stCsuDmaCmdL;
typedef struct _tagCsuDmaCmdH
{
uint32_t rXNumNextDma : 1; // 读操作完成一个XNum后换下一个DMA
uint32_t rYNumNextDma : 1; // 读操作完成一个YNum后换下一个DMA
uint32_t wXNumNextDma : 1; // 写操作完成一个XNum后换下一个DMA
uint32_t wYNumNextDma : 1; // 写操作完成一个YNum后换下一个DMA
uint32_t rRfpFirstDma : 1; // 读操作位对应AxC的rfp后第一组DMA请求
uint32_t reserved1 : 6;
uint32_t wLinkCycleMode : 1; // 写操作为链表循环模式
uint32_t reserved2 : 1;
uint32_t rLinkCycleMode : 1; // 读操作为链表循环模式
uint32_t reserved3 : 18;
}stCsuDmaCmdH;
// 一级链表多维DMA
typedef struct _tagCsuLinkDesc1L3D
{
uint32_t cmdFifoL; // [31:0] // fifo[31:0]
uint32_t dmaAddrL; // [63:32] // addr[31:0]
uint32_t dmaXNum : 16; // [79:64] // XNum
uint32_t cmdFifoH : 14; // [93:80] // fifo[45:32]
uint32_t reserved1 : 2; // [95:94]
uint32_t dmaYStep; // [127:96] // YStep[31:0]
uint32_t dmaYNum : 16; // [143:128] // YNum
uint32_t dmaSize : 4; // [147:144] // dmaSize
uint32_t dmaGran : 3; // [150:148] // gran
uint32_t dmaCGran : 1; // [151] // cgran
uint32_t dmaAddrH : 2; // [153:152] // addr[33:32]
uint32_t reserved2 : 2; // [155:154]
uint32_t nextAddrH : 3; // [158:156] // next addr[33:31]
uint32_t reserved3 : 1; // [159]
uint32_t dmaZStep; // [191:160] // ZStep[31:0]
uint32_t dmaAllNum; // [223:192] // all num
uint32_t nextAddrL : 31; // [254:224] // next addr[30:0]
uint32_t nAddrMode : 1; // [255] // 1使用nextAddr0地址自动加0x20/0x40
}stCsuLinkDesc1L3D;
//extern __attribute__((always_inline)) uint8_t os_get_apeid();
//-------------------------------------------------------------
//api
//-------------------------------------------------------------
/*!
* @brief: tag号对应的dma任务是否完成01
* isWait==1tag对应的任务完成1
* @author: xinxin.li
* @Date: 202261
* @param: task_tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @return: 10
*/
int ape_csu_task_lookup(uint8_t task_tag, uint8_t isWait);
/*!
* @brief: 使01L2G的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @return: 0 isWait=1dma搬移完成才返回
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*/
int ape_csu_dma_1D_L2G_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: 使23L2G的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @return: 0 isWait=1dma搬移完成才返回
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*/
int ape_csu_dma_1D_L2G_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: 使01G2L的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @return: 0 isWait=1dma搬移完成才返回
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*/
int ape_csu_dma_1D_G2L_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: 使23G2L的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @return: 0 isWait=1dma搬移完成才返回
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*/
int ape_csu_dma_1D_G2L_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief:
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: blockLenSrc : [ ]
* @param: blockStepSrc : [ ]
* @param: addrDst : [ ]
* @param: blockLenDst : [ ]
* @param: blockStepDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @param: regGroup : [245367 ]
* @param: dir : [0L2G1G2L or G2G ]
* @return: 0 isWait=1dma搬移完成才返回
* -1
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*/
int ape_csu_dma_2Dto2D_transfer(uint64_t addrSrc, uint16_t blockLenSrc, uint64_t blockStepSrc,
uint64_t addrDst, uint16_t blockLenDst, uint64_t blockStepDst,
uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir);
/*!
* @brief:
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: xNumSrc : [ ]
* @param: yNumSrc : [ ]
* @param: yStepSrc : [ ]
* @param: zStepSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @param: regGroup : [245367 ]
* @param: dir : [0L2G1G2L or G2G ]
* @return: 0 isWait=1dma搬移完成才返回
* -1
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*/
int ape_csu_dma_3Dto1D_transfer(uint64_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint64_t yStepSrc, uint64_t zStepSrc,
uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir);
/*!
* @brief:
* @author: xinxin.li
* @Date: 2023828
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: xNumDst : [ ]
* @param: yNumDst : [ ]
* @param: yStepDst : [ ]
* @param: zStepDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @param: regGroup : [245367 ]
* @param: dir : [0L2G1G2L or G2G ]
* @return: 0 isWait=1dma搬移完成才返回
* -1
*/
int32_t ape_csu_dma_1Dto3D_transfer(uint64_t addrSrc, uint64_t addrDst, uint16_t xNumDst, uint16_t yNumDst, uint64_t yStepDst, uint64_t zStepDst,
uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir);
/*!
* @brief:
* @author: xinxin.li
* @Date: 2023828
* @param: addrSrc : [ ]
* @param: xNumSrc : [ ]
* @param: yNumSrc : [ ]
* @param: yStepSrc : [ ]
* @param: zStepSrc : [ ]
* @param: addrDst : [ ]
* @param: xNumDst : [ ]
* @param: yNumDst : [ ]
* @param: yStepDst : [ ]
* @param: zStepDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @param: regGroup : [245367 ]
* @param: dir : [0L2G1G2L or G2G ]
* @return: 0 isWait=1dma搬移完成才返回
* -1
*/
int32_t ape_csu_dma_3Dto3D_transfer(uint64_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint64_t yStepSrc, uint64_t zStepSrc,
uint64_t addrDst, uint16_t xNumDst, uint16_t yNumDst, uint64_t yStepDst, uint64_t zStepDst,
uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir);
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//pucch freq data copy from sm to dm
/*!
* @brief: 3240
* @author: chunmeng.li
* @Date: 2022613
* @param: addrSrc : [ ]
* @param: xNumSrc : [ ]
* @param: yNumSrc : [ ]
* @param: yStepSrc : [ ]
* @param: zStepSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
*/
void ape_csu_dma_3Dto1D_G2L_ch4ch0_simp_transfer(uint32_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint32_t yStepSrc, uint32_t zStepSrc,
uint32_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: 3262
* @author: chunmeng.li
* @Date: 2022613
* @param: addrSrc : [ ]
* @param: xNumSrc : [ ]
* @param: yNumSrc : [ ]
* @param: yStepSrc : [ ]
* @param: zStepSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
*/
void ape_csu_dma_3Dto1D_G2L_ch6ch2_simp_transfer(uint32_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint32_t yStepSrc, uint32_t zStepSrc,
uint32_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: SM->DM()
DMA链表搬移链表和寄存器配置
* 0 & 1
* @author: chunmeng.li
* @Date: 2022614
* @param: *paramPtr : [: 64]
* @param: paramCsuAddr : [csu视角]
* @param: numNodes : [ ]
* @param: dmaTag : [DMA Tag: 0~31 ]
* @param: *xAddrSrcPtr : [
DMA搬移起始地址csu视角32 ]
* @param: xNum : [X维度搬移字节数xNum相同65535Byte ]
* @param: *allNumPtr : [DMA搬移总字节数 ]
* @param: addrDst : [DM空间 ]
* @param: allNumTotal : [DMA搬移总字节数 ]
* @param: waitFlag : [DMA结束函数返回0:,1: ]
*/
void dma_1l3d1s_chain_G2L_ch0ch1_simp_config_start(uint32_t *paramPtr,
uint32_t paramCsuAddr,
uint32_t numNodes,
uint32_t dmaTag,
uint32_t *xAddrSrcPtr,
uint16_t xNum,
uint32_t *allNumPtr,
uint32_t addrDst,
uint32_t allNumTotal,
uint32_t waitFlag);
/*!
* @brief:
*
使DM空间中配置好
* @author: chunmeng.li
* @Date: 202276
* @param: *paramPtr : [: 6464Byte*]
* @param: paramCsuAddr : [csu视角]
* @param: *srcAddrPtr : [DMA读起始地址
32 ]
* @param: *dstAddrPtr : [DMA写起始地址csu视角
32 ]
* @param: *allNumPtr : [DMA搬移总字节数 ]
* @param: numNodes : [ ]
* @param: dmaTag : [DMA Tag: 0~31 ]
* @param: waitFlag : [DMA结束函数返回0:,1: ]
*/
void dma_1l1d2s_chain_ch3_G2L_start(uint32_t *paramPtr,
uint32_t paramCsuAddr,
uint32_t *srcAddrPtr,
uint32_t *dstAddrPtr,
uint32_t *allNumPtr,
uint32_t numNodes,
uint32_t dmaTag,
uint32_t waitFlag);
/*!
* @brief: k值查找参数配置及CSU启动
* @author: chunmeng.li
* @Date: 2022611
* @param: bitSequenceAddr : [csu视角512DM/SM ]
* @param: seqIndexAddr : [csu视角512DM/SM ]
* @param: seqLength : [N=32/64/128/256/512/1024 ]
* @param: K0 : [K值入参k+nPCwm ]
* @param: K1 : [K值入参k+nPC ]
*/
void qounit_findK_config_start(uint32_t bitSequenceAddr,
uint32_t seqIndexAddr,
uint32_t seqLength,
uint32_t K0,
uint32_t K1);
/*!
* @brief: 16CSU启动
* @author: chunmeng.li
* @Date: 2022611
* @param: compData : [16 ]
* @param: seqAddr : [csu视角512 ]
* @param: seqLength : [65535 ]
*/
void qounit_findEqual_config_start(uint32_t compData,
uint32_t seqAddr,
uint16_t seqLength);
/*!
* @brief: QOunit处理完成
* @author: chunmeng.li
* @Date: 2022611
*/
uint32_t qounit_wait_complete();
/*!
* @brief: QOunit处理完成
* @author: yufei.wang
* @Date: 2022611
*/
int16_t qounit_equal_wait_complete();
#endif /* __APE_INTERFACE_H__ */