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Merge branch 'dev_ck_v2.1_feature_enhancement#1597#' into 'dev_ck_v2.1'

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UCP4008_SL feature enhancement #1597;

See merge request ucp/driver/ucp4008_platform_spu!82
This commit is contained in:
Xianfeng Du 2024-01-15 07:18:37 +00:00
commit 0456ba42e4
9 changed files with 31 additions and 55 deletions
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6
inc/drv_jesd_csu.h
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@ -92,7 +92,7 @@ int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint3
/*******************************************************************************************************************
函数名称：jesd_csu_rx_cfg
函数入参：
uint32_t listAddr: 链表地址
uint32_t listAddr: 链表地址，目前使用的双边多维链式DMA，地址要求0x40B对齐
uint32_t nodeNum: 链表包含的节点个数
stJesdCsuNodePara* pListNode: 指向链表节点首地址的指针
uint8_t nChId: 通道ID, JESD_CSU_CH0: rx0, JESD_CSU_CH1: rx1
@ -108,7 +108,7 @@ int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara*
/*******************************************************************************************************************
函数名称：jesd_csu_tx_cfg
函数入参：
uint32_t listAddr: 链表地址
uint32_t listAddr: 链表地址，目前使用的双边多维链式DMA，地址要求0x40B对齐
uint32_t nodeNum: 链表包含的节点个数
stJesdCsuNodePara* pListNode: 指向链表节点首地址的指针
uint8_t nChId: 通道ID, JESD_CSU_CH0: tx0, JESD_CSU_CH1: tx1
@ -124,7 +124,7 @@ int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara*
/*******************************************************************************************************************
函数名称：jesd_csu_orx_cfg
函数入参：
uint32_t listAddr: 链表地址
uint32_t listAddr: 链表地址，目前使用的双边多维链式DMA，地址要求0x40B对齐
uint32_t nodeNum: 链表包含的节点个数
stJesdCsuNodePara* pListNode: 指向链表节点首地址的指针
uint8_t nListId: 链表ID

16
public/ecs_rfm_spu1/driver/inc/cpri_timer.h
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@ -25,21 +25,7 @@ typedef enum _tagCpriTestMode
CPRI_TEST_MODE = 2,
CPRI_TEST_TO_NORMAL = 3
}numCpriTestMode;
/*
cpri的pp1s选择信号;
3’b000:表示选择gmac_pps;
3’b001:表示选择gmac1_pps;
3’b011:表示选择pet_pps;
3’b101:表示选择gnss_pps_in；
3’b110表示选择stc_one_pps_out;
*/
typedef enum _tagCpriPP1sSrc{
CPRI_PP1S_SRC_GMAC = 0,
CPRI_PP1S_SRC_GMAC1 = 1,
CPRI_PP1S_SRC_PET = 3,
CPRI_PP1S_SRC_GNSS = 5,
CPRI_PP1S_SRC_STC = 6
}numCpriPP1sSrc;
void cpri_timer_ecprimode_clk_init();

18
public/ecs_rfm_spu1/driver/inc/ecpri_timer.h
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@ -6,23 +6,7 @@
#define ECPRI_SYMBOL_LONGCP 4448
#define ECPRI_SYMBOL_SHORTCP 4384
/*
ecpri的pp1s选择信号;
3’b000:表示选择gmac_pps;
3’b001:表示选择gmac1_pps;
3’b011:表示选择pet_pps;
3’b101:表示选择gnss_pps_in；
3’b110表示选择stc_one_pps_out;
*/
typedef enum _tagEcpriPP1sSrc{
ECPRI_PP1S_SRC_GMAC = 0,
ECPRI_PP1S_SRC_GMAC1 = 1,
ECPRI_PP1S_SRC_CPRI_AUX_RFP_RX_JESD = 2,
ECPRI_PP1S_SRC_CPRI_GMAC = 3,
ECPRI_PP1S_SRC_PET_PPS = 4,
ECPRI_PP1S_SRC_GNSS = 5,
ECPRI_PP1S_SRC_STC = 6
}numEcpriPP1sSrc;
void ecpri_mtimer_init(int32_t nScsId, int32_t nTddSlotNum);

16
public/ecs_rfm_spu1/driver/inc/jesd_timer.h
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@ -43,22 +43,6 @@ typedef struct _tagJesdDelay
uint32_t tddOffset;
}stJesdDelay;
/*
jesd的pp1s选择信号;
3’b000:表示选择gmac_pps;
3’b001:表示选择gmac1_pps;
3’b011:表示选择pet_pps;
3’b101:表示选择gnss_pps_in；
3’b110表示选择stc_one_pps_out;
*/
typedef enum _tagJesdPP1sSrc{
JESD_PP1S_SRC_GMAC = 0,
JESD_PP1S_SRC_GMAC1 = 1,
JESD_PP1S_SRC_PET = 3,
JESD_PP1S_SRC_GNSS = 5,
JESD_PP1S_SRC_STC = 6
}numJesdPP1sSrc;
void jesd_init(uint8_t option);

22
public/ecs_rfm_spu1/driver/inc/mtimer_drv.h
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@ -24,6 +24,28 @@ typedef enum _tagMtimerMaskId
MTIMER_MASK_62BIT = 2
}MtimerMaskId;
/*
mtimer的pp1s选择信号;
3’b000:表示选择gmac_pps;
3’b001:表示选择gmac1_pps;
3’b010:表示选择cpri_aux_rfp_rx_jesd;
3’b011:表示选择cpri_gmac_pps;
3’b010:表示选择pet_pps;
3’b101:表示选择gnss_pps_in；
3’b110:表示选择stc_one_pps_out;
3’b111:表示选择tod_one_pps_out;
*/
typedef enum _tagMTimerPP1sSrc{
MTIMER_PP1S_SRC_GMAC = 0,
MTIMER_PP1S_SRC_GMAC1 = 1,
MTIMER_PP1S_SRC_CPRI_AUX_RFP_RX_JESD = 2,
MTIMER_PP1S_SRC_CPRI_GMAC = 3,
MTIMER_PP1S_SRC_PET_PPS = 4,
MTIMER_PP1S_SRC_GNSS = 5,
MTIMER_PP1S_SRC_STC = 6,
MTIMER_PP1S_SRC_TOD = 7
}numMTimerPP1sSrc;
uint32_t mtimer_get_baseaddr(uint8_t nTmrId);
int32_t mtimer_para_init(uint8_t nTmrId, int32_t nScsId, int32_t nTddSlotNum);

2
public/ecs_rfm_spu1/driver/src/cpri_timer.s.c
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@ -99,7 +99,7 @@ void cpri_timer_init()
set_cpri_tx_rfp(); // cpri_tx_rfn 10ms pulse, tevent0 for ape0, int, delay meaurement
set_cpri_tx_axc_ch_en(); // axc_ch_en, tevent1 for ape0
cpri_1pps_src_init(CPRI_PP1S_SRC_STC); // select stc pp1s as cpri pp1s input
cpri_1pps_src_init(MTIMER_PP1S_SRC_TOD); // select stc tod pp1s as cpri pp1s input
set_cpri_1pps_scratch(); // 1pps scratch, cevent17 for ape0, int, pp1s precision
set_cpri_timer_int(); // cpri timer int enable

2
public/ecs_rfm_spu1/driver/src/ecpri_timer.s.c
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@ -56,7 +56,7 @@ void ecpri_timer_init(int32_t nScsId, int32_t nTddSlotNum)
mtimer_clear_all_event(MTIMER_ECPRI_ID);
set_ecpri_tmr_period();
ecpri_1pps_src_init(ECPRI_PP1S_SRC_STC);
ecpri_1pps_src_init(MTIMER_PP1S_SRC_TOD);
set_ecpri_1pps_scratch();
set_ecpri_timer_int();

2
public/ecs_rfm_spu1/driver/src/jesd_orx_timer.s.c
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@ -37,7 +37,7 @@ int32_t jesd_orx_mtimer_init(int32_t nTmrId, int32_t nScsId)
int32_t jesd_orx_timer_init(void)
{
jesd_orx_1pps_src_init(JESD_PP1S_SRC_STC);
jesd_orx_1pps_src_init(MTIMER_PP1S_SRC_TOD);
//mtimer_clear_all_event(MTIMER_JESD_RX1_ID);
//set_jesd_orx_tmr_period();
set_jesd_orx_1pps_scratch();

2
public/ecs_rfm_spu1/driver/src/jesd_timer.s.c
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@ -148,7 +148,7 @@ int32_t jesd_timer_init(int32_t nTmrId, int32_t nScsId, int32_t nTddSlotNum)
return -1;
}
jesd_1pps_src_init(JESD_PP1S_SRC_STC);
jesd_1pps_src_init(MTIMER_PP1S_SRC_TOD);
mtimer_clear_all_event(nTmrId);
set_jesd_tmr_period(nTmrId);
set_jesd_1pps_scratch(nTmrId);