jinhong/YB_Platform
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

1. UCP4008_SL new feature #1167#;

Browse Source 
2. add jesd orx funciton.
This commit is contained in:
xinxin.li 2023-10-30 14:23:55 +08:00
parent 41fa8df011
commit 04bd71b25d
20 changed files with 446 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
inc/drv_jesd_csu.h
View File

@ -43,6 +43,8 @@ typedef struct _tagJesdCsuNodePara
int32_t jesd_csu_init(uint8_t antNum, uint8_t margin);
int32_t jesd_orx_csu_init(void);
int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint32_t almostfull_threshold);
/***********************************************************************************
@ -57,6 +59,7 @@ int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara*
int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
int32_t jesd_csu_orx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nListId);
#endif

8
inc/drv_rfm.h
View File

@ -208,6 +208,14 @@ void get_cpri_advance(uint32_t* advance);
*/
int32_t set_cpri_rru_msg(CpriRruMsg_t rru_msg);
/*
函数名称：phy_sniffer_start
函数入参：无
函数返回：0：正常；
-1：异常
函数功能：物理层通知平台，进行orx数据搬移
*/
int32_t phy_sniffer_start();
/**************************************************/
/* ape csu相关 */

5
public/ape_spu/driver/src/ape_mtimer.s.c
View File

@ -18,10 +18,11 @@ extern void osp_timer_call_task_spe(uint8_t u8slot, uint8_t u8taskidx); /
extern void osp_timer_call_task();
extern stPhyScsPara* phyPara;
extern stSfnPara gCellSfnPara[2];
extern stStcTimerPara gStcTimerPara;
extern uint32_t gScsId;
extern uint32_t gMtimerId;
extern stSfnPara gCellSfnPara[2];
extern stStcTimerPara gStcTimerPara;
ddr_spinlock_t gSpinLockBuildCell;

15
public/common/driver/inc/phy_para.h
View File

@ -14,6 +14,9 @@
#define PHY_PARA_ADDR (SPU_DRV_SM_ADDR+0x8)
#define PHY_CELL_ADDR (SPU_DRV_SM_ADDR+0x100)
#define ORX_ADJUST_FLAG_ADDR (SPU_DRV_SM_ADDR+0x140)
#define ORX_ADJUST_VAL_ADDR (SPU_DRV_SM_ADDR+0x144)
#define STC_TOD_INT_ADDR (SPU_DRV_SM_ADDR+0x200)
#define STC_RT_ADDR (SPU_DRV_SM_ADDR+0x204)
#define STC_CTW_EN_ADDR (SPU_DRV_SM_ADDR+0x208)
@ -40,14 +43,14 @@
#define SERDES_INIT_FLAG_ADDR (SPU_DRV_SM_ADDR+0x240) // cpri or jesd clk init finished
#define STC_ONEPPS_OUT_ADDR (SPU_DRV_SM_ADDR+0x244)
#define JESD_TX_CH_PARA (SPU_DRV_SM_ADDR+0x248)
#define JESD_TX_SAMPLE_RATE (SPU_DRV_SM_ADDR+0x24C)
#define JESD_RX_CH_PARA (SPU_DRV_SM_ADDR+0x248)
#define JESD_RX_SAMPLE_RATE (SPU_DRV_SM_ADDR+0x24C)
#define JESD_RX_CH_PARA (SPU_DRV_SM_ADDR+0x250)
#define JESD_RX_SAMPLE_RATE (SPU_DRV_SM_ADDR+0x254)
#define JESD_ORX_CH_PARA (SPU_DRV_SM_ADDR+0x250)
#define JESD_ORX_SAMPLE_RATE (SPU_DRV_SM_ADDR+0x254)
#define JESD_ORX_CH_PARA (SPU_DRV_SM_ADDR+0x258)
#define JESD_ORX_SAMPLE_RATE (SPU_DRV_SM_ADDR+0x25C)
#define JESD_TX_CH_PARA (SPU_DRV_SM_ADDR+0x258)
#define JESD_TX_SAMPLE_RATE (SPU_DRV_SM_ADDR+0x25C)
#define CPRI_TX_ADVANCE_PP1S_ADDR (SPU_DRV_SM_ADDR+0x260)
#define CPRI_RX_ADVANCE_PP1S_ADDR (SPU_DRV_SM_ADDR+0x264)

1
public/common/driver/src/ctc_intr.s.c
View File

@ -15,7 +15,6 @@
extern stSfnPara gSfnPara;
extern stSfnPara gCellSfnPara[2];
extern uint32_t gMtimerId;
extern stPhyScsPara* phyPara;
ddr_spinlock_t gSpinLockCtcInit;

6
public/common/ecs_dm/inc/ecs_rfm_dm_mgt.h
View File

@ -21,14 +21,11 @@
#include "mtimer_com.h"
#include "phy_para.h"
#include "gpio_drv.h"
#include "jesd_drv_para.h"
typedef struct tEcsRfmDmLocalMgt {
//#ifdef INTEGRATED_BS
//#else
stCpriPara* pCpriPara;
stCpriDelayMeasure* pCpriDelay;
//#endif
stGpioOnBoard* pGpioInfo;
stFhAlarmStat* pAlarmStatus;
stMtimerPara* pMtimerPara[MTIMER_INTEGRATED_MAX_NUM];
@ -40,6 +37,7 @@ typedef struct tEcsRfmDmLocalMgt {
stCpriGetFrameHeadOffset* pOamFrameHeadOffsetQryRspPtr;
stCpriCsuCmdFifoInfo* tx_cmd_fifo_ptr;
stCpriCsuCmdFifoInfo* rx_cmd_fifo_ptr;
JesdOrxPara_t* jesd_orx_para_ptr;
} EcsRfmDmLocalMgt_t;
EcsRfmDmLocalMgt_t* get_ecs_rfm_dm_local_mgt(void);

19
public/common/ecs_dm/inc/jesd_drv_para.h Normal file
View File

@ -0,0 +1,19 @@
#ifndef _JESD_DRV_PARA_
#define _JESD_DRV_PARA_
#include "typedef.h"
typedef struct JesdOrxPara
{
uint32_t orx_calldrv_cnt;
uint32_t orx_start_flag;
uint32_t orx_adjust_flag;
uint32_t orx_adjust_val_lo;
uint32_t orx_adjust_val_hi;
uint32_t pp1s_adjust_flag;
}JesdOrxPara_t;
#endif

12
public/common/ecs_dm/src/ecs_rfm_dm_mgt.s.c
View File

@ -109,6 +109,12 @@ int32_t ecs_rfm_dm_alloc(void)
return -1;
}
pEcsDmLocalMgt->jesd_orx_para_ptr = (JesdOrxPara_t*)memSectionAlloc(pMemSection, sizeof(JesdOrxPara_t), MEM_ALIGNED_4BYTES, "jesd_orx_para");
if (NULL == pEcsDmLocalMgt->jesd_orx_para_ptr)
{
return -1;
}
return 0;
}
@ -201,6 +207,12 @@ int32_t ecs_rfm1_dm_init(void)
}
memset_ucp(pEcsDmLocalMgt->rx_cmd_fifo_ptr, 0, sizeof(stCpriCsuCmdFifoInfo));
if (NULL == pEcsDmLocalMgt->jesd_orx_para_ptr)
{
return -1;
}
memset_ucp(pEcsDmLocalMgt->jesd_orx_para_ptr, 0, sizeof(JesdOrxPara_t));
return 0;
}

10
public/ecs_rfm_spu1/driver/inc/jesd_csu.h
View File

@ -7,6 +7,8 @@
#define JS_204B_CS_BITS 0 // 2
#define JS_204B_CF_VAL 0
#define JS_204B_ORX_M 2
#define JESD_CSU_RX0_TAG 0
#define JESD_CSU_TX0_TAG 1
#define JESD_CSU_RX1_TAG 2
@ -49,6 +51,8 @@ typedef struct _tagJesdListPara
int32_t jesd_csu_init(uint8_t antNum, uint8_t margin);
int32_t jesd_orx_csu_init(void);
int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint32_t almostfull_threshold);
/***********************************************************************************
@ -61,9 +65,11 @@ int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint3
int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
int32_t jesd_csu_orx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nListId);
int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId, uint8_t orxFlag);
int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
@ -79,5 +85,7 @@ int32_t jesd_csu_rx_start(uint8_t nListId);
int32_t jesd_csu_tx_start(uint8_t nListId);
int32_t jesd_csu_orx_start(uint8_t nListId);
#endif

4
public/ecs_rfm_spu1/driver/inc/jesd_csu_nr_7ds2u.h
View File

@ -63,12 +63,16 @@
#define JESD_98_NR7DS2U_RX_SLOT_EVEN_DATA_ADDR 0x6BC44800 // 0x6BC00000
#define JESD_98_NR7DS2U_RX_SLOT_ODD_DATA_ADDR 0x6BD34800 // 0x6BC78200
#define JESD_ORX_DATA_ADDR 0x60000000
#define JESD_ORX_DATA_LEN 12288000
int32_t jesd_csu_init_nr_7ds2u();
int32_t jesd_csu_init_nr_7d2u_slot0();
int32_t jesd_csu_init_nr_7ds2u_iomode();
int32_t jesd_csu_init_nr_7ds2u_8t8r();
int32_t jesd_csu_init_nr_7ds2u_4t4r_98();
int32_t jesd_csu_init_nr_2500us_double();
int32_t jesd_sniffer_orx_csu_init();
int32_t jesd_csu_start_nr_7ds2u();
//int32_t jesd_csu_start_nr_7ds2u_8t8r();

33
public/ecs_rfm_spu1/driver/inc/jesd_orx_timer.h Normal file
View File

@ -0,0 +1,33 @@
#ifndef _JESD_ORX_TIMER_H_
#define _JESD_ORX_TIMER_H_
#include "typedef.h"
int32_t jesd_orx_mtimer_init(int32_t nTmrId, int32_t nScsId);
int32_t jesd_orx_timer_init(void);
int32_t set_jesd_orx_tmr_period(void);
int32_t jesd_orx_1pps_src_init(uint8_t srcId);
int32_t set_jesd_orx_1pps_scratch(void);
int32_t set_jesd_orx_timer_int(void);
int32_t set_jesd_orx_tmr_point(int32_t usPoint);
// 启动orx timer开始计数
void start_jesd_orx_timer(void);
// orx timer停止计数
void stop_jesd_orx_timer(void);
// orx pin ctrl，orx常收
int32_t jesd_orx_pin_ctrl(void);
// 物理层通知平台，进行orx数据搬移
int32_t phy_sniffer_start();
#endif

2
public/ecs_rfm_spu1/driver/inc/mtimer_cal.h
View File

@ -19,5 +19,7 @@
int32_t mtimer_1pps_func(uint8_t nTmrId);
int32_t mtimer_orx_adjust(void);
#endif

60
public/ecs_rfm_spu1/driver/src/jesd_csu.s.c
View File

@ -79,6 +79,22 @@ int32_t jesd_csu_init(uint8_t antNum, uint8_t margin)
return 0;
}
int32_t jesd_orx_csu_init(void)
{
if (0 == gJesdCsuPara.antNum)
{
return -1;
}
//uint32_t val = (((gJesdCsuPara.m>>1)-1)<<26)+((gJesdCsuPara.seq-1)<<24)+(((gJesdCsuPara.nTotal*gJesdCsuPara.m)/gJesdCsuPara.seq)<<16)+((gJesdCsuPara.n-8)<<8)+(gJesdCsuPara.margin<<4)+gJesdCsuPara.cs;
uint32_t val = (((JS_204B_ORX_M>>1)-1)<<26)+((gJesdCsuPara.nTotal*JS_204B_ORX_M)<<16)+((gJesdCsuPara.n-8)<<8)+(gJesdCsuPara.margin<<4)+gJesdCsuPara.cs;
do_write((&JS_CSU_JESDRX1SET), val);
do_write((&JS_CSU_ALMOSTFULLSENDTHRED), 0x80048010); // [30:16]sendthred,<4, stop write; [14:0]almostfull, >=0x400,start write
do_write((&JS_CSU_EM_BS_SMSEL_PREDATANUM), ((0x3<<14) | (0x5<<5) | 0x8));
return 0;
}
int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint32_t almostfull_threshold)
{
uint32_t val = (ch << 31) | (send_threshold << 16) | (ch << 15) | almostfull_threshold;
@ -103,8 +119,34 @@ int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara*
{
return -1;
}
uint8_t orxFlag = 0;
ret = jesd_csu_rx_list_init(listAddr, nodeNum, pListNode, nChId, nListId, orxFlag);
if (-1 == ret)
{
return -2;
}
ret = jesd_csu_rx_list_init(listAddr, nodeNum, pListNode, nChId, nListId);
ret = jesd_csu_rx_dmaReg_Cfg(nChId, nListId);
if (-1 == ret)
{
return -3;
}
return ret;
}
int32_t jesd_csu_orx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nListId)
{
int32_t ret = 0;
if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum) || (JESD_LIST_NUM <= nListId))
{
return -1;
}
uint8_t nChId = 1;
uint8_t orxFlag = 1;
ret = jesd_csu_rx_list_init(listAddr, nodeNum, pListNode, nChId, nListId, orxFlag);
if (-1 == ret)
{
return -2;
@ -143,9 +185,11 @@ int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara*
}
int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId, uint8_t orxFlag)
{
uint8_t mrg = gJesdCsuPara.margin;
uint8_t seq = (1 == orxFlag) ? (1) : (gJesdCsuPara.seq);
// 设置链表节点cmd
uint32_t rxListCmdL = 0;
uint32_t rxListCmdH = 0;
@ -173,6 +217,7 @@ int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNode
{
rxListCmdL = (1<<4)+(0<<5)+(3<<6);
}
uint32_t yStep = (1 == orxFlag) ? (0x20 * (1<<mrg)) : (pListNode[i].yStep);
// src
pLinkDesc = (stCsuLinkDesc1L3D*)listAddr + 2*i;
memset(&stLinkDesc, 0, sizeof(stCsuLinkDesc1L3D));
@ -195,8 +240,8 @@ int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNode
stLinkDesc.cmdFifoH = rxListCmdH & 0x3FFF;
stLinkDesc.dmaAddrL = pListNode[i].dataAddr;
stLinkDesc.dmaXNum = 0x20 * (1<<mrg); // 32*(2^margin)
stLinkDesc.dmaYStep = pListNode[i].yStep;
stLinkDesc.dmaYNum = gJesdCsuPara.seq;
stLinkDesc.dmaYStep = yStep; // pListNode[i].yStep;
stLinkDesc.dmaYNum = seq;
stLinkDesc.dmaZStep = 0x20 * (1<<mrg); // 32*(2^margin)
stLinkDesc.dmaAllNum = pListNode[i].allNum;
stLinkDesc.dmaSize = 0xF; // write global
@ -365,6 +410,13 @@ int32_t jesd_csu_rx_start(uint8_t nListId)
return 0;
}
int32_t jesd_csu_orx_start(uint8_t nListId)
{
jesd_csu_rx_start_ch(1, nListId);
return 0;
}
int32_t jesd_csu_stat_lookup(uint8_t tag)
{
if (31 < tag)

19
public/ecs_rfm_spu1/driver/src/jesd_csu_nr_7ds2u.s.c
View File

@ -534,6 +534,25 @@ int32_t jesd_csu_init_nr_2500us_double()
return 0;
}
int32_t jesd_sniffer_orx_csu_init()
{
jesd_orx_csu_init();
stJesdCsuNodePara orxCsuNode[1];
//orx的链表地址
uint32_t orxListAddr = JESD_RX_LIST2_ADDR; // 0x8A00C000
// rx list nodes
// slot7, slots
orxCsuNode[0].dataAddr = JESD_ORX_DATA_ADDR;
orxCsuNode[0].yStep = JESD_ORX_DATA_LEN;
orxCsuNode[0].allNum = JESD_ORX_DATA_LEN;
jesd_csu_orx_cfg(orxListAddr, 1, orxCsuNode, 0);
return 0;
}
#if 1
int32_t jesd_csu_start_nr_7ds2u()
{

179
public/ecs_rfm_spu1/driver/src/jesd_orx_timer.s.c Normal file
View File

@ -0,0 +1,179 @@
#include "jesd_orx_timer.h"
#include "typedef.h"
#include "ucp_mtimer.h"
#include "mtimer_com.h"
#include "mtimer_drv.h"
#include "ucp_utility.h"
#include "ucp_printf.h"
#include "ucp_js_ctrl.h"
#include "inter_vector.h"
#include "jesd204.h"
#include "ecs_rfm_dm_mgt.h"
#include "jesd_timer.h"
#include "jesd_csu.h"
//extern void isr_jesd_10ms_rx1(void);
extern int32_t jesd_sniffer_orx_csu_init();
extern stPhyScsPara* phyPara;
extern stMtimerIntStat gMtimerIntCnt[SCS_MAX_NUM];
int32_t jesd_orx_mtimer_init(int32_t nTmrId, int32_t nScsId)
{
stMtimerIntStat* pMtimerInt = &gMtimerIntCnt[nTmrId];
memset(pMtimerInt, 0, sizeof(stMtimerIntStat));
int32_t nTimerMPara = SFN_PERIOD / do_read_volatile_short(&(phyPara[nScsId].slotPeriod));
mtimer_para_init(MTIMER_JESD_RX1_ID, nScsId, nTimerMPara);
jesd_orx_timer_init();
return 0;
}
int32_t jesd_orx_timer_init(void)
{
jesd_orx_1pps_src_init(JESD_PP1S_SRC_STC);
mtimer_clear_all_event(MTIMER_JESD_RX1_ID);
set_jesd_orx_tmr_period();
set_jesd_orx_1pps_scratch();
set_jesd_orx_tmr_point(25000); // 25ms
//set_jesd_orx_timer_int();
jesd_orx_pin_ctrl();
return 0;
}
int32_t set_jesd_orx_tmr_period(void)
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[MTIMER_JESD_RX1_ID];
// 设置计数器溢出值
uint32_t tempL = pMtimerPara->tmrMsPeriod * pMtimerPara->slotPeriod / 1000;
uint32_t tempM = pMtimerPara->tddSlotNum;
uint32_t tempH = 10;
set_mtimer_period(MTIMER_JESD_RX1_ID, tempL, tempM, tempH);
//enable_mtimer_cevent_int(MTIMER_JESD_RX1_ID, MTMR_CEVENT_CNT14H, MTMR_INT_10ms); // 10ms int
return 0;
}
int32_t jesd_orx_1pps_src_init(uint8_t srcId)
{
JECS_CTRL_CPRI_GMAC_PHY_INT &= ~(0x7 << 16);
JECS_CTRL_CPRI_GMAC_PHY_INT |= (srcId << 16);
return 0;
}
int32_t set_jesd_orx_1pps_scratch(void)
{
set_mtimer_1pps_scratch(MTIMER_JESD_RX1_ID);
return 0;
}
#if 0
int32_t set_jesd_orx_timer_int(void)
{
//int32_t apeId = get_core_id();
uint32_t intNum = 0;
uint32_t baseIntNum = 0;
irq_handler func10ms;
baseIntNum = APC_JESD_RX1_SBU0_TMR_INTR0;
// attach interrupt func
int32_t ret = 0;
intNum = baseIntNum + MTMR_INT_10ms;
ret = smart_irq_free(intNum);
if (0 != ret)
{
return -1;
}
intNum = baseIntNum + MTMR_INT_SLOT_OFFSET;
ret = smart_irq_free(intNum);
if (0 != ret)
{
return -1;
}
func10ms = isr_jesd_10ms_rx1;
intNum = baseIntNum + MTMR_INT_10ms;
ret = smart_irq_request(intNum, func10ms);
if (0 != ret)
{
return -1;
}
return 0;
}
#endif
int32_t set_jesd_orx_tmr_point(int32_t usPoint)
{
if ((10*SFN_PERIOD) <= usPoint)
{
return -1;
}
//EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
//stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[MTIMER_JESD_RX1_ID];
int32_t tmr25Point = usPoint;
set_mtimer_tmrpoint(MTIMER_JESD_RX1_ID, MTMR_TDD_OFFSET_10000, tmr25Point, MTIMER_MASK_62BIT);
enable_mtimer_tmrpoint_int(MTIMER_JESD_RX1_ID, MTMR_TDD_OFFSET_10000, MTMR_INT_10ms);
return 0;
}
void start_jesd_orx_timer(void)
{
start_mtimer(MTIMER_JESD_RX1_ID);
}
void stop_jesd_orx_timer(void)
{
stop_mtimer(MTIMER_JESD_RX1_ID);
}
int32_t jesd_orx_pin_ctrl(void)
{
uint32_t tmrBaseAddr = JS_RX0_TMR_BASE + MTIMER_JESD_RX1_ID * 0x1000;
do_write((tmrBaseAddr+MTMR_PIN_CTRL_REG), 0x1); //CTRL_SEL
do_write((tmrBaseAddr+MTMR_IO_CTRL_REG), (1<<(4+(MTIMER_JESD_RX1_ID>>1)))); //IO ctrl
set_jesd_rf_state(JESD_RF_ORX, GPIO_OFF);
return 0;
}
int32_t phy_sniffer_start()
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
JesdOrxPara_t* orx_para_ptr = pEcsDmLocalMgt->jesd_orx_para_ptr;
if (0 == orx_para_ptr->orx_calldrv_cnt)
{
jesd_sniffer_orx_csu_init(); // test
jesd_orx_timer_init();
debug_write((DBG_DDR_IDX_DRV_BASE+64+7), 1); // 0x11c
}
orx_para_ptr->orx_start_flag = 1;
orx_para_ptr->orx_calldrv_cnt++;
debug_write((DBG_DDR_IDX_DRV_BASE+64+6), orx_para_ptr->orx_calldrv_cnt); // 0x118
return 0;
}

35
public/ecs_rfm_spu1/driver/src/jesd_timer.s.c
View File

@ -20,7 +20,7 @@
#include "log_server.h"
#include "gtimer_drv.h"
#include "gpio_drv.h"
#include "jesd_orx_timer.h"
#ifdef TEST_ENABLE
#include "jesd_test.h"
@ -47,6 +47,8 @@ int32_t gCsuRxAdvanceNs = JESD_RX_ADVANCE_NS - JESD_RRU_TD;
extern void rfm1_fapi_callback();
extern void phy_sniffer_data_proc();
extern uint32_t reCfgFlag;
void jesd_init()
@ -217,11 +219,11 @@ int32_t jesd_timer_get_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesd
dlSymbolCnt = my_jesdtmr->num_t_dl_symb[0];
}
pMtimerTxPara->txCsuOn[i].timerPoint = tdd - gCsuTxAdvanceNs/1000;
get_jesd_timer_point_para(nTmrId, pMtimerTxPara->txCsuOn[i].timerPoint, &pMtimerTxPara->txCsuOn[i].pointL,
get_jesd_timer_point_para(nTmrId+2, pMtimerTxPara->txCsuOn[i].timerPoint, &pMtimerTxPara->txCsuOn[i].pointL,
&pMtimerTxPara->txCsuOn[i].pointM, &pMtimerTxPara->txCsuOn[i].pointH);
pMtimerTxPara->txCsuOff[i].timerPoint = dlSlotCnt*slotUs + (longSymbCost+(dlSymbolCnt-1)*shortSymbCost)/1000;
get_jesd_timer_point_para(nTmrId, pMtimerTxPara->txCsuOff[i].timerPoint, &pMtimerTxPara->txCsuOff[i].pointL,
get_jesd_timer_point_para(nTmrId+2, pMtimerTxPara->txCsuOff[i].timerPoint, &pMtimerTxPara->txCsuOff[i].pointL,
&pMtimerTxPara->txCsuOff[i].pointM, &pMtimerTxPara->txCsuOff[i].pointH);
pMtimerPara->rxCsuOn[i].timerPoint = pMtimerTxPara->txCsuOff[i].timerPoint + (gapSymbolCnt*shortSymbCost - gCsuRxAdvanceNs)/1000;
@ -366,7 +368,7 @@ int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
pMtimerPara->tempL_max = pMtimerPara->tmrMsPeriod * pMtimerPara->slotPeriod / 1000 - 1;
pMtimerPara->tempM_max = pMtimerPara->tddSlotNum-1;
pMtimerPara->tempH_max = SFN_PERIOD / pMtimerPara->slotPeriod / pMtimerPara->tddSlotNum - 1;
pMtimerTxPara->tempL_max = pMtimerPara->tmrMsPeriod * pMtimerPara->slotPeriod / 1000 - 1;
pMtimerTxPara->tempL_max = pMtimerTxPara->tmrMsPeriod * pMtimerPara->slotPeriod / 1000 - 1;
pMtimerTxPara->tempM_max = pMtimerPara->tddSlotNum-1;
pMtimerTxPara->tempH_max = SFN_PERIOD / pMtimerPara->slotPeriod / pMtimerPara->tddSlotNum - 1;
@ -1075,6 +1077,11 @@ void jesd_10ms_callback(uint8_t nTmrId)
start_jesd_timer(MTIMER_JESD_TX0_ID);
}
}
if (MTIMER_JESD_RX1_ID == nTmrId)
{
mtimer_orx_adjust();
}
#ifdef ENABLE_SFNCAL
if (MTIMER_JESD_RX0_ID == nTmrId)
@ -1084,6 +1091,13 @@ void jesd_10ms_callback(uint8_t nTmrId)
#endif
pMtimerInt->pp1sIntCnt++;
debug_write((DBG_DDR_IDX_DRV_BASE+64+1+(nTmrId<<2)), pMtimerInt->pp1sIntCnt); // 0x104, 0x114
/***********************************************************************************/
//if ((7 == (pMtimerInt->pp1sIntCnt&0x7)) && (MTIMER_JESD_RX0_ID == nTmrId) && (0 < pMtimerInt->tddOffsetIntCnt))
{
//phy_sniffer_start();
}
/***********************************************************************************/
#if 0 //def PALLADIUM_TEST
uint32_t val = 0;
@ -1139,6 +1153,19 @@ void jesd_10ms_callback(uint8_t nTmrId)
spu_log_server_isr();
}
}
if ((tEventFlag & (1<<MTMR_TDD_OFFSET_10000)) && (MTIMER_JESD_RX1_ID == nTmrId)) // orx 25ms timer int
{
do_write((tmrBaseAddr+MTMR_TEVENT0_REG), (1<<MTMR_TDD_OFFSET_10000));
do_write(tFlagAddr, (1<<MTMR_TDD_OFFSET_10000)); // clear int flag
pMtimerInt->insOffsetIntCnt++;
#ifdef PALLADIUM_TEST
debug_write((DBG_DDR_IDX_DRV_BASE+64+6), pMtimerInt->insOffsetIntCnt); // 0x118
#endif
set_jesd_rf_state(JESD_RF_ORX, GPIO_OFF);
stop_jesd_orx_timer();
// phy callback
phy_sniffer_data_proc();
}
cEventFlag = do_read_volatile(cFlagAddr);
tEventFlag = do_read_volatile(tFlagAddr);
}

47
public/ecs_rfm_spu1/driver/src/mtimer_cal.s.c
View File

@ -18,6 +18,7 @@
#include "cpri_timer.h"
#include "ecpri_timer.h"
#include "jesd_timer.h"
#include "jesd_orx_timer.h"
#include "jesd_csu.h"
extern stCpriIntStat gCpriIntStatus;
@ -152,9 +153,18 @@ void mtimer_1pps_sfn_cal(uint8_t nTmrId)
int32_t gPP1sLockCnt = 0;
int32_t mtimer_1pps_func(uint8_t nTmrId)
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
JesdOrxPara_t* orx_para_ptr = pEcsDmLocalMgt->jesd_orx_para_ptr;
stMtimerSfnCal* pMtimerCal = &gMtimerSfnCalPara[nTmrId];
stMtimerIntStat* pMtimerInt = &gMtimerIntCnt[nTmrId];
// orx adjust pp1s
if ((0 < orx_para_ptr->orx_calldrv_cnt) && (1 == orx_para_ptr->pp1s_adjust_flag))
{
mtimer_1pps_resync(nTmrId);
orx_para_ptr->pp1s_adjust_flag = 0;
}
pMtimerCal->pp1sLockFlag = do_read_volatile(ARM_LOCK_FLAG_ADDR);
__ucps2_synch(f_SMR);
if ((0 == pMtimerCal->pp1sLockFlagPre) && (1 == pMtimerCal->pp1sLockFlag)) // pp1s刚锁定
@ -188,3 +198,38 @@ int32_t mtimer_1pps_func(uint8_t nTmrId)
return 0;
}
int32_t mtimer_orx_adjust(void)
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
JesdOrxPara_t* orx_para_ptr = pEcsDmLocalMgt->jesd_orx_para_ptr;
if (1 == orx_para_ptr->orx_start_flag)
{
set_jesd_rf_state(JESD_RF_ORX, GPIO_ON);
start_jesd_orx_timer();
jesd_csu_orx_start(0);
orx_para_ptr->orx_start_flag = 0;
}
if (0 < orx_para_ptr->orx_calldrv_cnt)
{
orx_para_ptr->orx_adjust_flag = do_read_volatile(ORX_ADJUST_FLAG_ADDR);
__ucps2_synch(f_SMR);
if (1 == orx_para_ptr->orx_adjust_flag)
{
orx_para_ptr->orx_adjust_val_lo = do_read_volatile(ORX_ADJUST_VAL_ADDR);
orx_para_ptr->orx_adjust_val_hi = do_read_volatile(ORX_ADJUST_VAL_ADDR+4);
__ucps2_synch(f_SMR);
// adjust stc phase offset
do_write((uint32_t)(&TOD_REG_NSF_INIT_LO), orx_para_ptr->orx_adjust_val_lo);
do_write((uint32_t)(&TOD_REG_NSF_INIT_HI), orx_para_ptr->orx_adjust_val_hi);
orx_para_ptr->orx_adjust_flag = 0;
orx_para_ptr->pp1s_adjust_flag = 1;
do_write(ORX_ADJUST_FLAG_ADDR, 0);
}
}
return 0;
}

2
public/ecs_rfm_spu1/driver/src/mtimer_drv.s.c
View File

@ -35,7 +35,7 @@ int32_t mtimer_para_init(uint8_t nTmrId, int32_t nScsId, int32_t nTddSlotNum)
}
else if (PROTOCOL_JESD == nBsType)
{
coreClk = do_read_volatile(JESD_TX_SAMPLE_RATE); // 122880000;
coreClk = do_read_volatile(JESD_RX_SAMPLE_RATE+(nTmrId<<3)); // 122880000;
}
else if (PROTOCOL_ECPRI == nBsType)
{

8
public/ecs_rfm_spu1/top/src/phy_init.s.c
View File

@ -315,3 +315,11 @@ void rfm1_fapi_callback()
debug_write((DBG_DDR_IDX_DRV_BASE+123), gFapiCallCnt); // 0x1ec
}
uint32_t gOrxCallCnt = 0;
void phy_sniffer_data_proc()
{
gOrxCallCnt++;
debug_write((DBG_DDR_IDX_DRV_BASE+123), gOrxCallCnt); // 0x1ec
}

2
public/test/testcases/case47/fronthaul/src/jesd_test_case47.s.c
View File

@ -32,6 +32,8 @@ extern uint32_t gJesdTFMode;
int32_t fh_data_init(void)
{
gJesdTestMode = JESD_TEST_MODE;
gJesdIOMode = JESD_IO_CTRL;
gJesdTFMode = FDD_MODE;
debug_write((DBG_DDR_IDX_DRV_BASE+192), gJesdTestMode); // 0x300
debug_write((DBG_DDR_IDX_DRV_BASE+193), gJesdIOMode); // 0x304
debug_write((DBG_DDR_IDX_DRV_BASE+194), gJesdTFMode); // 0x308