Merge branch 'dev_ck_v2.1_feature#1171#' into 'dev_ck_v2.1'

update Featuer Enhancement#1171#

See merge request ucp/driver/ucp4008_platform_spu!49
This commit is contained in:
Xianfeng Du 2023-10-23 07:43:34 +00:00
commit 1091b2bd9c
10 changed files with 834 additions and 84 deletions

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@ -1,78 +1,78 @@
// +FHDR------------------------------------------------------------
// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : spu_sw_queue.h
// Author :
// Created On : 2023-01-11
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// +FHDR------------------------------------------------------------
// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : spu_sw_queue.h
// Author :
// Created On : 2023-01-11
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#ifndef __SPU_LOG_H__
#define __SPU_LOG_H__
#include "typedef.h"
#include "ucp_port.h"
#include "ucp_utility.h"
#include "ucp_tick.h"
#include "ucp_printf.h"
#include "log_client.h"
#include "spu_hw_queue.h"
#include "spu_sw_queue.h"
#ifndef __SPU_LOG_H__
#define __SPU_LOG_H__
#include "typedef.h"
#include "ucp_port.h"
#include "ucp_utility.h"
#include "ucp_tick.h"
#include "ucp_printf.h"
#include "log_client.h"
#include "spu_hw_queue.h"
#include "spu_sw_queue.h"
#define SPU_LOG_TEST_FLAG
#define __LOG __attribute__((section(".LOG")))
extern uint8_t gu8osp_print_level;
#define STSW_MSG_INFO_SET(stsw_msg_info, str_len, core_id)\
do{\
stsw_msg_info.u8Head[0] = SPU_SW_MSG_INFO_HEAD1;\
stsw_msg_info.u8Head[1] = SPU_SW_MSG_INFO_HEAD2;\
stsw_msg_info.u16DataLen = str_len;\
stsw_msg_info.u8PktType = PKT_TYPE_PLATFORM_LOG;\
stsw_msg_info.u8CoreId = core_id;\
stsw_msg_info.u16Tail = 0;}while(0)
#define SPU_VPRINTF_LOG(level,fmt, args...) do{__LOG static char tmp[] = fmt; \
int32_t i32core_id = get_core_id();\
int32_t i32ret = 0;\
uint32_t u32str_len = 0;\
uint16_t u16_index = 0;\
uint8_t u8offset = SPU_SW_MSG_INFO_SIZE;\
uint8_t *pu8_addr = NULL;\
static int8_t i8str[128];\
if (level > gu8osp_print_level)\
{\
break;\
}\
u32str_len = strlen(fmt);\
memcpy_ucp((char *)i8str, (char *)tmp, u32str_len);\
__ucps2_synch(0);\
pu8_addr = spu_log_client_mem_alloc(&u16_index);\
memset(((char *)pu8_addr), 0, SPU_LOG_CLIENT_BUF_SIZE);\
u32str_len = spu_vsprint_log(((char *)(pu8_addr+u8offset)), (char *)i8str, ##args);\
spu_sw_msg_info_t stsw_msg_info;\
STSW_MSG_INFO_SET(stsw_msg_info, u32str_len, i32core_id);\
memcpy_ucp((char *)pu8_addr, (void *)&stsw_msg_info, u8offset);\
__ucps2_synch(0);\
SpuLogMsgInfo_t stlog_msg_info;\
stlog_msg_info.cell_id = 0;\
stlog_msg_info.core_id = i32core_id;\
stlog_msg_info.buf_idx = u16_index;\
stlog_msg_info.buf_size = (u32str_len + u8offset);\
i32ret=ecs_hw_que_send(ECS_RFM_SPU1_HW_QUEUE, stlog_msg_info.value);\
} while(0)
typedef enum SPU_LOG_LEVEL
{
#define __LOG __attribute__((section(".LOG")))
extern uint8_t gu8osp_print_level;
#define STSW_MSG_INFO_SET(stsw_msg_info, str_len, core_id)\
do{\
stsw_msg_info.u8Head[0] = SPU_SW_MSG_INFO_HEAD1;\
stsw_msg_info.u8Head[1] = SPU_SW_MSG_INFO_HEAD2;\
stsw_msg_info.u16DataLen = str_len;\
stsw_msg_info.u8PktType = PKT_TYPE_PLATFORM_LOG;\
stsw_msg_info.u8CoreId = core_id;\
stsw_msg_info.u16Tail = 0;}while(0)
#define SPU_VPRINTF_LOG(level,fmt, args...) do{__LOG static char tmp[] = fmt; \
int32_t i32core_id = get_core_id();\
int32_t i32ret = 0;\
uint32_t u32str_len = 0;\
uint16_t u16_index = 0;\
uint8_t u8offset = SPU_SW_MSG_INFO_SIZE;\
uint8_t *pu8_addr = NULL;\
int8_t i8str[128] = {0};\
if (level > gu8osp_print_level)\
{\
break;\
}\
u32str_len = strlen(fmt);\
memcpy_ucp((char *)i8str, (char *)tmp, u32str_len);\
__ucps2_synch(0);\
pu8_addr = spu_log_client_mem_alloc(&u16_index);\
memset(((char *)pu8_addr), 0, SPU_LOG_CLIENT_BUF_SIZE);\
u32str_len = spu_vsprint_log(((char *)(pu8_addr+u8offset)), (char *)i8str, ##args);\
spu_sw_msg_info_t stsw_msg_info;\
STSW_MSG_INFO_SET(stsw_msg_info, u32str_len, i32core_id);\
memcpy_ucp((char *)pu8_addr, (void *)&stsw_msg_info, u8offset);\
__ucps2_synch(0);\
SpuLogMsgInfo_t stlog_msg_info;\
stlog_msg_info.cell_id = 0;\
stlog_msg_info.core_id = i32core_id;\
stlog_msg_info.buf_idx = u16_index;\
stlog_msg_info.buf_size = (u32str_len + u8offset);\
i32ret=ecs_hw_que_send(ECS_RFM_SPU1_HW_QUEUE, stlog_msg_info.value);\
} while(0)
typedef enum SPU_LOG_LEVEL
{
LOG_OFF = 0,
LOG_ERROR,
LOG_WARN,
LOG_INFO,
LOG_DEBUG,
LOG_TICK,
}spu_log_level_e;
LOG_ERROR,
LOG_WARN,
LOG_INFO,
LOG_DEBUG,
LOG_TICK,
}spu_log_level_e;
typedef enum SPU_SW_MSG_PKT_TYPE
{
@ -81,20 +81,20 @@ typedef enum SPU_SW_MSG_PKT_TYPE
PKT_TYPE_PLATFORM_LOG = 0x62,
}spu_sw_msg_pkt_type_e;
/* 对外接口 */
void osp_sendLog(int level, char* pbuf, int size, int cell_id);
void osp_sendLog_print(int level, char* pbuf, int size, int cell_id);
/* 对外接口 */
void osp_sendLog(int level, char* pbuf, int size, int cell_id);
void osp_sendLog_print(int level, char* pbuf, int size, int cell_id);
/* 对内接口 */
/* 对内接口 */
void spu_log_init(uint8_t level);
void spu_log_output(uint8_t level, const char *fmt, ...);
void spu_log_output(uint8_t level, const char *fmt, ...);
uint8_t spu_log_level_set(spu_log_level_e emlog_level);
uint8_t spu_log_level_get(void);
uint32_t spu_vsprint_log(char *dst, const char *fmt, ...);
#ifdef PCIE_BACKHAUL
void com_debug_log(const char *fmt, ...);
#endif
#endif /*__SPU_LOG_H__*/
uint32_t spu_vsprint_log(char *dst, const char *fmt, ...);
#ifdef PCIE_BACKHAUL
void com_debug_log(const char *fmt, ...);
#endif
#endif /*__SPU_LOG_H__*/

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// +FHDR------------------------------------------------------------
// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ape_test_case1.s.c
// Author :
// Created On : 2022-10-26
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "typedef.h"
#include "ucp_printf.h"
#include "phy_para.h"
#include "rfm1_drv.h"
/************************************************************************/
extern void cpri_init(uint32_t option,uint32_t MappingMode);
extern void jesd_init();
extern void ecpri_init(uint8_t nOption);
int32_t fh_data_init(void)
{
return 0;
}
int32_t fh_drv_init()
{
stFrontHaulDrvPara fhDrvPara;
memset_ucp(&fhDrvPara, 0, sizeof(stFrontHaulDrvPara));
fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_8;
fhDrvPara.mapOption = OTIC_MAP_FIGURE10;
fronthaul_drv_cfg(&fhDrvPara);
return 0;
}
int32_t fh_csu_test_init(void)
{
return 0;
}
void fh_test_case()
{
return;
}
void fh_data_check(uint32_t times)
{
return;
}

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// +FHDR------------------------------------------------------------
// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ape0_recv_task.s.c
// Author :
// Created On : 2022-10-24
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "ucp_utility.h"
#include "msg_transfer_layer.h"
#include "phy_para.h"
#include "ucp_tick.h"
#include "ucp_testcase.h"
#include "ucp_printf.h"
#include "ape_mtimer.h"
#include "osp_task.h"
#include "osp_timer.h"
static uint32_t g_u32_ape0_recv_tick = 0;
static uint32_t g_u32_ape0_recv_addr_err = 0; //(12) 0xB7E00030
static uint32_t g_u32_ape0_recv_num = 0; //(13) 0xB7E00034
static uint32_t g_u32_ape0_recv_ok = 0; //(14) 0xB7E00038
static uint32_t g_u32_ape0_recv_tick_err = 0; //(15) 0xB7E0003C
static uint32_t g_u32_ape0_recv_sfn_slot_err = 0; //(17) 0xB7E00044
static uint32_t g_u32_ape0_recv_msg_tick_err = 0; //MSG
/* 收到 RFM发来的消息并释放资源 */
void ape0_recv_task(uint32_t addr, uint32_t size)
{
uint32_t ape_id = get_core_id();
uint32_t msg_addr = 0;
uint32_t que_num = 0;
uint32_t value = 0;
uint16_t scs = 1;//30KHz
uint16_t sfn = 0;
uint16_t slot = 0;
uint16_t sfn_l = 0;
uint16_t slot_l = 0;
uint32_t tick_from_ape_tx = 0;
uint32_t tick_from_arm_rx = 0;
uint32_t tick_from_arm_tx = 0;
uint32_t tick_from_rfm_rx = 0;
uint32_t tick_from_rfm_tx = 0;
uint32_t tick_from_ape_rx = 0;
uint32_t offset_loopback = 0;
uint32_t u32_clock_offset = 0;
uint32_t u32_clock_tick = 0;
g_u32_ape0_recv_num++;
if (0 == addr)
{
debug_write(DBG_DDR_COMMON_IDX(ape_id, 12), ++g_u32_ape0_recv_addr_err);
return ;
}
msg_addr = do_read(addr);
que_num = do_read(addr+4);
value = do_read(msg_addr);
sfn = value >> 16;
slot = value & 0xffff;
g_u32_ape0_recv_ok++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 13), g_u32_ape0_recv_num);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 14), g_u32_ape0_recv_ok);
/*if(UCP4008_TRAFFIC_NR_eMBB_DATA != que_num)
{
return;
}*/
rdmcycle(&u32_clock_tick);
tick_from_ape_tx = do_read(msg_addr+4);
tick_from_arm_rx = do_read(msg_addr+8);
tick_from_arm_tx = do_read(msg_addr+12);
tick_from_rfm_rx = do_read(msg_addr+16);
tick_from_rfm_tx = do_read(msg_addr+20);
tick_from_ape_rx = u32_clock_tick;
offset_loopback = (tick_from_ape_rx - tick_from_ape_tx + TICK_PP1S_OFFSET)%TICK_PP1S_OFFSET;
if (offset_loopback >= LOOPBACK_APE_OFFSET) {
if (g_u32_ape0_recv_msg_tick_err < CASE0_APE0_RX_ERR_MAX_NUM) {
debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_ape0_recv_msg_tick_err + 21)), offset_loopback);
debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_ape0_recv_msg_tick_err + 22)), tick_from_ape_tx);
debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_ape0_recv_msg_tick_err + 23)), tick_from_arm_rx);
debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_ape0_recv_msg_tick_err + 24)), tick_from_arm_tx);
debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_ape0_recv_msg_tick_err + 25)), tick_from_rfm_rx);
debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_ape0_recv_msg_tick_err + 26)), tick_from_rfm_tx);
debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_ape0_recv_msg_tick_err + 27)), tick_from_ape_rx);
}
g_u32_ape0_recv_msg_tick_err++;
debug_write(DBG_DDR_MSG_IDX(que_num, 20), g_u32_ape0_recv_msg_tick_err);
UCP_PRINT_ERROR("ape[%d] recv_task msg tick err[%d], cnt[%d]", ape_id, offset_loopback, g_u32_ape0_recv_msg_tick_err);
}
if (0 == g_u32_ape0_recv_tick)
{
g_u32_ape0_recv_tick = u32_clock_tick;
}
else
{
if (u32_clock_tick > g_u32_ape0_recv_tick)
{
u32_clock_offset = u32_clock_tick - g_u32_ape0_recv_tick;
if ((u32_clock_offset > TIMER_OFFSET_MAX) || (u32_clock_offset < TIMER_OFFSET_MIN))
{
g_u32_ape0_recv_tick_err++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 15), g_u32_ape0_recv_tick_err);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 16), u32_clock_offset);
}
}
g_u32_ape0_recv_tick = u32_clock_tick;
}
sfn_l = get_tx_nr_sfn(scs);
slot_l = get_tx_nr_slot(scs);
if ((sfn != sfn_l) || (slot != slot_l))
{
g_u32_ape0_recv_sfn_slot_err++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 17), g_u32_ape0_recv_sfn_slot_err); //34~38打点有重复
debug_write(DBG_DDR_COMMON_IDX(ape_id, 18), sfn);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 19), sfn_l);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 20), slot);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 21), slot_l);
UCP_PRINT_ERROR("ape[%d] sfn[%d]:[%d], slot[%d]:[%d], cnt[%d]", ape_id, sfn, sfn_l, slot, slot_l, g_u32_ape0_recv_sfn_slot_err);
}
return ;
}
/*************************************************************************/
/* 收到消息后创建任务 */
void ape0_recv_task(uint32_t addr, uint32_t size); // A
void ape_slot_process_task(void);
void ape0_stc_timer_task(void); // C 给APE1事件任务发消息
void ape0_event_task(uint32_t addr, uint32_t size)
{
uint32_t ape_id = get_core_id();
debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101);
osp_task_info_ex ape0_event_task_recv = {40, (int8_t*)"ape0_test_taska", 40, 1024, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_recv_task};
osp_task_info_ex ape0_timer_task_cpri = {41, (int8_t*)"ape0_test_taskb", 41, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape_slot_process_task};
osp_task_info_ex ape0_timer_task_stc = {42, (int8_t*)"ape0_test_taskc", 42, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape0_stc_timer_task};
osp_task_create(&ape0_event_task_recv);
osp_task_create(&ape0_timer_task_cpri);
osp_task_create(&ape0_timer_task_stc);
osp_timer_sync(LTE_SCS_ID);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303);
return;
}

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// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ape0_stc_timer_task.s.c
// Author :
// Created On : 2022-10-24
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "ucp_utility.h"
#include "osp_msg.h"
#include "phy_para.h"
#include "ucp_tick.h"
#include "ucp_testcase.h"
#include "ucp_printf.h"
#include "ape_mtimer.h"
uint32_t g_u32_stc_timer_tick = 0; //(34) 0xB7E00088
uint32_t g_u32_stc_timer_tick_err = 0; //(35) 0xB7E0008C
uint32_t g_u32_alloc_err = 0; //(36) 0xB7E00090
uint32_t g_u32_send_err = 0; //(37) 0xB7E00094
uint32_t g_u32_stc_time_sum = 0; //(38) 0xB7E00098
uint32_t g_u32_send_ok = 0; //(39) 0xB7E0009C
void ape0_stc_timer_task(void)
{
uint32_t ape_id = get_core_id();
int ret = 0;
char *addr = NULL;
uint32_t slotOffset = get_tx_nr_slot_cycle();
g_u32_stc_time_sum++;
uint32_t clockNow;
uint32_t clockOffset;
rdmcycle(&clockNow);
debug_write(((DBG_DDR_IDX_DRV_BASE+7168) + (g_u32_stc_time_sum&0x1FF) + (ape_id << 9)), clockNow); // 0x7000
debug_write(DBG_DDR_COMMON_IDX(ape_id,(64+(g_u32_stc_time_sum&0xF))), slotOffset);
if (0 == g_u32_stc_timer_tick)
{
g_u32_stc_timer_tick = clockNow;
}
else
{
if (clockNow > g_u32_stc_timer_tick)
{
clockOffset = clockNow - g_u32_stc_timer_tick;
if ((clockOffset > TIMER_OFFSET_MAX) || (clockOffset < TIMER_OFFSET_MIN))
{
g_u32_stc_timer_tick_err++;
UCP_PRINT_ERROR("ape[%d] stc_timer tick err[%d], cnt[%d]",clockOffset, g_u32_stc_timer_tick_err);
}
}
g_u32_stc_timer_tick = clockNow;
}
debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), g_u32_stc_timer_tick);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_stc_timer_tick_err);
addr = osp_alloc_msg(TEST_MSG_SIZE);
if (NULL == addr)
{
g_u32_alloc_err++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), g_u32_alloc_err);
return ;
}
do_write(addr, g_u32_stc_time_sum);
do_write((addr+4), 0xA001B002);
ret = osp_send_msg((uint32_t)(addr),
TEST_MSG_SIZE,
UCP4008_KERNEL_INTER,
ape_id, // src que id
ape_id+1, // dst que id
40, // src task id
43); // dst task id
if (0 != ret)
{
g_u32_send_err++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), g_u32_send_err);
return ;
}
g_u32_send_ok++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), g_u32_stc_time_sum);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), g_u32_send_ok);
return ;
}

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// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ape1_cpri_time_task.s.c
// Author :
// Created On : 2022-10-24
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "ucp_utility.h"
uint32_t g_u32_ape1_cpri_timer_num = 0; //(4) 0xB7E00210
void ape1_cpri_time_task(void)
{
uint32_t ape_id = get_core_id();
g_u32_ape1_cpri_timer_num++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 4), g_u32_ape1_cpri_timer_num);
return ;
}

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// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ape1_recv_task.s.c
// Author :
// Created On : 2022-10-24
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "ucp_utility.h"
#include "phy_para.h"
#include "osp_task.h"
#include "osp_timer.h"
uint32_t g_u32_recv_num = 0;
uint32_t g_u32_recv_by_ape_num = 0;
void ape1_recv_task(uint32_t addr, uint32_t size)
{
uint32_t ape_id = get_core_id();
debug_write(DBG_DDR_COMMON_IDX(ape_id, 13), ++g_u32_recv_num);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 14), addr);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 15), size);
return ;
}
void ape1_recvbyape_task(uint32_t addr, uint32_t size)
{
uint32_t ape_id = get_core_id();
debug_write(DBG_DDR_COMMON_IDX(ape_id, 16), ++g_u32_recv_by_ape_num);
return ;
}
/*************************************************************************/
/* ÊÕµ½ÏûÏ¢ºó´´½¨ÈÎÎñ */
void ape1_recv_task(uint32_t addr, uint32_t size); // D
void ape1_stc_timer_task(void); // E
void ape1_cpri_time_task(void); // F
void ape1_recvbyape_task(uint32_t addr, uint32_t size); // G
void ape1_event_task(uint32_t addr, uint32_t size)
{
uint32_t ape_id = get_core_id();
debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101);
osp_task_info_ex ape1_event_task_recv = {40, (int8_t*)"ape1_test_taskd", 40, 1024, OSP_EVENT_TYPE, 0, 0 , 0, NULL, (OSP_TASKENTRY_FUNC)ape1_recv_task};
osp_task_info_ex ape1_timer_task_stc = {41, (int8_t*)"ape1_test_taske", 41, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_stc_timer_task};
osp_task_info_ex ape1_timer_task_cpri = {42, (int8_t*)"ape1_test_taskf", 42, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape1_cpri_time_task};
osp_task_info_ex ape1_event_task_rec2 = {43, (int8_t*)"ape1_test_taskg", 43, 1024, OSP_EVENT_TYPE, 0, 0 , 0, NULL, (OSP_TASKENTRY_FUNC)ape1_recvbyape_task};
osp_task_create(&ape1_event_task_recv);
osp_task_create(&ape1_timer_task_stc);
osp_task_create(&ape1_timer_task_cpri);
osp_task_create(&ape1_event_task_rec2);
osp_timer_sync(LTE_SCS_ID);
debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303);
return;
}

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// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ape1_stc_timer_task.s.c
// Author :
// Created On : 2022-10-24
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "ucp_utility.h"
#include "ucp_tick.h"
#include "ucp_port.h"
#include "ucp_printf.h"
#include "phy_para.h"
#include "msg_transfer_layer.h"
#include "osp_type_def.h"
#include "spu_log.h"
#include "ape_mtimer.h"
uint32_t g_u32_ape1_stc_timer_num = 0; //(1) 0xB7E00204
uint32_t g_u32_ape1_stc_timer_alloc_err1 = 0; //(2) 0xB7E00208
uint32_t g_u32_ape1_stc_timer_alloc_err2 = 0; //(3) 0xB7E0020C
uint32_t gu32_ape1_stc_cnt = 0;
void ape1_stc_timer_task(void)
{
uint32_t ape_id = get_core_id();
uint16_t scs = 1;
uint16_t sfn = get_tx_nr_sfn(scs);
uint16_t slot = get_tx_nr_slot(scs);
uint32_t value = (sfn << 16) + slot;
uint32_t size = 10 * 1024;
char* buf;
uint32_t availableSize,offset;
//UCP_PRINT_ERROR("ape[0x%x]_update:enter=%d, sfn[0x%x], slot[0x%x]", ape_id, ++gu32_ape1_stc_cnt, sfn, slot);
uint16_t cu_flag = C_PLANE;
HandleId_t handler;
handler.port_id = get_ucp_port_id();
handler.inst_id = 0;
handler.type_id = CU_SPLIT;
int32_t ret = msg_transfer_send_start(handler.value);
ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset);
if (SUCCESS != ret)
{
debug_write(DBG_DDR_COMMON_IDX(ape_id, 2), ++g_u32_ape1_stc_timer_alloc_err1);
UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret);
return;
}
uint32_t clockBegin;
rdmcycle(&clockBegin);
do_write(buf, value);
do_write(buf+4, clockBegin);
ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size);
cu_flag = U_PLANE;
ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset);
if (SUCCESS != ret)
{
debug_write(DBG_DDR_COMMON_IDX(ape_id, 3), ++g_u32_ape1_stc_timer_alloc_err2);
UCP_PRINT_ERROR("send_slot_indication1 U_PLANE ret[0x%08x]", ret);
return;
}
rdmcycle(&clockBegin);
do_write(buf, value);
do_write(buf+4, clockBegin);
ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size);
ret = msg_transfer_send_end(handler.value);
g_u32_ape1_stc_timer_num++;
debug_write(DBG_DDR_COMMON_IDX(ape_id, 1), g_u32_ape1_stc_timer_num);
return ;
}

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// +FHDR------------------------------------------------------------
// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ucp_ape_test.c
// Author : xianfeng.du
// Created On : 2022-10-19s
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "ucp_utility.h"
#include "ucp_tick.h"
#include "ucp_port.h"
#include "ucp_printf.h"
#include "phy_para.h"
#include "msg_transfer_layer.h"
#include "osp_type_def.h"
#include "ucp_testcase.h"
#include "ape_mtimer.h"
static uint16_t gPreviousSlot = 0;
static uint16_t gCurrentSlot = 0;
static uint8_t gSlotFlagInit = 1;
static uint8_t gSfnFlagInit = 1;
static uint16_t gPreviousSfn = 0;
static uint16_t gCurrentSfn = 0;
static uint32_t g_sfn_no_continuous_cnt = 0; //(5) 0xB7E00014
static uint32_t g_slot_no_continuous_cnt = 0; //(6) 0xB7E00018
static inline void check_continuous_slot(uint16_t slot)
{
uint16_t delta = 0;
uint32_t apeId = get_core_id();
if (gSlotFlagInit == 1) {
gSlotFlagInit = 0;
gCurrentSlot = slot;
} else {
gPreviousSlot = gCurrentSlot;
gCurrentSlot = slot;
delta = (10 + gCurrentSlot - gPreviousSlot) % 10;
if (delta != 1) {
debug_write(DBG_DDR_COMMON_IDX(apeId,6), ++g_slot_no_continuous_cnt);
UCP_PRINT_ERROR("ape[%d] slot is not continuous, slot[%d]:[%d], cnt[%d]", apeId, gCurrentSlot, gPreviousSlot, g_slot_no_continuous_cnt);
//UCP_PRINT_ERROR("slot number is not continuous;current sfn[0x%x], current slot[0x%x],previous slot[0x%x].",gCurrentSfn,gCurrentSlot,gPreviousSlot);
}
}
return;
}
static inline void check_continuous_sfn(uint16_t sfn)
{
uint16_t delta = 0;
uint32_t apeId = get_core_id();
if (gSfnFlagInit == 1) {
gSfnFlagInit = 0;
gCurrentSfn = sfn;
} else {
gPreviousSfn = gCurrentSfn;
gCurrentSfn = sfn;
delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024;
if (delta != 1) {
debug_write(DBG_DDR_COMMON_IDX(apeId,5), ++g_sfn_no_continuous_cnt);
UCP_PRINT_ERROR("ape[%d] sfn is not continuous, sfn[%d]:[%d], cnt[%d]", apeId, gCurrentSfn, gPreviousSfn, g_sfn_no_continuous_cnt);
//UCP_PRINT_ERROR("slot number is not continuous;current sfn[0x%x], previous sfn[0x%x].",gCurrentSfn,gPreviousSfn);
}
}
return;
}
static uint32_t g_slot_update_task_cnt = 0; //(3) 0xB7E0000C
static uint32_t g_slot_indication_task_cnt = 0; //(4) 0xB7E00010
static inline void send_slot_indication(void)
{
uint32_t clockBegin,clockEnd;
int32_t clockCnt;
rdmcycle(&clockBegin);
uint16_t scs = 1;
uint16_t sfn = get_tx_nr_sfn(scs);
uint16_t slot = get_tx_nr_slot(scs);
uint32_t value = (sfn << 16) + slot;
uint32_t apeId = get_core_id();
uint32_t size = 8;
char* buf;
uint32_t availableSize,offset;
UCP_PRINT_DEBUG("ape[0x%x]_slot_indication_task start, current sfn[0x%x], current slot[0x%x].",apeId,sfn,slot);
uint16_t cu_flag = C_PLANE;
HandleId_t handler;
handler.port_id = get_ucp_port_id();
handler.inst_id = 0;
handler.type_id = CU_SPLIT;
int32_t ret = msg_transfer_send_start(handler.value);
ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset);
if (SUCCESS != ret)
{
UCP_PRINT_ERROR("send_slot_indication ret[0x%08x]", ret);
return;
}
uint32_t stamp;
rdmcycle(&stamp);
do_write(buf, value);
do_write(buf+4, stamp);
ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size);
ret = msg_transfer_send_end(handler.value);
debug_write(DBG_DDR_COMMON_IDX(apeId,4), ++g_slot_indication_task_cnt);
rdmcycle(&clockEnd);
clockCnt = clockEnd - clockBegin;
UCP_PRINT_DEBUG("ape[0x%x]_slot_indication_task end, startTime:[0x%08x], cycle:[0x%08x]",apeId,clockBegin, clockCnt);
return;
}
uint32_t gu32_ape0_slot_cnt = 0;
static inline void update_sfn_slot(void)
{
uint32_t clockBegin,clockEnd;
int32_t clockCnt;
rdmcycle(&clockBegin);
uint16_t scs = 1;//30KHz
uint16_t sfn = get_tx_nr_sfn(scs);
uint16_t slot = get_tx_nr_slot(scs);
uint32_t apeId = get_core_id();
//UCP_PRINT_DEBUG("ape[0x%x]_slot_update_task start, current sfn[0x%x], current slot[0x%x].",apeId,sfn,slot);
//UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[0x%x], slot[0x%x].", apeId, ++gu32_ape0_slot_cnt, sfn, slot);
debug_write(DBG_DDR_COMMON_IDX(apeId,3), ++g_slot_update_task_cnt);
check_continuous_slot(slot);
if (slot == 0) {
check_continuous_sfn(sfn);
}
rdmcycle(&clockEnd);
clockCnt = clockEnd - clockBegin;
UCP_PRINT_DEBUG("ape[0x%x]_slot_update_task end, startTime:[0x%08x], cycle:[0x%08x]",apeId,clockBegin, clockCnt);
return;
}
//uint16_t g_u16_slot_task_loop = 0;
static uint32_t g_ape0_slot_process_tick = 0; //(7) 0xB7E0001C
static uint32_t g_ape0_slot_process_tick_err = 0; //(8) 0xB7E00020
static uint32_t g_ape0_slot_process_cnt = 0; //(9) 0xB7E00024
void ape_slot_process_task(void)
{
uint32_t ape_id = get_core_id();
uint32_t clockTick = 0;
uint32_t clockOffset = 0;
rdmcycle(&clockTick);
debug_write(((DBG_DDR_IDX_DRV_BASE+10240) + (g_ape0_slot_process_cnt&0x1FF) + (ape_id << 9)), clockTick); // 0xa000
g_ape0_slot_process_cnt++;
debug_write(DBG_DDR_COMMON_IDX(ape_id,9), g_ape0_slot_process_cnt);
//clockTick = do_read_volatile(&LTBG0_TIME_BASE);
//debug_write(OSP_DEBUG_POT(ape_id, (480+g_u16_slot_task_loop)), clockTick); /* 多ape时这段地址会由其他ape使用 */
//g_u16_slot_task_loop = (g_u16_slot_task_loop+1)&0x1FF;
uint32_t offset = get_tx_nr_slot_cycle();
debug_write(DBG_DDR_COMMON_IDX(ape_id,(96+(g_slot_update_task_cnt&0xF))), offset);
update_sfn_slot();
send_slot_indication();
if (0 == g_ape0_slot_process_tick)
{
g_ape0_slot_process_tick = clockTick;
}
else
{
if (clockTick > g_ape0_slot_process_tick)
{
clockOffset = clockTick - g_ape0_slot_process_tick;
if ((clockOffset > TIMER_OFFSET_MAX) || (clockOffset < TIMER_OFFSET_MIN))
{
g_ape0_slot_process_tick_err++;
UCP_PRINT_ERROR("ape[%d] slot_process tick err[%d], cnt[%d]",clockOffset, g_ape0_slot_process_tick_err);
}
}
g_ape0_slot_process_tick = clockTick;
}
debug_write(DBG_DDR_COMMON_IDX(ape_id,7), g_ape0_slot_process_tick);
debug_write(DBG_DDR_COMMON_IDX(ape_id,8), g_ape0_slot_process_tick_err);
return;
}

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// +FHDR------------------------------------------------------------
// Copyright (c) 2022 SmartLogic.
// ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename : ape_test_case1.c
// Author : xianfeng.du
// Created On : 2022-10-19s
// Last Modified :
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------
#include "typedef.h"
#include "osp_task.h"
#include "osp_timer.h"
#include "ucp_printf.h"
/************************************************************************/
void ape0_event_task(uint32_t addr, uint32_t size);
void ape0_test_task_reg(void)
{
osp_task_info_ex ape0_event_task_info = {50, (int8_t*)"ape0_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event_task};
osp_task_create(&ape0_event_task_info);
return ;
}
/************************************************************************/
void ape1_event_task(uint32_t addr, uint32_t size);
void ape1_test_task_reg(void)
{
osp_task_info_ex ape1_event_task_info = {50, (int8_t*)"ape1_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task};
osp_task_create(&ape1_event_task_info);
return ;
}
void ape2_test_task_reg(void)
{
return ;
}
void ape3_test_task_reg(void)
{
return ;
}
void ape4_test_task_reg(void)
{
return ;
}
void ape5_test_task_reg(void)
{
return ;
}
void ape6_test_task_reg(void)
{
return ;
}
void ape7_test_task_reg(void)
{
return ;
}