From 44c5ec0414f274669a7f5e370a4c6a358ba99d3a Mon Sep 17 00:00:00 2001 From: "lishuang.xie" Date: Mon, 4 Mar 2024 18:10:03 +0800 Subject: [PATCH] update New Feature#1655 to dev_ck_V2.1 1. modified the function of void handshake_master_with_slave(uint32_t u32_core_mask) add the input parameter. 2. phy should support the function of uint32_t get_core_mask_by_phy(void). 3. Test: 3.1 spu_case0_arm_case0_cpri: Pass 3.2 spu_case14_arm_case20_cpri:Pass 3.3 spu_case20_arm_case20_cpri:Pass 3.4 spu_case21_arm_case21_cpri:Pass 3.5 spu_case34_arm_case5: Pass 3.6 spu_case44_arm_case5: Pass --- public/common/handshake/inc/ucp_handshake.h | 110 +-- public/common/handshake/src/ucp_handshake.s.c | 340 ++++----- .../ecs_rfm_spu1/top/src/ecs_rfm_spu1_top.s.c | 126 ++-- public/ecs_rfm_spu1/top/src/phy_init.s.c | 678 +++++++++--------- 4 files changed, 632 insertions(+), 622 deletions(-) diff --git a/public/common/handshake/inc/ucp_handshake.h b/public/common/handshake/inc/ucp_handshake.h index 7231ac5..852ccbf 100644 --- a/public/common/handshake/inc/ucp_handshake.h +++ b/public/common/handshake/inc/ucp_handshake.h @@ -1,55 +1,55 @@ -// +FHDR------------------------------------------------------------ -// Copyright (c) 2022 SmartLogic. -// ALL RIGHTS RESERVED -// ----------------------------------------------------------------- -// Filename : ucp_handshake.h -// Author : xianfeng.du -// Created On : 2022-07-22 -// Last Modified : -// ----------------------------------------------------------------- -// Description: -// -// -// -FHDR------------------------------------------------------------ - -#ifndef __UCP_HANDSHAKE_H__ -#define __UCP_HANDSHAKE_H__ - -#include "typedef.h" - -#define MAX_NUM_APE 8 -#define MAX_NUM_SPU 12 -#define MAX_NUM_CORE (MAX_NUM_SPU+1) -#define NPU_CORE_ID MAX_NUM_SPU -#define PET_RFM_SPU0_CORE_ID 8 -#define PET_RFM_SPU1_CORE_ID 9 -#define ECS_RFM_SPU0_CORE_ID 10 -#define ECS_RFM_SPU1_CORE_ID 11 - -#define HANDSHKAE_REQ_VALUE 0x5A5A5A5A -#define HANDSHKAE_RESP_VALUE 0xA5A5A5A5 - -#ifndef PCIE_BACKHAUL -#define HANDSHKAE_MASK 0x00000e00//excluded APE cores -#else -#define HANDSHKAE_MASK 0x00000f00//excluded APE cores -#endif - -typedef struct tUcpHandshake{ - uint32_t request[MAX_NUM_CORE]; - uint32_t response[MAX_NUM_CORE]; - uint32_t heartbeat[MAX_NUM_CORE]; -} UcpHandshake_t; - -UcpHandshake_t* get_handshake_info(void); -//void handshake_with_host(void); -void handshake_master_with_slave(void); -void handshake_slave_with_master(void); -int32_t get_host_core_id(void); -void handshake_request_from_host(int32_t core_id); -void handshake_response_to_host(int32_t core_id); - -#endif - - - +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : ucp_handshake.h +// Author : xianfeng.du +// Created On : 2022-07-22 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ + +#ifndef __UCP_HANDSHAKE_H__ +#define __UCP_HANDSHAKE_H__ + +#include "typedef.h" + +#define MAX_NUM_APE 8 +#define MAX_NUM_SPU 12 +#define MAX_NUM_CORE (MAX_NUM_SPU+1) +#define NPU_CORE_ID MAX_NUM_SPU +#define PET_RFM_SPU0_CORE_ID 8 +#define PET_RFM_SPU1_CORE_ID 9 +#define ECS_RFM_SPU0_CORE_ID 10 +#define ECS_RFM_SPU1_CORE_ID 11 + +#define HANDSHKAE_REQ_VALUE 0x5A5A5A5A +#define HANDSHKAE_RESP_VALUE 0xA5A5A5A5 + +#ifndef PCIE_BACKHAUL +#define HANDSHKAE_MASK 0x00000e00//excluded APE cores +#else +#define HANDSHKAE_MASK 0x00000f00//excluded APE cores +#endif + +typedef struct tUcpHandshake{ + uint32_t request[MAX_NUM_CORE]; + uint32_t response[MAX_NUM_CORE]; + uint32_t heartbeat[MAX_NUM_CORE]; +} UcpHandshake_t; + +UcpHandshake_t* get_handshake_info(void); +//void handshake_with_host(void); +void handshake_master_with_slave(uint32_t u32_core_mask); +void handshake_slave_with_master(void); +int32_t get_host_core_id(void); +void handshake_request_from_host(int32_t core_id); +void handshake_response_to_host(int32_t core_id); + +#endif + + + diff --git a/public/common/handshake/src/ucp_handshake.s.c b/public/common/handshake/src/ucp_handshake.s.c index e79682a..1766b85 100644 --- a/public/common/handshake/src/ucp_handshake.s.c +++ b/public/common/handshake/src/ucp_handshake.s.c @@ -1,170 +1,170 @@ -// +FHDR------------------------------------------------------------ -// Copyright (c) 2022 SmartLogic. -// ALL RIGHTS RESERVED -// ----------------------------------------------------------------- -// Filename : ucp_handshake.c -// Author : xianfeng.du -// Created On : 2022-06-25 -// Last Modified : -// ----------------------------------------------------------------- -// Description: -// -// -// -FHDR------------------------------------------------------------ - -#include "typedef.h" -#include "ucp_utility.h" -#include "ucp_printf.h" -//#include "ucp_handshake.h" -//#include "msg_transfer_queue.h" -#include "msg_transfer_mem.h" -#include "pet_sm_mgt.h" - -UcpHandshake_t* get_handshake_info(void) -{ - PetSmLocalMgt_t* pPetSmLocalMgt = get_pet_sm_local_mgt(); - return pPetSmLocalMgt->pHandshake; -} - -int32_t get_host_core_id(void) -{ - int32_t core_id; - -#ifndef PCIE_BACKHAUL - /*ARM A72 will call msg_transfer_init on TMAC_BACKHAUL mode*/ - core_id = NPU_CORE_ID; -#else - /*PET RFM SPU0 will call msg_transfer_init on PCIE_BACKHAUL mode*/ - core_id = PET_RFM_SPU0_CORE_ID; -#endif - - return core_id; -} - -//host is the core which called msg_transfer_init -void handshake_request_from_host(int32_t core_id) -{ - volatile uint32_t request = 0; - UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); - - while(1) { - request = do_read_volatile(&pHandshake->request[core_id]); - if (request == (core_id + HANDSHKAE_REQ_VALUE)) { - UCP_PRINT_EMPTY("Recieved handshake request message from core[0x%08x],value[0x%08x].",core_id,request); - break; - } - } - - return; -} - -//host is the core which called msg_transfer_init -void handshake_response_to_host(int32_t core_id) -{ - uint32_t response= (core_id + HANDSHKAE_RESP_VALUE); - UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); - - do_write(&pHandshake->response[core_id], response); - UCP_PRINT_EMPTY("Sent handshake response message to core[0x%08x],value[0x%08x].",core_id,response); - - return; -} - -//msgagent is the core which agented msg_transfer_init,PET_RFM_SPU1_CORE_ID -void handshake_response_to_msgagent(int32_t core_id) -{ - volatile uint32_t request = 0; - volatile uint32_t response = core_id + HANDSHKAE_RESP_VALUE; - UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); - - while(1) { - request = do_read_volatile(&pHandshake->request[core_id]); - if (request == (core_id + HANDSHKAE_REQ_VALUE)) { - UCP_PRINT_EMPTY("Recieved handshake request message from core[0x%08x],value[0x%08x].",core_id,request); - - do_write(&pHandshake->response[core_id], response); - UCP_PRINT_EMPTY("Sent handshake response message to core[0x%08x],value[0x%08x].",core_id,response); - break; - } - } - - return; -} - -//master is the core which controlled the handshake flow -#if 0 -void handshake_with_host(void) -{ - int32_t core_id = get_host_core_id(); - handshake_request_from_host(core_id); - handshake_response_to_host(core_id); - - return; -} -#endif - -//master is the core which controlled the handshake flow -void handshake_master_with_slave(void) -{ - volatile uint32_t request = 0; - uint32_t response; - uint32_t core_id,coreReadyBitMap,coreMask; - UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); - uint32_t ape_core_mask = APE_CORE_MASK & 0xff; - uint32_t handshake_coremask = HANDSHKAE_MASK | ape_core_mask; - - core_id = get_core_id(); - coreReadyBitMap = 1 << core_id; - debug_write(DBG_DDR_COMMON_IDX(core_id,90), handshake_coremask); - - //msgagent need to run before other cores. - handshake_response_to_msgagent(PET_RFM_SPU1_CORE_ID); - - while(1) { - for(uint32_t i = 0; i < MAX_NUM_SPU; i++) { - coreMask = (handshake_coremask >> i) & 0x1; - if (coreMask) { - request = do_read_volatile(&pHandshake->request[i]); - if (request == (i + HANDSHKAE_REQ_VALUE)) { - UCP_PRINT_EMPTY("Recieved handshake request message from core[0x%08x],value[0x%08x].",core_id,request); - - response= (i + HANDSHKAE_RESP_VALUE); - do_write(&pHandshake->response[i], response); - UCP_PRINT_EMPTY("Sent handshake response message to core[0x%08x],value[0x%08x].",core_id,response); - - coreReadyBitMap |= (1 << i); - } - } - } - - if (handshake_coremask == (coreReadyBitMap & handshake_coremask)) { - UCP_PRINT_EMPTY("all cores are ready."); - break; - } - } - - return; -} - -//master is the core which controlled the handshake flow -void handshake_slave_with_master(void) -{ - uint32_t core_id = get_core_id(); - uint32_t request= (core_id + HANDSHKAE_REQ_VALUE); - volatile uint32_t response; - UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); - - do_write(&pHandshake->request[core_id], request); - UCP_PRINT_EMPTY("core[0x%08x] sent handshake request message,value[0x%08x].",core_id,request); - - while(1) { - response = do_read_volatile(&pHandshake->response[core_id]); - if (response == (core_id + HANDSHKAE_RESP_VALUE)) { - UCP_PRINT_EMPTY("core[0x%08x] recieved handshake response message,value[0x%08x].",core_id,response); - break; - } - } - return; -} - - +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : ucp_handshake.c +// Author : xianfeng.du +// Created On : 2022-06-25 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ + +#include "typedef.h" +#include "ucp_utility.h" +#include "ucp_printf.h" +//#include "ucp_handshake.h" +//#include "msg_transfer_queue.h" +#include "msg_transfer_mem.h" +#include "pet_sm_mgt.h" + +UcpHandshake_t* get_handshake_info(void) +{ + PetSmLocalMgt_t* pPetSmLocalMgt = get_pet_sm_local_mgt(); + return pPetSmLocalMgt->pHandshake; +} + +int32_t get_host_core_id(void) +{ + int32_t core_id; + +#ifndef PCIE_BACKHAUL + /*ARM A72 will call msg_transfer_init on TMAC_BACKHAUL mode*/ + core_id = NPU_CORE_ID; +#else + /*PET RFM SPU0 will call msg_transfer_init on PCIE_BACKHAUL mode*/ + core_id = PET_RFM_SPU0_CORE_ID; +#endif + + return core_id; +} + +//host is the core which called msg_transfer_init +void handshake_request_from_host(int32_t core_id) +{ + volatile uint32_t request = 0; + UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); + + while(1) { + request = do_read_volatile(&pHandshake->request[core_id]); + if (request == (core_id + HANDSHKAE_REQ_VALUE)) { + UCP_PRINT_EMPTY("Recieved handshake request message from core[0x%08x],value[0x%08x].",core_id,request); + break; + } + } + + return; +} + +//host is the core which called msg_transfer_init +void handshake_response_to_host(int32_t core_id) +{ + uint32_t response= (core_id + HANDSHKAE_RESP_VALUE); + UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); + + do_write(&pHandshake->response[core_id], response); + UCP_PRINT_EMPTY("Sent handshake response message to core[0x%08x],value[0x%08x].",core_id,response); + + return; +} + +//msgagent is the core which agented msg_transfer_init,PET_RFM_SPU1_CORE_ID +void handshake_response_to_msgagent(int32_t core_id) +{ + volatile uint32_t request = 0; + volatile uint32_t response = core_id + HANDSHKAE_RESP_VALUE; + UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); + + while(1) { + request = do_read_volatile(&pHandshake->request[core_id]); + if (request == (core_id + HANDSHKAE_REQ_VALUE)) { + UCP_PRINT_EMPTY("Recieved handshake request message from core[0x%08x],value[0x%08x].",core_id,request); + + do_write(&pHandshake->response[core_id], response); + UCP_PRINT_EMPTY("Sent handshake response message to core[0x%08x],value[0x%08x].",core_id,response); + break; + } + } + + return; +} + +//master is the core which controlled the handshake flow +#if 0 +void handshake_with_host(void) +{ + int32_t core_id = get_host_core_id(); + handshake_request_from_host(core_id); + handshake_response_to_host(core_id); + + return; +} +#endif + +//master is the core which controlled the handshake flow +void handshake_master_with_slave(uint32_t u32_core_mask) +{ + volatile uint32_t request = 0; + uint32_t response; + uint32_t core_id,coreReadyBitMap,coreMask; + UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); + uint32_t ape_core_mask = u32_core_mask; + uint32_t handshake_coremask = HANDSHKAE_MASK | ape_core_mask; + + core_id = get_core_id(); + coreReadyBitMap = 1 << core_id; + debug_write(DBG_DDR_COMMON_IDX(core_id,90), handshake_coremask); + + //msgagent need to run before other cores. + handshake_response_to_msgagent(PET_RFM_SPU1_CORE_ID); + + while(1) { + for(uint32_t i = 0; i < MAX_NUM_SPU; i++) { + coreMask = (handshake_coremask >> i) & 0x1; + if (coreMask) { + request = do_read_volatile(&pHandshake->request[i]); + if (request == (i + HANDSHKAE_REQ_VALUE)) { + UCP_PRINT_EMPTY("Recieved handshake request message from core[0x%08x],value[0x%08x].",core_id,request); + + response= (i + HANDSHKAE_RESP_VALUE); + do_write(&pHandshake->response[i], response); + UCP_PRINT_EMPTY("Sent handshake response message to core[0x%08x],value[0x%08x].",core_id,response); + + coreReadyBitMap |= (1 << i); + } + } + } + + if (handshake_coremask == (coreReadyBitMap & handshake_coremask)) { + UCP_PRINT_EMPTY("all cores are ready."); + break; + } + } + + return; +} + +//master is the core which controlled the handshake flow +void handshake_slave_with_master(void) +{ + uint32_t core_id = get_core_id(); + uint32_t request= (core_id + HANDSHKAE_REQ_VALUE); + volatile uint32_t response; + UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info(); + + do_write(&pHandshake->request[core_id], request); + UCP_PRINT_EMPTY("core[0x%08x] sent handshake request message,value[0x%08x].",core_id,request); + + while(1) { + response = do_read_volatile(&pHandshake->response[core_id]); + if (response == (core_id + HANDSHKAE_RESP_VALUE)) { + UCP_PRINT_EMPTY("core[0x%08x] recieved handshake response message,value[0x%08x].",core_id,response); + break; + } + } + return; +} + + diff --git a/public/ecs_rfm_spu1/top/src/ecs_rfm_spu1_top.s.c b/public/ecs_rfm_spu1/top/src/ecs_rfm_spu1_top.s.c index 526df46..4a8623c 100644 --- a/public/ecs_rfm_spu1/top/src/ecs_rfm_spu1_top.s.c +++ b/public/ecs_rfm_spu1/top/src/ecs_rfm_spu1_top.s.c @@ -1,70 +1,74 @@ -// +FHDR------------------------------------------------------------ -// Copyright (c) 2022 SmartLogic. -// ALL RIGHTS RESERVED -// ----------------------------------------------------------------- -// Filename : ecs_rfm_spu1.c -// Author : xianfeng.du -// Created On : 2022-06-25 -// Last Modified : -// ----------------------------------------------------------------- -// Description: -// -// -// -FHDR------------------------------------------------------------ - -#include "typedef.h" -#include "rfm1_drv.h" -#include "ucp_handshake.h" -//#include "cpri_timer.h" -#include "ucp_utility.h" -#include "ucp_printf.h" -#include "phy_para.h" -#include "pet_sm_mgt.h" -#include "ecs_rfm_dm_mgt.h" -#include "msg_transfer_mem.h" +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : ecs_rfm_spu1.c +// Author : xianfeng.du +// Created On : 2022-06-25 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ + +#include "typedef.h" +#include "rfm1_drv.h" +#include "ucp_handshake.h" +//#include "cpri_timer.h" +#include "ucp_utility.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "pet_sm_mgt.h" +#include "ecs_rfm_dm_mgt.h" +#include "msg_transfer_mem.h" #ifdef TEST_ENABLE -#include "fh_test.h" -#endif +#include "fh_test.h" +#endif void phy_init(void); - -ALWAYS_INLINE int32_t get_core_id(void) -{ - return ECS_RFM_SPU1_CORE_ID; -} - -void ecs_rfm_spu1_drv_init(void) -{ - ecs_rfm_dm_alloc(); - ecs_rfm1_dm_init(); - - pet_sm_alloc(); - ucp_spinlock_init(); - - ecs_rfm1_drv_init(); - UCP_PRINT_EMPTY("ECS: rfm drv init finished.\r\n"); +uint32_t get_core_mask_by_phy(void); + +ALWAYS_INLINE int32_t get_core_id(void) +{ + return ECS_RFM_SPU1_CORE_ID; +} + +void ecs_rfm_spu1_drv_init(void) +{ + ecs_rfm_dm_alloc(); + ecs_rfm1_dm_init(); + + pet_sm_alloc(); + + ucp_spinlock_init(); + + ecs_rfm1_drv_init(); + UCP_PRINT_EMPTY("ECS: rfm drv init finished.\r\n"); + + return; +} + +void ecs_rfm_spu1_msg_transfer_init(void) +{ + msg_transfer_mem_alloc(); + + int32_t core_id = get_host_core_id(); + handshake_request_from_host(core_id); + //handshake_with_host(); + + msg_transfer_queue_init();//initialized local queuecfg from common queuecfg + + uint32_t u32_core_mask = get_core_mask_by_phy(); + debug_write(DBG_DDR_COMMON_IDX(core_id, 3), u32_core_mask); + handshake_master_with_slave(u32_core_mask); - return; -} - -void ecs_rfm_spu1_msg_transfer_init(void) -{ - msg_transfer_mem_alloc(); - - int32_t core_id = get_host_core_id(); - handshake_request_from_host(core_id); - //handshake_with_host(); - - msg_transfer_queue_init();//initialized local queuecfg from common queuecfg - - handshake_master_with_slave(); - handshake_response_to_host(core_id); phy_init();//phy application function:msg_transfer_cfg - - return; -} - + + return; +} + diff --git a/public/ecs_rfm_spu1/top/src/phy_init.s.c b/public/ecs_rfm_spu1/top/src/phy_init.s.c index 0c3fa17..c4604ef 100644 --- a/public/ecs_rfm_spu1/top/src/phy_init.s.c +++ b/public/ecs_rfm_spu1/top/src/phy_init.s.c @@ -1,352 +1,358 @@ -// +FHDR------------------------------------------------------------ -// Copyright (c) 2022 SmartLogic. -// ALL RIGHTS RESERVED -// ----------------------------------------------------------------- -// Filename : phy_init.c -// Author : xianfeng.du -// Created On : 2022-12-27 -// Last Modified : -// ----------------------------------------------------------------- -// Description: -// ecs_rfm_spu1 phy_init -// -// -FHDR------------------------------------------------------------ - -#include "phy_para.h" -#include "mtimer_cell.h" +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : phy_init.c +// Author : xianfeng.du +// Created On : 2022-12-27 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// ecs_rfm_spu1 phy_init +// +// -FHDR------------------------------------------------------------ + +#include "phy_para.h" +#include "mtimer_cell.h" #include "ucp_utility.h" -#include "app_interface.h" -#include "phy_para.h" -#include "rfm1_drv.h" -#include "jesd_orx_timer.h" -#include "ecs_rfm_dm_mgt.h" +#include "app_interface.h" +#include "phy_para.h" +#include "rfm1_drv.h" +#include "jesd_orx_timer.h" +#include "ecs_rfm_dm_mgt.h" -#define CELL_SETUP_TYPE_SIMULATION (0x5a6b7c8d) -#define ORX_MSG_TYPE_SIMULATION (0xaabb7788) +#define CELL_SETUP_TYPE_SIMULATION (0x5a6b7c8d) +#define ORX_MSG_TYPE_SIMULATION (0xaabb7788) -#define ECS_RFM1_TEST_MSG_SIZE (8) -#define ECS_RFM1_MSG_TYPE (0) - -uint8_t gu8_send_create_task_cnt = 0; -uint8_t gu8_send_del_task_cnt = 0; - -int32_t phy_fh_drv_init() -{ - stFrontHaulDrvPara fhDrvPara; - memset_ucp(&fhDrvPara, 0, sizeof(stFrontHaulDrvPara)); - -#ifdef DISTRIBUTED_BS - fhDrvPara.protocolSel = PROTOCOL_CPRI; - fhDrvPara.rateOption = CPRI_OPTION_8; - fhDrvPara.mapOption = OTIC_MAP_FIGURE12; -#endif +#define ECS_RFM1_TEST_MSG_SIZE (8) +#define ECS_RFM1_MSG_TYPE (0) -#ifdef ECPRI_DISTRIBUTED_BS - fhDrvPara.protocolSel = PROTOCOL_ECPRI; - fhDrvPara.rateOption = ECPRI_OPTION_10G; -#endif +uint8_t gu8_send_create_task_cnt = 0; +uint8_t gu8_send_del_task_cnt = 0; -#ifdef INTEGRATED_BS - fhDrvPara.protocolSel = PROTOCOL_JESD; - fhDrvPara.rateOption = JESD_OPTION_204B; -#endif -#ifdef INTEGRATED_204C_BS - fhDrvPara.protocolSel = PROTOCOL_JESD; - fhDrvPara.rateOption = JESD_OPTION_204C; -#endif - - fronthaul_drv_cfg(&fhDrvPara); - - return 0; -} - -void ecs_rfm1_send_create_task_info(uint8_t dst_core_id) -{ - uint32_t core_id = get_core_id(); - int32_t ret = 0; - char* addr = NULL; - addr = osp_alloc_msg(ECS_RFM1_TEST_MSG_SIZE); - if (NULL == addr) - { - debug_write(DBG_DDR_COMMON_IDX(core_id, 58), 0xa1); - debug_write(DBG_DDR_COMMON_IDX(core_id, 59), dst_core_id); - return ; - } - debug_write(DBG_DDR_COMMON_IDX(core_id, 4), (uint32_t)addr); - do_write(addr, 0xa1a2a3a4); - do_write((addr+4), 0xb1b2b3b4); - ret = osp_send_msg((uint32_t)(addr), - ECS_RFM1_TEST_MSG_SIZE, - ECS_RFM1_MSG_TYPE, - 11, // src que id - dst_core_id, // dst que id - 50, // src task id - 50); // dst task id - - if (0 != ret) - { - debug_write(DBG_DDR_COMMON_IDX(core_id, 58), 0xa2); - debug_write(DBG_DDR_COMMON_IDX(core_id, 59), dst_core_id); - return ; - } - debug_write(DBG_DDR_COMMON_IDX(core_id, 60), ++gu8_send_create_task_cnt); - return ; -} - -void ecs_rfm1_send_del_task_info(uint8_t dst_core_id) -{ - uint32_t core_id = get_core_id(); - int32_t ret = 0; - char* addr = NULL; - addr = osp_alloc_msg(ECS_RFM1_TEST_MSG_SIZE); - if (NULL == addr) - { - debug_write(DBG_DDR_COMMON_IDX(core_id, 61), 0xa1); - debug_write(DBG_DDR_COMMON_IDX(core_id, 62), dst_core_id); - return ; - } - debug_write(DBG_DDR_COMMON_IDX(core_id, 4), (uint32_t)addr); - do_write(addr, 0xa1a2a3a4); - do_write((addr+4), 0xb1b2b3b4); - ret = osp_send_msg((uint32_t)(addr), - ECS_RFM1_TEST_MSG_SIZE, - ECS_RFM1_MSG_TYPE, - 11, // src que id - dst_core_id, // dst que id - 51, // src task id - 51); // dst task id - - if (0 != ret) - { - debug_write(DBG_DDR_COMMON_IDX(core_id, 61), 0xa2); - debug_write(DBG_DDR_COMMON_IDX(core_id, 62), dst_core_id); - return ; - } - debug_write(DBG_DDR_COMMON_IDX(core_id, 63), ++gu8_send_del_task_cnt); - return ; -} - -void ecs_rfm1_build_cell(uint32_t scsId, uint32_t cellId, uint32_t coreId, uint32_t frame_type) -{ - phy_timer_config_ind_t my_cpritmr; - - my_cpritmr.scsId = scsId; - if ((0 <= cellId) || ((3 >= cellId))) - { - my_cpritmr.runCoreId = coreId; - } - else - { - my_cpritmr.runCoreId = 0; - } - - my_cpritmr.frameType = frame_type; - if (TDD_2500US_DOUBLE == frame_type) - { - my_cpritmr.t_period = 5000; - my_cpritmr.t_us = 500; - my_cpritmr.num_tti = 10; - my_cpritmr.num_tti_per_sfn = 20; - - my_cpritmr.num_t_dl[0] = 3; // dl slot num - my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num - my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num - my_cpritmr.num_ants[0] = 4; - - my_cpritmr.num_t_dl[1] = 2; // dl slot num - my_cpritmr.num_t_dl_symb[1] = 6; // dl symbol num - my_cpritmr.num_t_ul_symb[1] = 4; // ul symbol num - my_cpritmr.num_ants[1] = 4; - } - else - { - if (NR_SCS_30K == scsId) - { - //my_cpritmr.frameType = TDD_MODE; - //my_cpritmr.frameType = FDD_MODE; - my_cpritmr.t_period = 5000; - my_cpritmr.t_us = 500; - my_cpritmr.num_tti = 10; - my_cpritmr.num_tti_per_sfn = 20; - - my_cpritmr.num_t_dl[0] = 7; // dl slot num - my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num - my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num - my_cpritmr.num_ants[0] = 4; - } - else if (LTE_SCS_ID == scsId) - { - //my_cpritmr.frameType = TDD_MODE; - //my_cpritmr.frameType = FDD_MODE; - my_cpritmr.t_period = 10000; - my_cpritmr.t_us = 1000; - my_cpritmr.num_tti = 10; - my_cpritmr.num_tti_per_sfn = 10; - - my_cpritmr.num_t_dl[0] =10;// 7; // dl slot num - my_cpritmr.num_t_dl_symb[0] = 14;//6; // dl symbol num - my_cpritmr.num_t_ul_symb[0] = 14;//4; // ul symbol num - my_cpritmr.num_ants[0] = 2; - } - else - { - return; - } - } - - int32_t ret = mtimer_init4phy(&my_cpritmr); - if (0 != ret) - { - return; - } - - uint32_t apeId = 0; - uint32_t runCore = my_cpritmr.runCoreId; - volatile uint32_t h1Pos = __builtin_clz(runCore); // 从高bit开始，第一个1前面的0的个数 - while (h1Pos != 32) - { - apeId = 31 - h1Pos; - if (8 <= apeId) - { - return; - } - - ecs_rfm1_send_create_task_info(apeId); - - runCore &= (~(1 << apeId)); - h1Pos = __builtin_clz(runCore); - } -} - -void ecs_rfm1_delete_cell(uint32_t scsId, uint32_t cellId, uint32_t coreId) -{ - int32_t ret = 0; -#ifdef PALLADIUM_TEST - int32_t flag = 1; - debug_write((DBG_DDR_IDX_DRV_BASE+52), flag); // 0xb7e060d0 -#endif - - stPhyDelCell myDelCell; - myDelCell.scsId = scsId; - if ((0 <= cellId) || (3 >= cellId)) - { - myDelCell.delCoreId = coreId; - } - else - { - myDelCell.delCoreId = 0; - } - - uint32_t apeId = 0; - uint32_t runCore = myDelCell.delCoreId; - volatile uint32_t h1Pos = __builtin_clz(runCore); // 从高bit开始，第一个1前面的0的个数 - while (h1Pos != 32) - { - apeId = 31 - h1Pos; - if (8 <= apeId) - { - return; - } - - ecs_rfm1_send_del_task_info(apeId); - - runCore &= (~(1 << apeId)); - h1Pos = __builtin_clz(runCore); - } -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+52), flag); // 0xb7e060d0 -#endif - - ret = mtimer_del_cell_cfg(&myDelCell); -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+52), flag); // 0xb7e060d0 -#endif -} - -volatile uint32_t gCellFlag = 0; -void phy_init(void) -{ - gCellFlag = 0; - return; -} +int32_t phy_fh_drv_init() +{ + stFrontHaulDrvPara fhDrvPara; + memset_ucp(&fhDrvPara, 0, sizeof(stFrontHaulDrvPara)); + +#ifdef DISTRIBUTED_BS + fhDrvPara.protocolSel = PROTOCOL_CPRI; + fhDrvPara.rateOption = CPRI_OPTION_8; + fhDrvPara.mapOption = OTIC_MAP_FIGURE12; +#endif + +#ifdef ECPRI_DISTRIBUTED_BS + fhDrvPara.protocolSel = PROTOCOL_ECPRI; + fhDrvPara.rateOption = ECPRI_OPTION_10G; +#endif + +#ifdef INTEGRATED_BS + fhDrvPara.protocolSel = PROTOCOL_JESD; + fhDrvPara.rateOption = JESD_OPTION_204B; +#endif +#ifdef INTEGRATED_204C_BS + fhDrvPara.protocolSel = PROTOCOL_JESD; + fhDrvPara.rateOption = JESD_OPTION_204C; +#endif + + fronthaul_drv_cfg(&fhDrvPara); + + return 0; +} + +void ecs_rfm1_send_create_task_info(uint8_t dst_core_id) +{ + uint32_t core_id = get_core_id(); + int32_t ret = 0; + char* addr = NULL; + addr = osp_alloc_msg(ECS_RFM1_TEST_MSG_SIZE); + if (NULL == addr) + { + debug_write(DBG_DDR_COMMON_IDX(core_id, 58), 0xa1); + debug_write(DBG_DDR_COMMON_IDX(core_id, 59), dst_core_id); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(core_id, 4), (uint32_t)addr); + do_write(addr, 0xa1a2a3a4); + do_write((addr+4), 0xb1b2b3b4); + ret = osp_send_msg((uint32_t)(addr), + ECS_RFM1_TEST_MSG_SIZE, + ECS_RFM1_MSG_TYPE, + 11, // src que id + dst_core_id, // dst que id + 50, // src task id + 50); // dst task id + + if (0 != ret) + { + debug_write(DBG_DDR_COMMON_IDX(core_id, 58), 0xa2); + debug_write(DBG_DDR_COMMON_IDX(core_id, 59), dst_core_id); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(core_id, 60), ++gu8_send_create_task_cnt); + return ; +} + +void ecs_rfm1_send_del_task_info(uint8_t dst_core_id) +{ + uint32_t core_id = get_core_id(); + int32_t ret = 0; + char* addr = NULL; + addr = osp_alloc_msg(ECS_RFM1_TEST_MSG_SIZE); + if (NULL == addr) + { + debug_write(DBG_DDR_COMMON_IDX(core_id, 61), 0xa1); + debug_write(DBG_DDR_COMMON_IDX(core_id, 62), dst_core_id); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(core_id, 4), (uint32_t)addr); + do_write(addr, 0xa1a2a3a4); + do_write((addr+4), 0xb1b2b3b4); + ret = osp_send_msg((uint32_t)(addr), + ECS_RFM1_TEST_MSG_SIZE, + ECS_RFM1_MSG_TYPE, + 11, // src que id + dst_core_id, // dst que id + 51, // src task id + 51); // dst task id + + if (0 != ret) + { + debug_write(DBG_DDR_COMMON_IDX(core_id, 61), 0xa2); + debug_write(DBG_DDR_COMMON_IDX(core_id, 62), dst_core_id); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(core_id, 63), ++gu8_send_del_task_cnt); + return ; +} + +void ecs_rfm1_build_cell(uint32_t scsId, uint32_t cellId, uint32_t coreId, uint32_t frame_type) +{ + phy_timer_config_ind_t my_cpritmr; + + my_cpritmr.scsId = scsId; + if ((0 <= cellId) || ((3 >= cellId))) + { + my_cpritmr.runCoreId = coreId; + } + else + { + my_cpritmr.runCoreId = 0; + } + + my_cpritmr.frameType = frame_type; + if (TDD_2500US_DOUBLE == frame_type) + { + my_cpritmr.t_period = 5000; + my_cpritmr.t_us = 500; + my_cpritmr.num_tti = 10; + my_cpritmr.num_tti_per_sfn = 20; + + my_cpritmr.num_t_dl[0] = 3; // dl slot num + my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num + my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num + my_cpritmr.num_ants[0] = 4; + + my_cpritmr.num_t_dl[1] = 2; // dl slot num + my_cpritmr.num_t_dl_symb[1] = 6; // dl symbol num + my_cpritmr.num_t_ul_symb[1] = 4; // ul symbol num + my_cpritmr.num_ants[1] = 4; + } + else + { + if (NR_SCS_30K == scsId) + { + //my_cpritmr.frameType = TDD_MODE; + //my_cpritmr.frameType = FDD_MODE; + my_cpritmr.t_period = 5000; + my_cpritmr.t_us = 500; + my_cpritmr.num_tti = 10; + my_cpritmr.num_tti_per_sfn = 20; + + my_cpritmr.num_t_dl[0] = 7; // dl slot num + my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num + my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num + my_cpritmr.num_ants[0] = 4; + } + else if (LTE_SCS_ID == scsId) + { + //my_cpritmr.frameType = TDD_MODE; + //my_cpritmr.frameType = FDD_MODE; + my_cpritmr.t_period = 10000; + my_cpritmr.t_us = 1000; + my_cpritmr.num_tti = 10; + my_cpritmr.num_tti_per_sfn = 10; + + my_cpritmr.num_t_dl[0] =10;// 7; // dl slot num + my_cpritmr.num_t_dl_symb[0] = 14;//6; // dl symbol num + my_cpritmr.num_t_ul_symb[0] = 14;//4; // ul symbol num + my_cpritmr.num_ants[0] = 2; + } + else + { + return; + } + } + + int32_t ret = mtimer_init4phy(&my_cpritmr); + if (0 != ret) + { + return; + } + + uint32_t apeId = 0; + uint32_t runCore = my_cpritmr.runCoreId; + volatile uint32_t h1Pos = __builtin_clz(runCore); // 从高bit开始，第一个1前面的0的个数 + while (h1Pos != 32) + { + apeId = 31 - h1Pos; + if (8 <= apeId) + { + return; + } + + ecs_rfm1_send_create_task_info(apeId); + + runCore &= (~(1 << apeId)); + h1Pos = __builtin_clz(runCore); + } +} + +void ecs_rfm1_delete_cell(uint32_t scsId, uint32_t cellId, uint32_t coreId) +{ + int32_t ret = 0; +#ifdef PALLADIUM_TEST + int32_t flag = 1; + debug_write((DBG_DDR_IDX_DRV_BASE+52), flag); // 0xb7e060d0 +#endif + + stPhyDelCell myDelCell; + myDelCell.scsId = scsId; + if ((0 <= cellId) || (3 >= cellId)) + { + myDelCell.delCoreId = coreId; + } + else + { + myDelCell.delCoreId = 0; + } + + uint32_t apeId = 0; + uint32_t runCore = myDelCell.delCoreId; + volatile uint32_t h1Pos = __builtin_clz(runCore); // 从高bit开始，第一个1前面的0的个数 + while (h1Pos != 32) + { + apeId = 31 - h1Pos; + if (8 <= apeId) + { + return; + } + + ecs_rfm1_send_del_task_info(apeId); + + runCore &= (~(1 << apeId)); + h1Pos = __builtin_clz(runCore); + } +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+52), flag); // 0xb7e060d0 +#endif + + ret = mtimer_del_cell_cfg(&myDelCell); +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+52), flag); // 0xb7e060d0 +#endif +} + +volatile uint32_t gCellFlag = 0; +void phy_init(void) +{ + gCellFlag = 0; + return; +} void phy_oam_msg_proc(uint32_t u32msg_addr, uint32_t u32msg_size) { return ; } - -void phy_msg_proc(uint32_t u32msg_addr, uint32_t u32msg_size) -{ + +void phy_msg_proc(uint32_t u32msg_addr, uint32_t u32msg_size) +{ uint32_t msg_buf = do_read(u32msg_addr); uint32_t msg_type = do_read(msg_buf); -// EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt(); -// JesdOrxPara_t* orx_para_ptr = pEcsDmLocalMgt->jesd_orx_para_ptr; - - //memcpy_ucp(0x60000000, msg_buf, 32); // temp code +// EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt(); +// JesdOrxPara_t* orx_para_ptr = pEcsDmLocalMgt->jesd_orx_para_ptr; + + //memcpy_ucp(0x60000000, msg_buf, 32); // temp code if (CELL_SETUP_TYPE_SIMULATION == msg_type) - { - uint32_t msg_new_del = do_read(msg_buf+12); // 0; // - uint32_t scs_id = do_read(msg_buf+16); // 1; // - uint32_t cell_id = do_read(msg_buf+20); // 0; // - uint32_t run_core = do_read(msg_buf+24); - uint32_t frame_type = do_read(msg_buf+28); - - if (1 < msg_new_del) - { - return; - } - if (NR_SCS_120K < scs_id) - { - return; - } - - if (0 == msg_new_del) - { - ecs_rfm1_build_cell(scs_id, cell_id, run_core, frame_type); - } - else - { - ecs_rfm1_delete_cell(scs_id, cell_id, run_core); - } - debug_write(DBG_DDR_COMMON_IDX(get_core_id(),1), 0x12345678); - } - else if (ORX_MSG_TYPE_SIMULATION == msg_type) - { - //if (1 > orx_para_ptr->orx_calldrv_cnt) - { - phy_sniffer_start(10000); - debug_write(DBG_DDR_COMMON_IDX(get_core_id(),2), ORX_MSG_TYPE_SIMULATION); - } + { + uint32_t msg_new_del = do_read(msg_buf+12); // 0; // + uint32_t scs_id = do_read(msg_buf+16); // 1; // + uint32_t cell_id = do_read(msg_buf+20); // 0; // + uint32_t run_core = do_read(msg_buf+24); + uint32_t frame_type = do_read(msg_buf+28); + + if (1 < msg_new_del) + { + return; + } + if (NR_SCS_120K < scs_id) + { + return; + } + + if (0 == msg_new_del) + { + ecs_rfm1_build_cell(scs_id, cell_id, run_core, frame_type); + } + else + { + ecs_rfm1_delete_cell(scs_id, cell_id, run_core); + } + debug_write(DBG_DDR_COMMON_IDX(get_core_id(),1), 0x12345678); } - - return; -} - -uint32_t gDdrCallCnt = 0; -void ddr_wr_callback() -{ - gDdrCallCnt++; - debug_write((DBG_DDR_IDX_DRV_BASE+127), gDdrCallCnt); // 0x1fc -} - -uint32_t gFapiCallCnt = 0; -void rfm1_fapi_callback() - { - gFapiCallCnt++; - debug_write((DBG_DDR_IDX_DRV_BASE+123), gFapiCallCnt); // 0x1ec -} - -uint32_t gOrxCallCnt = 0; -void phy_sniffer_data_proc() -{ - gOrxCallCnt++; - debug_write((DBG_DDR_IDX_DRV_BASE+123), gOrxCallCnt); // 0x1ec -} + else if (ORX_MSG_TYPE_SIMULATION == msg_type) + { + //if (1 > orx_para_ptr->orx_calldrv_cnt) + { + phy_sniffer_start(10000); + debug_write(DBG_DDR_COMMON_IDX(get_core_id(),2), ORX_MSG_TYPE_SIMULATION); + } + } + + return; +} + +uint32_t gDdrCallCnt = 0; +void ddr_wr_callback() +{ + gDdrCallCnt++; + debug_write((DBG_DDR_IDX_DRV_BASE+127), gDdrCallCnt); // 0x1fc +} + +uint32_t gFapiCallCnt = 0; +void rfm1_fapi_callback() + { + gFapiCallCnt++; + debug_write((DBG_DDR_IDX_DRV_BASE+123), gFapiCallCnt); // 0x1ec +} + +uint32_t gOrxCallCnt = 0; +void phy_sniffer_data_proc() +{ + gOrxCallCnt++; + debug_write((DBG_DDR_IDX_DRV_BASE+123), gOrxCallCnt); // 0x1ec +} void Mem_Init(void) -{ - return ; -} - +{ + return ; +} + +uint32_t get_core_mask_by_phy(void) +{ + return APE_CORE_MASK & 0xff; +} + +