Merge branch 'dev_ck_v2.1_feature#1655#' into 'dev_ck_v2.1'
update New Feature#1655 to dev_ck_V2.1 See merge request ucp/driver/ucp4008_platform_spu!94
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1134739ba4
@ -43,7 +43,7 @@ typedef struct tUcpHandshake{
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UcpHandshake_t* get_handshake_info(void);
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//void handshake_with_host(void);
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void handshake_master_with_slave(void);
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void handshake_master_with_slave(uint32_t u32_core_mask);
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void handshake_slave_with_master(void);
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int32_t get_host_core_id(void);
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void handshake_request_from_host(int32_t core_id);
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@ -104,21 +104,21 @@ void handshake_with_host(void)
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#endif
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//master is the core which controlled the handshake flow
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void handshake_master_with_slave(void)
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void handshake_master_with_slave(uint32_t u32_core_mask)
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{
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volatile uint32_t request = 0;
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uint32_t response;
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uint32_t core_id,coreReadyBitMap,coreMask;
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UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info();
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uint32_t ape_core_mask = APE_CORE_MASK & 0xff;
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uint32_t handshake_coremask = HANDSHKAE_MASK | ape_core_mask;
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UcpHandshake_t* pHandshake = (UcpHandshake_t *)get_handshake_info();
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uint32_t ape_core_mask = u32_core_mask;
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uint32_t handshake_coremask = HANDSHKAE_MASK | ape_core_mask;
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core_id = get_core_id();
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coreReadyBitMap = 1 << core_id;
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debug_write(DBG_DDR_COMMON_IDX(core_id,90), handshake_coremask);
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debug_write(DBG_DDR_COMMON_IDX(core_id,90), handshake_coremask);
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//msgagent need to run before other cores.
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handshake_response_to_msgagent(PET_RFM_SPU1_CORE_ID);
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//msgagent need to run before other cores.
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handshake_response_to_msgagent(PET_RFM_SPU1_CORE_ID);
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while(1) {
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for(uint32_t i = 0; i < MAX_NUM_SPU; i++) {
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@ -29,19 +29,21 @@
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void phy_init(void);
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uint32_t get_core_mask_by_phy(void);
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ALWAYS_INLINE int32_t get_core_id(void)
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{
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return ECS_RFM_SPU1_CORE_ID;
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return ECS_RFM_SPU1_CORE_ID;
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}
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void ecs_rfm_spu1_drv_init(void)
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{
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ecs_rfm_dm_alloc();
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ecs_rfm1_dm_init();
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ecs_rfm1_dm_init();
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pet_sm_alloc();
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ucp_spinlock_init();
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ucp_spinlock_init();
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ecs_rfm1_drv_init();
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UCP_PRINT_EMPTY("ECS: rfm drv init finished.\r\n");
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@ -59,7 +61,9 @@ void ecs_rfm_spu1_msg_transfer_init(void)
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msg_transfer_queue_init();//initialized local queuecfg from common queuecfg
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handshake_master_with_slave();
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uint32_t u32_core_mask = get_core_mask_by_phy();
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debug_write(DBG_DDR_COMMON_IDX(core_id, 3), u32_core_mask);
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handshake_master_with_slave(u32_core_mask);
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handshake_response_to_host(core_id);
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@ -350,3 +350,9 @@ void Mem_Init(void)
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return ;
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}
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uint32_t get_core_mask_by_phy(void)
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{
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return APE_CORE_MASK & 0xff;
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}
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