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updated build.sh

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This commit is contained in:
xianfeng.du 2023-09-26 15:07:44 +08:00
parent 744d237e57
commit 1c6d162929
6 changed files with 26 additions and 345 deletions
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41
build.sh
View File

@ -1,7 +1,7 @@
set -e
usage() {
echo "usage: $0 [variants] [--debug] [--evmy] [--test caseid] [--cpri/--ecpri/--jesd] [--pcie] [--mask bitmap] [--diagnostic]" 1>&2
echo "usage: $0 [variants] [--debug] [--diagnostic] [--testcpri caseid/--testecpri caseid/--testjesd caseid] [--pcie] [--mask bitmap]" 1>&2
msg=${1:-}
if [ ! -z "${msg}" ]; then
echo "error:$1"
@ -17,7 +17,7 @@ backhaul_option="tmac"
osp_test_option="no"
fh_test_option="no"
board_option="evb"
#board_option="evb"
osp_case_id=0
cpri_case_id=34
@ -25,18 +25,17 @@ ecpri_case_id=100
jesd_case_id=43
fh_case_id=
ape_core_mask=0xf
platform_build_data=0x20230823
platform_build_data=0x20230926
while [[ "$#" > 0 ]]; do
case $1 in
--debug) debug_option="yes"; shift;;
--diagnostic) diagnostic_option="yes"; shift;;
--evmy) board_option="evmy"; shift;;
--cpri) fronthaul_option="cpri"; shift;;
--ecpri) fronthaul_option="ecpri"; shift;;
--jesd) fronthaul_option="jesd"; shift;;
# --evmy) board_option="evmy"; shift;;
# --cpri) fronthaul_option="cpri"; shift;;
# --ecpri) fronthaul_option="ecpri"; shift;;
# --jesd) fronthaul_option="jesd"; shift;;
--pcie) backhaul_option="pcie"; shift;;
--mask)
@ -56,19 +55,22 @@ while [[ "$#" > 0 ]]; do
osp_case_id=$2; shift;
fi
shift;;
--testcpri) fh_test_option="yes";
--testcpri) fh_test_option="yes";
fronthaul_option="cpri";
if [[ ! -z "$2" ]] && [[ -n "$(echo $2 | sed -n " /^[0-9]\+$/p")" ]]; then
cpri_case_id=$2; shift;
fi
fh_case_id=${cpri_case_id};
shift;;
--testecpri) fh_test_option="yes";
--testecpri) fh_test_option="yes";
fronthaul_option="ecpri"
if [[ ! -z "$2" ]] && [[ -n "$(echo $2 | sed -n " /^[0-9]\+$/p")" ]]; then
ecpri_case_id=$2; shift;
fi
fh_case_id=${ecpri_case_id};
shift;;
--testjesd) fh_test_option="yes";
--testjesd) fh_test_option="yes";
fronthaul_option="jesd"
if [[ ! -z "$2" ]] && [[ -n "$(echo $2 | sed -n " /^[0-9]\+$/p")" ]]; then
jesd_case_id=$2; shift;
fi
@ -88,17 +90,16 @@ fi
DIR_SCRIPT=$(cd `dirname "$0"`;pwd)
#echo "# script_dir:${DIR_SCRIPT}"
export DIR_ROOT=${DIR_SCRIPT}/public
export BUILD_DIR=${DIR_SCRIPT}/build
if [ "${board_option}" == "evmy" ]; then
BOARD_DIR=${DIR_SCRIPT}/EVMY
else
BOARD_DIR=${DIR_SCRIPT}/EVB
fi
export BOARD_DIR
echo "# BOARD_DIR:${BOARD_DIR}"
#if [ "${board_option}" == "evmy" ]; then
# BOARD_DIR=${DIR_SCRIPT}/EVMY
#else
# BOARD_DIR=${DIR_SCRIPT}/EVB
#fi
#export BOARD_DIR
#echo "# BOARD_DIR:${BOARD_DIR}"
export MAKE_DIR=${DIR_ROOT}/make
RTOS_DIR=${DIR_ROOT}/rtos/lib
@ -111,7 +112,7 @@ if [ -d ${RTOS_DIR} ]; then
rm -rf ${RTOS_DIR}
fi
export board_option=${board_option}
#export board_option=${board_option}
export diagnostic_option=${diagnostic_option}
export debug_option=${debug_option}
export fronthaul_option=${fronthaul_option}

10
public/make/makefile.ape_spu
View File

@ -45,14 +45,4 @@ ifeq ($(test_option),yes)
include $(MAKE_DIR)/makefile.test_osp
endif
ifeq ($(fronthaul_option),cpri)
DEFINES += DISTRIBUTED_BS
else ifeq ($(fronthaul_option),ecpri)
DEFINES += ECPRI_DISTRIBUTED_BS
else ifeq ($(fronthaul_option),jesd)
DEFINES += INTEGRATED_BS
else
$(info "error fronthaul_option=" $(fronthaul_option))
endif
include $(MAKE_DIR)/makefile.common

14
public/make/makefile.ecs_rfm_spu0
View File

@ -36,14 +36,10 @@ DIRS_SRC_FOLDER += $(DIR_ECS_SPU0)/top
# ==============================================================================
# common: Output Files and Compilation Rules
# ==============================================================================
ifeq ($(fronthaul_option),cpri)
DEFINES += DISTRIBUTED_BS
else ifeq ($(fronthaul_option),ecpri)
DEFINES += ECPRI_DISTRIBUTED_BS
else ifeq ($(fronthaul_option),jesd)
DEFINES += INTEGRATED_BS
else
$(info "error fronthaul_option=" $(fronthaul_option))
endif
#ifeq ($(fronthaul_option),ecpri)
# DEFINES += ECPRI_DISTRIBUTED_BS
#else
# $(info "error fronthaul_option=" $(fronthaul_option))
#endif
include $(MAKE_DIR)/makefile.common

97
public/make/rfm-spu0-noCache.ld
View File

@ -1,97 +0,0 @@
ENTRY( __ucps2_init ) ;
PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_dstack_bottom = (0x220000 - 0x40)) ;/* DM0 */
PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_d0heap_bottom = 0x220000) ;
PROVIDE(__ucps2_d1heap_bottom = 0x260000) ;
PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
PROVIDE(__ucps2_d7heap_bottom = 0x400000) ;
/****************************************************************
* The segments definition, which affect the load address of the
* elf.
*/
PHDRS {
TEXT PT_LOAD;
DATA PT_LOAD;
RODATA PT_LOAD;
DM0 PT_LOAD;
DM1 PT_LOAD;
}
/* All text code & data are in IM */
SECTIONS {
/* All .text & .data & .bss are located in IM */
. = 0x000000;
.text : { *(.text.start)
ASSERT((. <= 0x40000), "Error: No room for SPU start .text");
} : TEXT
.text : { *(.text*)
ASSERT((. <= 0x40000), "Error: No room for SPU's .text");
} : TEXT
/* tag start point for bss */
__ucps2_bss_start = ALIGN(0x4);
.sbss : { *(.sbss.1*) } : DATA
.sbss : { *(.sbss.2*) } : DATA
.sbss : { *(.sbss.4*) } : DATA
.sbss : { *(.sbss.8*) } : DATA
.sbss : { *(.sbss*)
ASSERT((. <= 0x40000), "Error: No room for .sbss");
} : DATA
.bss : { *(.bss*)
ASSERT((. <= 0x40000), "Error: No room for .bss");
} : DATA
__ucps2_bss_end = ALIGN(0x4);
.sdata : { *(.sdata.1*) } : DATA
.sdata : { *(.sdata.2*) } : DATA
.sdata : { *(.sdata.4*) } : DATA
.sdata : { *(.sdata.8*) } : DATA
.sdata : { *(.sdata*)
ASSERT((. <= 0x40000), "Error: No room for .sdata");
} : DATA
.rodata : { *(.rodata*)
ASSERT((. <= 0x40000), "Error: No room for .rodata");
} : RODATA
HIDDEN(__section_end = ALIGN(4));
/* tag start point for heap */
__ucps2_heap_start = ALIGN(0x8);
/********************************************/
. = 0x200000;
HIDDEN(__section_start = .);
.DM0 : { *( .DM0 )
ASSERT((. <= 0x220000), "Error: No room for .DM0");
} : DM0
HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
/* tag start point for heap in DM0 */
__ucps2_d0heap_start = ALIGN(0x8);
. = 0x240000;
HIDDEN(__section_start = .);
.DM1 : { *( .DM1 )
ASSERT((. <= 0x260000), "Error: No room for .DM1");
} : DM1
HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
/* tag start point for heap in DM1 */
__ucps2_d1heap_start = ALIGN(0x8);
__ucps2_d2heap_start = 0x2c0000;
__ucps2_d3heap_start = 0x300000;
__ucps2_d4heap_start = 0x340000;
__ucps2_d5heap_start = 0x380000;
__ucps2_d6heap_start = 0x3c0000;
__ucps2_d7heap_start = 0x400000;
HIDDEN(__section_start = 0xffffffff);
HIDDEN(__section_end = 0xffffffff);
}

108
public/make/rfm-spu1-Cache128.ld
View File

@ -1,108 +0,0 @@
ENTRY( __ucps2_init ) ;
PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_dstack_bottom = (0x260000 - 0x40)) ;/* DM1 */
PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_d0heap_bottom = 0x220000) ;
PROVIDE(__ucps2_d1heap_bottom = 0x260000) ;
PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
PROVIDE(__ucps2_d7heap_bottom = 0x400000) ;
#CORE(ecs_rfm1);
CACHE_SIZE(128);
/****************************************************************
* The segments definition, which affect the load address of the
* elf.
*/
PHDRS {
DATA PT_LOAD;
RODATA PT_LOAD;
DM0 PT_LOAD;
DM1 PT_LOAD;
TEXT PT_LOAD;
DDR0 PT_LOAD;
}
/* All text code & data are in IM */
SECTIONS {
. = 0x20000; /* icache size: 128KB */
/* tag start point for bss */
__ucps2_bss_start = ALIGN(0x4);
.sbss : { *(.sbss.1*) } : DATA
.sbss : { *(.sbss.2*) } : DATA
.sbss : { *(.sbss.4*) } : DATA
.sbss : { *(.sbss.8*) } : DATA
.sbss : { *(.sbss*)
ASSERT((. <= 0x40000), "Error: No room for .sbss");
} : DATA
.bss : { *(.bss*)
ASSERT((. <= 0x40000), "Error: No room for .bss");
} : DATA
__ucps2_bss_end = ALIGN(0x4);
.sdata : { *(.sdata.1*) } : DATA
.sdata : { *(.sdata.2*) } : DATA
.sdata : { *(.sdata.4*) } : DATA
.sdata : { *(.sdata.8*) } : DATA
.sdata : { *(.sdata*)
ASSERT((. <= 0x40000), "Error: No room for .sdata");
} : DATA
.rodata : { *(.rodata*)
ASSERT((. <= 0x40000), "Error: No room for .rodata");
} : RODATA
HIDDEN(__section_end = ALIGN(4));
/* tag start point for heap */
__ucps2_heap_start = ALIGN(0x8);
/********************************************/
. = 0x200000;
HIDDEN(__section_start = .);
.DM0 : { *( .DM0 )
ASSERT((. <= 0x220000), "Error: No room for .DM0");
} : DM0
HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
/* tag start point for heap in DM0 */
__ucps2_d0heap_start = ALIGN(0x8);
. = 0x240000;
HIDDEN(__section_start = .);
.DM1 : { *( .DM1 )
ASSERT((. <= 0x260000), "Error: No room for .DM1");
} : DM1
HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
/* tag start point for heap in DM1 */
__ucps2_d1heap_start = ALIGN(0x8);
__ucps2_d2heap_start = 0x2c0000;
__ucps2_d3heap_start = 0x300000;
__ucps2_d4heap_start = 0x340000;
__ucps2_d5heap_start = 0x380000;
__ucps2_d6heap_start = 0x3c0000;
__ucps2_d7heap_start = 0x400000;
. = 0x9fe00000;
.text : { *(.text.start)
ASSERT((. <= 0xa0000000), "Error: No room for SPU start .text");
} : TEXT
.text : { *(.text*)
ASSERT((. <= 0xa0000000), "Error: No room for SPU's .text");
} : TEXT
. = 0xb3e00000;
.ddr0 : { *(.DDR0)
ASSERT((. <= 0xb4200000), "Error: No room for DDR0 section");
} : DDR0
HIDDEN(__section_start = 0xffffffff);
HIDDEN(__section_end = 0xffffffff);
}

101
public/make/rfm-spu1-noCache.ld
View File

@ -1,101 +0,0 @@
ENTRY( __ucps2_init ) ;
PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_dstack_bottom = (0x260000 - 0x40)) ;/* DM1 */
PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
PROVIDE(__ucps2_d0heap_bottom = 0x220000) ;
PROVIDE(__ucps2_d1heap_bottom = 0x260000) ;
PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
PROVIDE(__ucps2_d7heap_bottom = 0x400000) ;
/****************************************************************
* The segments definition, which affect the load address of the
* elf.
*/
PHDRS {
TEXT PT_LOAD;
DATA PT_LOAD;
RODATA PT_LOAD;
DM0 PT_LOAD;
DM1 PT_LOAD;
DDR0 PT_LOAD;
}
/* All text code & data are in IM */
SECTIONS {
/* All .text & .data & .bss are located in IM */
. = 0x000000;
.text : { *(.text.start)
ASSERT((. <= 0x40000), "Error: No room for SPU start .text");
} : TEXT
.text : { *(.text*)
ASSERT((. <= 0x40000), "Error: No room for SPU's .text");
} : TEXT
/* tag start point for bss */
__ucps2_bss_start = ALIGN(0x4);
.sbss : { *(.sbss.1*) } : DATA
.sbss : { *(.sbss.2*) } : DATA
.sbss : { *(.sbss.4*) } : DATA
.sbss : { *(.sbss.8*) } : DATA
.sbss : { *(.sbss*)
ASSERT((. <= 0x40000), "Error: No room for .sbss");
} : DATA
.bss : { *(.bss*)
ASSERT((. <= 0x40000), "Error: No room for .bss");
} : DATA
__ucps2_bss_end = ALIGN(0x4);
.sdata : { *(.sdata.1*) } : DATA
.sdata : { *(.sdata.2*) } : DATA
.sdata : { *(.sdata.4*) } : DATA
.sdata : { *(.sdata.8*) } : DATA
.sdata : { *(.sdata*)
ASSERT((. <= 0x40000), "Error: No room for .sdata");
} : DATA
.rodata : { *(.rodata*)
ASSERT((. <= 0x40000), "Error: No room for .rodata");
} : RODATA
HIDDEN(__section_end = ALIGN(4));
/* tag start point for heap */
__ucps2_heap_start = ALIGN(0x8);
/********************************************/
. = 0x200000;
HIDDEN(__section_start = .);
.DM0 : { *( .DM0 )
ASSERT((. <= 0x220000), "Error: No room for .DM0");
} : DM0
HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
/* tag start point for heap in DM0 */
__ucps2_d0heap_start = ALIGN(0x8);
. = 0x240000;
HIDDEN(__section_start = .);
.DM1 : { *( .DM1 )
ASSERT((. <= 0x260000), "Error: No room for .DM1");
} : DM1
HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
/* tag start point for heap in DM1 */
__ucps2_d1heap_start = ALIGN(0x8);
__ucps2_d2heap_start = 0x2c0000;
__ucps2_d3heap_start = 0x300000;
__ucps2_d4heap_start = 0x340000;
__ucps2_d5heap_start = 0x380000;
__ucps2_d6heap_start = 0x3c0000;
__ucps2_d7heap_start = 0x400000;
. = 0xb3e00000;
.ddr0 : { *(.DDR0)
ASSERT((. <= 0xb4200000), "Error: No room for DDR0 section");
} : DDR0
HIDDEN(__section_start = 0xffffffff);
HIDDEN(__section_end = 0xffffffff);
}