Merge branch 'dev_ck_v2.1_NewFeature#1989' into 'dev_ck_v2.1'

CPRI 25G速率RS-FEC初始化时可配置功能入库

See merge request ucp/driver/ucp4008_platform_spu!117
This commit is contained in:
Weihua Li 2024-06-12 02:21:25 +00:00
commit 3ddce96528
25 changed files with 91 additions and 65 deletions

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@ -28,6 +28,13 @@ typedef enum _tagCpriOptionID
CPRI_OPTION_10 = 10 CPRI_OPTION_10 = 10
}CpriOptID; }CpriOptID;
// cpri ctrl选项
typedef enum _tagCpriCtrlType
{
CPRI_RS_FEC_DISABLE = 0,
CPRI_RS_FEC_ENABLE = 1,
}CpriCtrlType;
// cpri map模式 // cpri map模式
typedef enum _tagCpriMapType typedef enum _tagCpriMapType
{ {
@ -37,7 +44,6 @@ typedef enum _tagCpriMapType
OTIC_MAP_8NR_8LTE //option10,2个4T4R的NR小区 + 4个2T2R的LTE小区 OTIC_MAP_8NR_8LTE //option10,2个4T4R的NR小区 + 4个2T2R的LTE小区
}CpriMapType; }CpriMapType;
// ecpri option模式决定接口速率 // ecpri option模式决定接口速率
typedef enum _tagEcpriOptionID typedef enum _tagEcpriOptionID
{ {
@ -50,6 +56,7 @@ typedef struct _tagFrontHaulDrvPara
uint32_t protocolSel; // numProtoID uint32_t protocolSel; // numProtoID
uint32_t rateOption; // CpriOptID/EcpriOptID uint32_t rateOption; // CpriOptID/EcpriOptID
uint32_t mapOption; // CpriMapType uint32_t mapOption; // CpriMapType
uint32_t ctrlOption; // ctrlOption
}stFrontHaulDrvPara; }stFrontHaulDrvPara;
typedef enum _tagScsID typedef enum _tagScsID

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@ -99,6 +99,7 @@
#define MTIMER_INTEGRATED_MAX_NUM 4 #define MTIMER_INTEGRATED_MAX_NUM 4
#define MTIMER_DISTRIBUTED_MAX_NUM 2 #define MTIMER_DISTRIBUTED_MAX_NUM 2
typedef enum _tagScsId typedef enum _tagScsId
{ {
SCS_1st_MTIMER_ID = 0, SCS_1st_MTIMER_ID = 0,
@ -153,6 +154,13 @@ typedef enum _tagCpriOptionID
CPRI_OPTION_10 = 10 CPRI_OPTION_10 = 10
}CpriOptID; }CpriOptID;
// cpri ctrl选项
typedef enum _tagCpriCtrlType
{
CPRI_RS_FEC_DISABLE = 0,
CPRI_RS_FEC_ENABLE = 1,
}CpriCtrlType;
typedef enum _tagEcpriOptionID typedef enum _tagEcpriOptionID
{ {
ECPRI_OPTION_10G = 10, ECPRI_OPTION_10G = 10,
@ -215,6 +223,7 @@ typedef struct _tagFrontHaulDrvPara
uint32_t protocolSel; // numProtoID uint32_t protocolSel; // numProtoID
uint32_t rateOption; // CpriOptID/EcpriOptID uint32_t rateOption; // CpriOptID/EcpriOptID
uint32_t mapOption; // CpriMapType uint32_t mapOption; // CpriMapType
uint32_t ctrlOption; // ctrlOption
}stFrontHaulDrvPara; }stFrontHaulDrvPara;
typedef struct phy_timer_config_ind_t typedef struct phy_timer_config_ind_t

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@ -1,23 +1,23 @@
/********************************************************************* /*********************************************************************
* *
* Filename: hw_cpri.h * Filename: hw_cpri.h
* *
* Created: 2022-05-5 05:20:34 PM * Created: 2022-05-5 05:20:34 PM
* Last Modified: 2022-05-5 05:20:34 PM * Last Modified: 2022-05-5 05:20:34 PM
* Author: xinxin.li * Author: xinxin.li
* Organization: Beijing Smart Logic Technology Co., Ltd. * Organization: Beijing Smart Logic Technology Co., Ltd.
* *
* Description: * Description:
* *
* *
********************************************************************/ ********************************************************************/
#ifndef __HW_CPRI_H__ #ifndef __HW_CPRI_H__
#define __HW_CPRI_H__ #define __HW_CPRI_H__
#include "typedef.h" #include "typedef.h"
typedef struct _tagCpriPara typedef struct _tagCpriPara
{ {
uint32_t option_num; uint32_t option_num;
@ -61,39 +61,39 @@ typedef struct _tagCpriIntStat
//uint32_t gScrRxRfpValH; //uint32_t gScrRxRfpValH;
}stCpriIntStat; }stCpriIntStat;
typedef struct typedef struct
{ {
uint32_t cmd32l; uint32_t cmd32l;
uint32_t cmd14h; uint32_t cmd14h;
}stCpriCsuCmd; }stCpriCsuCmd;
typedef struct
{
uint32_t cmd_num;
stCpriCsuCmd cmd[10];
}stCpriCsuCmdFifo;
typedef struct
{
uint32_t cmdFifo_num;
stCpriCsuCmdFifo cmdFifo[8];
}stCpriCsuCmdFifoInfo;
void cpri_init(uint32_t option,uint32_t MappingMode);
void cpri_ecprimode_init(); typedef struct
{
uint32_t cmd_num;
stCpriCsuCmd cmd[10];
}stCpriCsuCmdFifo;
typedef struct
{
uint32_t cmdFifo_num;
stCpriCsuCmdFifo cmdFifo[8];
}stCpriCsuCmdFifoInfo;
void cpri_init(uint32_t option,uint32_t MappingMode, uint32_t ctrl);
void cpri_ecprimode_init();
// cpri参数初始化 // cpri参数初始化
void cpri_para_init(uint32_t option); void cpri_para_init(uint32_t option);
void cpri_int_init(void); void cpri_int_init(void);
void isr_cpri_int(void); void isr_cpri_int(void);
void isr_gmac_int(void); void isr_gmac_int(void);
void HeaderTxRam_init(); void HeaderTxRam_init();
#endif #endif

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@ -17,7 +17,7 @@
/* --------------------------------------------------- <DEF&DEC> --------------------------------------------------- */ /* --------------------------------------------------- <DEF&DEC> --------------------------------------------------- */
extern void cpri_link_init(uint32_t option); extern void cpri_link_init(uint32_t option, uint32_t ctrl);
extern void ecpri_cprimode_init(void); extern void ecpri_cprimode_init(void);
@ -340,7 +340,7 @@ void cpri_int_init(void)
* return: none * return: none
* others: none * others: none
**********************************************************************************************************************/ **********************************************************************************************************************/
void cpri_init(uint32_t option, uint32_t mode) void cpri_init(uint32_t option, uint32_t mode, uint32_t ctrl)
{ {
#ifdef PALLADIUM_TEST #ifdef PALLADIUM_TEST
@ -381,7 +381,7 @@ void cpri_init(uint32_t option, uint32_t mode)
debug_write((DBG_DDR_IDX_DRV_BASE + 2 + (apeId << 2)), flag++); debug_write((DBG_DDR_IDX_DRV_BASE + 2 + (apeId << 2)), flag++);
#endif #endif
cpri_link_init(option); cpri_link_init(option, ctrl);
UCP_PRINT_EMPTY("cpri link init finished.\r\n"); UCP_PRINT_EMPTY("cpri link init finished.\r\n");
#ifdef PALLADIUM_TEST #ifdef PALLADIUM_TEST
debug_write((DBG_DDR_IDX_DRV_BASE + 2 + (apeId << 2)), flag++); debug_write((DBG_DDR_IDX_DRV_BASE + 2 + (apeId << 2)), flag++);

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@ -1043,7 +1043,7 @@ void cpri_pma_eq(void)
* return: none * return: none
* others: none * others: none
**********************************************************************************************************************/ **********************************************************************************************************************/
void cpri_link_init(uint32_t option) void cpri_link_init(uint32_t option, uint32_t ctrl)
{ {
do_write(&JECS_CTRL_PROTOCOL_SEL, do_read_volatile(&JECS_CTRL_PROTOCOL_SEL)|BIT4); do_write(&JECS_CTRL_PROTOCOL_SEL, do_read_volatile(&JECS_CTRL_PROTOCOL_SEL)|BIT4);
@ -1145,12 +1145,13 @@ void cpri_link_init(uint32_t option)
do_write(&CPRI_PCS_CTRL_CFG, 0x2); do_write(&CPRI_PCS_CTRL_CFG, 0x2);
__ucps2_synch(f_SM); __ucps2_synch(f_SM);
#if 1 if((ctrl&BIT0) == 1)
do_write(&CPRI_PCS_ADDR_CFG, 0x320); {
do_write(&CPRI_PCS_DATA_TX_CFG, BIT2); // enable rs-fec do_write(&CPRI_PCS_ADDR_CFG, 0x320);
do_write(&CPRI_PCS_CTRL_CFG, 0x2); do_write(&CPRI_PCS_DATA_TX_CFG, BIT2); // enable rs-fec
__ucps2_synch(f_SM); do_write(&CPRI_PCS_CTRL_CFG, 0x2);
#endif __ucps2_synch(f_SM);
}
core_clk_xtal_to_normal(); core_clk_xtal_to_normal();

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@ -183,7 +183,7 @@ int32_t fronthaul_drv_cfg(stFrontHaulDrvPara* pFhDrvPara)
{ {
if (PROTOCOL_CPRI == pFhDrvPara->protocolSel) if (PROTOCOL_CPRI == pFhDrvPara->protocolSel)
{ {
cpri_init(pFhDrvPara->rateOption, pFhDrvPara->mapOption); cpri_init(pFhDrvPara->rateOption, pFhDrvPara->mapOption, pFhDrvPara->ctrlOption);
} }
else if (PROTOCOL_ECPRI == pFhDrvPara->protocolSel) else if (PROTOCOL_ECPRI == pFhDrvPara->protocolSel)
{ {

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@ -642,6 +642,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_8; fhDrvPara.rateOption = CPRI_OPTION_8;
fhDrvPara.mapOption = OTIC_MAP_FIGURE12; fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -294,6 +294,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_8; fhDrvPara.rateOption = CPRI_OPTION_8;
fhDrvPara.mapOption = OTIC_MAP_FIGURE12; fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -295,6 +295,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_8; fhDrvPara.rateOption = CPRI_OPTION_8;
fhDrvPara.mapOption = OTIC_MAP_FIGURE12; fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -295,6 +295,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_8; fhDrvPara.rateOption = CPRI_OPTION_8;
fhDrvPara.mapOption = OTIC_MAP_FIGURE12; fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -551,6 +551,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_8; fhDrvPara.rateOption = CPRI_OPTION_8;
fhDrvPara.mapOption = OTIC_MAP_FIGURE10; fhDrvPara.mapOption = OTIC_MAP_FIGURE10;
fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10); cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10, CPRI_RS_FEC_DISABLE);
return 0; return 0;
} }

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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10); cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10, CPRI_RS_FEC_DISABLE);
return 0; return 0;
} }

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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10); cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10, CPRI_RS_FEC_DISABLE);
return 0; return 0;
} }

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@ -660,6 +660,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_10; fhDrvPara.rateOption = CPRI_OPTION_10;
fhDrvPara.mapOption = OTIC_MAP_FIGURE16; fhDrvPara.mapOption = OTIC_MAP_FIGURE16;
fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16); cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16, CPRI_RS_FEC_ENABLE);
return 0; return 0;
} }

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@ -66,8 +66,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16); cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16, CPRI_RS_FEC_ENABLE);
return 0; return 0;
} }

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@ -415,6 +415,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_8; fhDrvPara.rateOption = CPRI_OPTION_8;
fhDrvPara.mapOption = OTIC_MAP_FIGURE12; fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的 cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
return 0; return 0;
} }

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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的 cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
return 0; return 0;
} }

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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的 cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
return 0; return 0;
} }

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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
int32_t fh_drv_init(void) int32_t fh_drv_init(void)
{ {
cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的 cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
return 0; return 0;
} }

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@ -416,6 +416,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_10; fhDrvPara.rateOption = CPRI_OPTION_10;
fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE; fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE;
fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -236,6 +236,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_10; fhDrvPara.rateOption = CPRI_OPTION_10;
fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE; fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE;
fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;

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@ -236,6 +236,7 @@ int32_t fh_drv_init(void)
fhDrvPara.protocolSel = PROTOCOL_CPRI; fhDrvPara.protocolSel = PROTOCOL_CPRI;
fhDrvPara.rateOption = CPRI_OPTION_10; fhDrvPara.rateOption = CPRI_OPTION_10;
fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE; fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE;
fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
fronthaul_drv_cfg(&fhDrvPara); fronthaul_drv_cfg(&fhDrvPara);
return 0; return 0;