Merge branch 'dev_ck_v2.1_NewFeature#1989' into 'dev_ck_v2.1'
CPRI 25G速率RS-FEC初始化时可配置功能入库 See merge request ucp/driver/ucp4008_platform_spu!117
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3ddce96528
@ -28,6 +28,13 @@ typedef enum _tagCpriOptionID
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CPRI_OPTION_10 = 10
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}CpriOptID;
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// cpri ctrl选项
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typedef enum _tagCpriCtrlType
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{
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CPRI_RS_FEC_DISABLE = 0,
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CPRI_RS_FEC_ENABLE = 1,
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}CpriCtrlType;
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// cpri map模式
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typedef enum _tagCpriMapType
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{
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@ -37,7 +44,6 @@ typedef enum _tagCpriMapType
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OTIC_MAP_8NR_8LTE //option10,2个4T4R的NR小区 + 4个2T2R的LTE小区
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}CpriMapType;
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// ecpri option模式,决定接口速率
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typedef enum _tagEcpriOptionID
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{
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@ -50,6 +56,7 @@ typedef struct _tagFrontHaulDrvPara
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uint32_t protocolSel; // numProtoID
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uint32_t rateOption; // CpriOptID/EcpriOptID
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uint32_t mapOption; // CpriMapType
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uint32_t ctrlOption; // ctrlOption
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}stFrontHaulDrvPara;
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typedef enum _tagScsID
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@ -99,6 +99,7 @@
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#define MTIMER_INTEGRATED_MAX_NUM 4
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#define MTIMER_DISTRIBUTED_MAX_NUM 2
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typedef enum _tagScsId
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{
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SCS_1st_MTIMER_ID = 0,
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@ -153,6 +154,13 @@ typedef enum _tagCpriOptionID
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CPRI_OPTION_10 = 10
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}CpriOptID;
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// cpri ctrl选项
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typedef enum _tagCpriCtrlType
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{
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CPRI_RS_FEC_DISABLE = 0,
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CPRI_RS_FEC_ENABLE = 1,
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}CpriCtrlType;
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typedef enum _tagEcpriOptionID
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{
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ECPRI_OPTION_10G = 10,
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@ -215,6 +223,7 @@ typedef struct _tagFrontHaulDrvPara
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uint32_t protocolSel; // numProtoID
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uint32_t rateOption; // CpriOptID/EcpriOptID
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uint32_t mapOption; // CpriMapType
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uint32_t ctrlOption; // ctrlOption
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}stFrontHaulDrvPara;
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typedef struct phy_timer_config_ind_t
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@ -80,7 +80,7 @@ typedef struct
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}stCpriCsuCmdFifoInfo;
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void cpri_init(uint32_t option,uint32_t MappingMode);
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void cpri_init(uint32_t option,uint32_t MappingMode, uint32_t ctrl);
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void cpri_ecprimode_init();
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@ -17,7 +17,7 @@
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/* --------------------------------------------------- <DEF&DEC> --------------------------------------------------- */
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extern void cpri_link_init(uint32_t option);
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extern void cpri_link_init(uint32_t option, uint32_t ctrl);
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extern void ecpri_cprimode_init(void);
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@ -340,7 +340,7 @@ void cpri_int_init(void)
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* return: none
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* others: none
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**********************************************************************************************************************/
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void cpri_init(uint32_t option, uint32_t mode)
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void cpri_init(uint32_t option, uint32_t mode, uint32_t ctrl)
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{
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#ifdef PALLADIUM_TEST
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@ -381,7 +381,7 @@ void cpri_init(uint32_t option, uint32_t mode)
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debug_write((DBG_DDR_IDX_DRV_BASE + 2 + (apeId << 2)), flag++);
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#endif
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cpri_link_init(option);
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cpri_link_init(option, ctrl);
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UCP_PRINT_EMPTY("cpri link init finished.\r\n");
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#ifdef PALLADIUM_TEST
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debug_write((DBG_DDR_IDX_DRV_BASE + 2 + (apeId << 2)), flag++);
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@ -1043,7 +1043,7 @@ void cpri_pma_eq(void)
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* return: none
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* others: none
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**********************************************************************************************************************/
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void cpri_link_init(uint32_t option)
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void cpri_link_init(uint32_t option, uint32_t ctrl)
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{
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do_write(&JECS_CTRL_PROTOCOL_SEL, do_read_volatile(&JECS_CTRL_PROTOCOL_SEL)|BIT4);
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@ -1145,12 +1145,13 @@ void cpri_link_init(uint32_t option)
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do_write(&CPRI_PCS_CTRL_CFG, 0x2);
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__ucps2_synch(f_SM);
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#if 1
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if((ctrl&BIT0) == 1)
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{
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do_write(&CPRI_PCS_ADDR_CFG, 0x320);
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do_write(&CPRI_PCS_DATA_TX_CFG, BIT2); // enable rs-fec
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do_write(&CPRI_PCS_CTRL_CFG, 0x2);
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__ucps2_synch(f_SM);
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#endif
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}
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core_clk_xtal_to_normal();
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@ -183,7 +183,7 @@ int32_t fronthaul_drv_cfg(stFrontHaulDrvPara* pFhDrvPara)
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{
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if (PROTOCOL_CPRI == pFhDrvPara->protocolSel)
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{
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cpri_init(pFhDrvPara->rateOption, pFhDrvPara->mapOption);
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cpri_init(pFhDrvPara->rateOption, pFhDrvPara->mapOption, pFhDrvPara->ctrlOption);
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}
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else if (PROTOCOL_ECPRI == pFhDrvPara->protocolSel)
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{
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@ -642,6 +642,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_8;
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fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -294,6 +294,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_8;
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fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -295,6 +295,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_8;
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fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -295,6 +295,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_8;
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fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -551,6 +551,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_8;
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fhDrvPara.mapOption = OTIC_MAP_FIGURE10;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10);
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10, CPRI_RS_FEC_DISABLE);
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return 0;
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}
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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10);
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10, CPRI_RS_FEC_DISABLE);
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return 0;
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}
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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10);
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE10, CPRI_RS_FEC_DISABLE);
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return 0;
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}
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@ -660,6 +660,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_10;
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fhDrvPara.mapOption = OTIC_MAP_FIGURE16;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -66,7 +66,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16);
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cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16, CPRI_RS_FEC_ENABLE);
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return 0;
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}
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@ -66,8 +66,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16);
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cpri_init(CPRI_OPTION_10, OTIC_MAP_FIGURE16, CPRI_RS_FEC_ENABLE);
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return 0;
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}
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@ -415,6 +415,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_8;
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fhDrvPara.mapOption = OTIC_MAP_FIGURE12;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_DISABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
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return 0;
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}
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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
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return 0;
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}
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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
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return 0;
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}
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@ -64,7 +64,7 @@ int32_t fh_data_init(void)
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int32_t fh_drv_init(void)
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{
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12);//NR TDD和FDD的mapping是一样的
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cpri_init(CPRI_OPTION_8, OTIC_MAP_FIGURE12, CPRI_RS_FEC_DISABLE);//NR TDD和FDD的mapping是一样的
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return 0;
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}
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@ -416,6 +416,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_10;
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fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -236,6 +236,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_10;
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fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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@ -236,6 +236,7 @@ int32_t fh_drv_init(void)
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fhDrvPara.protocolSel = PROTOCOL_CPRI;
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fhDrvPara.rateOption = CPRI_OPTION_10;
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fhDrvPara.mapOption = OTIC_MAP_8NR_8LTE;
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fhDrvPara.ctrlOption = CPRI_RS_FEC_ENABLE;
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fronthaul_drv_cfg(&fhDrvPara);
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return 0;
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