jinhong/YB_Platform
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

1. add 10ms trigger for sniffer before cell building;

Browse Source 
2. int cost modify: 4us to 3.5us;
3. modify case41: NR FDD 15K, 122.88M, 40M, test ok;
This commit is contained in:
xinxin.li 2023-12-22 16:37:58 +08:00
parent 2280641528
commit 4655f82bf0
12 changed files with 736839 additions and 245294 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
public/common/driver/inc/mtimer_com.h
View File

@ -4,7 +4,7 @@
#define APE_NUM (8) //4 #define APE_NUM (8) //4
#define FIBER_MIN_DELAY 2 // 10 // #define FIBER_MIN_DELAY 2 // 10 //
#define INT_DELAY 4 // 6 // // us #define INT_DELAY 3.5 // 4 // 6 // // us
#define EDMA_OFFSET 10 // 6 // 8 // 2 // us #define EDMA_OFFSET 10 // 6 // 8 // 2 // us
#define CPRI_RE_TOFFSET 0 // 100 // 200 // ns // Toffset, to be change #define CPRI_RE_TOFFSET 0 // 100 // 200 // ns // Toffset, to be change

4
public/ecs_rfm_spu1/driver/inc/jesd_csu_lte_fdd.h
View File

@ -4,14 +4,14 @@
#include "typedef.h" #include "typedef.h"
// 4 ant, LTE // 4 ant, LTE
#define JESD_LTEFDD_ANT_NUM 2 #define JESD_LTEFDD_ANT_NUM 4 // 2
#define JESD_LTEFDD_MARGIN 5 #define JESD_LTEFDD_MARGIN 5
#define JESD_LTEFDD_SLOT_NUM 10 #define JESD_LTEFDD_SLOT_NUM 10
#define JESD_LTEFDD_TX_NODENUM 10 #define JESD_LTEFDD_TX_NODENUM 10
#define JESD_LTEFDD_RX_NODENUM 10 #define JESD_LTEFDD_RX_NODENUM 10
#define JESD_LTEFDD_SUBFRAME_SAM_CNT 61440 #define JESD_LTEFDD_SUBFRAME_SAM_CNT 61440
#define JESD_LTEFDD_TX_LIST_ADDR 0x8A000000 #define JESD_LTEFDD_TX_LIST_ADDR 0x8A000000
#define JESD_LTEFDD_RX_LIST_ADDR 0x8A008000 #define JESD_LTEFDD_RX_LIST_ADDR 0x8A008000

10
public/ecs_rfm_spu1/driver/inc/jesd_csu_nr_fdd.h
View File

@ -11,7 +11,7 @@
#define JESD_NRFDD_TX_NODENUM 10 #define JESD_NRFDD_TX_NODENUM 10
#define JESD_NRFDD_RX_NODENUM 10 #define JESD_NRFDD_RX_NODENUM 10
#define JESD_NRFDD_SLOT_SAM_CNT 61440 #define JESD_NRFDD_SLOT_SAM_CNT 122880
#define JESD_NRFDD_TX_LIST_ADDR 0x8A000000 // 0x0a4f4000// #define JESD_NRFDD_TX_LIST_ADDR 0x8A000000 // 0x0a4f4000//
#define JESD_NRFDD_RX_LIST_ADDR 0x8A008000 // 0x0a4f4800// #define JESD_NRFDD_RX_LIST_ADDR 0x8A008000 // 0x0a4f4800//
@ -23,12 +23,12 @@
#define JESD_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR 0xA380000 // SM5 #define JESD_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR 0xA380000 // SM5
#define JESD_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR 0xA290400 // SM4 #define JESD_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR 0xA290400 // SM4
#else #else
#define JESD_NRFDD_TX_SLOT_EVEN_DATA_ADDR 0x60F00000 // 0xF0000 #define JESD_NRFDD_TX_SLOT_EVEN_DATA_ADDR 0x60F00000 // 0x1E0000
#define JESD_NRFDD_TX_SLOT_ODD_DATA_ADDR 0x60FF0000 // 0xF0000 #define JESD_NRFDD_TX_SLOT_ODD_DATA_ADDR 0x610E0000 // 0x1E0000
#endif #endif
#define JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR 0x6BC00000 // 0x9F00000 // 0xF0000 #define JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR 0x6BC00000 // 0x9F00000 // 0x1E0000
#define JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR 0x6BCF0000 // 0xA380000 // 0xF0000 #define JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR 0x6BDE0000 // 0xA380000 // 0x1E0000
int32_t jesd_csu_init_nr_fdd(); int32_t jesd_csu_init_nr_fdd();

8
public/ecs_rfm_spu1/driver/src/jesd_csu_lte_fdd.s.c
View File

@ -20,21 +20,21 @@ int32_t jesd_csu_init_lte_fdd()
{ {
txCsuNode[i].dataAddr = JESD_LTEFDD_TX_SLOT_EVEN_DATA_ADDR; txCsuNode[i].dataAddr = JESD_LTEFDD_TX_SLOT_EVEN_DATA_ADDR;
txCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2); txCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2);
txCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<3); txCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2)*JESD_LTEFDD_ANT_NUM;
rxCsuNode[i].dataAddr = JESD_LTEFDD_RX_SLOT_EVEN_DATA_ADDR; rxCsuNode[i].dataAddr = JESD_LTEFDD_RX_SLOT_EVEN_DATA_ADDR;
rxCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2); rxCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2);
rxCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<3); rxCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2)*JESD_LTEFDD_ANT_NUM;
} }
else if (1 == (i&0x1)) else if (1 == (i&0x1))
{ {
txCsuNode[i].dataAddr = JESD_LTEFDD_TX_SLOT_ODD_DATA_ADDR; txCsuNode[i].dataAddr = JESD_LTEFDD_TX_SLOT_ODD_DATA_ADDR;
txCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2); txCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2);
txCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<3); txCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2)*JESD_LTEFDD_ANT_NUM;
rxCsuNode[i].dataAddr = JESD_LTEFDD_RX_SLOT_ODD_DATA_ADDR; rxCsuNode[i].dataAddr = JESD_LTEFDD_RX_SLOT_ODD_DATA_ADDR;
rxCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2); rxCsuNode[i].yStep = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2);
rxCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<3); rxCsuNode[i].allNum = (JESD_LTEFDD_SUBFRAME_SAM_CNT<<2)*JESD_LTEFDD_ANT_NUM;
} }
} }

15
public/ecs_rfm_spu1/driver/src/jesd_timer.s.c
View File

@ -120,9 +120,9 @@ int32_t jesd_mtimer_init(int32_t nTmrId, int32_t nScsId, int32_t nTddSlotNum)
memset(pMtimerSfn, 0, sizeof(stMtimerPhyPara)); memset(pMtimerSfn, 0, sizeof(stMtimerPhyPara));
memset(pMtimerCalPara, 0, sizeof(stMtimerSfnCal)); memset(pMtimerCalPara, 0, sizeof(stMtimerSfnCal));
jesd_delay_init();
if (MTIMER_JESD_RX0_ID == nTmrId) if (MTIMER_JESD_RX0_ID == nTmrId)
{ {
jesd_delay_init();
mtimer_para_init(MTIMER_JESD_RX0_ID, nScsId, nTddSlotNum); mtimer_para_init(MTIMER_JESD_RX0_ID, nScsId, nTddSlotNum);
mtimer_para_init(MTIMER_JESD_TX0_ID, nScsId, nTddSlotNum); mtimer_para_init(MTIMER_JESD_TX0_ID, nScsId, nTddSlotNum);
} }
@ -1259,6 +1259,19 @@ void jesd_10ms_callback(uint8_t nTmrId)
pMtimerInt->sfnOffsetIntCnt++; pMtimerInt->sfnOffsetIntCnt++;
#ifdef PALLADIUM_TEST #ifdef PALLADIUM_TEST
debug_write((DBG_DDR_IDX_DRV_BASE+64+3+(nTmrId<<2)), pMtimerInt->sfnOffsetIntCnt); // 0x10C debug_write((DBG_DDR_IDX_DRV_BASE+64+3+(nTmrId<<2)), pMtimerInt->sfnOffsetIntCnt); // 0x10C
#endif
#if 1
if ((MTIMER_JESD_RX0_ID == nTmrId) && (0 == pMtimerInt->txSlotIntCnt))
{
if (0 == (pMtimerInt->sfnOffsetIntCnt&0x1))
{
set_trigger_state(GPIO_ON);
}
else
{
set_trigger_state(GPIO_OFF);
}
}
#endif #endif
if ((MTIMER_JESD_RX0_ID == nTmrId) && (0 == (pMtimerInt->sfnOffsetIntCnt&0x3))) if ((MTIMER_JESD_RX0_ID == nTmrId) && (0 == (pMtimerInt->sfnOffsetIntCnt&0x3)))
{ {

3
public/ecs_rfm_spu1/driver/src/mtimer_cal.s.c
View File

@ -207,8 +207,9 @@ int32_t mtimer_orx_adjust(void)
if (1 == orx_para_ptr->orx_start_flag) if (1 == orx_para_ptr->orx_start_flag)
{ {
start_jesd_orx_timer(); //start_jesd_orx_timer();
jesd_csu_orx_start(0); jesd_csu_orx_start(0);
debug_write((DBG_DDR_IDX_DRV_BASE+49), GET_STC_CNT()); // 0xc4
orx_para_ptr->orx_start_flag = 0; orx_para_ptr->orx_start_flag = 0;
} }
if (0 < orx_para_ptr->orx_calldrv_cnt) if (0 < orx_para_ptr->orx_calldrv_cnt)

122753
public/test/testcases/case41/fronthaul/DATA/265_slot0_jesd_2140000000/dl_ant_post7.dat Normal file
View File

File diff suppressed because it is too large Load Diff

123009
public/test/testcases/case41/fronthaul/DATA/265_slot0_jesd_2140000000/dl_ant_pre7.dat Normal file
View File

File diff suppressed because it is too large Load Diff

2
public/test/testcases/case41/fronthaul/note.txt
View File

@ -1 +1 @@
7ds2u, 带收发切换，发宽带信号 NR15K，122.88M采样率，40M带宽，发256QAM宽带信号

368629
public/test/testcases/case41/fronthaul/src/jesd_test_case41_antdata.s.c
View File

File diff suppressed because it is too large Load Diff

18
public/test/testcases/case47/fronthaul/src/jesd_test_case47.s.c
View File

@ -78,16 +78,18 @@ void fh_data_check(uint32_t times)
void jesd_tx_data_init() void jesd_tx_data_init()
{ {
uint8_t antNum = 2; uint8_t antNum = JESD_LTEFDD_ANT_NUM;
uint8_t idAnt = 0; uint8_t idAnt = 0;
uint8_t idSlot = 0; uint8_t idSlot = 0;
uint32_t srcAddr = 0; uint32_t srcAddr = 0;
uint32_t dstAddr = 0; uint32_t dstAddr = 0;
uint32_t dataLen = 0; uint32_t dataLen = 0;
uint16_t samByteCnt = 4; uint16_t samByteCnt = 4;
uint32_t slotSamCnt = JESD_LTEFDD_SUBFRAME_SAM_CNT; uint32_t slotSamCnt = JESD_LTEFDD_SUBFRAME_SAM_CNT;
uint32_t cpyCnt = 0; uint32_t cpyCnt = 0;
memset_ucp((void*)JESD_LTEFDD_TX_SLOT_EVEN_DATA_ADDR, 0, antNum*slotSamCnt*samByteCnt);
memset_ucp((void*)JESD_LTEFDD_TX_SLOT_ODD_DATA_ADDR, 0, antNum*slotSamCnt*samByteCnt);
// valid data // valid data
// IQ data // IQ data
samByteCnt = 4; samByteCnt = 4;
@ -98,13 +100,13 @@ void jesd_tx_data_init()
if (0 == idSlot) // even slot if (0 == idSlot) // even slot
{ {
dataLen = samByteCnt * slotSamCnt; dataLen = samByteCnt * slotSamCnt;
srcAddr = (uint32_t)(&antDataLte[0]) + idAnt*slotSamCnt; srcAddr = (uint32_t)(&antDataLte[0]); // + idAnt*slotSamCnt;
dstAddr = JESD_LTEFDD_TX_SLOT_EVEN_DATA_ADDR + idAnt*dataLen; dstAddr = JESD_LTEFDD_TX_SLOT_EVEN_DATA_ADDR + idAnt*dataLen;
} }
else if (1 == idSlot) // odd slot else if (1 == idSlot) // odd slot
{ {
dataLen = samByteCnt * slotSamCnt; dataLen = samByteCnt * slotSamCnt;
srcAddr = (uint32_t)(&antDataLte[0]) + idAnt*slotSamCnt; srcAddr = (uint32_t)(&antDataLte[0]); // + idAnt*slotSamCnt;
dstAddr = JESD_LTEFDD_TX_SLOT_ODD_DATA_ADDR + idAnt*dataLen; dstAddr = JESD_LTEFDD_TX_SLOT_ODD_DATA_ADDR + idAnt*dataLen;
} }
//debug_write((DBG_DDR_IDX_DRV_BASE+256+(cpyCnt<<2)), (uint32_t)srcAddr); // 0x400 //debug_write((DBG_DDR_IDX_DRV_BASE+256+(cpyCnt<<2)), (uint32_t)srcAddr); // 0x400

367680
public/test/testcases/case47/fronthaul/src/jesd_test_case47_antdata.s.c
View File

File diff suppressed because it is too large Load Diff