jinhong/YB_Platform
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

基站时延增加上行数据相对cpri帧头偏移

Browse Source
This commit is contained in:
huanfeng.wang 2023-11-22 16:37:25 +08:00
parent c02dc790b8
commit 4b23d3136e
3 changed files with 18 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
public/common/ecs_dm/inc/cpri_delay.h
View File

@ -106,6 +106,7 @@ typedef struct _tagCpriSetLinkDelay
uint8_t u8rsv[3];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
}stCpriSetLinkDelay;
typedef struct _tagCpriGetLinkDelay
@ -115,6 +116,7 @@ typedef struct _tagCpriGetLinkDelay
uint8_t u8rsv[2];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
}stCpriGetLinkDelay;
typedef struct _tagCpriGetRndDelay

2
public/ecs_rfm_spu1/platform/inc/ecs_rfm_spu1_oam.h
View File

@ -45,6 +45,7 @@ typedef struct tSpuOamBaseDelaySetReq {
uint8_t u8rsv[3];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
} SpuOamBaseDelaySetReq_t;
typedef struct tSpuOamBaseDelaySetRsp {
@ -64,6 +65,7 @@ typedef struct tSpuOamBaseDelayQryRsp {
uint8_t u8rsv[2];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
} SpuOamBaseDelayQryRsp_t;
typedef struct tSpuOamFiberDelayQryReq {

22
public/ecs_rfm_spu1/platform/src/ecs_rfm_spu1_oam.s.c
View File

@ -138,12 +138,16 @@ void oam_base_delay_proc(SpuOamBaseDelaySetReq_t *spu_oam_base_delay_set_ptr, Oa
g_oam_base_delay_set_rsp_ptr->u8fiber_port = oam_base_delay_set_rsp_ptr->u8fiber_port;
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 42), g_oam_base_delay_set_rsp_ptr->u8result);/*0xb7e016a8*/
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 43), g_oam_base_delay_set_rsp_ptr->u8fiber_port);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 43), spu_oam_base_delay_set_ptr->u32ul_data_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 44), spu_oam_base_delay_set_ptr->u32dl_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 45), spu_oam_base_delay_set_ptr->u32ul_frame_offset);
UCP_PRINT_LOG("oam_base_delay_proc cellIndex:%d\n", spu_oam_msg_ptr->cellIndex);
UCP_PRINT_LOG("oam_base_delay_proc u8result:%d\n", g_oam_base_delay_set_rsp_ptr->u8result);
UCP_PRINT_LOG("oam_base_delay_proc u8fiber_port:%d\n", g_oam_base_delay_set_rsp_ptr->u8fiber_port);
UCP_PRINT_ERROR("oam_base_delay_proc cellIndex:%d\n", spu_oam_msg_ptr->cellIndex);
UCP_PRINT_ERROR("oam_base_delay_proc u8result:%d\n", g_oam_base_delay_set_rsp_ptr->u8result);
UCP_PRINT_ERROR("oam_base_delay_proc u8fiber_port:%d\n", g_oam_base_delay_set_rsp_ptr->u8fiber_port);
UCP_PRINT_ERROR("oam_base_delay_proc u32ul_data_frame_offset:%d\n", spu_oam_base_delay_set_ptr->u32ul_data_frame_offset);
UCP_PRINT_ERROR("oam_base_delay_proc u32dl_frame_offset:%d\n", spu_oam_base_delay_set_ptr->u32dl_frame_offset);
UCP_PRINT_ERROR("oam_base_delay_proc u32ul_frame_offset:%d\n", spu_oam_base_delay_set_ptr->u32ul_frame_offset);
oam_spu_send_msg(spu_oam_msg_ptr->cellIndex, (uint32_t)g_oam_base_delay_set_rsp_ptr, sizeof(SpuOamBaseDelaySetRsp_t), SPU_OAM_BASE_DELAY_SET_RSP);
@ -162,14 +166,16 @@ void oam_base_qry_proc(SpuOamBaseDelayQryReq_t *spu_oam_base_delay_qry_pt
/*调用接口获取配置结果0:fail 1:ok*/
get_cpri_link_delay(spu_oam_base_delay_qry_ptr->u8fiber_port, (stCpriGetLinkDelay*)g_oam_base_delay_qry_rsp_ptr);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 46), g_oam_base_delay_qry_rsp_ptr->u8fiber_port);/*0xb7e016b8*/
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 47), g_oam_base_delay_qry_rsp_ptr->u8result);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 46), g_oam_base_delay_qry_rsp_ptr->u8result);/*0xb7e016b8*/
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 47), g_oam_base_delay_qry_rsp_ptr->u32ul_data_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 48), g_oam_base_delay_qry_rsp_ptr->u32dl_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 49), g_oam_base_delay_qry_rsp_ptr->u32ul_frame_offset);
UCP_PRINT_LOG("oam_base_qry_proc u8fiber_port:%d u8result:%d\n", \
UCP_PRINT_ERROR("oam_base_qry_proc u8fiber_port:%d u8result:%d\n", \
g_oam_base_delay_qry_rsp_ptr->u8fiber_port, g_oam_base_delay_qry_rsp_ptr->u8result);
UCP_PRINT_LOG("oam_base_qry_proc dl:0x%x ul:0x%x\n", \
UCP_PRINT_ERROR("oam_base_qry_proc dl:0x%x ul:0x%x\n", \
g_oam_base_delay_qry_rsp_ptr->u32dl_frame_offset, g_oam_base_delay_qry_rsp_ptr->u32ul_frame_offset);
UCP_PRINT_ERROR("oam_base_qry_proc u32ul_data_frame_offset:%d\n", g_oam_base_delay_qry_rsp_ptr->u32ul_data_frame_offset);
oam_spu_send_msg(spu_oam_msg_ptr->cellIndex, (uint32_t)g_oam_base_delay_qry_rsp_ptr, sizeof(SpuOamBaseDelayQryRsp_t), SPU_OAM_BASE_DELAY_QRY_RSP);