From 6c294ce0bc4ccc12d3686a2c2d8e5dbc66dbab52 Mon Sep 17 00:00:00 2001 From: "xinxin.li" Date: Mon, 11 Dec 2023 20:19:20 +0800 Subject: [PATCH] 1. fix UCP4008_SL feature enhancement #1378; 2. disable rf switch int after all of cells are deleted; 3. adjust slot offset, csu offset, rf switch offset; 4. add init para about 204C; 5. test case: case21, case34, case44. --- inc/drv_ape.h | 26 +++--- public/ape_spu/top/src/ape_top.s.c | 2 + public/common/driver/inc/phy_para.h | 10 ++- public/common/driver/src/phy_para.s.c | 9 ++- public/ecs_rfm_spu1/driver/inc/jesd_timer.h | 17 +++- public/ecs_rfm_spu1/driver/inc/mtimer_drv.h | 1 + public/ecs_rfm_spu1/driver/src/cpri_timer.s.c | 1 + .../ecs_rfm_spu1/driver/src/ecpri_timer.s.c | 1 + public/ecs_rfm_spu1/driver/src/jesd_timer.s.c | 80 ++++++++++--------- public/ecs_rfm_spu1/driver/src/mtimer_drv.s.c | 45 ++++++++++- public/ecs_rfm_spu1/driver/src/rfm1_drv.s.c | 2 +- public/ecs_rfm_spu1/driver/src/stc_timer.s.c | 3 +- public/ecs_rfm_spu1/top/src/phy_init.s.c | 5 ++ 13 files changed, 141 insertions(+), 61 deletions(-) diff --git a/inc/drv_ape.h b/inc/drv_ape.h index f91b16b..befdd3c 100644 --- a/inc/drv_ape.h +++ b/inc/drv_ape.h @@ -40,14 +40,6 @@ uint32_t get_core_id(void); // 以下接口，为帕拉丁临时验证带OSP的版本使用，最好按声明的顺序依次调用。 // 具体可参见，驱动的phy_drv_init接口，该接口只是驱动临时使用，物理层可根据自己需求适配修改。 /***************************************************************/ -// 时钟初始化，帕拉丁上外设初始化之前，调用一次，该接口只需八个核中的一个核调用即可，放在main函数的最前面 -void SET_CLK_CFG_EMU(void); - -// 物理层参数初始化配置，目前环境，两个入参都为0，该接口只需八个核中的一个核调用即可 -void phy_para_init(int protocol, int option); - -// stc timer初始化，该接口只需八个核中的一个核调用即可 -void ape_stc_init(); // pet sm初始化，该接口只需八个核中的一个核调用即可，放在main函数的最前面 void pet_sm_init(); @@ -403,7 +395,7 @@ int ape_csu_task_lookup(uint8_t task_tag, uint8_t isWait); * @param: dataLen : [搬移总字节数 ] * @param: tag : [DMA Tag: 0~31用于查询是否完成 ] * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] -* @return: 0：搬移完成 +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回 */ int ape_csu_dma_1D_L2G_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait); @@ -416,7 +408,7 @@ int ape_csu_dma_1D_L2G_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint3 * @param: dataLen : [搬移总字节数 ] * @param: tag : [DMA Tag: 0~31用于查询是否完成 ] * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] -* @return: 0：搬移完成 +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回 */ int ape_csu_dma_1D_L2G_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait); @@ -429,7 +421,7 @@ int ape_csu_dma_1D_L2G_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint3 * @param: dataLen : [搬移总字节数 ] * @param: tag : [DMA Tag: 0~31用于查询是否完成 ] * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] -* @return: 0：搬移完成 +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回 */ int ape_csu_dma_1D_G2L_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait); @@ -442,7 +434,7 @@ int ape_csu_dma_1D_G2L_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint3 * @param: dataLen : [搬移总字节数 ] * @param: tag : [DMA Tag: 0~31用于查询是否完成 ] * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] -* @return: 0：搬移完成 +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回 */ int ape_csu_dma_1D_G2L_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait); @@ -461,7 +453,8 @@ int ape_csu_dma_1D_G2L_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint3 * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] * @param: regGroup : [寄存器组，2：源寄存器组4，目的寄存器组5；3：源寄存器组6，目的寄存器组7 ] * @param: dir : [0：L2G，1：G2L or G2G ] -* @return: 0：搬移完成，-1：入参错误 +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回， +* -1： 入参错误 */ int ape_csu_dma_2Dto2D_transfer(uint64_t addrSrc, uint16_t blockLenSrc, uint64_t blockStepSrc, uint64_t addrDst, uint16_t blockLenDst, uint64_t blockStepDst, @@ -482,7 +475,8 @@ int ape_csu_dma_2Dto2D_transfer(uint64_t addrSrc, uint16_t blockLenSrc, uint64_t * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] * @param: regGroup : [寄存器组，2：源寄存器组4，目的寄存器组5；3：源寄存器组6，目的寄存器组7 ] * @param: dir : [0：L2G，1：G2L or G2G ] -* @return: 0：搬移完成，-1：入参错误 +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回， +* -1： 入参错误 */ int ape_csu_dma_3Dto1D_transfer(uint64_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint64_t yStepSrc, uint64_t zStepSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir); @@ -502,6 +496,8 @@ int ape_csu_dma_3Dto1D_transfer(uint64_t addrSrc, uint16_t xNumSrc, uint16_t yNu * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] * @param: regGroup : [寄存器组，2：源寄存器组4，目的寄存器组5；3：源寄存器组6，目的寄存器组7 ] * @param: dir : [0：L2G，1：G2L or G2G ] +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回， +* -1： 入参错误 */ int32_t ape_csu_dma_1Dto3D_transfer(uint64_t addrSrc, uint64_t addrDst, uint16_t xNumDst, uint16_t yNumDst, uint64_t yStepDst, uint64_t zStepDst, uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir); @@ -525,6 +521,8 @@ int32_t ape_csu_dma_1Dto3D_transfer(uint64_t addrSrc, uint64_t addrDst, uint16_t * @param: isWait : [是否等DMA结束函数返回0:不等待,1:等待 ] * @param: regGroup : [寄存器组，2：源寄存器组4，目的寄存器组5；3：源寄存器组6，目的寄存器组7 ] * @param: dir : [0：L2G，1：G2L or G2G ] +* @return: 0： 正常执行完成，如果isWait=1，则等dma搬移完成才返回， +* -1： 入参错误 */ int32_t ape_csu_dma_3Dto3D_transfer(uint64_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint64_t yStepSrc, uint64_t zStepSrc, uint64_t addrDst, uint16_t xNumDst, uint16_t yNumDst, uint64_t yStepDst, uint64_t zStepDst, diff --git a/public/ape_spu/top/src/ape_top.s.c b/public/ape_spu/top/src/ape_top.s.c index 6dc3db9..783b586 100644 --- a/public/ape_spu/top/src/ape_top.s.c +++ b/public/ape_spu/top/src/ape_top.s.c @@ -22,6 +22,7 @@ #include "msg_transfer_queue.h" #include "pet_sm_mgt.h" #include "osp_init.h" +#include "phy_para.h" static int32_t gCoreId = 0; ALWAYS_INLINE int32_t get_core_id(void) @@ -50,6 +51,7 @@ int32_t soc_drv_init() int apeId = get_core_id(); if (0 == apeId) { + drv_sm_init(); osp_var_init(); pet_sm_init(); } diff --git a/public/common/driver/inc/phy_para.h b/public/common/driver/inc/phy_para.h index 3ffc55c..016276a 100644 --- a/public/common/driver/inc/phy_para.h +++ b/public/common/driver/inc/phy_para.h @@ -155,6 +155,12 @@ typedef enum _tagEcpriOptionID ECPRI_OPTION_25G = 25 }EcpriOptID; +typedef enum _tagJesdOptionID +{ + JESD_OPTION_204B = 0, + JESD_OPTION_204C = 1 +}JesdOptID; + typedef enum _tagScsID { LTE_SCS_ID = 0, @@ -276,7 +282,9 @@ typedef enum _tagCpriMode void sfn_para_init(void); -void phy_para_init(int32_t protocol, int32_t option); +void drv_sm_init(); + +void phy_para_init(uint32_t protocol, uint32_t option); void phy_scs_para_init(int32_t scsId); int32_t get_protocol_sel(); diff --git a/public/common/driver/src/phy_para.s.c b/public/common/driver/src/phy_para.s.c index 3bf9500..9a3dd7c 100644 --- a/public/common/driver/src/phy_para.s.c +++ b/public/common/driver/src/phy_para.s.c @@ -21,12 +21,15 @@ void sfn_para_init(void) gCellSfnPara[SCS_2nd_MTIMER_ID].scsId = SCS_NULL; } -void phy_para_init(int32_t protocol, int32_t option) +void drv_sm_init() { - int32_t i = 0; - memset_ext((void*)SPU_DRV_SM_ADDR, 0, SPU_DRV_SM_LEN); // init sm for drv, 0x0a4d7000~0x0a4d7FFF __ucps2_synch(0); +} + +void phy_para_init(uint32_t protocol, uint32_t option) +{ + int32_t i = 0; do_write(PROTO_SEL_ADDR, protocol); do_write(PROTO_OPT_ADDR, option); diff --git a/public/ecs_rfm_spu1/driver/inc/jesd_timer.h b/public/ecs_rfm_spu1/driver/inc/jesd_timer.h index 358244e..612770f 100644 --- a/public/ecs_rfm_spu1/driver/inc/jesd_timer.h +++ b/public/ecs_rfm_spu1/driver/inc/jesd_timer.h @@ -28,6 +28,13 @@ typedef enum _tagJesdTestMode JESD_TEST_TO_NORMAL = 3 }numJesdTestMode; +typedef enum _tagJesdInitStep +{ + JESD_NO_INIT = 0, + JESD_CLK_INIT = 1, + JESD_TRANS_INIT = 2, + JESD_INIT_STEP_MAX = 3 +}numJesdInitStep; typedef struct _tagJesdDelay { @@ -53,7 +60,7 @@ typedef enum _tagJesdPP1sSrc{ }numJesdPP1sSrc; -void jesd_init(); +void jesd_init(uint8_t option); int32_t jesd_mtimer_init(int32_t nTmrId, int32_t nScsId, int32_t nTddSlotNum); @@ -101,12 +108,20 @@ int32_t set_jesd_csuoff_point(int32_t nTmrId, uint8_t nPointId); void set_jesd_txon_point(int32_t nTmrId, uint8_t nPointId); +void clear_jesd_txon_point(int32_t nTmrId); + void set_jesd_txoff_point(int32_t nTmrId, uint8_t nPointId); +void clear_jesd_txoff_point(int32_t nTmrId); + void set_jesd_rxon_point(int32_t nTmrId, uint8_t nPointId); +void clear_jesd_rxon_point(int32_t nTmrId); + void set_jesd_rxoff_point(int32_t nTmrId, uint8_t nPointId); +void clear_jesd_rxoff_point(int32_t nTmrId); + void start_jesd_timer(int32_t nTmrId); void stop_jesd_timer(int32_t nTmrId); diff --git a/public/ecs_rfm_spu1/driver/inc/mtimer_drv.h b/public/ecs_rfm_spu1/driver/inc/mtimer_drv.h index f80c119..23cde23 100644 --- a/public/ecs_rfm_spu1/driver/inc/mtimer_drv.h +++ b/public/ecs_rfm_spu1/driver/inc/mtimer_drv.h @@ -35,6 +35,7 @@ int32_t set_mtimer_tmrpoint(uint8_t nTmrId, uint8_t nPointId, int32_t nTmrPoint, int32_t enable_mtimer_tmrpoint_int(uint8_t nTmrId, uint8_t nPointId, uint8_t nIntcId); int32_t disable_mtimer_tmrpoint_int(uint8_t nTmrId, uint8_t nPointId, uint8_t nIntcId); int32_t enable_mtimer_cevent_int(uint8_t nTmrId, uint8_t nCEvtId, uint8_t nIntcId); +int32_t disable_mtimer_cevent_int(uint8_t nTmrId, uint8_t nCEvtId, uint8_t nIntcId); int32_t set_cpri_tmr_ctrl(); diff --git a/public/ecs_rfm_spu1/driver/src/cpri_timer.s.c b/public/ecs_rfm_spu1/driver/src/cpri_timer.s.c index 9b5be91..766817f 100644 --- a/public/ecs_rfm_spu1/driver/src/cpri_timer.s.c +++ b/public/ecs_rfm_spu1/driver/src/cpri_timer.s.c @@ -992,6 +992,7 @@ void isr_cpri_slot_offset(void) if (5 == reCfgFlag) { reCfgFlag = 0; + disable_mtimer_cevent_int(MTIMER_CPRI_ID, MTMR_CEVENT_CNT14H, MTMR_INT_10ms); // 10ms int } pMtimerSfn->txSlotTiming = GET_STC_CNT(); pMtimerSfn->txSlotNum++; diff --git a/public/ecs_rfm_spu1/driver/src/ecpri_timer.s.c b/public/ecs_rfm_spu1/driver/src/ecpri_timer.s.c index 4b7707b..e287736 100644 --- a/public/ecs_rfm_spu1/driver/src/ecpri_timer.s.c +++ b/public/ecs_rfm_spu1/driver/src/ecpri_timer.s.c @@ -587,6 +587,7 @@ void isr_ecpri_timer(void) if (5 == reCfgFlag) { reCfgFlag = 0; + disable_mtimer_cevent_int(MTIMER_ECPRI_ID, MTMR_CEVENT_CNT14H, MTMR_INT_10ms); // 10ms int } pMtimerSfn->txSlotNum++; __ucps2_synch(0); diff --git a/public/ecs_rfm_spu1/driver/src/jesd_timer.s.c b/public/ecs_rfm_spu1/driver/src/jesd_timer.s.c index 4bcc40c..37239f0 100644 --- a/public/ecs_rfm_spu1/driver/src/jesd_timer.s.c +++ b/public/ecs_rfm_spu1/driver/src/jesd_timer.s.c @@ -49,14 +49,14 @@ extern void phy_sniffer_data_proc(); extern uint32_t reCfgFlag; -void jesd_init() +void jesd_init(uint8_t option) { int32_t apeId = get_core_id(); #ifdef PALLADIUM_TEST int32_t flag = 1; debug_write((DBG_DDR_IDX_DRV_BASE+2+(apeId<<2)), flag); // 0xB8 #endif - phy_para_init(PROTOCOL_JESD, PROTO_OPTION_NULL); + phy_para_init(PROTOCOL_JESD, option); do_write(JESD_RF_TXOFF2RXON, JESD_TXRX_CHANGE_GAP); do_write(JESD_RF_TXON2PP1S, JESD_RF_ON_GAP); @@ -64,7 +64,7 @@ void jesd_init() do_write(CSU_RX_TD_SAMPLE, JESD_RRU_TD); do_write(CSU_TX_ADVANCE_SAMPLE, gCsuTxAdvanceNs); - while (1 > (do_read_volatile(SERDES_INIT_FLAG_ADDR))) // wait jesd serdes clk init finished + while (JESD_CLK_INIT > (do_read_volatile(SERDES_INIT_FLAG_ADDR))) // wait jesd serdes clk init finished { ucp_nop(1); } @@ -102,8 +102,8 @@ void jesd_delay_init() EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt(); JesdDelay_t* jesd_delay_ptr = pEcsDmLocalMgt->jesd_delay_ptr; - jesd_delay_ptr->tx_offset = INT_DELAY; - jesd_delay_ptr->rx_offset = INT_DELAY; + jesd_delay_ptr->tx_offset = INT_DELAY*2; + jesd_delay_ptr->rx_offset = INT_DELAY*2; jesd_delay_ptr->tdd_offset = INT_DELAY + EDMA_OFFSET; } @@ -220,11 +220,11 @@ int32_t jesd_timer_get_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesd dlSlotCnt = my_jesdtmr->num_t_dl[0]; dlSymbolCnt = my_jesdtmr->num_t_dl_symb[0]; } - pMtimerTxPara->txCsuOn[i].timerPoint = tdd - gCsuTxAdvanceNs/1000 - pJesdDelay->gps_offset; // pJesdDelay->jesd_10ms2pp1s_txoffset; + pMtimerTxPara->txCsuOn[i].timerPoint = tdd - gCsuTxAdvanceNs/1000 - pJesdDelay->gps_offset - INT_DELAY; // pJesdDelay->jesd_10ms2pp1s_txoffset; get_jesd_timer_point_para(nTmrId+2, pMtimerTxPara->txCsuOn[i].timerPoint, &pMtimerTxPara->txCsuOn[i].pointL, &pMtimerTxPara->txCsuOn[i].pointM, &pMtimerTxPara->txCsuOn[i].pointH); - pMtimerTxPara->txCsuOff[i].timerPoint = dlSlotCnt*slotUs + (longSymbCost+(dlSymbolCnt-1)*shortSymbCost)/1000 - pJesdDelay->gps_offset; // pJesdDelay->jesd_10ms2pp1s_txoffset; + pMtimerTxPara->txCsuOff[i].timerPoint = dlSlotCnt*slotUs + (longSymbCost+(dlSymbolCnt-1)*shortSymbCost)/1000 - pJesdDelay->gps_offset - INT_DELAY; // pJesdDelay->jesd_10ms2pp1s_txoffset; get_jesd_timer_point_para(nTmrId+2, pMtimerTxPara->txCsuOff[i].timerPoint, &pMtimerTxPara->txCsuOff[i].pointL, &pMtimerTxPara->txCsuOff[i].pointM, &pMtimerTxPara->txCsuOff[i].pointH); @@ -232,7 +232,7 @@ int32_t jesd_timer_get_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesd get_jesd_timer_point_para(nTmrId, pMtimerPara->rxCsuOn[i].timerPoint, &pMtimerPara->rxCsuOn[i].pointL, &pMtimerPara->rxCsuOn[i].pointM, &pMtimerPara->rxCsuOn[i].pointH); - pMtimerPara->rxCsuOff[i].timerPoint = tdd - gCsuRxAdvanceNs/1000 - pJesdDelay->gps_offset; // pJesdDelay->jesd_10ms2pp1s_txoffset; + pMtimerPara->rxCsuOff[i].timerPoint = tdd - gCsuRxAdvanceNs/1000 - pJesdDelay->gps_offset - INT_DELAY; // pJesdDelay->jesd_10ms2pp1s_txoffset; get_jesd_timer_point_para(nTmrId, pMtimerPara->rxCsuOff[i].timerPoint, &pMtimerPara->rxCsuOff[i].pointL, &pMtimerPara->rxCsuOff[i].pointM, &pMtimerPara->rxCsuOff[i].pointH); @@ -279,11 +279,11 @@ int32_t jesd_timer_get_rf_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdt dlSlotCnt = my_jesdtmr->num_t_dl[0]; dlSymbolCnt = my_jesdtmr->num_t_dl_symb[0]; } - pMtimerPara->txRfOn[i].timerPoint = tdd - do_read_volatile(JESD_RF_TXON2PP1S) - pJesdDelay->gps_offset; // pJesdDelay->jesd_10ms2pp1s_txoffset; //JESD_RF_ON_GAP; // tdd-8us + pMtimerPara->txRfOn[i].timerPoint = tdd - do_read_volatile(JESD_RF_TXON2PP1S) - pJesdDelay->gps_offset - INT_DELAY; // pJesdDelay->jesd_10ms2pp1s_txoffset; //JESD_RF_ON_GAP; // tdd-8us get_jesd_timer_point_para(nTmrId, pMtimerPara->txRfOn[i].timerPoint, &pMtimerPara->txRfOn[i].pointL, &pMtimerPara->txRfOn[i].pointM, &pMtimerPara->txRfOn[i].pointH); - pMtimerPara->txRfOff[i].timerPoint = dlSlotCnt*slotUs + (longSymbCost+(dlSymbolCnt-1)*shortSymbCost)/1000 - pJesdDelay->gps_offset; // pJesdDelay->jesd_10ms2pp1s_txoffset; + pMtimerPara->txRfOff[i].timerPoint = dlSlotCnt*slotUs + (longSymbCost+(dlSymbolCnt-1)*shortSymbCost)/1000 - pJesdDelay->gps_offset - INT_DELAY; // pJesdDelay->jesd_10ms2pp1s_txoffset; get_jesd_timer_point_para(nTmrId, pMtimerPara->txRfOff[i].timerPoint, &pMtimerPara->txRfOff[i].pointL, &pMtimerPara->txRfOff[i].pointM, &pMtimerPara->txRfOff[i].pointH); @@ -291,7 +291,7 @@ int32_t jesd_timer_get_rf_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdt get_jesd_timer_point_para(nTmrId, pMtimerPara->rxRfOn[i].timerPoint, &pMtimerPara->rxRfOn[i].pointL, &pMtimerPara->rxRfOn[i].pointM, &pMtimerPara->rxRfOn[i].pointH); - pMtimerPara->rxRfOff[i].timerPoint = tdd - do_read_volatile(JESD_RF_TXOFF2RXON) - pJesdDelay->gps_offset; // pJesdDelay->jesd_10ms2pp1s_txoffset; //JESD_TXRX_CHANGE_GAP; // tdd-13us + pMtimerPara->rxRfOff[i].timerPoint = tdd - do_read_volatile(JESD_RF_TXOFF2RXON) - pJesdDelay->gps_offset - INT_DELAY; // pJesdDelay->jesd_10ms2pp1s_txoffset; //JESD_TXRX_CHANGE_GAP; // tdd-13us get_jesd_timer_point_para(nTmrId, pMtimerPara->rxRfOff[i].timerPoint, &pMtimerPara->rxRfOff[i].pointL, &pMtimerPara->rxRfOff[i].pointM, &pMtimerPara->rxRfOff[i].pointH); @@ -349,6 +349,7 @@ int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr) pMtimerTxPara->slotMaxNum = my_jesdtmr->num_tti_per_sfn; pMtimerSfn->slotMaxNum = my_jesdtmr->num_tti_per_sfn; + pMtimerSfn->slotNumPP1s = (pJesdDelay->jesd_10ms2pp1s_txoffset / my_jesdtmr->t_us) % my_jesdtmr->num_tti_per_sfn; do_write_short((&(phyPara[scsId].slotNumOfTdd)), my_jesdtmr->num_tti); do_write_short((&(phyPara[scsId].mtimerId)), nTmrId); @@ -371,7 +372,7 @@ int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr) //jesd_timer_get_csu_point(nTmrId, my_jesdtmr); //jesd_timer_get_rf_point(nTmrId, my_jesdtmr); - while (2 != (do_read_volatile(SERDES_INIT_FLAG_ADDR))) // wait jesd serdes clk init finished + while (JESD_TRANS_INIT != (do_read_volatile(SERDES_INIT_FLAG_ADDR))) // wait jesd serdes clk init finished { ucp_nop(1); } @@ -458,6 +459,11 @@ int32_t jesd_timer_clear_cell(int32_t nTmrId, uint8_t scsId) if (MTIMER_JESD_RX0_ID == nTmrId) { clear_jesd_tdd_offset(nTmrId); + + clear_jesd_txon_point(nTmrId); + clear_jesd_txoff_point(nTmrId); + clear_jesd_rxon_point(nTmrId); + clear_jesd_rxoff_point(nTmrId); } clear_jesd_tx_slot_offset(nTmrId); clear_jesd_rx_slot_offset(nTmrId); @@ -938,6 +944,12 @@ void set_jesd_txon_point(int32_t nTmrId, uint8_t nPointId) enable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_TXON, MTMR_INT_TDD_OFFSET); } +void clear_jesd_txon_point(int32_t nTmrId) +{ + disable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_TXON, MTMR_INT_TDD_OFFSET); +} + + void set_jesd_txoff_point(int32_t nTmrId, uint8_t nPointId) { uint32_t tmrBaseAddr = 0; @@ -968,6 +980,11 @@ void set_jesd_txoff_point(int32_t nTmrId, uint8_t nPointId) enable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_TXOFF, MTMR_INT_TDD_OFFSET); } +void clear_jesd_txoff_point(int32_t nTmrId) +{ + disable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_TXOFF, MTMR_INT_TDD_OFFSET); +} + void set_jesd_rxon_point(int32_t nTmrId, uint8_t nPointId) { uint32_t tmrBaseAddr = 0; @@ -994,6 +1011,11 @@ void set_jesd_rxon_point(int32_t nTmrId, uint8_t nPointId) enable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_RXON, MTMR_INT_TDD_OFFSET); } +void clear_jesd_rxon_point(int32_t nTmrId) +{ + disable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_RXON, MTMR_INT_TDD_OFFSET); +} + void set_jesd_rxoff_point(int32_t nTmrId, uint8_t nPointId) { uint32_t tmrBaseAddr = 0; @@ -1013,6 +1035,11 @@ void set_jesd_rxoff_point(int32_t nTmrId, uint8_t nPointId) enable_mtimer_tmrpoint_int(nTmrId, MTMR_CSU_INSERT, MTMR_INT_TDD_OFFSET); } +void clear_jesd_rxoff_point(int32_t nTmrId) +{ + disable_mtimer_tmrpoint_int(nTmrId, MTMR_CSU_INSERT, MTMR_INT_TDD_OFFSET); +} + void start_jesd_timer(int32_t nTmrId) { start_mtimer(nTmrId); @@ -1444,7 +1471,8 @@ void jesd_slot_callback(uint8_t nTmrId) //uint32_t start = GET_STC_CNT(); if (5 == reCfgFlag) { - reCfgFlag = 0; + reCfgFlag = 0; + disable_mtimer_cevent_int(nTmrId, MTMR_CEVENT_CNT14H, MTMR_INT_10ms); // disable 10ms int } pMtimerSfn->txSlotTiming = GET_STC_CNT(); pMtimerSfn->txSlotNum++; @@ -1576,31 +1604,5 @@ void isr_jesd_slot_rx1(void) jesd_slot_callback(tmrId); } -#if 0 -void jesd_tdd_start_csu() -{ - //uint32_t tmrBaseAddr = JS_RX0_TMR_BASE; - stMtimerIntStat* pMtimerInt = &gMtimerIntCnt[MTIMER_JESD_RX0_ID]; -#if 0 - if (JESD_TEST_MODE == gJesdTestMode) - { - // start csu -#ifdef INTEGRATED_BS -#ifdef TEST_ENABLE - jesd_test_case(); -#endif -#endif - pMtimerInt->csuEnCnt++; - } - else -#endif - { - // start csu - jesd_csu_tx_start(0); - pMtimerInt->csuEnCnt++; - debug_write((DBG_DDR_IDX_DRV_BASE+64+7), pMtimerInt->csuEnCnt); // 0x11c - } -} -#endif diff --git a/public/ecs_rfm_spu1/driver/src/mtimer_drv.s.c b/public/ecs_rfm_spu1/driver/src/mtimer_drv.s.c index 782afdc..244c62e 100644 --- a/public/ecs_rfm_spu1/driver/src/mtimer_drv.s.c +++ b/public/ecs_rfm_spu1/driver/src/mtimer_drv.s.c @@ -70,6 +70,7 @@ int32_t mtimer_para_init(uint8_t nTmrId, int32_t nScsId, int32_t nTddSlotNum) uint32_t mtimer_get_baseaddr(uint8_t nTmrId) { uint8_t nBsType = get_protocol_sel(); + uint8_t nRateOption = get_protocol_opt(); uint32_t tmrBaseAddr = 0; if (PROTOCOL_JESD == nBsType) @@ -78,7 +79,33 @@ uint32_t mtimer_get_baseaddr(uint8_t nTmrId) { return 0; } - tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId * 0x1000; + if (JESD_OPTION_204B == nRateOption) + { + tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId * 0x1000; + } + else if (JESD_OPTION_204C == nRateOption) + { + if (MTIMER_JESD_RX0_ID == nTmrId) + { + tmrBaseAddr = JS_RX1_TMR_BASE; + } + else if (MTIMER_JESD_RX1_ID == nTmrId) + { + tmrBaseAddr = JS_RX0_TMR_BASE; + } + else if (MTIMER_JESD_TX0_ID == nTmrId) + { + tmrBaseAddr = JS_TX1_TMR_BASE; + } + else if (MTIMER_JESD_TX1_ID == nTmrId) + { + tmrBaseAddr = JS_TX0_TMR_BASE; + } + } + else + { + return 0; + } } else { @@ -329,6 +356,22 @@ int32_t enable_mtimer_cevent_int(uint8_t nTmrId, uint8_t nCEvtId, uint8_t nIntcI return 0; } +int32_t disable_mtimer_cevent_int(uint8_t nTmrId, uint8_t nCEvtId, uint8_t nIntcId) +{ + uint32_t tmrBaseAddr = mtimer_get_baseaddr(nTmrId); + if (0 == tmrBaseAddr) + { + return -1; + } + + uint32_t addr = tmrBaseAddr + MTMR_CINTE0_REG + (nIntcId<<3); + uint32_t val = do_read_volatile(addr); + val &= (~(1 << nCEvtId)); + do_write(addr, val); + + return 0; +} + int32_t set_cpri_tmr_ctrl() { uint32_t tmrBaseAddr = mtimer_get_baseaddr(MTIMER_CPRI_ID); diff --git a/public/ecs_rfm_spu1/driver/src/rfm1_drv.s.c b/public/ecs_rfm_spu1/driver/src/rfm1_drv.s.c index 66b7d11..8ee2c7f 100644 --- a/public/ecs_rfm_spu1/driver/src/rfm1_drv.s.c +++ b/public/ecs_rfm_spu1/driver/src/rfm1_drv.s.c @@ -179,7 +179,7 @@ int32_t fronthaul_drv_cfg(stFrontHaulDrvPara* pFhDrvPara) } else if (PROTOCOL_JESD == pFhDrvPara->protocolSel) { - jesd_init(); + jesd_init(pFhDrvPara->rateOption); } else { diff --git a/public/ecs_rfm_spu1/driver/src/stc_timer.s.c b/public/ecs_rfm_spu1/driver/src/stc_timer.s.c index 272437f..c700715 100644 --- a/public/ecs_rfm_spu1/driver/src/stc_timer.s.c +++ b/public/ecs_rfm_spu1/driver/src/stc_timer.s.c @@ -2,6 +2,7 @@ #include "ucp_js_subcrg.h" #include "ucp_js_ctrl.h" #include "ucp_sfr_c.h" +#include "jesd_timer.h" #include "stc_timer.h" #include "phy_para.h" #include "ucp_drv_common.h" @@ -124,7 +125,7 @@ uint32_t stc_pclk_init() } else if (PROTOCOL_JESD == protoSel) { - while (1 != (do_read_volatile(SERDES_INIT_FLAG_ADDR))); // wait jesd serdes clk init finished + while (JESD_CLK_INIT > (do_read_volatile(SERDES_INIT_FLAG_ADDR))); // wait jesd serdes clk init finished JECS_CRG_PLLSEL |= (0x6 << 7); // stc_src_clk_sel[2:0]=0x6 JECS_CRG_CLK_CTRL3 = 0x520000; // jecs3_div=1, stc pclk = cpri_serdes_tx_clk // laneRate = IQ_sample_rate * M * N' * (10/8)/L // max_laneRate = 12.5Gbps diff --git a/public/ecs_rfm_spu1/top/src/phy_init.s.c b/public/ecs_rfm_spu1/top/src/phy_init.s.c index 8f69b87..6f5febc 100644 --- a/public/ecs_rfm_spu1/top/src/phy_init.s.c +++ b/public/ecs_rfm_spu1/top/src/phy_init.s.c @@ -47,6 +47,11 @@ int32_t phy_fh_drv_init() #ifdef INTEGRATED_BS fhDrvPara.protocolSel = PROTOCOL_JESD; + fhDrvPara.rateOption = JESD_OPTION_204B; +#endif +#ifdef INTEGRATED_204C_BS + fhDrvPara.protocolSel = PROTOCOL_JESD; + fhDrvPara.rateOption = JESD_OPTION_204C; #endif fronthaul_drv_cfg(&fhDrvPara);