From 8c59de6c96c9096efc6568b7ceb434fbb87ed16e Mon Sep 17 00:00:00 2001 From: "lishuang.xie" Date: Wed, 6 Dec 2023 17:43:42 +0800 Subject: [PATCH] 1. update New Feature#945 to dev_ck_v2.1 2. update New Feature#1347 to dev_ck_v2.1 3. add new interface for ecs rfm1 and ape: spu_get_oam_handle_id for get oam handle_id by inst_id 4. Move Mem_init() from ape to ecs rfm1 5. TEST: 5.1 spu(case0)+arm(case0): pass 5.2 spu(case14)+arm(case20):pass 5.3 spu(case20)+arm(case20):pass 5.4 spu(case21)+arm(case21):pass 5.5 spu(case34)+arm(case5): pass 5.6 spu(case44)+arm(case5): pass --- inc/osp_ape.h | 8 + inc/osp_rfm.h | 11 +- public/ape_spu/osp/src/osp_msg.s.c | 2 +- public/ape_spu/osp/src/osp_task.s.c | 2 +- public/ape_spu/top/src/ape_top.s.c | 6 - public/ape_spu/top/src/phy_init.s.c | 6 - public/common/platform/inc/lib_debug_init.h | 2 + public/common/platform/src/lib_debug_init.s.c | 12 + public/ecs_rfm_spu1/top/src/main.s.c | 281 +++++++++--------- public/ecs_rfm_spu1/top/src/phy_init.s.c | 161 +++++----- 10 files changed, 260 insertions(+), 231 deletions(-) diff --git a/inc/osp_ape.h b/inc/osp_ape.h index f605208..463c085 100644 --- a/inc/osp_ape.h +++ b/inc/osp_ape.h @@ -224,6 +224,14 @@ extern void osp_timer_sync(int scsId); /* 使能任务定时点 */ */ extern void osp_timer_unsync(int scsId); +/* + 函数名称：spu_get_oam_handle_id + 函数入参：inst_id，小区编号（0/1） + 函数功能：根据小区编号，返回对应的OAM队列的handle_id +*/ +extern int32_t spu_get_oam_handle_id(uint8_t inst_id); + + #endif diff --git a/inc/osp_rfm.h b/inc/osp_rfm.h index e85625f..8c6689d 100644 --- a/inc/osp_rfm.h +++ b/inc/osp_rfm.h @@ -5,7 +5,7 @@ /* shell相关接口定义 */ /************************************************************************************/ /* shell命令回调函数类型 */ -typedef unsigned long (*OSP_FUNCPTR)(); +typedef unsigned long (*OSP_FUNCPTR)(); /* 函数名称：spu_insert_cmd_ext @@ -15,7 +15,7 @@ typedef unsigned long (*OSP_FUNCPTR)(); 函数入参：argnum : 对应shell命令的参考个数 函数功能：动态注册shell命令 */ -void spu_insert_cmd_ext(char *name, OSP_FUNCPTR pfunc, char *desc, uint32_t argnum); +void spu_insert_cmd_ext(char *name, OSP_FUNCPTR pfunc, char *desc, uint32_t argnum); /************************************************************************************/ /* 调试信息输出相关 */ @@ -80,6 +80,13 @@ int32_t osp_send_msg(uint32_t msg_addr, */ void ecs_hw_que_irq_callback(ECS_HWQUE_IRQ_FUNC func); +/* + 函数名称：spu_get_oam_handle_id + 函数入参：inst_id，小区编号（0/1） + 函数功能：根据小区编号，返回对应的OAM队列的handle_id +*/ +int32_t spu_get_oam_handle_id(uint8_t inst_id); + /************************************************************************************/ /* 其他相关接口 */ /************************************************************************************/ diff --git a/public/ape_spu/osp/src/osp_msg.s.c b/public/ape_spu/osp/src/osp_msg.s.c index aef4cea..6080854 100644 --- a/public/ape_spu/osp/src/osp_msg.s.c +++ b/public/ape_spu/osp/src/osp_msg.s.c @@ -19,7 +19,7 @@ osp_msg_tick_info st_tick_info; #endif #ifdef OSP_MSG_DBG_ENABLE -osp_msg_dbg_info_t gst_osp_msg_dbg_info[TASK_MAX]; +osp_msg_dbg_info_t gst_osp_msg_dbg_info[TASK_ID_MAX]; #endif int g_hq_vector = -1; diff --git a/public/ape_spu/osp/src/osp_task.s.c b/public/ape_spu/osp/src/osp_task.s.c index 81f0e4c..895c71b 100644 --- a/public/ape_spu/osp/src/osp_task.s.c +++ b/public/ape_spu/osp/src/osp_task.s.c @@ -42,7 +42,7 @@ void osp_task_init(void) g_taskid_num = 0; #ifdef OSP_TASK_DBG_ENABLE - memset(&gst_osp_task_dbg_info, 0, sizeof(osp_task_dbg_info_t)*TASK_MAX); + memset(&gst_osp_task_dbg_info, 0, sizeof(osp_task_dbg_info_t)*TASK_ID_MAX); #endif spu_insert_cmd_ext("i_ape", (OSP_FUNCPTR)osp_show_task_info, "osp show task info", 0); diff --git a/public/ape_spu/top/src/ape_top.s.c b/public/ape_spu/top/src/ape_top.s.c index bde0c75..6dc3db9 100644 --- a/public/ape_spu/top/src/ape_top.s.c +++ b/public/ape_spu/top/src/ape_top.s.c @@ -23,9 +23,6 @@ #include "pet_sm_mgt.h" #include "osp_init.h" -extern void Mem_Init(void); - - static int32_t gCoreId = 0; ALWAYS_INLINE int32_t get_core_id(void) { @@ -48,7 +45,6 @@ void set_core_id(void) return; } - int32_t soc_drv_init() { int apeId = get_core_id(); @@ -56,13 +52,11 @@ int32_t soc_drv_init() { osp_var_init(); pet_sm_init(); - Mem_Init(); /* call phy function to mem sm */ } return 0; } - void spu_drv_init(void) { pet_sm_alloc(); diff --git a/public/ape_spu/top/src/phy_init.s.c b/public/ape_spu/top/src/phy_init.s.c index dda56b9..573ff48 100644 --- a/public/ape_spu/top/src/phy_init.s.c +++ b/public/ape_spu/top/src/phy_init.s.c @@ -30,9 +30,3 @@ void phy_init(void) return; } -void Mem_Init(void) -{ - return ; -} - - diff --git a/public/common/platform/inc/lib_debug_init.h b/public/common/platform/inc/lib_debug_init.h index 8641368..566482e 100644 --- a/public/common/platform/inc/lib_debug_init.h +++ b/public/common/platform/inc/lib_debug_init.h @@ -17,5 +17,7 @@ extern int32_t spu_lib_debug_init(uint8_t core_id); +extern int32_t spu_get_oam_handle_id(uint8_t inst_id); + #endif /* __SPU_LIB_DEBUG_INIT_H__ */ diff --git a/public/common/platform/src/lib_debug_init.s.c b/public/common/platform/src/lib_debug_init.s.c index 6736e89..12fb8d9 100644 --- a/public/common/platform/src/lib_debug_init.s.c +++ b/public/common/platform/src/lib_debug_init.s.c @@ -14,6 +14,8 @@ #include "typedef.h" #include "lib_debug_init.h" #include "ucp_utility.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" #define SPU_APE_NUM (8) @@ -49,3 +51,13 @@ int32_t spu_lib_debug_init(uint8_t core_id) return ret_val; } +int32_t spu_get_oam_handle_id(uint8_t inst_id) +{ + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = inst_id; + handler.type_id = OAM; + + return handler.value; +} + diff --git a/public/ecs_rfm_spu1/top/src/main.s.c b/public/ecs_rfm_spu1/top/src/main.s.c index d91153a..258f48e 100644 --- a/public/ecs_rfm_spu1/top/src/main.s.c +++ b/public/ecs_rfm_spu1/top/src/main.s.c @@ -1,148 +1,155 @@ -// +FHDR------------------------------------------------------------ -// Copyright (c) 2022 SmartLogic. -// ALL RIGHTS RESERVED -// ----------------------------------------------------------------- -// Filename : main.c -// Author : xianfeng.du -// Created On : 2022-06-25 -// Last Modified : -// ----------------------------------------------------------------- -// Description: -// -// -// -FHDR------------------------------------------------------------ - -#include "ucp_printf.h" -#include "rfm1_drv.h" -#include "ucp_heartbeat.h" -#include "ecs_rfm_spu1_top.h" -#include "msg_transfer_queue.h" +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : main.c +// Author : xianfeng.du +// Created On : 2022-06-25 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ + +#include "ucp_printf.h" +#include "rfm1_drv.h" +#include "ucp_heartbeat.h" +#include "ecs_rfm_spu1_top.h" +#include "msg_transfer_queue.h" #include "log_server.h" #include "ucp_utility.h" #include "phy_queue_proc.h" -#include "cpri_test_mode.h" -#include "spu_shell.h" -#include "gtimer_drv.h" -#include "rfm1_gtimer2.h" -#include "ecs_rfm_spu1_oam.h" -#include "phy_para.h" -#include "hw_cpri.h" -#include "hwque.h" -#include "lib_debug_init.h" - +#include "cpri_test_mode.h" +#include "spu_shell.h" +#include "gtimer_drv.h" +#include "rfm1_gtimer2.h" +#include "ecs_rfm_spu1_oam.h" +#include "phy_para.h" +#include "hw_cpri.h" +#include "hwque.h" +#include "lib_debug_init.h" + #ifdef TEST_ENABLE -#include "fh_test.h" -#endif - - -#ifdef DDR_MONITOR -void spu_ddr_monitor() -{ - if (1 == do_read_volatile(DDR_MONITOR_ENABLE)) - { - clear_rfm1_gtimer2_1_intcnt(); - gtimer2_int_enable(0); - do_write(DDR_MONITOR_ENABLE, 0); - } - volatile uint32_t nMonitorCnt = do_read_volatile(DDR_MONITOR_CNT); - __ucps2_synch(0); - if (nMonitorCnt < get_rfm1_gtimer2_1_intcnt()) - { - gtimer2_int_disable(0); - do_write(DDR_MONITOR_CNT, 0); - } -} -#endif - -extern uint32_t gCpriCsuDummyFlag; - -int32_t main(int32_t argc, char* argv[]) -{ - int32_t core_id = 0; - int32_t ret = 0; +#include "fh_test.h" +#endif - UCP_PRINT_EMPTY("Hello world from ECS RFM SPU1,coreId[0x%x]", get_core_id()); +extern void Mem_Init(void); - core_id = get_core_id(); - debug_write(DBG_DDR_COMMON_IDX(core_id, 0), PLATFORM_BUILD_DATA); +#ifdef DDR_MONITOR +void spu_ddr_monitor() +{ + if (1 == do_read_volatile(DDR_MONITOR_ENABLE)) + { + clear_rfm1_gtimer2_1_intcnt(); + gtimer2_int_enable(0); + do_write(DDR_MONITOR_ENABLE, 0); + } + volatile uint32_t nMonitorCnt = do_read_volatile(DDR_MONITOR_CNT); + __ucps2_synch(0); + if (nMonitorCnt < get_rfm1_gtimer2_1_intcnt()) + { + gtimer2_int_disable(0); + do_write(DDR_MONITOR_CNT, 0); + } +} +#endif - ret = spu_lib_debug_init(core_id); - debug_write(DBG_DDR_COMMON_IDX(core_id, 1), ret); +extern uint32_t gCpriCsuDummyFlag; -#ifdef PALLADIUM_TEST - int flag = 1; - debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); // 0xB0 -#endif - - spu_log_client_init(); +int32_t main(int32_t argc, char* argv[]) +{ + int32_t core_id = 0; + int32_t ret = 0; + + UCP_PRINT_EMPTY("Hello world from ECS RFM SPU1,coreId[0x%x]", get_core_id()); + + core_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(core_id, 0), PLATFORM_BUILD_DATA); + + ret = spu_lib_debug_init(core_id); + debug_write(DBG_DDR_COMMON_IDX(core_id, 1), ret); + +#ifdef PALLADIUM_TEST + int flag = 1; + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); // 0xB0 +#endif + + spu_log_client_init(); spu_log_server_init(); - -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); -#endif - - ecs_rfm_spu1_drv_init(); -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); -#endif - - ecs_rfm_spu1_msg_transfer_init(); -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); -#endif - - spu_shell_init(); -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); -#endif - - spu_shell_cpri_cmd(); -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); -#endif - - oam_msg_init(); -#ifdef PALLADIUM_TEST - flag++; - debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); -#endif - - while (1) - { - if (PROTOCOL_CPRI == get_protocol_sel()) - { - check_cpri(); - - check_10ms_offset(); - } -#ifdef TEST_ENABLE - do_write(CSU_TX_ADVANCE_SAMPLE, 10000); // 10us - do_write(CSU_RX_TD_SAMPLE, 10000); - - check_test_outcome(0); -#endif - - phy_queue_polling(); - + +#ifdef PALLADIUM_TEST + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); // 0xB0 +#endif + + Mem_Init(); /* call phy function to mem sm */ + +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); +#endif + + ecs_rfm_spu1_drv_init(); +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); +#endif + + ecs_rfm_spu1_msg_transfer_init(); +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); +#endif + + spu_shell_init(); +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); +#endif + + spu_shell_cpri_cmd(); +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); +#endif + + oam_msg_init(); +#ifdef PALLADIUM_TEST + flag++; + debug_write((DBG_DDR_IDX_DRV_BASE+(core_id<<2)), flag); +#endif + + while (1) + { + if (PROTOCOL_CPRI == get_protocol_sel()) + { + check_cpri(); + + check_10ms_offset(); + } +#ifdef TEST_ENABLE + do_write(CSU_TX_ADVANCE_SAMPLE, 10000); // 10us + do_write(CSU_RX_TD_SAMPLE, 10000); + + check_test_outcome(0); +#endif + + phy_queue_polling(); + spu_log_server_proc(); - - /* check whether shell commands exist */ - spu_shell_task(); - - /* update heartbeat count */ - heart_beat_write(); - -#ifdef DDR_MONITOR - spu_ddr_monitor(); -#endif - } - - return 0; -} - + + /* check whether shell commands exist */ + spu_shell_task(); + + /* update heartbeat count */ + heart_beat_write(); + +#ifdef DDR_MONITOR + spu_ddr_monitor(); +#endif + } + + return 0; +} + diff --git a/public/ecs_rfm_spu1/top/src/phy_init.s.c b/public/ecs_rfm_spu1/top/src/phy_init.s.c index 43d1605..8f69b87 100644 --- a/public/ecs_rfm_spu1/top/src/phy_init.s.c +++ b/public/ecs_rfm_spu1/top/src/phy_init.s.c @@ -31,23 +31,25 @@ uint8_t gu8_send_del_task_cnt = 0; int32_t phy_fh_drv_init() { - stFrontHaulDrvPara fhDrvPara; - memset_ucp(&fhDrvPara, 0, sizeof(stFrontHaulDrvPara)); - + stFrontHaulDrvPara fhDrvPara; + memset_ucp(&fhDrvPara, 0, sizeof(stFrontHaulDrvPara)); + #ifdef DISTRIBUTED_BS - fhDrvPara.protocolSel = PROTOCOL_CPRI; - fhDrvPara.rateOption = CPRI_OPTION_8; - fhDrvPara.mapOption = OTIC_MAP_FIGURE12; + fhDrvPara.protocolSel = PROTOCOL_CPRI; + fhDrvPara.rateOption = CPRI_OPTION_8; + fhDrvPara.mapOption = OTIC_MAP_FIGURE12; #endif + #ifdef ECPRI_DISTRIBUTED_BS - fhDrvPara.protocolSel = PROTOCOL_ECPRI; - fhDrvPara.rateOption = ECPRI_OPTION_10G; + fhDrvPara.protocolSel = PROTOCOL_ECPRI; + fhDrvPara.rateOption = ECPRI_OPTION_10G; #endif + #ifdef INTEGRATED_BS - fhDrvPara.protocolSel = PROTOCOL_JESD; + fhDrvPara.protocolSel = PROTOCOL_JESD; #endif - fronthaul_drv_cfg(&fhDrvPara); + fronthaul_drv_cfg(&fhDrvPara); return 0; } @@ -132,62 +134,62 @@ void ecs_rfm1_build_cell(uint32_t scsId, uint32_t cellId, uint32_t coreId, uint3 my_cpritmr.runCoreId = 0; } - if (TDD_2500US_DOUBLE == frame_type) - { - my_cpritmr.frameType = TDD_2500US_DOUBLE; - my_cpritmr.t_period = 5000; - my_cpritmr.t_us = 500; - my_cpritmr.num_tti = 10; - my_cpritmr.num_tti_per_sfn = 20; - - my_cpritmr.num_t_dl[0] = 3; // dl slot num - my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num - my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num - my_cpritmr.num_ants[0] = 4; - - my_cpritmr.num_t_dl[1] = 2; // dl slot num - my_cpritmr.num_t_dl_symb[1] = 6; // dl symbol num - my_cpritmr.num_t_ul_symb[1] = 4; // ul symbol num - my_cpritmr.num_ants[1] = 4; - } - else - { - if (NR_SCS_30K == scsId) - { - my_cpritmr.frameType = TDD_MODE; - my_cpritmr.t_period = 5000; - my_cpritmr.t_us = 500; - my_cpritmr.num_tti = 10; - my_cpritmr.num_tti_per_sfn = 20; - - my_cpritmr.num_t_dl[0] = 7; // dl slot num - my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num - my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num - my_cpritmr.num_ants[0] = 4; - } - else if (LTE_SCS_ID == scsId) - { - my_cpritmr.t_period = 10000; - my_cpritmr.t_us = 1000; - my_cpritmr.num_tti = 10; - my_cpritmr.num_tti_per_sfn = 10; + if (TDD_2500US_DOUBLE == frame_type) + { + my_cpritmr.frameType = TDD_2500US_DOUBLE; + my_cpritmr.t_period = 5000; + my_cpritmr.t_us = 500; + my_cpritmr.num_tti = 10; + my_cpritmr.num_tti_per_sfn = 20; - my_cpritmr.num_t_dl[0] =10;// 7; // dl slot num - my_cpritmr.num_t_dl_symb[0] = 14;//6; // dl symbol num - my_cpritmr.num_t_ul_symb[0] = 14;//4; // ul symbol num - my_cpritmr.num_ants[0] = 2; - } - else - { - return; - } + my_cpritmr.num_t_dl[0] = 3; // dl slot num + my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num + my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num + my_cpritmr.num_ants[0] = 4; + + my_cpritmr.num_t_dl[1] = 2; // dl slot num + my_cpritmr.num_t_dl_symb[1] = 6; // dl symbol num + my_cpritmr.num_t_ul_symb[1] = 4; // ul symbol num + my_cpritmr.num_ants[1] = 4; + } + else + { + if (NR_SCS_30K == scsId) + { + my_cpritmr.frameType = TDD_MODE; + my_cpritmr.t_period = 5000; + my_cpritmr.t_us = 500; + my_cpritmr.num_tti = 10; + my_cpritmr.num_tti_per_sfn = 20; + + my_cpritmr.num_t_dl[0] = 7; // dl slot num + my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num + my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num + my_cpritmr.num_ants[0] = 4; + } + else if (LTE_SCS_ID == scsId) + { + my_cpritmr.t_period = 10000; + my_cpritmr.t_us = 1000; + my_cpritmr.num_tti = 10; + my_cpritmr.num_tti_per_sfn = 10; + + my_cpritmr.num_t_dl[0] =10;// 7; // dl slot num + my_cpritmr.num_t_dl_symb[0] = 14;//6; // dl symbol num + my_cpritmr.num_t_ul_symb[0] = 14;//4; // ul symbol num + my_cpritmr.num_ants[0] = 2; + } + else + { + return; + } } int32_t ret = mtimer_init4phy(&my_cpritmr); - if (0 != ret) - { - return; - } + if (0 != ret) + { + return; + } uint32_t apeId = 0; uint32_t runCore = my_cpritmr.runCoreId; @@ -252,14 +254,14 @@ void ecs_rfm1_delete_cell(uint32_t scsId, uint32_t cellId, uint32_t coreId) flag++; debug_write((DBG_DDR_IDX_DRV_BASE+52), flag); // 0xb7e060d0 #endif - } +} - volatile uint32_t gCellFlag = 0; - void phy_init(void) - { +volatile uint32_t gCellFlag = 0; +void phy_init(void) +{ gCellFlag = 0; return; - } +} void phy_oam_msg_proc(uint32_t u32msg_addr, uint32_t u32msg_size) { @@ -271,14 +273,14 @@ void phy_msg_proc(uint32_t u32msg_addr, uint32_t u32msg_size) uint32_t msg_buf = do_read(u32msg_addr); uint32_t msg_type = do_read(msg_buf); - //memcpy_ucp(0x60000000, msg_buf, 32); // temp code + //memcpy_ucp(0x60000000, msg_buf, 32); // temp code if (CELL_SETUP_TYPE_SIMULATION == msg_type) { uint32_t msg_new_del = do_read(msg_buf+12); // 0; // - uint32_t scs_id = do_read(msg_buf+16); // 1; // - uint32_t cell_id = do_read(msg_buf+20); // 0; // + uint32_t scs_id = do_read(msg_buf+16); // 1; // + uint32_t cell_id = do_read(msg_buf+20); // 0; // uint32_t run_core = do_read(msg_buf+24); - uint32_t frame_type = do_read(msg_buf+28); + uint32_t frame_type = do_read(msg_buf+28); if (1 < msg_new_del) { @@ -299,16 +301,15 @@ void phy_msg_proc(uint32_t u32msg_addr, uint32_t u32msg_size) } debug_write(DBG_DDR_COMMON_IDX(get_core_id(),1), 0x12345678); } - else if (ORX_MSG_TYPE_SIMULATION == msg_type) - { - phy_sniffer_start(); - debug_write(DBG_DDR_COMMON_IDX(get_core_id(),2), ORX_MSG_TYPE_SIMULATION); - } + else if (ORX_MSG_TYPE_SIMULATION == msg_type) + { + phy_sniffer_start(); + debug_write(DBG_DDR_COMMON_IDX(get_core_id(),2), ORX_MSG_TYPE_SIMULATION); + } return; } - uint32_t gDdrCallCnt = 0; void ddr_wr_callback() { @@ -329,5 +330,9 @@ void phy_sniffer_data_proc() gOrxCallCnt++; debug_write((DBG_DDR_IDX_DRV_BASE+123), gOrxCallCnt); // 0x1ec } - + +void Mem_Init(void) +{ + return ; +}