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1. fix UCP4008-SL-EVB feature #1612;

Browse Source 
2. add para for phy_sniffer_start;
3. test case: case34, case44, case45, case48, case41, case42, case21.
This commit is contained in:
xinxin.li 2024-01-29 14:47:15 +08:00
parent 0456ba42e4
commit 926ce7e7a9
16 changed files with 125 additions and 79 deletions
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15
inc/drv_jesd_csu.h
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@ -43,6 +43,17 @@ typedef struct _tagJesdCsuNodePara
uint32_t allNum; // 需要csu搬运的总的数据长度，B为单位
}stJesdCsuNodePara;
/*******************************************************************************************************************
函数名称：jesd_set_protocol_rx_advance
函数入参：
uint32_t rxAdvance: 协议规定的接收提前量
返回值：
无
函数功能：协议规定的接收提前量，NR提前13us，LTE不提前，LTE模式下，需在建小区之前，调用该接口，修改协议提前量
********************************************************************************************************************/
void jesd_set_protocol_rx_advance(uint32_t rxAdvance);
/*******************************************************************************************************************
函数名称：jesd_csu_init
函数入参：
@ -59,13 +70,13 @@ int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode);
/*******************************************************************************************************************
函数名称：jesd_orx_csu_init
函数入参：
无
uint8_t margin: jesd csu一次搬移的数据量xnum=(32*2^margin)B，设置合理的margin值，确保allnum/xnum是个整数值
返回值：
0 : 正常
-1: 还未正常执行jesd_csu_init
函数功能：JESD ORX通道CSU初始化
********************************************************************************************************************/
int32_t jesd_orx_csu_init(void);
int32_t jesd_orx_csu_init(uint8_t margin);
/*******************************************************************************************************************
函数名称：jesd_csu_rx_inlatch_thres_cfg

5
inc/drv_rfm.h
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@ -238,12 +238,13 @@ int32_t set_cpri_rru_msg(CpriRruMsg_t rru_msg);
/*
函数名称：phy_sniffer_start
函数入参：无
函数入参：
uint32_t nOffsetUs:测量时偏移pp1s的us数
函数返回：0：正常；
-1：异常
函数功能：物理层通知平台，进行orx数据搬移
*/
int32_t phy_sniffer_start();
int32_t phy_sniffer_start(uint32_t nOffsetUs);
/*
函数名称：spu_ddr_monitor_start

1
public/common/ecs_dm/inc/jesd_drv_para.h
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@ -21,6 +21,7 @@ typedef struct JesdOrxPara
{
uint32_t orx_calldrv_cnt;
uint32_t orx_start_flag;
uint32_t orx_start_offset_us;
uint32_t orx_adjust_flag;
uint32_t orx_adjust_val_lo;
uint32_t orx_adjust_val_hi;

5
public/ecs_rfm_spu1/driver/inc/jesd_csu.h
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@ -33,6 +33,7 @@ typedef struct _tagJesdCsuPara
uint8_t nTotal; // n+cs+padding
uint8_t seq;
uint8_t margin;
uint8_t orxMargin;
uint8_t tfMode;
}stJesdCsuPara;
@ -49,9 +50,11 @@ typedef struct _tagJesdListPara
uint32_t listNodeNum;
}stJesdListPara;
int32_t jesd_para_init();
int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode);
int32_t jesd_orx_csu_init(void);
int32_t jesd_orx_csu_init(uint8_t margin);
int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint32_t almostfull_threshold);

4
public/ecs_rfm_spu1/driver/inc/jesd_orx_timer.h
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@ -3,7 +3,7 @@
#include "typedef.h"
#define SNIFFER_TMR_PERIOD 100000 // 100ms
#define SNIFFER_TMR_PERIOD 160000 // 160ms
int32_t jesd_orx_mtimer_init(int32_t nTmrId, int32_t nScsId);
@ -29,7 +29,7 @@ void stop_jesd_orx_timer(void);
int32_t jesd_orx_pin_ctrl(void);
// 物理层通知平台，进行orx数据搬移
int32_t phy_sniffer_start();
int32_t phy_sniffer_start(uint32_t nOffsetUs);
#endif

3
public/ecs_rfm_spu1/driver/inc/jesd_timer.h
View File

@ -50,6 +50,9 @@ int32_t jesd_mtimer_init(int32_t nTmrId, int32_t nScsId, int32_t nTddSlotNum);
int32_t jesd_timer_init(int32_t nTmrId, int32_t nScsId, int32_t nTddSlotNum);
// 协议规定的接收提前量，NR提前13us，LTE不提前，LTE模式下，需在建小区之前，调用该接口，修改协议提前量
void jesd_set_protocol_rx_advance(uint32_t rxAdvance);
int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr);
int32_t jesd_timer_clear_cell(int32_t nTmrId, uint8_t scsId);

7
public/ecs_rfm_spu1/driver/src/cpri_timer.s.c
View File

@ -126,6 +126,7 @@ void cpri_timer_reconfig(phy_timer_config_ind_t *my_cpritmr)
{
pCpriDelay->cpriTxOffset = do_read_volatile(CSU_TX_ADVANCE_SAMPLE);
pCpriDelay->cpriRxOffset = do_read_volatile(CSU_RX_TD_SAMPLE); // ns
pCpriDelay->cpriUlFrmDataOffset = do_read_volatile(CSU_UL_HEADER_DATA_OFFSET);
__ucps2_synch(0);
}
@ -141,7 +142,7 @@ void cpri_timer_reconfig(phy_timer_config_ind_t *my_cpritmr)
do_write(CPRI_TDD_ADVANCE_ADDR, pCpriDelay->cpriTddOffset);
do_write(CPRI_DELAY_ADDR, pCpriDelay->cpri10msRxOffset);
uint32_t addr = (uint32_t)&(phyPara[pMtimerPara->scsId].gpsOffset);
uint32_t addr = (uint32_t)&(phyPara[my_cpritmr->scsId].gpsOffset);
uint16_t gpsOffset = do_read_volatile_short(addr);
pCpriDelay->cpri10ms2PP1sTxOffset = pCpriDelay->cpri10msOffset + gpsOffset; // advance us
@ -282,9 +283,7 @@ void cpri_timer_rcfg_act()
if ((0 == pMtimerSfn->slotNumPP1s) && (runCore == cellCore)) // no frame header offset, and the first cell
{
pMtimerSfn->txSfnNum = 0;
pMtimerSfn->rxSfnNum = 0; //1023;
//pMtimerSfn->rxSlotNum = pMtimerSfn->slotMaxNum - 1;
pMtimerSfn->rxSfnNum = pMtimerSfn->txSfnNum;
}
addr = (uint32_t)&(phyPara[nScsId].txSfnNum);
do_write(addr, pMtimerSfn->txSfnNum);

49
public/ecs_rfm_spu1/driver/src/jesd_csu.s.c
View File

@ -23,12 +23,12 @@ void isr_jesd_orx_csu()
if (JS_CSU_ALLPENDEVENT1 & BIT14)
{
gJesdOrxCsuIntCnt++;
debug_write((DBG_DDR_IDX_DRV_BASE+122), gJesdOrxCsuIntCnt); // 0x1E8
debug_write((DBG_DDR_IDX_DRV_BASE+58), gJesdOrxCsuIntCnt); // 0xE8
JS_CSU_TAGMASK2 &= (~BIT2);
JS_CSU_EVENTINTCLEAR = 46;
debug_write((DBG_DDR_IDX_DRV_BASE+50), GET_STC_CNT()); // 0xc8
debug_write((DBG_DDR_IDX_DRV_BASE+62), GET_STC_CNT()); // 0xF8
set_jesd_rf_state(JESD_ANT_ORX, GPIO_OFF);
set_jesd_rf_state(JESD_RF_ORX, GPIO_OFF);
set_jesd_rf_state(JESD_TRANS_ORX, GPIO_OFF);
@ -38,18 +38,8 @@ void isr_jesd_orx_csu()
}
}
int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode)
int32_t jesd_para_init()
{
if ((0 == antNum) || (8 < antNum))
{
return -1;
}
if (7 < margin)
{
return -1;
}
volatile uint32_t *reg_addr = NULL;
reg_addr = &JS_CSU_DMAADDRL0;
@ -61,8 +51,7 @@ int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode)
memset(&gJesdTxListPara[0][0], 0, sizeof(stJesdListPara)*JESD_CH_NUM*JESD_LIST_NUM);
memset(&gJesdRxListPara[0][0], 0, sizeof(stJesdListPara)*JESD_CH_NUM*JESD_LIST_NUM);
memset(&gJesdCsuPara, 0, sizeof(stJesdCsuPara));
gJesdCsuPara.antNum = antNum;
gJesdCsuPara.m = antNum*2;
gJesdCsuPara.n = JS_204B_CONVERTER_BITS;
gJesdCsuPara.cs = JS_204B_CS_BITS;
gJesdCsuPara.cf = JS_204B_CF_VAL;
@ -78,6 +67,23 @@ int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode)
{
gJesdCsuPara.nTotal = ((gJesdCsuPara.nTotal>>2)+1) << 2;
}
return 0;
}
int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode)
{
if ((0 == antNum) || (8 < antNum))
{
return -1;
}
if (7 < margin)
{
return -1;
}
gJesdCsuPara.antNum = antNum;
gJesdCsuPara.m = antNum*2;
gJesdCsuPara.seq = antNum;
gJesdCsuPara.margin = margin;
gJesdCsuPara.tfMode = tfMode;
@ -93,6 +99,7 @@ int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode)
gJesdCsuPara.m = gJesdCsuPara.m >> 1;
gJesdCsuPara.seq = gJesdCsuPara.seq >> 1;
}
uint32_t val = (((gJesdCsuPara.m>>1)-1)<<26)+((gJesdCsuPara.seq-1)<<24)+(((gJesdCsuPara.nTotal*gJesdCsuPara.m)/gJesdCsuPara.seq)<<16)+((gJesdCsuPara.n-8)<<8)+(margin<<4)+gJesdCsuPara.cs;
do_write((&JS_CSU_JESDTX0SET), val);
//debug_write((DBG_DDR_IDX_DRV_BASE+216), val); // 0x360
@ -117,15 +124,11 @@ int32_t jesd_csu_init(uint8_t antNum, uint8_t margin, uint8_t tfMode)
return 0;
}
int32_t jesd_orx_csu_init(void)
int32_t jesd_orx_csu_init(uint8_t margin)
{
if (0 == gJesdCsuPara.antNum)
{
return -1;
}
gJesdCsuPara.orxMargin = margin;
//uint32_t val = (((gJesdCsuPara.m>>1)-1)<<26)+((gJesdCsuPara.seq-1)<<24)+(((gJesdCsuPara.nTotal*gJesdCsuPara.m)/gJesdCsuPara.seq)<<16)+((gJesdCsuPara.n-8)<<8)+(gJesdCsuPara.margin<<4)+gJesdCsuPara.cs;
uint32_t val = (((JS_204B_ORX_M>>1)-1)<<26)+((gJesdCsuPara.nTotal*JS_204B_ORX_M)<<16)+((gJesdCsuPara.n-8)<<8)+(gJesdCsuPara.margin<<4)+gJesdCsuPara.cs;
uint32_t val = (((JS_204B_ORX_M>>1)-1)<<26)+((gJesdCsuPara.nTotal*JS_204B_ORX_M)<<16)+((gJesdCsuPara.n-8)<<8)+(gJesdCsuPara.orxMargin<<4)+gJesdCsuPara.cs;
do_write((&JS_CSU_JESDRX1SET), val);
do_write((&JS_CSU_ALMOSTFULLSENDTHRED), 0x80048010); // [30:16]sendthred,<4, stop write; [14:0]almostfull, >=0x400,start write
do_write((&JS_CSU_EM_BS_SMSEL_PREDATANUM), ((0x3<<14) | (0x5<<5) | 0x8));
@ -234,7 +237,7 @@ int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara*
int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId, uint8_t orxFlag)
{
uint8_t mrg = gJesdCsuPara.margin;
uint8_t mrg = (1 == orxFlag) ? (gJesdCsuPara.orxMargin) : (gJesdCsuPara.margin);
uint8_t seq = (1 == orxFlag) ? (1) : (gJesdCsuPara.seq);
// 设置链表节点cmd

2
public/ecs_rfm_spu1/driver/src/jesd_csu_nr_7ds2u.s.c
View File

@ -653,7 +653,7 @@ int32_t jesd_csu_init_nr_2500us_double_slot0()
int32_t jesd_sniffer_orx_csu_init()
{
jesd_orx_csu_init();
jesd_orx_csu_init(5);
stJesdCsuNodePara orxCsuNode[1];
//orx的链表地址
uint32_t orxListAddr = JESD_RX_LIST2_ADDR; // 0x8A00C000

16
public/ecs_rfm_spu1/driver/src/jesd_orx_timer.s.c
View File

@ -37,9 +37,10 @@ int32_t jesd_orx_mtimer_init(int32_t nTmrId, int32_t nScsId)
int32_t jesd_orx_timer_init(void)
{
stop_jesd_orx_timer();
jesd_orx_1pps_src_init(MTIMER_PP1S_SRC_TOD);
//mtimer_clear_all_event(MTIMER_JESD_RX1_ID);
//set_jesd_orx_tmr_period();
set_jesd_orx_tmr_period();
set_jesd_orx_1pps_scratch();
//set_jesd_orx_tmr_point(25000); // 25ms
@ -118,7 +119,7 @@ int32_t set_jesd_orx_timer_int(void)
#endif
int32_t set_jesd_orx_tmr_point(int32_t usPoint)
{
if ((SNIFFER_TMR_PERIOD) <= usPoint)
if ((SNIFFER_TMR_PERIOD) < usPoint)
{
return -1;
}
@ -158,7 +159,7 @@ int32_t jesd_orx_pin_ctrl(void)
return 0;
}
int32_t phy_sniffer_start()
int32_t phy_sniffer_start(uint32_t nOffsetUs)
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
JesdOrxPara_t* orx_para_ptr = pEcsDmLocalMgt->jesd_orx_para_ptr;
@ -172,9 +173,16 @@ int32_t phy_sniffer_start()
set_jesd_rf_state(JESD_ANT_ORX, GPIO_ON);
set_jesd_rf_state(JESD_RF_ORX, GPIO_ON);
set_jesd_rf_state(JESD_TRANS_ORX, GPIO_ON);
orx_para_ptr->orx_start_offset_us = nOffsetUs;
if (0 != nOffsetUs)
{
set_jesd_orx_tmr_point(nOffsetUs);
}
orx_para_ptr->orx_start_flag = 1;
orx_para_ptr->orx_calldrv_cnt++;
debug_write((DBG_DDR_IDX_DRV_BASE+64+8), orx_para_ptr->orx_calldrv_cnt); // 0x120
debug_write((DBG_DDR_IDX_DRV_BASE+56), orx_para_ptr->orx_calldrv_cnt); // 0xE0
return 0;
}

52
public/ecs_rfm_spu1/driver/src/jesd_timer.s.c
View File

@ -41,6 +41,7 @@ extern stMtimerPhyPara gMtimerSfnNum[SCS_MAX_NUM];
extern stMtimerSfnCal gMtimerSfnCalPara[SCS_MAX_NUM];
int32_t gCsuTxAdvanceNs = JESD_TX_ADVANCE_NS;
int32_t gCsuProtocolRx = JESD_RX_ADVANCE_NS;
int32_t gCsuRxAdvanceNs = JESD_RX_ADVANCE_NS - JESD_RRU_TD;
extern void rfm1_fapi_callback();
@ -74,6 +75,7 @@ void jesd_init(uint8_t option)
debug_write((DBG_DDR_IDX_DRV_BASE+2+(apeId<<2)), flag); // 0xB8
#endif
jesd_para_init();
jesd_mtimer_init(MTIMER_JESD_RX0_ID, NR_SCS_30K, 10);
jesd_mtimer_init(MTIMER_JESD_RX1_ID, NR_SCS_30K, 10);
#ifdef PALLADIUM_TEST
@ -98,6 +100,12 @@ void jesd_init(uint8_t option)
#endif
}
// 协议规定的接收提前量，NR提前13us，LTE不提前，LTE模式下，需在建小区之前，调用该接口，修改协议提前量
void jesd_set_protocol_rx_advance(uint32_t rxAdvance)
{
gCsuProtocolRx = rxAdvance;
}
void jesd_delay_init()
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
@ -260,10 +268,10 @@ int32_t jesd_timer_get_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesd
get_jesd_timer_point_para(nTmrId, pMtimerPara->rxCsuOff[i].timerPoint, &pMtimerPara->rxCsuOff[i].pointL,
&pMtimerPara->rxCsuOff[i].pointM, &pMtimerPara->rxCsuOff[i].pointH);
debug_write((DBG_DDR_IDX_DRV_BASE+48+(i<<2)), pMtimerTxPara->txCsuOn[i].timerPoint); // 0xC0
debug_write((DBG_DDR_IDX_DRV_BASE+49+(i<<2)), pMtimerTxPara->txCsuOff[i].timerPoint); // 0xC4
debug_write((DBG_DDR_IDX_DRV_BASE+50+(i<<2)), pMtimerPara->rxCsuOn[i].timerPoint); // 0xC8
debug_write((DBG_DDR_IDX_DRV_BASE+51+(i<<2)), pMtimerPara->rxCsuOff[i].timerPoint); // 0xCC
debug_write((DBG_DDR_IDX_DRV_BASE+992+(i<<2)), pMtimerTxPara->txCsuOn[i].timerPoint); // 0xF80
debug_write((DBG_DDR_IDX_DRV_BASE+993+(i<<2)), pMtimerTxPara->txCsuOff[i].timerPoint); // 0xF84
debug_write((DBG_DDR_IDX_DRV_BASE+994+(i<<2)), pMtimerPara->rxCsuOn[i].timerPoint); // 0xF88
debug_write((DBG_DDR_IDX_DRV_BASE+995+(i<<2)), pMtimerPara->rxCsuOff[i].timerPoint); // 0xF8C
}
}
@ -321,10 +329,10 @@ int32_t jesd_timer_get_rf_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdt
get_jesd_timer_point_para(nTmrId, pMtimerPara->rxRfOff[i].timerPoint, &pMtimerPara->rxRfOff[i].pointL,
&pMtimerPara->rxRfOff[i].pointM, &pMtimerPara->rxRfOff[i].pointH);
debug_write((DBG_DDR_IDX_DRV_BASE+56+(i<<2)), pMtimerPara->txRfOn[i].timerPoint); // 0xE0
debug_write((DBG_DDR_IDX_DRV_BASE+57+(i<<2)), pMtimerPara->txRfOff[i].timerPoint);// 0xE4
debug_write((DBG_DDR_IDX_DRV_BASE+58+(i<<2)), pMtimerPara->rxRfOn[i].timerPoint); // 0xE8
debug_write((DBG_DDR_IDX_DRV_BASE+59+(i<<2)), pMtimerPara->rxRfOff[i].timerPoint);// 0xEC
debug_write((DBG_DDR_IDX_DRV_BASE+1000+(i<<2)), pMtimerPara->txRfOn[i].timerPoint); // 0xFA0
debug_write((DBG_DDR_IDX_DRV_BASE+1001+(i<<2)), pMtimerPara->txRfOff[i].timerPoint);// 0xFA4
debug_write((DBG_DDR_IDX_DRV_BASE+1002+(i<<2)), pMtimerPara->rxRfOn[i].timerPoint); // 0xFA8
debug_write((DBG_DDR_IDX_DRV_BASE+1003+(i<<2)), pMtimerPara->rxRfOff[i].timerPoint);// 0xFAC
}
return 0;
@ -348,7 +356,7 @@ int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
stMtimerPhyPara* pMtimerSfn = &gMtimerSfnNum[nTmrId];
JesdDelay_t* pJesdDelay = pEcsDmLocalMgt->jesd_delay_ptr;
uint32_t addr = (uint32_t)&(phyPara[pMtimerPara->scsId].gpsOffset);
uint32_t addr = (uint32_t)&(phyPara[my_jesdtmr->scsId].gpsOffset);
uint16_t gpsOffset = do_read_volatile_short(addr);
pJesdDelay->gps_offset = gpsOffset;
@ -442,7 +450,7 @@ int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
if (JESD_CSU_CTRL == gJesdIOMode)
{
gCsuRxAdvanceNs = JESD_RX_ADVANCE_NS - do_read_volatile(CSU_RX_TD_SAMPLE);
gCsuRxAdvanceNs = gCsuProtocolRx - do_read_volatile(CSU_RX_TD_SAMPLE);
gCsuTxAdvanceNs = do_read_volatile(CSU_TX_ADVANCE_SAMPLE);
if (FDD_MODE == gJesdTFMode)
@ -522,8 +530,7 @@ void jesd_timer_rcfg_act(int32_t nTmrId)
if ((0 == pMtimerSfn->slotNumPP1s) && (runCore == cellCore)) // no frame header offset, and the first cell
{
pMtimerSfn->txSfnNum = 0;
pMtimerSfn->rxSfnNum = 0; //1023;
pMtimerSfn->rxSfnNum = pMtimerSfn->txSfnNum;
//pMtimerSfn->rxSlotNum = pMtimerSfn->slotMaxNum - 1;
}
addr = (uint32_t)&(phyPara[nScsId].txSfnNum);
@ -1196,18 +1203,13 @@ void jesd_10ms_callback(uint8_t nTmrId)
#ifdef ENABLE_SFNCAL
if (MTIMER_JESD_RX0_ID == nTmrId)
{
debug_write((DBG_DDR_IDX_DRV_BASE+57), GET_STC_CNT());
mtimer_1pps_func(nTmrId);
}
#endif
pMtimerInt->pp1sIntCnt++;
debug_write((DBG_DDR_IDX_DRV_BASE+64+1+(nTmrId<<2)), pMtimerInt->pp1sIntCnt); // 0x104, 0x114
/***********************************************************************************/
//if ((7 == (pMtimerInt->pp1sIntCnt&0x7)) && (MTIMER_JESD_RX0_ID == nTmrId) && (0 < pMtimerInt->tddOffsetIntCnt))
{
//phy_sniffer_start();
}
/***********************************************************************************/
#if 0 //def PALLADIUM_TEST
uint32_t val = 0;
@ -1282,20 +1284,18 @@ void jesd_10ms_callback(uint8_t nTmrId)
do_write(tFlagAddr, (1<<MTMR_TDD_OFFSET_10000)); // clear int flag
pMtimerInt->insOffsetIntCnt++;
#ifdef PALLADIUM_TEST
debug_write((DBG_DDR_IDX_DRV_BASE+64+9), pMtimerInt->insOffsetIntCnt); // 0x124
debug_write((DBG_DDR_IDX_DRV_BASE+73), pMtimerInt->insOffsetIntCnt); // 0x124
#endif
//set_jesd_rf_state(JESD_ANT_ORX, GPIO_OFF);
//set_jesd_rf_state(JESD_RF_ORX, GPIO_OFF);
//set_jesd_rf_state(JESD_TRANS_ORX, GPIO_OFF);
jesd_csu_orx_start(0);
debug_write((DBG_DDR_IDX_DRV_BASE+58), GET_STC_CNT()); // 0xc4
debug_write((DBG_DDR_IDX_DRV_BASE+61), GET_STC_CNT()); // 0xF4
uint64_t rt_val = get_mtimer_rt_scr_value(MTIMER_JESD_RX1_ID);
debug_write((DBG_DDR_IDX_DRV_BASE+56), rt_val&0xFFFFFFFF); // 0xc0
debug_write((DBG_DDR_IDX_DRV_BASE+57), rt_val>>32); // 0xc4
debug_write((DBG_DDR_IDX_DRV_BASE+52), rt_val&0xFFFFFFFF); // 0xD0
debug_write((DBG_DDR_IDX_DRV_BASE+53), rt_val>>32); // 0xD4
stop_jesd_orx_timer();
// phy callback
phy_sniffer_data_proc();
//phy_sniffer_data_proc();
}
cEventFlag = do_read_volatile(cFlagAddr);
tEventFlag = do_read_volatile(tFlagAddr);

13
public/ecs_rfm_spu1/driver/src/mtimer_cal.s.c
View File

@ -207,11 +207,18 @@ int32_t mtimer_orx_adjust(void)
if (1 == orx_para_ptr->orx_start_flag)
{
//start_jesd_orx_timer();
debug_write((DBG_DDR_IDX_DRV_BASE+60), GET_STC_CNT()); // 0xF0
if (0 == orx_para_ptr->orx_start_offset_us)
{
jesd_csu_orx_start(0);
debug_write((DBG_DDR_IDX_DRV_BASE+49), GET_STC_CNT()); // 0xc4
}
else
{
start_jesd_orx_timer();
}
orx_para_ptr->orx_start_flag = 0;
}
#if 0
if (0 < orx_para_ptr->orx_calldrv_cnt)
{
orx_para_ptr->orx_adjust_flag = do_read_volatile(ORX_ADJUST_FLAG_ADDR);
@ -231,7 +238,7 @@ int32_t mtimer_orx_adjust(void)
do_write(ORX_ADJUST_FLAG_ADDR, 0);
}
}
#endif
return 0;
}

12
public/ecs_rfm_spu1/driver/src/mtimer_drv.s.c
View File

@ -40,9 +40,21 @@ int32_t mtimer_para_init(uint8_t nTmrId, int32_t nScsId, int32_t nTddSlotNum)
coreClk = sample_clk * sam_clk_ratio;
}
else if (PROTOCOL_ECPRI == nBsType)
{
uint32_t rateOpt = get_protocol_opt();
if (ECPRI_OPTION_10G == rateOpt)
{
coreClk = 156240000; // 161132000; // 402832000;
}
else if (ECPRI_OPTION_25G == rateOpt)
{
coreClk = 402832000;
}
else
{
return -1;
}
}
else
{
return -1;

2
public/ecs_rfm_spu1/driver/src/rfm1_drv.s.c
View File

@ -74,13 +74,11 @@ void ecs_rfm1_drv_init(void)
debug_write((DBG_DDR_IDX_DRV_BASE+1+(apeId<<2)), flag); // 0xB4
#endif
#if 1
gtimer2_init(0);
rfm1_gtimer2_1_set_int();
#ifdef PALLADIUM_TEST
flag++;
debug_write((DBG_DDR_IDX_DRV_BASE+1+(apeId<<2)), flag); // 0xB4
#endif
#endif
ecs_hw_que_init(apeId);

8
public/ecs_rfm_spu1/top/src/phy_init.s.c
View File

@ -314,11 +314,11 @@ void phy_msg_proc(uint32_t u32msg_addr, uint32_t u32msg_size)
}
else if (ORX_MSG_TYPE_SIMULATION == msg_type)
{
// if (1 > orx_para_ptr->orx_calldrv_cnt)
// {
phy_sniffer_start();
//if (1 > orx_para_ptr->orx_calldrv_cnt)
{
phy_sniffer_start(10000);
debug_write(DBG_DDR_COMMON_IDX(get_core_id(),2), ORX_MSG_TYPE_SIMULATION);
// }
}
}
return;

2
public/test/testcases/case42/fronthaul/note.txt
View File

@ -1 +1 @@
NR15K，122.88M采样率，40M带宽，发256QAM宽带信号
NR15K，61.44M采样率，40M带宽，发256QAM宽带信号