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Merge branch 'dev_ck_v2.1_new_feature#1335' into 'dev_ck_v2.1'

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基站时延配置增加上行数据相对CPRI帧头偏移new feature#1335

See merge request ucp/driver/ucp4008_platform_spu!64
This commit is contained in:
Xianfeng Du 2023-11-29 02:51:14 +00:00
commit 9440e8a1d6
7 changed files with 90 additions and 26 deletions
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18
inc/drv_rfm.h
View File

@ -187,19 +187,29 @@ int32_t mtimer_del_cell_cfg(stPhyDelCell* delCell);
/*
函数名称：get_cpri_delay
函数入参：
*delay: cpri的接收延迟量，单位为us
函数功能：获取cpri的接收延迟量
*delay: cpri的接收延迟量，单位为ns
函数功能：获取oam或phy脚本设置的cpri的接收延迟量，如果oam或phy脚本配置的延迟量不足6us，
驱动实际取6us做接收延迟量（考虑到中断处理延迟及最小光纤延迟）
*/
void get_cpri_delay(uint32_t* delay);
/*
函数名称：get_cpri_advance
函数入参：
*advance: cpri的发送提前量，单位为us
函数功能：获取cpri的发送提前量
*advance: cpri的发送提前量，单位为ns
函数功能：获取oam或phy脚本设置的cpri的发送提前量，如果oam或phy脚本配置的延迟量不足6us，
驱动实际取6us做发送提前量（考虑到中断处理延迟及最小光纤延迟）
*/
void get_cpri_advance(uint32_t* advance);
/*
函数名称：get_cpri_frame_data_offset
函数入参：
*offset: cpri的上行帧头与上行数据直接的偏移量，单位为ns
函数功能：获取oam或phy脚本设置的cpri的上行帧头与上行数据直接的偏移量
*/
void get_cpri_frame_data_offset(uint32_t* offset);
/*
函数名称：set_cpri_rru_msg
函数入参：

4
public/common/driver/inc/phy_para.h
View File

@ -290,10 +290,6 @@ void set_rx_slot_intflag(uint8_t scs, int32_t flag);
int32_t get_rx_slot_intflag(uint8_t scs);
void get_cpri_delay(uint32_t* delay);
void get_cpri_advance(uint32_t* advance);
int32_t send_cpri_csu_stop_cmd();
int32_t send_cpri_csu_start_cmd();

10
public/common/driver/src/phy_para.s.c
View File

@ -152,16 +152,6 @@ int32_t get_rx_slot_intflag(uint8_t scs)
return do_read_volatile(&phyPara[scs].rxSlotIntFlag);
}
void get_cpri_delay(uint32_t* delay)
{
*delay = do_read_volatile(CPRI_DELAY_ADDR);
}
void get_cpri_advance(uint32_t* advance)
{
*advance = do_read_volatile(CPRI_ADVANCE_ADDR);
}
int32_t send_cpri_csu_stop_cmd()
{
if (1 == *gCpriCsuStopCmd)

29
public/common/ecs_dm/inc/cpri_delay.h
View File

@ -71,6 +71,7 @@ typedef struct _tagCpriDelayMeasure
// 10ms offset, ns as unit
uint32_t cpriTxOffset;
uint32_t cpriRxOffset;
uint32_t cpriUlFrmDataOffset; // offset of ul data to ul frame header
// 10ms tx offset
uint32_t cpri10msOffset;
uint32_t cpri10msOffsetSam[64]; // 采样64次取平均值
@ -106,6 +107,7 @@ typedef struct _tagCpriSetLinkDelay
uint8_t u8rsv[3];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
}stCpriSetLinkDelay;
typedef struct _tagCpriGetLinkDelay
@ -115,6 +117,7 @@ typedef struct _tagCpriGetLinkDelay
uint8_t u8rsv[2];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
}stCpriGetLinkDelay;
typedef struct _tagCpriGetRndDelay
@ -177,4 +180,30 @@ void get_cpri_rndtrip_delay(uint8_t u8fiber_port, stCpriGetRndDelay* pCpriRndDea
stCpriFrameHeadOffsetRsp* set_frame_head_offset(stCpriFrameHeadOffsetReq* pCpriFrameHeadOffset);
void get_cpri_framehead_offset(stCpriGetFrameHeadOffset* pCpriFrameHeadOffset);
/*
函数名称：get_cpri_delay
函数入参：
*delay: cpri的接收延迟量，单位为ns
函数功能：获取oam或phy脚本设置的cpri的接收延迟量，如果oam或phy脚本配置的延迟量不足6us，
驱动实际取6us做接收延迟量（考虑到中断处理延迟及最小光纤延迟）
*/
void get_cpri_delay(uint32_t* delay);
/*
函数名称：get_cpri_advance
函数入参：
*advance: cpri的发送提前量，单位为ns
函数功能：获取oam或phy脚本设置的cpri的发送提前量，如果oam或phy脚本配置的延迟量不足6us，
驱动实际取6us做发送提前量（考虑到中断处理延迟及最小光纤延迟）
*/
void get_cpri_advance(uint32_t* advance);
/*
函数名称：get_cpri_frame_data_offset
函数入参：
*offset: cpri的上行帧头与上行数据直接的偏移量，单位为ns
函数功能：获取oam或phy脚本设置的cpri的上行帧头与上行数据直接的偏移量
*/
void get_cpri_frame_data_offset(uint32_t* offset);
#endif /* CPRI_DELAY_H_ */

31
public/ecs_rfm_spu1/driver/src/cpri_delay.s.c
View File

@ -420,8 +420,10 @@ stCpriSetDelayRsp* set_cpri_link_delay(stCpriSetLinkDelay* pCpriSetDelay)
pCpriDelay->cpriTxOffset = pCpriSetDelay->u32dl_frame_offset;
pCpriDelay->cpriRxOffset = pCpriSetDelay->u32ul_frame_offset;
pCpriDelay->cpriUlFrmDataOffset = pCpriSetDelay->u32ul_data_frame_offset;
debug_write((DBG_DDR_IDX_DRV_BASE+1012), pCpriDelay->cpriTxOffset); // 0xfd0
debug_write((DBG_DDR_IDX_DRV_BASE+1014), pCpriDelay->cpriRxOffset); // 0xfd8
debug_write((DBG_DDR_IDX_DRV_BASE+1015), pCpriDelay->cpriUlFrmDataOffset); // 0xfdc
gCpriSetDelayRep.u8result = 1;
@ -452,6 +454,7 @@ void get_cpri_link_delay(uint8_t u8fiber_port, stCpriGetLinkDelay* pCpriGetDelay
pCpriGetDelay->u8result = 1;
pCpriGetDelay->u32dl_frame_offset = pCpriDelay->cpriTxOffset;
pCpriGetDelay->u32ul_frame_offset = pCpriDelay->cpriRxOffset;
pCpriGetDelay->u32ul_data_frame_offset = pCpriDelay->cpriUlFrmDataOffset;
return;
}
@ -499,6 +502,7 @@ stCpriFrameHeadOffsetRsp* set_frame_head_offset(stCpriFrameHeadOffsetReq* pCpriF
stCpriFrameHeadOff.u8result = 1;
return &stCpriFrameHeadOff;
}
void get_cpri_framehead_offset(stCpriGetFrameHeadOffset* pCpriFrameHeadOffset)
{
if (NULL == pCpriFrameHeadOffset)
@ -510,3 +514,30 @@ void get_cpri_framehead_offset(stCpriGetFrameHeadOffset* pCpriFrameHeadOffset)
pCpriFrameHeadOffset->u8result = 1;
return;
}
void get_cpri_delay(uint32_t* delay)
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
stCpriDelayMeasure* pCpriDelay = pEcsDmLocalMgt->pCpriDelay;
*delay = pCpriDelay->cpriTxOffset;
}
void get_cpri_advance(uint32_t* advance)
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
stCpriDelayMeasure* pCpriDelay = pEcsDmLocalMgt->pCpriDelay;
*advance = pCpriDelay->cpriRxOffset;
}
void get_cpri_frame_data_offset(uint32_t* offset)
{
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
stCpriDelayMeasure* pCpriDelay = pEcsDmLocalMgt->pCpriDelay;
*offset = pCpriDelay->cpriUlFrmDataOffset;
}

2
public/ecs_rfm_spu1/platform/inc/ecs_rfm_spu1_oam.h
View File

@ -45,6 +45,7 @@ typedef struct tSpuOamBaseDelaySetReq {
uint8_t u8rsv[3];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
} SpuOamBaseDelaySetReq_t;
typedef struct tSpuOamBaseDelaySetRsp {
@ -64,6 +65,7 @@ typedef struct tSpuOamBaseDelayQryRsp {
uint8_t u8rsv[2];
uint32_t u32dl_frame_offset;
uint32_t u32ul_frame_offset;
uint32_t u32ul_data_frame_offset;
} SpuOamBaseDelayQryRsp_t;
typedef struct tSpuOamFiberDelayQryReq {

22
public/ecs_rfm_spu1/platform/src/ecs_rfm_spu1_oam.s.c
View File

@ -138,12 +138,16 @@ void oam_base_delay_proc(SpuOamBaseDelaySetReq_t *spu_oam_base_delay_set_ptr, Oa
g_oam_base_delay_set_rsp_ptr->u8fiber_port = oam_base_delay_set_rsp_ptr->u8fiber_port;
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 42), g_oam_base_delay_set_rsp_ptr->u8result);/*0xb7e016a8*/
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 43), g_oam_base_delay_set_rsp_ptr->u8fiber_port);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 43), spu_oam_base_delay_set_ptr->u32ul_data_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 44), spu_oam_base_delay_set_ptr->u32dl_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 45), spu_oam_base_delay_set_ptr->u32ul_frame_offset);
UCP_PRINT_LOG("oam_base_delay_proc cellIndex:%d\n", spu_oam_msg_ptr->cellIndex);
UCP_PRINT_LOG("oam_base_delay_proc u8result:%d\n", g_oam_base_delay_set_rsp_ptr->u8result);
UCP_PRINT_LOG("oam_base_delay_proc u8fiber_port:%d\n", g_oam_base_delay_set_rsp_ptr->u8fiber_port);
UCP_PRINT_ERROR("oam_base_delay_proc cellIndex:%d\n", spu_oam_msg_ptr->cellIndex);
UCP_PRINT_ERROR("oam_base_delay_proc u8result:%d\n", g_oam_base_delay_set_rsp_ptr->u8result);
UCP_PRINT_ERROR("oam_base_delay_proc u8fiber_port:%d\n", g_oam_base_delay_set_rsp_ptr->u8fiber_port);
UCP_PRINT_ERROR("oam_base_delay_proc u32ul_data_frame_offset:0x%x\n", spu_oam_base_delay_set_ptr->u32ul_data_frame_offset);
UCP_PRINT_ERROR("oam_base_delay_proc u32dl_frame_offset:0x%x\n", spu_oam_base_delay_set_ptr->u32dl_frame_offset);
UCP_PRINT_ERROR("oam_base_delay_proc u32ul_frame_offset:0x%x\n", spu_oam_base_delay_set_ptr->u32ul_frame_offset);
oam_spu_send_msg(spu_oam_msg_ptr->cellIndex, (uint32_t)g_oam_base_delay_set_rsp_ptr, sizeof(SpuOamBaseDelaySetRsp_t), SPU_OAM_BASE_DELAY_SET_RSP);
@ -162,14 +166,16 @@ void oam_base_qry_proc(SpuOamBaseDelayQryReq_t *spu_oam_base_delay_qry_pt
/*调用接口获取配置结果0:fail 1:ok*/
get_cpri_link_delay(spu_oam_base_delay_qry_ptr->u8fiber_port, (stCpriGetLinkDelay*)g_oam_base_delay_qry_rsp_ptr);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 46), g_oam_base_delay_qry_rsp_ptr->u8fiber_port);/*0xb7e016b8*/
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 47), g_oam_base_delay_qry_rsp_ptr->u8result);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 46), g_oam_base_delay_qry_rsp_ptr->u8result);/*0xb7e016b8*/
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 47), g_oam_base_delay_qry_rsp_ptr->u32ul_data_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 48), g_oam_base_delay_qry_rsp_ptr->u32dl_frame_offset);
debug_write(DBG_DDR_COMMON_IDX(u8core_id, 49), g_oam_base_delay_qry_rsp_ptr->u32ul_frame_offset);
UCP_PRINT_LOG("oam_base_qry_proc u8fiber_port:%d u8result:%d\n", \
UCP_PRINT_ERROR("oam_base_qry_proc u8fiber_port:%d u8result:%d\n", \
g_oam_base_delay_qry_rsp_ptr->u8fiber_port, g_oam_base_delay_qry_rsp_ptr->u8result);
UCP_PRINT_LOG("oam_base_qry_proc dl:0x%x ul:0x%x\n", \
UCP_PRINT_ERROR("oam_base_qry_proc dl:0x%x ul:0x%x\n", \
g_oam_base_delay_qry_rsp_ptr->u32dl_frame_offset, g_oam_base_delay_qry_rsp_ptr->u32ul_frame_offset);
UCP_PRINT_ERROR("oam_base_qry_proc u32ul_data_frame_offset:0x%x\n", g_oam_base_delay_qry_rsp_ptr->u32ul_data_frame_offset);
oam_spu_send_msg(spu_oam_msg_ptr->cellIndex, (uint32_t)g_oam_base_delay_qry_rsp_ptr, sizeof(SpuOamBaseDelayQryRsp_t), SPU_OAM_BASE_DELAY_QRY_RSP);