diff --git a/public/ecs_rfm_spu1/driver/inc/cpri_csu_nr_2period.h b/public/ecs_rfm_spu1/driver/inc/cpri_csu_nr_2period.h new file mode 100644 index 0000000..9bbc706 --- /dev/null +++ b/public/ecs_rfm_spu1/driver/inc/cpri_csu_nr_2period.h @@ -0,0 +1,85 @@ +#ifndef _CPRI_CSU_NR_2PERIOD_H_ +#define _CPRI_CSU_NR_2PERIOD_H_ + +#include "typedef.h" +#include "cpri_csu_api.h" + +#define CPRI_NR2PERIOD_ID_NUM 6 + +//#define CPRI_LINK_START_ADDR 0x721E800 +#define CPRI_NR2PERIOD_TX_DUMMY1_COMPRESS_LEN 0x1348 +#define CPRI_NR2PERIOD_TX_DUMMY1_AXCDATA_LEN 0x26900 +#define CPRI_NR2PERIOD_TX_DUMMY1_COMPRESS_ADDR 0xB4200000 // 0x1348 +#define CPRI_NR2PERIOD_TX_DUMMY1_AXC1DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY1_COMPRESS_ADDR+CPRI_NR2PERIOD_TX_DUMMY1_COMPRESS_LEN)//0xB4201348 // 0x26900 +#define CPRI_NR2PERIOD_TX_DUMMY1_AXC2DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY1_AXC1DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY1_AXCDATA_LEN) //0xB4227C48 // 0x26900 +#define CPRI_NR2PERIOD_TX_DUMMY1_AXC3DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY1_AXC2DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY1_AXCDATA_LEN) //0xB424E548 // 0x26900 +#define CPRI_NR2PERIOD_TX_DUMMY1_AXC4DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY1_AXC3DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY1_AXCDATA_LEN) //0xB4274E48 // 0x26900 +#define CPRI_NR2PERIOD_TX_DUMMY1_AGC_ADDR (CPRI_NR2PERIOD_TX_DUMMY1_AXC4DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY1_AXCDATA_LEN) //0xB429B748 // 0x1348 + +#define CPRI_NR2PERIOD_TX_DUMMY2_COMPRESS_LEN 0x2248 +#define CPRI_NR2PERIOD_TX_DUMMY2_AXCDATA_LEN 0x44900 +#define CPRI_NR2PERIOD_TX_DUMMY2_COMPRESS_ADDR 0xB429CA90 // 0x2248 +#define CPRI_NR2PERIOD_TX_DUMMY2_AXC1DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY2_COMPRESS_ADDR+CPRI_NR2PERIOD_TX_DUMMY2_COMPRESS_LEN)//0xB429ECD8 // 0x44900 +#define CPRI_NR2PERIOD_TX_DUMMY2_AXC2DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY2_AXC1DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY2_AXCDATA_LEN) //0xB42E35D8 // 0x44900 +#define CPRI_NR2PERIOD_TX_DUMMY2_AXC3DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY2_AXC2DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY2_AXCDATA_LEN) //0xB4327ED8 // 0x44900 +#define CPRI_NR2PERIOD_TX_DUMMY2_AXC4DATA_ADDR (CPRI_NR2PERIOD_TX_DUMMY2_AXC3DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY2_AXCDATA_LEN) //0xB436C7D8 // 0x44900 +#define CPRI_NR2PERIOD_TX_DUMMY2_AGC_ADDR (CPRI_NR2PERIOD_TX_DUMMY2_AXC4DATA_ADDR+CPRI_NR2PERIOD_TX_DUMMY2_AXCDATA_LEN) //0xB43B10D8 // 0x2248 + +#define CPRI_NR2PERIOD_RX_DUMMY1_COMPRESS_LEN 0x39DC +#define CPRI_NR2PERIOD_RX_DUMMY1_AXCDATA_LEN 0x73B80 +#define CPRI_NR2PERIOD_RX_DUMMY1_COMPRESS_ADDR 0xB43B3320 // 0x39DC +#define CPRI_NR2PERIOD_RX_DUMMY1_AXC1DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY1_COMPRESS_ADDR+CPRI_NR2PERIOD_RX_DUMMY1_COMPRESS_LEN)//0xB43B6CFC // 0x73B80 +#define CPRI_NR2PERIOD_RX_DUMMY1_AXC2DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY1_AXC1DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY1_AXCDATA_LEN) //0xB442A87C // // 0x73B80 +#define CPRI_NR2PERIOD_RX_DUMMY1_AXC3DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY1_AXC2DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY1_AXCDATA_LEN) //0xB449E3FC // 0x73B80 +#define CPRI_NR2PERIOD_RX_DUMMY1_AXC4DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY1_AXC3DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY1_AXCDATA_LEN) //0xB4511F7C // 0x73B80 +#define CPRI_NR2PERIOD_RX_DUMMY1_AGC_ADDR (CPRI_NR2PERIOD_RX_DUMMY1_AXC4DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY1_AXCDATA_LEN) //0xB4585AFC // 0x39DC + +#define CPRI_NR2PERIOD_RX_DUMMY2_COMPRESS_LEN 0x2ADC +#define CPRI_NR2PERIOD_RX_DUMMY2_AXCDATA_LEN 0x55B80 +#define CPRI_NR2PERIOD_RX_DUMMY2_COMPRESS_ADDR 0xB45894D8 // 0x73B8 +#define CPRI_NR2PERIOD_RX_DUMMY2_AXC1DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY2_COMPRESS_ADDR+CPRI_NR2PERIOD_RX_DUMMY2_COMPRESS_LEN)//0xB458BFB4 // 0x55B80 +#define CPRI_NR2PERIOD_RX_DUMMY2_AXC2DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY2_AXC1DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY2_AXCDATA_LEN) //0xB45E1B34‬ // 0x55B80 +#define CPRI_NR2PERIOD_RX_DUMMY2_AXC3DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY2_AXC2DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY2_AXCDATA_LEN) //0xB46376B4 // 0x55B80 +#define CPRI_NR2PERIOD_RX_DUMMY2_AXC4DATA_ADDR (CPRI_NR2PERIOD_RX_DUMMY2_AXC3DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY2_AXCDATA_LEN) //0xB468D234 // 0x55B80 +#define CPRI_NR2PERIOD_RX_DUMMY2_AGC_ADDR (CPRI_NR2PERIOD_RX_DUMMY2_AXC4DATA_ADDR+CPRI_NR2PERIOD_RX_DUMMY2_AXCDATA_LEN) //0xB46E2DB4 // 0x2ADC + + +#if 0 +#define CPRI_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR 0x9F00000 // SM2 +#define CPRI_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR 0x9FF0400 // SM2 +#define CPRI_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR 0xA380000 // SM5 +#define CPRI_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR 0xA290400 // SM4 +#define CPRI_NR7DS2U_TX_SLOT_EVEN_COMPRESS_ADDR 0x9F3C100 +#define CPRI_NR7DS2U_TX_SLOT_ODD_COMPRESS_ADDR 0xA02C500 +#else +#define CPRI_NR2PERIOD_TX_SLOT_EVEN_F7SYMBOL_ADDR 0x60F00000 +#define CPRI_NR2PERIOD_TX_SLOT_EVEN_B7SYMBOL_ADDR 0x61380000 +#define CPRI_NR2PERIOD_TX_SLOT_ODD_F7SYMBOL_ADDR 0x60FF0400 +#define CPRI_NR2PERIOD_TX_SLOT_ODD_B7SYMBOL_ADDR 0x61290400 +#define CPRI_NR2PERIOD_TX_SLOT_EVEN_COMPRESS_ADDR 0x60F3C100 +#define CPRI_NR2PERIOD_TX_SLOT_ODD_COMPRESS_ADDR 0x6102C500 +#endif +#define CPRI_NR2PERIOD_TX_SLOT_EVEN_AGC_ADDR 0xB533D800 +#define CPRI_NR2PERIOD_TX_SLOT_ODD_AGC_ADDR 0xB533E700 + +#define CPRI_NR2PERIOD_RX_SLOTS_COMPRESS_ADDR 0x6BC00000 // 0x448 +#define CPRI_NR2PERIOD_RX_SLOTS_AXCDATA_ADDR 0x6BC00448 // 0x22400 +#define CPRI_NR2PERIOD_RX_SLOT_EVEN_COMPRESS_ADDR 0x6BC22848 // 0xF00 +#define CPRI_NR2PERIOD_RX_SLOT_EVEN_AXCDATA_ADDR 0x6BC23748 // 0x78000 +#define CPRI_NR2PERIOD_RX_SLOT_ODD_COMPRESS_ADDR 0x6BC9B748 // 0xF00 +#define CPRI_NR2PERIOD_RX_SLOT_ODD_AXCDATA_ADDR 0x6BC9C648 // 0x78000 + +#define CPRI_NR2PERIOD_RX_SLOTS_AGC_ADDR 0xB533F600 +#define CPRI_NR2PERIOD_RX_SLOT_EVEN_AGC_ADDR 0xB533FA48 +#define CPRI_NR2PERIOD_RX_SLOT_ODD_AGC_ADDR 0xB5340948 + + +void cpri_csu_axc_init_nr_2period(uint32_t nDummyFlag, stCpriCsuCmdFifoInfo* pTxCmdFifo, stCpriCsuCmdFifoInfo* pRxCmdFifo); +void cpri_csu_axc_latch_init_nr_2period(void); +void cpri_csu_axc_link_init_nr_2period(int32_t testMode); +void cpri_csu_axc_paramreg_init_nr_2period(); +void cpri_csu_axc_cmd_gen_2period(stCpriCsuCmdFifoInfo* pTxCmdFifo, stCpriCsuCmdFifoInfo* pRxCmdFifo); +void cpri_csu_start_nr_2period(stCpriCsuCmdFifoInfo tx_cmdfifo, stCpriCsuCmdFifoInfo rx_cmdfifo); + +#endif + diff --git a/public/ecs_rfm_spu1/driver/src/cpri_csu_nr_2period.s.c b/public/ecs_rfm_spu1/driver/src/cpri_csu_nr_2period.s.c new file mode 100644 index 0000000..fe3f93a --- /dev/null +++ b/public/ecs_rfm_spu1/driver/src/cpri_csu_nr_2period.s.c @@ -0,0 +1,1495 @@ +#include "cpri_csu_nr_2period.h" +#include "typedef.h" +#include "ucp_utility.h" +#include "phy_para.h" +#include "cpri_driver.h" +#include "ucp_drv_common.h" + +extern uint32_t gCpriCsuDummyFlag; + +void cpri_csu_axc_init_nr_2period(uint32_t nDummyFlag, stCpriCsuCmdFifoInfo* pTxCmdFifo, stCpriCsuCmdFifoInfo* pRxCmdFifo) +{ + UCP_API_CPRI_CSU_Set_AxcIdNum(CPRI_NR2PERIOD_ID_NUM); + UCP_API_CPRI_CSU_Set_LatchNum(CPRI_NR2PERIOD_ID_NUM); + cpri_csu_axc_link_init_nr_2period(nDummyFlag); + cpri_csu_axc_latch_init_nr_2period(); + cpri_csu_axc_paramreg_init_nr_2period(); + cpri_csu_axc_cmd_gen_2period(pTxCmdFifo, pRxCmdFifo); +} + +void cpri_csu_axc_latch_init_nr_2period(void) +{ + uint32_t fifo_num = 4;//初始化4个FIFO通道(RX_AXC_DATA:CmdFIFO0, RX_AXC_CTRL:CmdFIFO2, TX_AXC_DATA:CmdFIFO1, TX_AXC_CTRL:CmdFIFO3) + uint32_t dma_reg_group_num = 32;//清空CPRI的32组DMA参数寄存器 + uint32_t tag_mask = 0xFFFFFFFF;//DMA TAG全部不屏蔽 + + uint32_t axc_id_num = CPRI_NR2PERIOD_ID_NUM; //1个指数因子,4个天线，1个AGC因子 + uint32_t tx0_rfp_set= 0;//[18:16]TX_AXC_DATA 通道开始工作后，提前发送的 Base Frame 的个数[8] 0:上升沿敏感 1: 高电平敏感 + //[7:0]CSU捕捉到CPRI 端接口信号TX_AUX_CNT_POS 第一次为此数值后,延迟2个CSU 的主时钟周期再次启动发送数据的工作 + uint32_t tx0_port_info[64] = {0};//共64个port, + //[31:26] CPRI 模式 CSU 的 TX_AXC_DATA通道端口x的 ID 值 + //[25:20]CPRI 模式 CSU 的 TX_AXC_DATA通道端口x的每拍有效比特数 + //[19:1]CPRI 模式 CSU 的 TX_AXC_DATA通道一个Basic Frame 中端口x的总比特数 + //[0]0:比特反序未使能 1:比特反序使能 + uint32_t out_latch_num = CPRI_NR2PERIOD_ID_NUM;// + uint32_t tx0_latch_info_l[8] = {0}; //8个latch info配置，[24]bit_revert_enable + //[19:0]CPRI模式CSU的TX_AXC_DATA通道的OutLatch参数, 值为一个Basic Frame中在此OutLatch中缓存的所有端口的总比特数 + + uint32_t tx0_latch_info_m[8] = {0}; //8个latch info配置 + //[24:16]CPRI 模式 CSU 的 TX_AXC_DATA 通道的OutLatch 参数，值为 CPRI_LATCH_N*3 + //[8:0]CPRI 模式 CSU 的 TX_AXC_DATA 通道的OutLatch 参数，值为 CPRI_LATCH_N + uint32_t tx0_latch_info_h[8] = {0}; //8个latch info配置 + //[24:16]CPRI 模式 CSU 的 TX_AXC_DATA 通道的OutLatch 参数，值为 CPRI_LATCH_N*7 + //[8:0]CPRI 模式 CSU 的 TX_AXC_DATA 通道的OutLatch 参数，值为 CPRI_LATCH_N*5 + + uint32_t rx0_port_info[64] = {0};//共64个port, [27:22]bit_number_one_cyclex [20:1]bit_number_one_basic_framex [0]bit_revert_enable + uint32_t in_latch_num = CPRI_NR2PERIOD_ID_NUM;// + uint32_t rx0_latch_info_l[8] = {0};//8个latch info配置，[24]bit_revert_enable [19:0]bit_number_one_basic_frame + uint32_t rx0_latch_info_h[8] = {0};//8个latch info配置， + //[31]cpri_latch_n_7_times_bigger_than_128 =0： CPRI_LATCH_N*7 不大于 128, =1： CPRI_LATCH_N*7 大于 128 + //[30:24]cpri_latch_n_7_times CPRI 模式 CSU 的 RX_AXC_DATA 通道的InLatch 参数，值为 CPRI_LATCH_N*7 + //[23]cpri_latch_n_5_times_bigger_than_128 0： CPRI_LATCH_N*5 不大于 128, 1： CPRI_LATCH_N*5 大于 128 + //[22:16]cpri_latch_n_5_times CPRI 模式 CSU 的 RX_AXC_DATA 通道的InLatch 参数，值为 CPRI_LATCH_N*5 + //[15]cpri_latch_n_3_times_bigger_than_128 0： CPRI_LATCH_N*3 不大于 128, 1： CPRI_LATCH_N*3 大于 128 + //[14:8]cpri_latch_n_3_times CPRI 模式 CSU 的 RX_AXC_DATA 通道的InLatch 参数，值为 CPRI_LATCH_N*3 + //[6:0]cpri_latch_n + uint32_t rx0_cycle_num[8] = {0};//8个latch info配置, + //[7:0]CPRI模式CSU的RX_AXC_DATA通道的InLatch参数,值为该InLatch中连续接收的Basic Frame的个数减一 + + uint32_t inlatch_index = 0; +// uint32_t w_r_flag = 0;//0:w, 1:r +// uint32_t send_threshold = 0; +// uint32_t almostfull_threshold = 0; +// uint32_t tx_cycle_num = 32; + uint32_t rx_cycle_num = 2; + + uint32_t index = 0; +// uint32_t i = 0; + + uint32_t bit_per_bf[CPRI_NR2PERIOD_ID_NUM] = {16,512,512,512,512,16}; //压缩因子是2byte, 16bit, 数据是64byte,512bit + uint32_t bit_per_cycle[CPRI_NR2PERIOD_ID_NUM] = {16,0,0,0,0,16}; //0:表示64, 非0:有效比特数为数值本身 + + //! step1 初始化所有的必要的寄存器 + UCP_API_CPRI_CSU_Init(fifo_num, dma_reg_group_num, tag_mask); + + //!step2 配置TX&RX data outlatch + for (index = 0; index < axc_id_num; index++) + { +// tx0_port_info[index] = ((bit_per_bf[index]<<1) | (bit_per_cycle[index] <<20) | (index << 26)); + tx0_port_info[index] = 0x1 | ((bit_per_bf[index]<<1) | (bit_per_cycle[index] <<20) | (index << 26)); + } + + for (index = 0; index < out_latch_num; index++) + { +// tx0_latch_info_l[index] = bit_per_bf[index]; + tx0_latch_info_l[index] = BIT24 |bit_per_bf[index]; + tx0_latch_info_m[index] = 0x180008;//CPRI_LATCH_N??bit反序?? + tx0_latch_info_h[index] = 0x380028; + } + tx0_rfp_set = 0x40001;//RfpPoint=0x1 can send 4//push 4 basic frame at 1st tx_axc_rfp + + UCP_API_CPRI_CSU_TxOutLatch_Cfg(axc_id_num, + tx0_rfp_set, + tx0_port_info, + out_latch_num, + tx0_latch_info_l, + tx0_latch_info_m, + tx0_latch_info_h); + + for (index = 0; index < axc_id_num; index++) + { +// rx0_port_info[index] = ((bit_per_bf[index]<<1)|(bit_per_cycle[index]<<22)); + rx0_port_info[index] = 0x1 | ((bit_per_bf[index]<<1)|(bit_per_cycle[index]<<22)); + } + + for (index = 0; index < in_latch_num; index++) + { +// rx0_latch_info_l[index] = bit_per_bf[index]; + rx0_latch_info_l[index] = BIT24 | bit_per_bf[index]; + rx0_latch_info_h[index] = 0x38281808; + rx0_cycle_num[index] = rx_cycle_num - 1; + } + + UCP_API_CPRI_CSU_RxInLatch_Cfg(axc_id_num, + rx0_port_info, + in_latch_num, + rx0_latch_info_l, + rx0_latch_info_h, + rx0_cycle_num); + + UCP_API_CPRI_CSU_RxInLatchThres_Cfg(inlatch_index, + 1,//w_r_flag, + 0x0,//send_threshold, + 0x10);//almostfull_threshold); + + UCP_API_CPRI_CSU_TXAxcData_ChannelCtrl(0, axc_id_num, axc_id_num); + UCP_API_CPRI_CSU_RXAxcData_ChannelCtrl(0, axc_id_num); +} + +void cpri_csu_axc_link_init_nr_2period(int32_t testMode) +{ + uint32_t axc_id = 0; + uint32_t latch_id = 0; + uint32_t xnum = 0; + uint32_t allnum = 0; + uint32_t size = 0; + uint32_t tx_cycle_num = 2; + uint32_t rx_cycle_num = 2; + uint32_t tx_src_addr = 0; + uint32_t rx_dst_addr = 0; + uint32_t comp_facter_addr_offset = 0; +// uint32_t rx_addr_offset = 0; + uint32_t CGran = 0; + +// uint32_t index = 0; + uint32_t i = 0; + //链表地址放在ECS SM里面, 长度0x200,共可存储8个64byte的双边多维链表，目前使用的axc_id_num=6个节点的链表 +#if 0 + //tx的链表地址 + uint32_t tx0_even_f7_link_addr = CPRI_LINK_START_ADDR; // 0x721E800; + uint32_t tx0_even_b7_link_addr = CPRI_LINK_START_ADDR + 1*0x200; // 0x721EA00; + uint32_t tx0_odd_f7_link_addr = CPRI_LINK_START_ADDR + 2*0x200; // 0x721EC00; + uint32_t tx0_odd_b7_link_addr = CPRI_LINK_START_ADDR + 3*0x200; // 0x721EE00; + uint32_t tx0_s_link_addr = CPRI_LINK_START_ADDR + 4*0x200; // 0x721F000; + uint32_t tx0_1st_dummy_link_addr = CPRI_LINK_START_ADDR + 5*0x200; // 0x721F200; + uint32_t tx0_2nd_dummy_link_addr = CPRI_LINK_START_ADDR + 6*0x200; // 0x721F400; + + //rx的链表地址 + uint32_t rx0_1st_dummy_link_addr = CPRI_LINK_START_ADDR + 7*0x200; // 0x721F600; + uint32_t rx0_2nd_dummy_link_addr = CPRI_LINK_START_ADDR + 8*0x200; // 0x721F800; + uint32_t rx0_s_link_addr = CPRI_LINK_START_ADDR + 9*0x200; // 0x721FA00; + uint32_t rx0_normal0_link_addr = CPRI_LINK_START_ADDR + 10*0x200; // 0x721FC00; + uint32_t rx0_normal1_link_addr = CPRI_LINK_START_ADDR + 11*0x200; // 0x721FE00; +#else + //tx的链表地址 + uint32_t tx0_even_f7_link_addr = 0x6821F800; + uint32_t tx0_even_b7_link_addr = 0x6821FA00; + uint32_t tx0_odd_f7_link_addr = 0x6821FC00; + uint32_t tx0_odd_b7_link_addr = 0x6821FE00; + uint32_t tx0_s_link_addr = 0x68220000; + uint32_t tx0_1st_dummy_link_addr = 0x68220200; + uint32_t tx0_2nd_dummy_link_addr = 0x68220400; + uint32_t tx0_3nd_dummy_link_addr = 0x68220600; + + //rx的链表地址 + uint32_t rx0_1st_dummy_link_addr = 0x68220800; + uint32_t rx0_2nd_dummy_link_addr = 0x68220A00; + uint32_t rx0_3nd_dummy_link_addr = 0x68220C00; + uint32_t rx0_s_link_addr = 0x68220E00; + uint32_t rx0_normal0_link_addr = 0x68221000; + uint32_t rx0_normal1_link_addr = 0x68221200; +#endif + + //step3: 进行RX 和TX 的链表节点的配置 + //TX:偶时隙前7个符号 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 2;//压缩因子，一个BF 2B + allnum = size*(4384*6+4448)/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_EVEN_COMPRESS_ADDR; + comp_facter_addr_offset = allnum; + CGran = 0; + } + else if (5 == i) + { + size = 2;//压缩因子，一个BF 2B + allnum = size*(4384*6+4448)/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_EVEN_AGC_ADDR; + comp_facter_addr_offset = allnum; + CGran = 0; //1; //TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1，表示是该基本帧的最后一个节点，防止基本帧数据不完整，latch中有数据残留 + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (4384*6+4448)*2; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_EVEN_F7SYMBOL_ADDR + allnum*(i - 1); + CGran = 0; + } + + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_even_f7_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_even_f7_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } + + //TX:偶时隙后7个符号 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*4384*7/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_EVEN_COMPRESS_ADDR + comp_facter_addr_offset; + CGran = 0; + } + else if (5 == i) + { + size = 1*2;//AGC，一个BF 2B + allnum = size*4384*7/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_EVEN_AGC_ADDR + comp_facter_addr_offset; + CGran = 0; // 1;//TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1 + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = 4384*7*2; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_EVEN_B7SYMBOL_ADDR + allnum*(i - 1); + CGran = 0; + } + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_even_b7_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_even_b7_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } + + comp_facter_addr_offset = 0; + + //TX:奇时隙前7个符号 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(4384*6+4448)/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_COMPRESS_ADDR; + comp_facter_addr_offset = allnum; + CGran = 0; + } + else if (5 == i) + { + size = 1*2;//AGC，一个BF 2B + allnum = size*(4384*6+4448)/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_AGC_ADDR; + comp_facter_addr_offset = allnum; + CGran = 0; //1;//TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1 + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (4384*6+4448)*2; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_F7SYMBOL_ADDR + allnum*(i - 1); + CGran = 0; + } + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_odd_f7_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_odd_f7_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } + + //TX:奇时隙后7个符号 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*4384*7/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_COMPRESS_ADDR + comp_facter_addr_offset; + CGran = 0; + } + else if (5 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*4384*7/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_AGC_ADDR + comp_facter_addr_offset; + CGran = 0; //1;//TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1 + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = 4384*7*2; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_B7SYMBOL_ADDR + allnum*(i - 1); + CGran = 0; + } + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_odd_b7_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_odd_b7_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } + + //TX:特殊时隙后3个符号 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(4384*3)/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_COMPRESS_ADDR; + CGran = 0; + } + else if (5 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(4384*3)/32; + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_AGC_ADDR; + CGran = 0; //1;//TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1 + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (4384*3)*2; + //特殊使用奇时隙的内存,特殊时隙占用6个符号的长度,剩余1个符号的长度，所以地址偏移是7个符号((4384*6+4448)*2) + tx_src_addr = CPRI_NR2PERIOD_TX_SLOT_ODD_B7SYMBOL_ADDR + ((4384*7)*2)*(i - 1); + CGran = 0; + } + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_s_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_s_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } + + //TX:dummy, 10ms周期的第一个 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440*1 + 4384*4)/32; + CGran = 0; + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY1_COMPRESS_ADDR; + } + } + else if (5 == i) + { + size = 1*2;//AGC，一个BF 2B + allnum = size*(61440*1 + 4384*4)/32; + CGran = 0; //1;//TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1 + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY1_AGC_ADDR; + } + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (61440*1 + 4384*4)*2; + CGran = 0; + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY1_AXC1DATA_ADDR + (i-1)*CPRI_NR2PERIOD_TX_DUMMY1_AXCDATA_LEN; + } + } + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_1st_dummy_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_1st_dummy_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } + + //TX:dummy, 5ms周期的第二个 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + + if (0 == i) + { + size = 2;//压缩因子，一个BF 2B + allnum = size*(61440*2 + 4384*4)/32; + CGran = 0; + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY2_COMPRESS_ADDR; + } + } + else if (5 == i) + { + size = 1*2;//AGC，一个BF 2B + allnum = size*(61440*2 + 4384*4)/32; + CGran = 0;//TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1 + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY2_AGC_ADDR; + } + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (61440*2 + 4384*4)*2; + CGran = 0; + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY2_AXC1DATA_ADDR + (i-1)*CPRI_NR2PERIOD_TX_DUMMY2_AXCDATA_LEN; + } + } + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_2nd_dummy_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_2nd_dummy_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } +#if 1 + //TX:dummy, 10ms周期的最后一个 + for (i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + + if (0 == i) + { + size = 2;//压缩因子，一个BF 2B + allnum = size*(61440*2 + 4384*4)/32; + CGran = 0; + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY2_COMPRESS_ADDR; + } + } + else if (5 == i) + { + size = 1*2;//AGC，一个BF 2B + allnum = size*(61440*2 + 4384*4)/32; + CGran = 1;//TX发送，每个循环链表中的最后一个节点中的GRAN[3]需要配置成1 + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY2_AGC_ADDR; + } + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (61440*2 + 4384*4)*2; + CGran = 0; + if (0 == testMode) + { + tx_src_addr = CSU_TX_DUMMYBUFFER_ADDR; + } + else + { + tx_src_addr = CPRI_NR2PERIOD_TX_DUMMY2_AXC1DATA_ADDR + (i-1)*CPRI_NR2PERIOD_TX_DUMMY2_AXCDATA_LEN; + } + } + + xnum = size*tx_cycle_num; + + //TX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_3nd_dummy_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + NONCPRIENDFLAG, + tx_src_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //TX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)tx0_3nd_dummy_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + CGran, + 0); + } +#endif + + //RX:占用连续的DDR地址 + //RX dummy 10ms的第一个链表 + for(i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440*3 + 4448 + 4384*11)/32; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY1_COMPRESS_ADDR; + } + } + else if (5 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440*3 + 4448 + 4384*11)/32; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY1_AGC_ADDR; + } + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (61440*3 + 4448 + 4384*11)*2; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY1_AXC1DATA_ADDR + (i-1)*CPRI_NR2PERIOD_RX_DUMMY1_AXCDATA_LEN; + } + } + + xnum = size*rx_cycle_num; + CGran = 1;//当 DMA 为 RX_AXC_RFP信号之后的第一个DMA 时，此 DMA 的参数 GRAN[3]需置为1 + //[36]节点信息命令字里的first_dma要置1 + + //RX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_1st_dummy_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + CGran, + 0, + 0); + //RX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_1st_dummy_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + NONCPRIENDFLAG, + rx_dst_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + CGran, // 0, + 0, + 0); + } + + //RX dummy 10ms的第二个链表 + for(i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440*2 + 4448 + 4384*11)/32; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY1_COMPRESS_ADDR; + } + } + else if (5 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440*2 + 4448 + 4384*11)/32; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY1_AGC_ADDR; + } + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (61440*2 + 4448 + 4384*11)*2; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY1_AXC1DATA_ADDR + (i-1)*CPRI_NR2PERIOD_RX_DUMMY1_AXCDATA_LEN; + } + } + + xnum = size*rx_cycle_num; + CGran = 0;//当 DMA 为 RX_AXC_RFP信号之后的第一个DMA 时，此 DMA 的参数 GRAN[3]需置为1 + //[36]节点信息命令字里的first_dma要置1 + + //RX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_2nd_dummy_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + CGran, + 0, + 0); + //RX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_2nd_dummy_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + NONCPRIENDFLAG, + rx_dst_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + CGran, // 0, + 0, + 0); + } + //RX dummy 10ms周期的第三个链表 + for(i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440*3 + 4448 + 4384*11)/32; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY2_COMPRESS_ADDR; + } + } + else if (5 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440*3 + 4448 + 4384*11)/32; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY2_AGC_ADDR; + } + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (61440*3 + 4448 + 4384*11)*2; + if (0 == testMode) + { + rx_dst_addr = CSU_RX_DUMMYBUFFER_ADDR; + } + else + { + rx_dst_addr = CPRI_NR2PERIOD_RX_DUMMY2_AXC1DATA_ADDR + (i-1)*CPRI_NR2PERIOD_RX_DUMMY2_AXCDATA_LEN; + } + } + + xnum = size*rx_cycle_num; + + //RX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_3nd_dummy_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //RX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_3nd_dummy_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + NONCPRIENDFLAG, + rx_dst_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + } +#if 0 + rx_addr_offset = 0; + uint32_t rxCnt = 0; + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)), (uint32_t)rx_addr_offset); // 0x310 + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)+1), (uint32_t)rx_dst_addr); // 0x310 +#endif + //RX特殊时隙链表 + for(i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(4384*2)/32; + rx_dst_addr = CPRI_NR2PERIOD_RX_SLOTS_COMPRESS_ADDR; // + rx_addr_offset; +// rx_addr_offset += allnum; + } + else if (5 == i) + { + size = 1*2;//AGC，一个BF 2B + allnum = size*(4384*2)/32; + rx_dst_addr = CPRI_NR2PERIOD_RX_SLOTS_AGC_ADDR; // + rx_addr_offset; +// rx_addr_offset += allnum; + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = (4384*2)*2; + rx_dst_addr = CPRI_NR2PERIOD_RX_SLOTS_AXCDATA_ADDR + (i-1)*allnum; // + rx_addr_offset; +// rx_addr_offset += allnum; + } +#if 0 + rxCnt++; + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)), (uint32_t)rx_addr_offset); // 0x310 + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)+1), (uint32_t)rx_dst_addr); // 0x310 + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)+2), (uint32_t)allnum); // 0x310 +#endif + xnum = size*rx_cycle_num; + + //RX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_s_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //RX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_s_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + NONCPRIENDFLAG, + rx_dst_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + } + + //RX 第一个normal时隙的链表 + for(i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440)/32; + rx_dst_addr = (uint32_t)CPRI_NR2PERIOD_RX_SLOT_EVEN_COMPRESS_ADDR; // + rx_addr_offset; +// rx_addr_offset += allnum; + } + else if (5 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440)/32; + rx_dst_addr = (uint32_t)CPRI_NR2PERIOD_RX_SLOT_EVEN_AGC_ADDR; // + rx_addr_offset; +// rx_addr_offset += allnum; + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = 61440*2; + rx_dst_addr = CPRI_NR2PERIOD_RX_SLOT_EVEN_AXCDATA_ADDR + (i-1)*allnum; // + rx_addr_offset; +// rx_addr_offset += allnum; + } +#if 0 + rxCnt++; + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)), (uint32_t)rx_addr_offset); // 0x310 + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)+1), (uint32_t)rx_dst_addr); // 0x310 + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)+2), (uint32_t)allnum); // 0x310 +#endif + xnum = size*rx_cycle_num; + + //RX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_normal0_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //RX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_normal0_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + NONCPRIENDFLAG, + rx_dst_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + } + + //RX 第二个normal时隙的链表 + for(i = 0; i < CPRI_NR2PERIOD_ID_NUM; i++) + { + axc_id = i; + latch_id = i; + if (0 == i) + { + size = 1*2;//压缩因子，一个BF 2B + allnum = size*(61440)/32; + rx_dst_addr = CPRI_NR2PERIOD_RX_SLOT_ODD_COMPRESS_ADDR; // + rx_addr_offset; +// rx_addr_offset += allnum; + } + else if (5 == i) + { + size = 1*2;//AGC，一个BF 2B + allnum = size*(61440)/32; + rx_dst_addr = CPRI_NR2PERIOD_RX_SLOT_ODD_AGC_ADDR; // + rx_addr_offset; +// rx_addr_offset += allnum; + } + else + { + size = 64;//AxC数据，一个BF有4个AxC 64B + allnum = 61440*2; + rx_dst_addr = CPRI_NR2PERIOD_RX_SLOT_ODD_AXCDATA_ADDR + (i-1)*allnum; // + rx_addr_offset; +// rx_addr_offset += allnum; + } +#if 0 + rxCnt++; + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)), (uint32_t)rx_addr_offset); // 0x310 + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)+1), (uint32_t)rx_dst_addr); // 0x310 + debug_write((DBG_DDR_IDX_DRV_BASE+196+(rxCnt<<2)+2), (uint32_t)allnum); // 0x310 +#endif + xnum = size*rx_cycle_num; + + //RX源端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_normal1_link_addr + 2*i, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_SRC, + CPRIENDFLAG, + CPRIEND_ADDR, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + //RX目的端地址 + UCP_API_CPRI_CSU_MdDma_LinkNodeGen((stCsuLinkDesc1L3D*)rx0_normal1_link_addr + 2*i + 1, + DUAL_END_MD_DMA, + LINKLIST_NODE_TYPE_DST, + NONCPRIENDFLAG, + rx_dst_addr, + axc_id, + xnum, + allnum,//双边链表215:192有效 + latch_id, + 0, + 0, + 0); + } +} + +void cpri_csu_axc_paramreg_init_nr_2period() +{ + //链表地址放在ECS SM里面, 长度0x200,共可存储8个64byte的双边多维链表，目前使用的axc_id_num=6个节点的链表 + uint32_t axc_id_num = CPRI_NR2PERIOD_ID_NUM; //1个指数因子,4个天线, 1个AGC因子 +#if 0 + //tx的链表地址 + uint32_t tx0_even_f7_link_addr = CPRI_LINK_START_ADDR; // 0x721E800; + uint32_t tx0_even_b7_link_addr = CPRI_LINK_START_ADDR + 1*0x200; // 0x721EA00; + uint32_t tx0_odd_f7_link_addr = CPRI_LINK_START_ADDR + 2*0x200; // 0x721EC00; + uint32_t tx0_odd_b7_link_addr = CPRI_LINK_START_ADDR + 3*0x200; // 0x721EE00; + uint32_t tx0_s_link_addr = CPRI_LINK_START_ADDR + 4*0x200; // 0x721F000; + uint32_t tx0_1st_dummy_link_addr = CPRI_LINK_START_ADDR + 5*0x200; // 0x721F200; + uint32_t tx0_2nd_dummy_link_addr = CPRI_LINK_START_ADDR + 6*0x200; // 0x721F400; + + //rx的链表地址 + uint32_t rx0_1st_dummy_link_addr = CPRI_LINK_START_ADDR + 7*0x200; // 0x721F600; + uint32_t rx0_2nd_dummy_link_addr = CPRI_LINK_START_ADDR + 8*0x200; // 0x721F800; + uint32_t rx0_s_link_addr = CPRI_LINK_START_ADDR + 9*0x200; // 0x721FA00; + uint32_t rx0_normal0_link_addr = CPRI_LINK_START_ADDR + 10*0x200; // 0x721FC00; + uint32_t rx0_normal1_link_addr = CPRI_LINK_START_ADDR + 11*0x200; // 0x721FE00; +#else + //tx的链表地址 + uint32_t tx0_even_f7_link_addr = 0x6821F800; + uint32_t tx0_even_b7_link_addr = 0x6821FA00; + uint32_t tx0_odd_f7_link_addr = 0x6821FC00; + uint32_t tx0_odd_b7_link_addr = 0x6821FE00; + uint32_t tx0_s_link_addr = 0x68220000; + uint32_t tx0_1st_dummy_link_addr = 0x68220200; + uint32_t tx0_2nd_dummy_link_addr = 0x68220400; + uint32_t tx0_3nd_dummy_link_addr = 0x68220600; + + //rx的链表地址 + uint32_t rx0_1st_dummy_link_addr = 0x68220800; + uint32_t rx0_2nd_dummy_link_addr = 0x68220A00; + uint32_t rx0_3nd_dummy_link_addr = 0x68220C00; + uint32_t rx0_s_link_addr = 0x68220E00; + uint32_t rx0_normal0_link_addr = 0x68221000; + uint32_t rx0_normal1_link_addr = 0x68221200; +#endif + + //step4：进行DMA 参数寄存器的配置 + UCP_API_CPRI_CSU_DmaParamReg_Cfg(0, //第0组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_even_f7_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(1, //第1组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_even_b7_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(2, //第2组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_odd_f7_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(3, //第3组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_odd_b7_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(4, //第4组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_s_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(5, //第5组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_1st_dummy_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); +#if 1 + UCP_API_CPRI_CSU_DmaParamReg_Cfg(6, //第6组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_2nd_dummy_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); +#endif + UCP_API_CPRI_CSU_DmaParamReg_Cfg(7, //第7组寄存器 + DMA_PARAM_MODE_LINKLIST, + tx0_3nd_dummy_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + //rx + UCP_API_CPRI_CSU_DmaParamReg_Cfg(8, //第8组寄存器 + DMA_PARAM_MODE_LINKLIST, + rx0_1st_dummy_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(9, //第9组寄存器 + DMA_PARAM_MODE_LINKLIST, + rx0_2nd_dummy_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(10, //第10组寄存器 + DMA_PARAM_MODE_LINKLIST, + rx0_3nd_dummy_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(11, //第11组寄存器 + DMA_PARAM_MODE_LINKLIST, + rx0_s_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(12, //第12组寄存器 + DMA_PARAM_MODE_LINKLIST, + rx0_normal0_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); + UCP_API_CPRI_CSU_DmaParamReg_Cfg(13, //第13组寄存器 + DMA_PARAM_MODE_LINKLIST, + rx0_normal1_link_addr, + 0, + 0, + 0, + 0, + axc_id_num); +} + +void cpri_csu_axc_cmd_gen_2period(stCpriCsuCmdFifoInfo* pTxCmdFifo, stCpriCsuCmdFifoInfo* pRxCmdFifo) +{ + uint32_t tx_even_f7_cmd_14_h = 0; + uint32_t tx_even_f7_cmd_32_l = 0; + uint32_t tx_even_b7_cmd_14_h = 0; + uint32_t tx_even_b7_cmd_32_l = 0; + uint32_t tx_odd_f7_cmd_14_h = 0; + uint32_t tx_odd_f7_cmd_32_l = 0; + uint32_t tx_odd_b7_cmd_14_h = 0; + uint32_t tx_odd_b7_cmd_32_l = 0; + uint32_t tx_s_cmd_14_h = 0; + uint32_t tx_s_cmd_32_l = 0; + uint32_t tx_1st_dummy_cmd_14_h = 0; + uint32_t tx_1st_dummy_cmd_32_l = 0; + uint32_t tx_2nd_dummy_cmd_14_h = 0; + uint32_t tx_2nd_dummy_cmd_32_l = 0; + uint32_t tx_3nd_dummy_cmd_14_h = 0; + uint32_t tx_3nd_dummy_cmd_32_l = 0; + + uint32_t rx_1st_dummy_cmd_14_h = 0; + uint32_t rx_1st_dummy_cmd_32_l = 0; + uint32_t rx_2nd_dummy_cmd_14_h = 0; + uint32_t rx_2nd_dummy_cmd_32_l = 0; + uint32_t rx_3nd_dummy_cmd_14_h = 0; + uint32_t rx_3nd_dummy_cmd_32_l = 0; + uint32_t rx_s_cmd_14_h = 0; + uint32_t rx_s_cmd_32_l = 0; + uint32_t rx_normal0_cmd_14_h = 0; + uint32_t rx_normal0_cmd_32_l = 0; + uint32_t rx_normal1_cmd_14_h = 0; + uint32_t rx_normal1_cmd_32_l = 0; + + //FIFO1 用于TX发送数据 + //[1:0]dma_mode_s, 3:二级链表模式 DMA + //[3:2]dma_mode_d, 3:二级链表模式 DMA + //[4]dma_dimension, 1:多维 DMA + //[5]axi4_master_sel 非APE模式,0： 访问 DDR 和 Share Memory 选择 AXI4 Master0（经过非 CCI 总线） + //[6]continue_next_dma 1:下一个 DMA 源端数据的读取无需等待当前 DMA目的端数据写完 + //[7]continue_last_dma 1:下一个 DMA 源端数据的读取无需等待上一个 DMA目的端数据写完 + //[12:8]dma_buffer_id_s + //[17:13]dma_buffer_id_d + //[22:18]cmd_tag + //[23]clear 非 APE 模式,0：当前 DMA 之前， 不清空 CSU 内部缓存 + tx_even_f7_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(0<<8) |(0<<13)|(0<<18); + tx_even_f7_cmd_14_h = 0; + + tx_even_b7_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(1<<8) |(1<<13)|(1<<18); + tx_even_b7_cmd_14_h = 0; + + tx_odd_f7_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(2<<8) |(2<<13)|(2<<18); + tx_odd_f7_cmd_14_h = 0; + + tx_odd_b7_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(3<<8) |(3<<13)|(3<<18); + tx_odd_b7_cmd_14_h = 0; + + tx_s_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(4<<8) |(4<<13)|(4<<18); + tx_s_cmd_14_h = 0; + + tx_1st_dummy_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(5<<8) |(5<<13)|(5<<18); + tx_1st_dummy_cmd_14_h = 0; + + tx_2nd_dummy_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(6<<8) |(6<<13)|(6<<18); + tx_2nd_dummy_cmd_14_h = 0; + + tx_3nd_dummy_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(7<<8) |(7<<13)|(7<<18); + tx_3nd_dummy_cmd_14_h = 0; + + pTxCmdFifo->cmdFifo_num = 4; + pTxCmdFifo->cmdFifo[0].cmd_num = 9; + pTxCmdFifo->cmdFifo[0].cmd[0].cmd32l = tx_even_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[0].cmd14h = tx_even_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[1].cmd32l = tx_even_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[1].cmd14h = tx_even_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[2].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[2].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[3].cmd32l = tx_odd_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[3].cmd14h = tx_odd_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[4].cmd32l = tx_even_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[4].cmd14h = tx_even_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[5].cmd32l = tx_even_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[5].cmd14h = tx_even_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[6].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[6].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[7].cmd32l = tx_s_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[7].cmd14h = tx_s_cmd_14_h; + pTxCmdFifo->cmdFifo[0].cmd[8].cmd32l = tx_1st_dummy_cmd_32_l; + pTxCmdFifo->cmdFifo[0].cmd[8].cmd14h = tx_1st_dummy_cmd_14_h; + + pTxCmdFifo->cmdFifo[1].cmd_num = 7; + pTxCmdFifo->cmdFifo[1].cmd[0].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[1].cmd[0].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[1].cmd[1].cmd32l = tx_odd_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[1].cmd[1].cmd14h = tx_odd_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[1].cmd[2].cmd32l = tx_even_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[1].cmd[2].cmd14h = tx_even_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[1].cmd[3].cmd32l = tx_even_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[1].cmd[3].cmd14h = tx_even_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[1].cmd[4].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[1].cmd[4].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[1].cmd[5].cmd32l = tx_s_cmd_32_l; + pTxCmdFifo->cmdFifo[1].cmd[5].cmd14h = tx_s_cmd_14_h; + pTxCmdFifo->cmdFifo[1].cmd[6].cmd32l = tx_2nd_dummy_cmd_32_l; + pTxCmdFifo->cmdFifo[1].cmd[6].cmd14h = tx_2nd_dummy_cmd_14_h; + + pTxCmdFifo->cmdFifo[2].cmd_num = 9; + pTxCmdFifo->cmdFifo[2].cmd[0].cmd32l = tx_even_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[0].cmd14h = tx_even_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[1].cmd32l = tx_even_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[1].cmd14h = tx_even_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[2].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[2].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[3].cmd32l = tx_odd_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[3].cmd14h = tx_odd_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[4].cmd32l = tx_even_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[4].cmd14h = tx_even_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[5].cmd32l = tx_even_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[5].cmd14h = tx_even_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[6].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[6].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[7].cmd32l = tx_s_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[7].cmd14h = tx_s_cmd_14_h; + pTxCmdFifo->cmdFifo[2].cmd[8].cmd32l = tx_1st_dummy_cmd_32_l; + pTxCmdFifo->cmdFifo[2].cmd[8].cmd14h = tx_1st_dummy_cmd_14_h; + + pTxCmdFifo->cmdFifo[3].cmd_num = 7; + pTxCmdFifo->cmdFifo[3].cmd[0].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[3].cmd[0].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[3].cmd[1].cmd32l = tx_odd_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[3].cmd[1].cmd14h = tx_odd_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[3].cmd[2].cmd32l = tx_even_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[3].cmd[2].cmd14h = tx_even_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[3].cmd[3].cmd32l = tx_even_b7_cmd_32_l; + pTxCmdFifo->cmdFifo[3].cmd[3].cmd14h = tx_even_b7_cmd_14_h; + pTxCmdFifo->cmdFifo[3].cmd[4].cmd32l = tx_odd_f7_cmd_32_l; + pTxCmdFifo->cmdFifo[3].cmd[4].cmd14h = tx_odd_f7_cmd_14_h; + pTxCmdFifo->cmdFifo[3].cmd[5].cmd32l = tx_s_cmd_32_l; + pTxCmdFifo->cmdFifo[3].cmd[5].cmd14h = tx_s_cmd_14_h; + pTxCmdFifo->cmdFifo[3].cmd[6].cmd32l = tx_3nd_dummy_cmd_32_l; + pTxCmdFifo->cmdFifo[3].cmd[6].cmd14h = tx_3nd_dummy_cmd_14_h; + + + //FIFO0 用于RX接收数据 + rx_1st_dummy_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(8<<8) |(8<<13)|(8<<18); + rx_1st_dummy_cmd_14_h = (1 << 4); + + rx_2nd_dummy_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(9<<8) |(9<<13)|(9<<18); + rx_2nd_dummy_cmd_14_h = 0; + + rx_3nd_dummy_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(10<<8) |(10<<13)|(10<<18); + rx_3nd_dummy_cmd_14_h = 0; + + rx_s_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(11<<8) |(11<<13)|(11<<18); + rx_s_cmd_14_h = 0; + + rx_normal0_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(12<<8) |(12<<13)|(12<<18); + rx_normal0_cmd_14_h = 0; + + rx_normal1_cmd_32_l = 1 | (1<<2) |(1<<4)|(0 <<5) |(3<<6) |(13<<8) |(13<<13)|(13<<18); + rx_normal1_cmd_14_h = 0; + + pRxCmdFifo->cmdFifo_num = 4; + pRxCmdFifo->cmdFifo[0].cmd_num = 3; + pRxCmdFifo->cmdFifo[0].cmd[0].cmd32l = rx_1st_dummy_cmd_32_l; + pRxCmdFifo->cmdFifo[0].cmd[0].cmd14h = rx_1st_dummy_cmd_14_h; + pRxCmdFifo->cmdFifo[0].cmd[1].cmd32l = rx_s_cmd_32_l; + pRxCmdFifo->cmdFifo[0].cmd[1].cmd14h = rx_s_cmd_14_h; + pRxCmdFifo->cmdFifo[0].cmd[2].cmd32l = rx_normal0_cmd_32_l; + pRxCmdFifo->cmdFifo[0].cmd[2].cmd14h = rx_normal0_cmd_14_h; + + pRxCmdFifo->cmdFifo[1].cmd_num = 4; + pRxCmdFifo->cmdFifo[1].cmd[0].cmd32l = rx_2nd_dummy_cmd_32_l; + pRxCmdFifo->cmdFifo[1].cmd[0].cmd14h = rx_2nd_dummy_cmd_32_l; + pRxCmdFifo->cmdFifo[1].cmd[1].cmd32l = rx_s_cmd_32_l; + pRxCmdFifo->cmdFifo[1].cmd[1].cmd14h = rx_s_cmd_14_h; + pRxCmdFifo->cmdFifo[1].cmd[2].cmd32l = rx_normal0_cmd_32_l; + pRxCmdFifo->cmdFifo[1].cmd[2].cmd14h = rx_normal0_cmd_14_h; + pRxCmdFifo->cmdFifo[1].cmd[3].cmd32l = rx_normal1_cmd_32_l; + pRxCmdFifo->cmdFifo[1].cmd[3].cmd14h = rx_normal1_cmd_14_h; + + pRxCmdFifo->cmdFifo[2].cmd_num = 3; + pRxCmdFifo->cmdFifo[2].cmd[0].cmd32l = rx_3nd_dummy_cmd_32_l; + pRxCmdFifo->cmdFifo[2].cmd[0].cmd14h = rx_3nd_dummy_cmd_14_h; + pRxCmdFifo->cmdFifo[2].cmd[1].cmd32l = rx_s_cmd_32_l; + pRxCmdFifo->cmdFifo[2].cmd[1].cmd14h = rx_s_cmd_14_h; + pRxCmdFifo->cmdFifo[2].cmd[2].cmd32l = rx_normal0_cmd_32_l; + pRxCmdFifo->cmdFifo[2].cmd[2].cmd14h = rx_normal0_cmd_14_h; + + pRxCmdFifo->cmdFifo[3].cmd_num = 4; + pRxCmdFifo->cmdFifo[3].cmd[0].cmd32l = rx_2nd_dummy_cmd_32_l; + pRxCmdFifo->cmdFifo[3].cmd[0].cmd14h = rx_2nd_dummy_cmd_32_l; + pRxCmdFifo->cmdFifo[3].cmd[1].cmd32l = rx_s_cmd_32_l; + pRxCmdFifo->cmdFifo[3].cmd[1].cmd14h = rx_s_cmd_14_h; + pRxCmdFifo->cmdFifo[3].cmd[2].cmd32l = rx_normal0_cmd_32_l; + pRxCmdFifo->cmdFifo[3].cmd[2].cmd14h = rx_normal0_cmd_14_h; + pRxCmdFifo->cmdFifo[3].cmd[3].cmd32l = rx_normal1_cmd_32_l; + pRxCmdFifo->cmdFifo[3].cmd[3].cmd14h = rx_normal1_cmd_14_h; +} + + diff --git a/public/test/testcases/case22/fronthaul/8ape_case(30K).txt b/public/test/testcases/case22/fronthaul/8ape_case(30K).txt new file mode 100644 index 0000000..e69de29 diff --git a/public/test/testcases/case22/fronthaul/src/fh_test_case22.s.c b/public/test/testcases/case22/fronthaul/src/fh_test_case22.s.c new file mode 100644 index 0000000..7147aeb --- /dev/null +++ b/public/test/testcases/case22/fronthaul/src/fh_test_case22.s.c @@ -0,0 +1,60 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : ape_test_case1.s.c +// Author : +// Created On : 2022-10-26 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ + +#include "typedef.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "rfm1_drv.h" + +/************************************************************************/ +extern void cpri_init(uint32_t option,uint32_t MappingMode); +extern void jesd_init(); +extern void ecpri_init(uint8_t nOption); + +int32_t fh_data_init(void) +{ + return 0; +} + +int32_t fh_drv_init() +{ + stFrontHaulDrvPara fhDrvPara; + memset_ucp(&fhDrvPara, 0, sizeof(stFrontHaulDrvPara)); + + fhDrvPara.protocolSel = PROTOCOL_CPRI; + fhDrvPara.rateOption = CPRI_OPTION_8; + fhDrvPara.mapOption = OTIC_MAP_FIGURE12; + + fronthaul_drv_cfg(&fhDrvPara); + + return 0; +} + +int32_t fh_csu_test_init(void) +{ + + return 0; +} + +void fh_test_case() +{ + return; +} + +void fh_data_check(uint32_t times) +{ + return; +} + + diff --git a/public/test/testcases/case22/osp/8ape_case(15K).txt b/public/test/testcases/case22/osp/8ape_case(15K).txt new file mode 100644 index 0000000..e69de29 diff --git a/public/test/testcases/case22/osp/src/ape_test_case22.s.c b/public/test/testcases/case22/osp/src/ape_test_case22.s.c new file mode 100644 index 0000000..019b8ed --- /dev/null +++ b/public/test/testcases/case22/osp/src/ape_test_case22.s.c @@ -0,0 +1,139 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : ape_test_case1.s.c +// Author : +// Created On : 2022-10-26 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ + +#include "typedef.h" +#include "osp_task.h" +#include "osp_timer.h" +#include "ucp_printf.h" + +/************************************************************************/ +void ape0_event_task(uint32_t addr, uint32_t size); +void ape0_event_task_del(uint32_t addr, uint32_t size); + +void ape0_test_task_reg(void) +{ + osp_task_info_ex ape0_event_task_info = {50, (int8_t*)"ape0_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event_task}; + osp_task_info_ex ape0_event_task_info_del = {51, (int8_t*)"ape0_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event_task_del}; + + osp_task_create(&ape0_event_task_info); + osp_task_create(&ape0_event_task_info_del); + + return ; +} + +/************************************************************************/ +void ape1_event_task(uint32_t addr, uint32_t size); +void ape1_event_task_del(uint32_t addr, uint32_t size); + +void ape1_test_task_reg(void) +{ + osp_task_info_ex ape1_event_task_info = {50, (int8_t*)"ape1_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task}; + osp_task_info_ex ape1_event_task_info_del = {51, (int8_t*)"ape1_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task_del}; + + osp_task_create(&ape1_event_task_info); + osp_task_create(&ape1_event_task_info_del); + + return ; +} + +/************************************************************************/ +void ape2_event_task(uint32_t addr, uint32_t size); +void ape2_event_task_del(uint32_t addr, uint32_t size); + +void ape2_test_task_reg(void) +{ + osp_task_info_ex ape2_event_task_info = {50, (int8_t*)"ape2_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event_task}; + osp_task_info_ex ape2_event_task_info_del = {51, (int8_t*)"ape2_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event_task_del}; + + osp_task_create(&ape2_event_task_info); + osp_task_create(&ape2_event_task_info_del); + + return ; +} + +/************************************************************************/ +void ape3_event_task(uint32_t addr, uint32_t size); +void ape3_event_task_del(uint32_t addr, uint32_t size); + +void ape3_test_task_reg(void) +{ + osp_task_info_ex ape3_event_task_info = {50, (int8_t*)"ape3_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape3_event_task}; + osp_task_info_ex ape3_event_task_info_del = {51, (int8_t*)"ape3_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape3_event_task_del}; + + osp_task_create(&ape3_event_task_info); + osp_task_create(&ape3_event_task_info_del); + + return ; +} + +/************************************************************************/ +void ape4_event_task(uint32_t addr, uint32_t size); +void ape4_event_task_del(uint32_t addr, uint32_t size); + +void ape4_test_task_reg(void) +{ + osp_task_info_ex ape4_event_task_info = {50, (int8_t*)"ape4_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape4_event_task}; + osp_task_info_ex ape4_event_task_info_del = {51, (int8_t*)"ape4_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape4_event_task_del}; + + osp_task_create(&ape4_event_task_info); + osp_task_create(&ape4_event_task_info_del); + + return ; +} + +/************************************************************************/ +void ape5_event_task(uint32_t addr, uint32_t size); +void ape5_event_task_del(uint32_t addr, uint32_t size); + +void ape5_test_task_reg(void) +{ + osp_task_info_ex ape5_event_task_info = {50, (int8_t*)"ape5_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape5_event_task}; + osp_task_info_ex ape5_event_task_info_del = {51, (int8_t*)"ape5_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape5_event_task_del}; + + osp_task_create(&ape5_event_task_info); + osp_task_create(&ape5_event_task_info_del); + + return ; +} + +/************************************************************************/ +void ape6_event_task(uint32_t addr, uint32_t size); +void ape6_event_task_del(uint32_t addr, uint32_t size); + +void ape6_test_task_reg(void) +{ + osp_task_info_ex ape6_event_task_info = {50, (int8_t*)"ape6_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape6_event_task}; + osp_task_info_ex ape6_event_task_info_del = {51, (int8_t*)"ape6_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape6_event_task_del}; + + osp_task_create(&ape6_event_task_info); + osp_task_create(&ape6_event_task_info_del); + + return ; +} + +/************************************************************************/ +void ape7_event_task(uint32_t addr, uint32_t size); +void ape7_event_task_del(uint32_t addr, uint32_t size); + +void ape7_test_task_reg(void) +{ + osp_task_info_ex ape7_event_task_info = {50, (int8_t*)"ape7_event_task", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape7_event_task}; + osp_task_info_ex ape7_event_task_info_del = {51, (int8_t*)"ape7_event_task_del", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape7_event_task_del}; + + osp_task_create(&ape7_event_task_info); + osp_task_create(&ape7_event_task_info_del); + + return ; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape0_task.s.c b/public/test/testcases/case22/osp/src/case22_ape0_task.s.c new file mode 100644 index 0000000..64b66e7 --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape0_task.s.c @@ -0,0 +1,475 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case21_ape0_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape0_event1_rev_num = 0; // 30 0xB7E00078 +static uint32_t g_u32_case22_ape0_event1_rev_ok = 0; // 31 0xB7E0007C +static uint32_t g_u32_case22_ape0_event1_addr_err = 0; // 32 0xB7E00080 +static uint32_t g_u32_case22_ape0_event1_tick = 0; +static uint32_t g_u32_case22_ape0_event1_tick_err = 0; // 33 0xB7E00084 +static uint32_t g_u32_case22_ape0_event1_sfn_slot_err = 0; // 35 0xB7E0008C +static uint32_t g_u32_case22_ape0_event1_alloc1_err = 0; // 40 0xB7E000A0 +static uint32_t g_u32_case22_ape0_event1_send1_err = 0; // 41 0xB7E000A4 +static uint32_t g_u32_case22_ape0_event1_alloc2_err = 0; // 42 0xB7E000A8 +static uint32_t g_u32_case22_ape0_event1_send2_err = 0; // 43 0xB7E000AC +static uint32_t g_u32_case22_ape0_event1_send_ok = 0; // 44 0xB7E000B0 + +static uint32_t g_u32_case22_ape0_event2_num = 0; // 45 0xB7E000B4 +static uint32_t g_u32_case22_ape0_event3_num = 0; // 46 0xB7E000B8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape0_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + uint16_t sfn_l = 0; + uint16_t slot_l = 0; + uint32_t u32_clock_offset = 0; + uint32_t u32_clock_tick = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape0_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape0_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape0_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape0_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape0_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape0_event1_rev_ok); + + rdmcycle(&u32_clock_tick); + + if (0 == g_u32_case22_ape0_event1_tick) + { + g_u32_case22_ape0_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape0_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape0_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape0_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case22_ape0_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape0_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case22_ape0_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case22_ape0_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape0_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape0_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape0_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape0_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape0_event1_send1_err); + //return ; + } + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape0_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape0_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape0_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + ape_id+1, // dst que id + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape0_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape0_event1_send2_err); + return ; + } + + /* 给ape2 event1发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + //g_u32_case21_ape0_event1_alloc2_err++; + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case21_ape0_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape0_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + 2, // ape2 + 40, // src task id + 40); // dst task id + + if (0 != ret) + { + //g_u32_case21_ape0_event1_send2_err++; + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case21_ape0_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape0_event1_send_ok); + + return ; +} + +/* 收到他核event1发来的消息 */ +void ape0_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape0_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape0_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape0_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape0_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape0_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape0_timer1_slot_no_continuous = 0; // 50 0xB7E000C8 +static uint32_t g_u32_case22_ape0_timer1_sfn_no_continuous = 0; // 51 0xB7E000CC +static uint32_t g_u32_case22_ape0_timer1_slot_indication = 0; // 52 0xB7E000D0 +static uint32_t g_u32_case22_ape0_timer1_update_sfn_slot = 0; // 53 0xB7E000D4 +static uint32_t g_u32_case22_ape0_timer1_process_cnt = 0; // 54 0xB7E000D8 +static uint32_t g_u32_case22_ape0_timer1_process_tick = 0; // 55 0xB7E000DC +static uint32_t g_u32_case22_ape0_timer1_process_tick_err = 0; // 56 0xB7E000E0 +static uint32_t g_u32_case22_ape0_timer2_process_cnt = 0; // 57 0xB7E000E4 +static uint32_t g_u32_case22_ape0_timer2_process_tick = 0; // 58 0xB7E000E8 +static uint32_t g_u32_case22_ape0_timer2_process_tick_err = 0; // 59 0xB7E000EC +static uint32_t g_u32_case22_ape0_timer2_tx_slot_max = 0; // 64 0xB7E00100 +static uint32_t g_u32_case22_ape0_timer2_tx_slot_min = 0x32000;//65 0xB7E00104 +static uint32_t g_u32_case22_ape0_timer2_tx_slot_cur = 0; // 66 0xB7E00108 +static uint32_t g_u32_case22_ape0_timer2_rx_slot_max = 0; // 67 0xB7E0010C +static uint32_t g_u32_case22_ape0_timer2_rx_slot_min = 0x32000; // 68 0xB7E00110 +static uint32_t g_u32_case22_ape0_timer2_rx_slot_cur = 0; // 69 0xB7E00114 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape0_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape0_timer1_sfn_no_continuous); + } + } + return; +} + +uint32_t gu32_ape0_send_cnt = 0; +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = U_PLANE;//C_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 0; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape0_send_cnt); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case22_ape0_timer1_slot_indication); + + return; +} + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//30KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape0_timer1_update_sfn_slot); + + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape0_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape0_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape0_timer1_process_cnt); + + update_sfn_slot(); + + send_slot_indication(); + + if (0 == g_u32_case22_ape0_timer1_process_tick) + { + g_u32_case22_ape0_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape0_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape0_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape0_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape0_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case20_ape0_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape0_timer1_process_tick_err); + return; +} + +void ape0_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape0_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape0_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape0_timer2_tx_slot_max = get_max(g_u32_case22_ape0_timer2_tx_slot_cur, g_u32_case22_ape0_timer2_tx_slot_max); + g_u32_case22_ape0_timer2_tx_slot_min = get_min(g_u32_case22_ape0_timer2_tx_slot_cur, g_u32_case22_ape0_timer2_tx_slot_min); + + g_u32_case22_ape0_timer2_rx_slot_max = get_max(g_u32_case22_ape0_timer2_rx_slot_cur, g_u32_case22_ape0_timer2_rx_slot_max); + g_u32_case22_ape0_timer2_rx_slot_min = get_min(g_u32_case22_ape0_timer2_rx_slot_cur, g_u32_case22_ape0_timer2_rx_slot_min); + + g_u32_case22_ape0_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape0_timer2_process_cnt); + + if (0 == g_u32_case22_ape0_timer2_process_tick) + { + g_u32_case22_ape0_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape0_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape0_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape0_timer2_process_tick_err++; + } + } + g_u32_case22_ape0_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape0_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape0_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape0_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape0_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape0_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape0_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape0_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape0_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape0_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape0_task_event1 = {40, (int8_t*)"ape0_task_event1", 40, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event1_task}; + osp_task_info_ex ape0_task_event2 = {41, (int8_t*)"ape0_task_event2", 41, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event2_task}; + osp_task_info_ex ape0_task_event3 = {42, (int8_t*)"ape0_task_event3", 42, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event3_task}; + osp_task_info_ex ape0_task_timer1 = {43, (int8_t*)"ape0_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_timer1_task}; + osp_task_info_ex ape0_task_timer2 = {44, (int8_t*)"ape0_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape0_timer2_task}; + + osp_task_create(&ape0_task_event1); + osp_task_create(&ape0_task_event2); + osp_task_create(&ape0_task_event3); + osp_task_create(&ape0_task_timer1); + osp_task_create(&ape0_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return; +} + +/* 收到消息后删除任务 */ +void ape0_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape1_task.s.c b/public/test/testcases/case22/osp/src/case22_ape1_task.s.c new file mode 100644 index 0000000..88d6467 --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape1_task.s.c @@ -0,0 +1,502 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case20_ape1_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape1_event1_rev_num = 0; // 30 0xB7E00278 +static uint32_t g_u32_case22_ape1_event1_rev_ok = 0; // 31 0xB7E0027C +static uint32_t g_u32_case22_ape1_event1_addr_err = 0; // 32 0xB7E00280 +static uint32_t g_u32_case22_ape1_event1_tick = 0; +static uint32_t g_u32_case22_ape1_event1_tick_err = 0; // 33 0xB7E00284 +static uint32_t g_u32_case22_ape1_event1_sfn_slot_err = 0; // 35 0xB7E0028C +static uint32_t g_u32_case22_ape1_event1_alloc1_err = 0; // 40 0xB7E002A0 +static uint32_t g_u32_case22_ape1_event1_send1_err = 0; // 41 0xB7E002A4 +static uint32_t g_u32_case22_ape1_event1_alloc2_err = 0; // 42 0xB7E002A8 +static uint32_t g_u32_case22_ape1_event1_send2_err = 0; // 43 0xB7E002AC +static uint32_t g_u32_case22_ape1_event1_send_ok = 0; // 44 0xB7E002B0 +static uint32_t g_u32_case22_ape1_recv_msg_tick_err = 0; // DBG_DDR_MSG_IDX(20) 0xB7E04050(ape0)/0xB7E04350(ape1) + +static uint32_t g_u32_case22_ape1_event2_num = 0; // 45 0xB7E002B4 +static uint32_t g_u32_case22_ape1_event3_num = 0; // 46 0xB7E002B8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape1_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + uint16_t sfn_l = 0; + uint16_t slot_l = 0; + uint32_t u32_clock_offset = 0; + uint32_t u32_clock_tick = 0; + uint32_t tick_from_ape_tx = 0; + uint32_t tick_from_arm_rx = 0; + uint32_t tick_from_arm_tx = 0; + uint32_t tick_from_rfm_rx = 0; + uint32_t tick_from_rfm_tx = 0; + uint32_t tick_from_ape_rx = 0; + uint32_t offset_loopback = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape1_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape1_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape1_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape1_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape1_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape1_event1_rev_ok); + + rdmcycle(&u32_clock_tick); + tick_from_ape_tx = do_read(msg_addr+4); + tick_from_arm_rx = do_read(msg_addr+8); + tick_from_arm_tx = do_read(msg_addr+12); + tick_from_rfm_rx = do_read(msg_addr+16); + tick_from_rfm_tx = do_read(msg_addr+20); + offset_loopback = (tick_from_ape_rx - tick_from_ape_tx + TICK_PP1S_OFFSET)%TICK_PP1S_OFFSET; + if (offset_loopback >= LOOPBACK_APE_OFFSET) + { + if (g_u32_case22_ape1_recv_msg_tick_err < CASE0_APE0_RX_ERR_MAX_NUM) + { + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape1_recv_msg_tick_err + 21)), offset_loopback); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape1_recv_msg_tick_err + 22)), tick_from_ape_tx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape1_recv_msg_tick_err + 23)), tick_from_arm_rx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape1_recv_msg_tick_err + 24)), tick_from_arm_tx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape1_recv_msg_tick_err + 25)), tick_from_rfm_rx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape1_recv_msg_tick_err + 26)), tick_from_rfm_tx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape1_recv_msg_tick_err + 27)), tick_from_ape_rx); + } + g_u32_case22_ape1_recv_msg_tick_err++; + debug_write(DBG_DDR_MSG_IDX(que_num, 20), g_u32_case22_ape1_recv_msg_tick_err); + } + + if (0 == g_u32_case22_ape1_event1_tick) + { + g_u32_case22_ape1_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape1_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape1_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape1_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case22_ape1_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape1_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case22_ape1_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case22_ape1_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape1_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape1_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape1_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape1_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape1_event1_send1_err); + //return ; + } + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape1_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape1_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape1_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + ape_id+1, // dst que id + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape1_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape1_event1_send2_err); + return ; + } + + /* 给ape3 event1发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + //g_u32_case21_ape1_event1_alloc2_err++; + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case21_ape1_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape1_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + 3, // ape3 + 40, // src task id + 40); // dst task id + + if (0 != ret) + { + //g_u32_case21_ape1_event1_send2_err++; + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case21_ape1_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape1_event1_send_ok); + return ; +} + +/* 收到他核event1发来的消息 */ +void ape1_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape1_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape1_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape1_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape1_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape1_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape1_timer1_slot_no_continuous = 0; // 50 0xB7E002C8 +static uint32_t g_u32_case22_ape1_timer1_sfn_no_continuous = 0; // 51 0xB7E002CC +static uint32_t g_u32_case22_ape1_timer1_slot_indication = 0; // 52 0xB7E002D0 +static uint32_t g_u32_case22_ape1_timer1_update_sfn_slot = 0; // 53 0xB7E002D4 +static uint32_t g_u32_case22_ape1_timer1_process_cnt = 0; // 54 0xB7E002D8 +static uint32_t g_u32_case22_ape1_timer1_process_tick = 0; // 55 0xB7E002DC +static uint32_t g_u32_case22_ape1_timer1_process_tick_err = 0; // 56 0xB7E002E0 +static uint32_t g_u32_case22_ape1_timer2_process_cnt = 0; // 57 0xB7E002E4 +static uint32_t g_u32_case22_ape1_timer2_process_tick = 0; // 58 0xB7E002E8 +static uint32_t g_u32_case22_ape1_timer2_process_tick_err = 0; // 59 0xB7E002EC +static uint32_t g_u32_case22_ape1_timer2_tx_slot_max = 0; // 64 0xB7E00300 +static uint32_t g_u32_case22_ape1_timer2_tx_slot_min = 0x32000;//65 0xB7E00304 +static uint32_t g_u32_case22_ape1_timer2_tx_slot_cur = 0; // 66 0xB7E00308 +static uint32_t g_u32_case22_ape1_timer2_rx_slot_max = 0; // 67 0xB7E0030C +static uint32_t g_u32_case22_ape1_timer2_rx_slot_min = 0x32000; // 68 0xB7E00310 +static uint32_t g_u32_case22_ape1_timer2_rx_slot_cur = 0; // 69 0xB7E00314 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape1_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape1_timer1_sfn_no_continuous); + } + } + return; +} + +uint32_t gu32_ape1_send_cnt = 0; //(61) 0xb7e002f4 +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = C_PLANE;//U_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 0; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape1_send_cnt); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case22_ape1_timer1_slot_indication); + + return; +} + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape1_timer1_update_sfn_slot); + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape1_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape1_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape1_timer1_process_cnt); + + update_sfn_slot(); + + send_slot_indication(); + + if (0 == g_u32_case22_ape1_timer1_process_tick) + { + g_u32_case22_ape1_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape1_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape1_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape1_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape1_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case20_ape1_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape1_timer1_process_tick_err); + return; +} + +void ape1_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape1_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape1_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape1_timer2_tx_slot_max = get_max(g_u32_case22_ape1_timer2_tx_slot_cur, g_u32_case22_ape1_timer2_tx_slot_max); + g_u32_case22_ape1_timer2_tx_slot_min = get_min(g_u32_case22_ape1_timer2_tx_slot_cur, g_u32_case22_ape1_timer2_tx_slot_min); + + g_u32_case22_ape1_timer2_rx_slot_max = get_max(g_u32_case22_ape1_timer2_rx_slot_cur, g_u32_case22_ape1_timer2_rx_slot_max); + g_u32_case22_ape1_timer2_rx_slot_min = get_min(g_u32_case22_ape1_timer2_rx_slot_cur, g_u32_case22_ape1_timer2_rx_slot_min); + + g_u32_case22_ape1_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape1_timer2_process_cnt); + + if (0 == g_u32_case22_ape1_timer2_process_tick) + { + g_u32_case22_ape1_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape1_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape1_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape1_timer2_process_tick_err++; + } + } + g_u32_case22_ape1_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape1_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape1_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape1_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape1_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape1_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape1_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape1_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape1_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape1_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape1_task_event1 = {40, (int8_t*)"ape1_task_event1", 40, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event1_task}; + osp_task_info_ex ape1_task_event2 = {41, (int8_t*)"ape1_task_event2", 41, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event2_task}; + osp_task_info_ex ape1_task_event3 = {42, (int8_t*)"ape1_task_event3", 42, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event3_task}; + osp_task_info_ex ape1_task_timer1 = {43, (int8_t*)"ape1_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_timer1_task}; + osp_task_info_ex ape1_task_timer2 = {44, (int8_t*)"ape1_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape1_timer2_task}; + + osp_task_create(&ape1_task_event1); + osp_task_create(&ape1_task_event2); + osp_task_create(&ape1_task_event3); + osp_task_create(&ape1_task_timer1); + osp_task_create(&ape1_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return; +} + +/* 收到消息后删除任务 */ +void ape1_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape2_task.s.c b/public/test/testcases/case22/osp/src/case22_ape2_task.s.c new file mode 100644 index 0000000..dd15d2b --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape2_task.s.c @@ -0,0 +1,453 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case20_ape2_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape2_event1_rev_num = 0; // 30 0xB7E00478 +static uint32_t g_u32_case22_ape2_event1_rev_ok = 0; // 31 0xB7E0047C +static uint32_t g_u32_case22_ape2_event1_addr_err = 0; // 32 0xB7E00480 +//static uint32_t g_u32_case22_ape2_event1_tick = 0; +//static uint32_t g_u32_case22_ape2_event1_tick_err = 0; // 33 0xB7E00484 +//static uint32_t g_u32_case22_ape2_event1_sfn_slot_err = 0; // 35 0xB7E0048C +static uint32_t g_u32_case22_ape2_event1_alloc1_err = 0; // 40 0xB7E004A0 +static uint32_t g_u32_case22_ape2_event1_send1_err = 0; // 41 0xB7E004A4 +static uint32_t g_u32_case22_ape2_event1_alloc2_err = 0; // 42 0xB7E004A8 +static uint32_t g_u32_case22_ape2_event1_send2_err = 0; // 43 0xB7E004AC +static uint32_t g_u32_case22_ape2_event1_send_ok = 0; // 44 0xB7E004B0 + +static uint32_t g_u32_case22_ape2_event2_num = 0; // 45 0xB7E004B4 +static uint32_t g_u32_case22_ape2_event3_num = 0; // 46 0xB7E004B8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape2_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + //uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + //uint16_t sfn_l = 0; + //uint16_t slot_l = 0; + //uint32_t u32_clock_offset = 0; + //uint32_t u32_clock_tick = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape2_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape2_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape2_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape2_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape2_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape2_event1_rev_ok); + +#if 0 + rdmcycle(&u32_clock_tick); + + if (0 == g_u32_case22_ape2_event1_tick) + { + g_u32_case22_ape2_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape2_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape2_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape2_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case21_ape2_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape2_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case21_ape2_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case22_ape2_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } +#endif + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape2_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape2_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape2_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape2_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape2_event1_send1_err); + //return ; + } + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape2_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape2_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape2_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + ape_id+1, // dst que id + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape2_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape2_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape2_event1_send_ok); + return ; +} + +/* 收到他核event1发来的消息 */ +void ape2_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape2_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape2_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape2_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape2_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape2_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape2_timer1_slot_no_continuous = 0; // 50 0xB7E004C8 +static uint32_t g_u32_case22_ape2_timer1_sfn_no_continuous = 0; // 51 0xB7E004CC +//static uint32_t g_u32_case22_ape2_timer1_slot_indication = 0; // 52 0xB7E004D0 +static uint32_t g_u32_case22_ape2_timer1_update_sfn_slot = 0; // 53 0xB7E004D4 +static uint32_t g_u32_case22_ape2_timer1_process_cnt = 0; // 54 0xB7E004D8 +static uint32_t g_u32_case22_ape2_timer1_process_tick = 0; // 55 0xB7E004DC +static uint32_t g_u32_case22_ape2_timer1_process_tick_err = 0; // 56 0xB7E004E0 +static uint32_t g_u32_case22_ape2_timer2_process_cnt = 0; // 57 0xB7E004E4 +static uint32_t g_u32_case22_ape2_timer2_process_tick = 0; // 58 0xB7E004E8 +static uint32_t g_u32_case22_ape2_timer2_process_tick_err = 0; // 59 0xB7E004EC +static uint32_t g_u32_case22_ape2_timer2_tx_slot_max = 0; // 64 0xB7E00500 +static uint32_t g_u32_case22_ape2_timer2_tx_slot_min = 0x32000;//65 0xB7E00504 +static uint32_t g_u32_case22_ape2_timer2_tx_slot_cur = 0; // 66 0xB7E00508 +static uint32_t g_u32_case22_ape2_timer2_rx_slot_max = 0; // 67 0xB7E0050C +static uint32_t g_u32_case22_ape2_timer2_rx_slot_min = 0x32000; // 68 0xB7E00510 +static uint32_t g_u32_case22_ape2_timer2_rx_slot_cur = 0; // 69 0xB7E00514 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape2_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape2_timer1_sfn_no_continuous); + } + } + return; +} + +#if 0 +uint32_t gu32_send_cnt = 0; + +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = C_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 0; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + //UCP_PRINT_ERROR("value(0x%x), inst(%d)", handler.value, handler.inst_id); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_send_cnt); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case22_ape2_timer1_slot_indication); + + return; +} +#endif + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape2_timer1_update_sfn_slot); + + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape2_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape2_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape2_timer1_process_cnt); + + update_sfn_slot(); + + //send_slot_indication(); + + if (0 == g_u32_case22_ape2_timer1_process_tick) + { + g_u32_case22_ape2_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape2_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape2_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape2_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape2_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case22_ape2_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape2_timer1_process_tick_err); + return; +} + +void ape2_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape2_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape2_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape2_timer2_tx_slot_max = get_max(g_u32_case22_ape2_timer2_tx_slot_cur, g_u32_case22_ape2_timer2_tx_slot_max); + g_u32_case22_ape2_timer2_tx_slot_min = get_min(g_u32_case22_ape2_timer2_tx_slot_cur, g_u32_case22_ape2_timer2_tx_slot_min); + + g_u32_case22_ape2_timer2_rx_slot_max = get_max(g_u32_case22_ape2_timer2_rx_slot_cur, g_u32_case22_ape2_timer2_rx_slot_max); + g_u32_case22_ape2_timer2_rx_slot_min = get_min(g_u32_case22_ape2_timer2_rx_slot_cur, g_u32_case22_ape2_timer2_rx_slot_min); + + g_u32_case22_ape2_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape2_timer2_process_cnt); + + if (0 == g_u32_case22_ape2_timer2_process_tick) + { + g_u32_case22_ape2_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape2_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape2_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape2_timer2_process_tick_err++; + } + } + g_u32_case22_ape2_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape2_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape2_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape2_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape2_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape2_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape2_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape2_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape2_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape2_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape2_task_event1 = {40, (int8_t*)"ape2_task_event1", 40, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event1_task}; + osp_task_info_ex ape2_task_event2 = {41, (int8_t*)"ape2_task_event2", 41, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event2_task}; + osp_task_info_ex ape2_task_event3 = {42, (int8_t*)"ape2_task_event3", 42, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event3_task}; + osp_task_info_ex ape2_task_timer1 = {43, (int8_t*)"ape2_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_timer1_task}; + osp_task_info_ex ape2_task_timer2 = {44, (int8_t*)"ape2_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape2_timer2_task}; + + osp_task_create(&ape2_task_event1); + osp_task_create(&ape2_task_event2); + osp_task_create(&ape2_task_event3); + osp_task_create(&ape2_task_timer1); + osp_task_create(&ape2_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return; +} + +/* 收到消息后删除任务 */ +void ape2_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape3_task.s.c b/public/test/testcases/case22/osp/src/case22_ape3_task.s.c new file mode 100644 index 0000000..ae9ad3f --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape3_task.s.c @@ -0,0 +1,446 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case20_ape3_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape3_event1_rev_num = 0; // 30 0xB7E00678 +static uint32_t g_u32_case22_ape3_event1_rev_ok = 0; // 31 0xB7E0067C +static uint32_t g_u32_case22_ape3_event1_addr_err = 0; // 32 0xB7E00680 +//static uint32_t g_u32_case22_ape3_event1_tick = 0; +//static uint32_t g_u32_case22_ape3_event1_tick_err = 0; // 33 0xB7E00684 +//static uint32_t g_u32_case22_ape3_event1_sfn_slot_err = 0; // 35 0xB7E0068C +static uint32_t g_u32_case22_ape3_event1_alloc1_err = 0; // 40 0xB7E006A0 +static uint32_t g_u32_case22_ape3_event1_send1_err = 0; // 41 0xB7E006A4 +static uint32_t g_u32_case22_ape3_event1_alloc2_err = 0; // 42 0xB7E006A8 +static uint32_t g_u32_case22_ape3_event1_send2_err = 0; // 43 0xB7E006AC +static uint32_t g_u32_case22_ape3_event1_send_ok = 0; // 44 0xB7E006B0 + +static uint32_t g_u32_case22_ape3_event2_num = 0; // 45 0xB7E006B4 +static uint32_t g_u32_case22_ape3_event3_num = 0; // 46 0xB7E006B8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape3_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + //uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + ///uint16_t sfn_l = 0; + //uint16_t slot_l = 0; + //uint32_t u32_clock_offset = 0; + //uint32_t u32_clock_tick = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape3_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape3_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape3_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape3_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape3_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape3_event1_rev_ok); + +#if 0 + rdmcycle(&u32_clock_tick); + + if (0 == g_u32_case22_ape3_event1_tick) + { + g_u32_case22_ape3_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape3_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape3_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape3_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case22_ape3_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape3_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case21_ape3_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case222_ape3_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } +#endif + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape3_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape3_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape3_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape3_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape3_event1_send1_err); + //return ; + } + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape3_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape3_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape3_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + 0, // send to ape0(4 apes 1 cell) + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape3_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape3_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape3_event1_send_ok); + return ; +} + +/* 收到他核event1发来的消息 */ +void ape3_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape3_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape3_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape3_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape3_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape3_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape3_timer1_slot_no_continuous = 0; // 50 0xB7E006C8 +static uint32_t g_u32_case22_ape3_timer1_sfn_no_continuous = 0; // 51 0xB7E006CC +//static uint32_t g_u32_case22_ape3_timer1_slot_indication = 0; // 52 0xB7E006D0 +static uint32_t g_u32_case22_ape3_timer1_update_sfn_slot = 0; // 53 0xB7E006D4 +static uint32_t g_u32_case22_ape3_timer1_process_cnt = 0; // 54 0xB7E006D8 +static uint32_t g_u32_case22_ape3_timer1_process_tick = 0; // 55 0xB7E006DC +static uint32_t g_u32_case22_ape3_timer1_process_tick_err = 0; // 56 0xB7E006E0 +static uint32_t g_u32_case22_ape3_timer2_process_cnt = 0; // 57 0xB7E006E4 +static uint32_t g_u32_case22_ape3_timer2_process_tick = 0; // 58 0xB7E006E8 +static uint32_t g_u32_case22_ape3_timer2_process_tick_err = 0; // 59 0xB7E006EC +static uint32_t g_u32_case22_ape3_timer2_tx_slot_max = 0; // 64 0xB7E00700 +static uint32_t g_u32_case22_ape3_timer2_tx_slot_min = 0x32000;//65 0xB7E00704 +static uint32_t g_u32_case22_ape3_timer2_tx_slot_cur = 0; // 66 0xB7E00708 +static uint32_t g_u32_case22_ape3_timer2_rx_slot_max = 0; // 67 0xB7E0070C +static uint32_t g_u32_case22_ape3_timer2_rx_slot_min = 0x32000; // 68 0xB7E00710 +static uint32_t g_u32_case22_ape3_timer2_rx_slot_cur = 0; // 69 0xB7E00714 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape3_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape3_timer1_sfn_no_continuous); + } + } + return; +} + +#if 0 +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = U_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 0; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case21_ape3_timer1_slot_indication); + + return; +} +#endif + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//30KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape3_timer1_update_sfn_slot); + + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape3_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape3_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape3_timer1_process_cnt); + + update_sfn_slot(); + + //send_slot_indication(); + + if (0 == g_u32_case22_ape3_timer1_process_tick) + { + g_u32_case22_ape3_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape3_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape3_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape3_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape3_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case20_ape3_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape3_timer1_process_tick_err); + return; +} + +void ape3_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape3_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape3_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape3_timer2_tx_slot_max = get_max(g_u32_case22_ape3_timer2_tx_slot_cur, g_u32_case22_ape3_timer2_tx_slot_max); + g_u32_case22_ape3_timer2_tx_slot_min = get_min(g_u32_case22_ape3_timer2_tx_slot_cur, g_u32_case22_ape3_timer2_tx_slot_min); + + g_u32_case22_ape3_timer2_rx_slot_max = get_max(g_u32_case22_ape3_timer2_rx_slot_cur, g_u32_case22_ape3_timer2_rx_slot_max); + g_u32_case22_ape3_timer2_rx_slot_min = get_min(g_u32_case22_ape3_timer2_rx_slot_cur, g_u32_case22_ape3_timer2_rx_slot_min); + + g_u32_case22_ape3_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape3_timer2_process_cnt); + + if (0 == g_u32_case22_ape3_timer2_process_tick) + { + g_u32_case22_ape3_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape3_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape3_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape3_timer2_process_tick_err++; + } + } + g_u32_case22_ape3_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape3_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape3_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape3_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape3_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape3_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape3_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape3_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape3_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape3_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape3_task_event1 = {40, (int8_t*)"ape3_task_event1", 40, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape3_event1_task}; + osp_task_info_ex ape3_task_event2 = {41, (int8_t*)"ape3_task_event2", 41, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape3_event2_task}; + osp_task_info_ex ape3_task_event3 = {42, (int8_t*)"ape3_task_event3", 42, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape3_event3_task}; + osp_task_info_ex ape3_task_timer1 = {43, (int8_t*)"ape3_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape3_timer1_task}; + osp_task_info_ex ape3_task_timer2 = {44, (int8_t*)"ape3_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape3_timer2_task}; + + osp_task_create(&ape3_task_event1); + osp_task_create(&ape3_task_event2); + osp_task_create(&ape3_task_event3); + osp_task_create(&ape3_task_timer1); + osp_task_create(&ape3_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return; +} + +/* 收到消息后删除任务 */ +void ape3_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape4_task.s.c b/public/test/testcases/case22/osp/src/case22_ape4_task.s.c new file mode 100644 index 0000000..d90cdb5 --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape4_task.s.c @@ -0,0 +1,477 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case20_ape0_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_heap.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape4_event1_rev_num = 0; // 30 0xB7E00878 +static uint32_t g_u32_case22_ape4_event1_rev_ok = 0; // 31 0xB7E0087C +static uint32_t g_u32_case22_ape4_event1_addr_err = 0; // 32 0xB7E00880 +static uint32_t g_u32_case22_ape4_event1_tick = 0; +static uint32_t g_u32_case22_ape4_event1_tick_err = 0; // 33 0xB7E00884 +static uint32_t g_u32_case22_ape4_event1_sfn_slot_err = 0; // 35 0xB7E0088C +static uint32_t g_u32_case22_ape4_event1_alloc1_err = 0; // 40 0xB7E008A0 +static uint32_t g_u32_case22_ape4_event1_send1_err = 0; // 41 0xB7E008A4 +static uint32_t g_u32_case22_ape4_event1_alloc2_err = 0; // 42 0xB7E008A8 +static uint32_t g_u32_case22_ape4_event1_send2_err = 0; // 43 0xB7E008AC +static uint32_t g_u32_case22_ape4_event1_send_ok = 0; // 44 0xB7E008B0 + +static uint32_t g_u32_case22_ape4_event2_num = 0; // 45 0xB7E008B4 +static uint32_t g_u32_case22_ape4_event3_num = 0; // 46 0xB7E008B8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape4_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + uint16_t sfn_l = 0; + uint16_t slot_l = 0; + uint32_t u32_clock_offset = 0; + uint32_t u32_clock_tick = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape4_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape4_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape4_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape4_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape4_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape4_event1_rev_ok); + + rdmcycle(&u32_clock_tick); + + if (0 == g_u32_case22_ape4_event1_tick) + { + g_u32_case22_ape4_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape4_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape4_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape4_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case22_ape4_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape4_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case22_ape4_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case22_ape4_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape4_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape4_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape4_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape4_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape4_event1_send1_err); + //return ; + } + UCP_PRINT_ERROR("send_ok_1"); + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape4_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape4_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape4_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + ape_id+1, // dst que id + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape4_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape4_event1_send2_err); + return ; + } + + /* 给ape6 event1发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + //g_u32_case21_ape4_event1_alloc2_err++; + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case21_ape4_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape4_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + 6, // ape6 + 40, // src task id + 40); // dst task id + + if (0 != ret) + { + //g_u32_case21_ape4_event1_send2_err++; + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case21_ape4_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape4_event1_send_ok); + + return ; +} + +/* 收到他核event1发来的消息 */ +void ape4_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape4_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape4_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape4_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape4_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape4_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape4_timer1_slot_no_continuous = 0; // 50 0xB7E008C8 +static uint32_t g_u32_case22_ape4_timer1_sfn_no_continuous = 0; // 51 0xB7E008CC +static uint32_t g_u32_case22_ape4_timer1_slot_indication = 0; // 52 0xB7E008D0 +static uint32_t g_u32_case22_ape4_timer1_update_sfn_slot = 0; // 53 0xB7E008D4 +static uint32_t g_u32_case22_ape4_timer1_process_cnt = 0; // 54 0xB7E008D8 +static uint32_t g_u32_case22_ape4_timer1_process_tick = 0; // 55 0xB7E008DC +static uint32_t g_u32_case22_ape4_timer1_process_tick_err = 0; // 56 0xB7E008E0 +static uint32_t g_u32_case22_ape4_timer2_process_cnt = 0; // 57 0xB7E008E4 +static uint32_t g_u32_case22_ape4_timer2_process_tick = 0; // 58 0xB7E008E8 +static uint32_t g_u32_case22_ape4_timer2_process_tick_err = 0; // 59 0xB7E008EC +static uint32_t g_u32_case22_ape4_timer2_tx_slot_max = 0; // 64 0xB7E00900 +static uint32_t g_u32_case22_ape4_timer2_tx_slot_min = 0x32000;//65 0xB7E00904 +static uint32_t g_u32_case22_ape4_timer2_tx_slot_cur = 0; // 66 0xB7E00908 +static uint32_t g_u32_case22_ape4_timer2_rx_slot_max = 0; // 67 0xB7E0090C +static uint32_t g_u32_case22_ape4_timer2_rx_slot_min = 0x32000; // 68 0xB7E00910 +static uint32_t g_u32_case22_ape4_timer2_rx_slot_cur = 0; // 69 0xB7E00914 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape4_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape4_timer1_sfn_no_continuous); + } + } + return; +} + +uint32_t gu32_ape4_send_cnt = 0; +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = U_PLANE;//C_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 1; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape4_send_cnt); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case22_ape4_timer1_slot_indication); + + return; +} + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape4_timer1_update_sfn_slot); + + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape4_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape4_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape4_timer1_process_cnt); + + update_sfn_slot(); + + send_slot_indication(); + + if (0 == g_u32_case22_ape4_timer1_process_tick) + { + g_u32_case22_ape4_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape4_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape4_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape4_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape4_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case22_ape0_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape4_timer1_process_tick_err); + return; +} + +void ape4_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape4_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape4_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape4_timer2_tx_slot_max = get_max(g_u32_case22_ape4_timer2_tx_slot_cur, g_u32_case22_ape4_timer2_tx_slot_max); + g_u32_case22_ape4_timer2_tx_slot_min = get_min(g_u32_case22_ape4_timer2_tx_slot_cur, g_u32_case22_ape4_timer2_tx_slot_min); + + g_u32_case22_ape4_timer2_rx_slot_max = get_max(g_u32_case22_ape4_timer2_rx_slot_cur, g_u32_case22_ape4_timer2_rx_slot_max); + g_u32_case22_ape4_timer2_rx_slot_min = get_min(g_u32_case22_ape4_timer2_rx_slot_cur, g_u32_case22_ape4_timer2_rx_slot_min); + + g_u32_case22_ape4_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape4_timer2_process_cnt); + + if (0 == g_u32_case22_ape4_timer2_process_tick) + { + g_u32_case22_ape4_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape4_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape4_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape4_timer2_process_tick_err++; + } + } + g_u32_case22_ape4_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape4_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape4_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape4_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape4_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape4_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape4_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape4_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape4_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape4_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape4_task_event1 = {40, (int8_t*)"ape4_task_event1", 40, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape4_event1_task}; + osp_task_info_ex ape4_task_event2 = {41, (int8_t*)"ape4_task_event2", 41, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape4_event2_task}; + osp_task_info_ex ape4_task_event3 = {42, (int8_t*)"ape4_task_event3", 42, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape4_event3_task}; + osp_task_info_ex ape4_task_timer1 = {43, (int8_t*)"ape4_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape4_timer1_task}; + osp_task_info_ex ape4_task_timer2 = {44, (int8_t*)"ape4_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape4_timer2_task}; + + osp_task_create(&ape4_task_event1); + osp_task_create(&ape4_task_event2); + osp_task_create(&ape4_task_event3); + osp_task_create(&ape4_task_timer1); + osp_task_create(&ape4_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return ; +} + +/* 收到消息后删除任务 */ +void ape4_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape5_task.s.c b/public/test/testcases/case22/osp/src/case22_ape5_task.s.c new file mode 100644 index 0000000..b9df30c --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape5_task.s.c @@ -0,0 +1,502 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case20_ape1_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape5_event1_rev_num = 0; // 30 0xB7E00A78 +static uint32_t g_u32_case22_ape5_event1_rev_ok = 0; // 31 0xB7E00A7C +static uint32_t g_u32_case22_ape5_event1_addr_err = 0; // 32 0xB7E00A80 +static uint32_t g_u32_case22_ape5_event1_tick = 0; +static uint32_t g_u32_case22_ape5_event1_tick_err = 0; // 33 0xB7E00A84 +static uint32_t g_u32_case22_ape5_event1_sfn_slot_err = 0; // 35 0xB7E00A8C +static uint32_t g_u32_case22_ape5_event1_alloc1_err = 0; // 40 0xB7E00AA0 +static uint32_t g_u32_case22_ape5_event1_send1_err = 0; // 41 0xB7E00AA4 +static uint32_t g_u32_case22_ape5_event1_alloc2_err = 0; // 42 0xB7E00AA8 +static uint32_t g_u32_case22_ape5_event1_send2_err = 0; // 43 0xB7E00AAC +static uint32_t g_u32_case22_ape5_event1_send_ok = 0; // 44 0xB7E00AB0 +static uint32_t g_u32_case22_ape5_recv_msg_tick_err = 0; // DBG_DDR_MSG_IDX(20) 0xB7E04050(ape0)/0xB7E04350(ape1) + +static uint32_t g_u32_case22_ape5_event2_num = 0; // 45 0xB7E00AB4 +static uint32_t g_u32_case22_ape5_event3_num = 0; // 46 0xB7E00AB8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape5_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + uint16_t sfn_l = 0; + uint16_t slot_l = 0; + uint32_t u32_clock_offset = 0; + uint32_t u32_clock_tick = 0; + uint32_t tick_from_ape_tx = 0; + uint32_t tick_from_arm_rx = 0; + uint32_t tick_from_arm_tx = 0; + uint32_t tick_from_rfm_rx = 0; + uint32_t tick_from_rfm_tx = 0; + uint32_t tick_from_ape_rx = 0; + uint32_t offset_loopback = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape5_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape5_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape5_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape5_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape5_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape5_event1_rev_ok); + + rdmcycle(&u32_clock_tick); + tick_from_ape_tx = do_read(msg_addr+4); + tick_from_arm_rx = do_read(msg_addr+8); + tick_from_arm_tx = do_read(msg_addr+12); + tick_from_rfm_rx = do_read(msg_addr+16); + tick_from_rfm_tx = do_read(msg_addr+20); + offset_loopback = (tick_from_ape_rx - tick_from_ape_tx + TICK_PP1S_OFFSET)%TICK_PP1S_OFFSET; + if (offset_loopback >= LOOPBACK_APE_OFFSET) + { + if (g_u32_case22_ape5_recv_msg_tick_err < CASE0_APE0_RX_ERR_MAX_NUM) + { + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape5_recv_msg_tick_err + 21)), offset_loopback); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape5_recv_msg_tick_err + 22)), tick_from_ape_tx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape5_recv_msg_tick_err + 23)), tick_from_arm_rx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape5_recv_msg_tick_err + 24)), tick_from_arm_tx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape5_recv_msg_tick_err + 25)), tick_from_rfm_rx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape5_recv_msg_tick_err + 26)), tick_from_rfm_tx); + debug_write(DBG_DDR_MSG_IDX(que_num, (CASE0_APE0_RX_ERR_MAX_NUM*g_u32_case22_ape5_recv_msg_tick_err + 27)), tick_from_ape_rx); + } + g_u32_case22_ape5_recv_msg_tick_err++; + debug_write(DBG_DDR_MSG_IDX(que_num, 20), g_u32_case22_ape5_recv_msg_tick_err); + } + + if (0 == g_u32_case22_ape5_event1_tick) + { + g_u32_case22_ape5_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape5_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape5_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape5_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case22_ape5_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape5_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case22_ape5_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case22_ape5_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape5_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape5_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape5_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape5_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape5_event1_send1_err); + //return ; + } + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape5_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape5_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape5_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + ape_id+1, // dst que id + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape5_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape5_event1_send2_err); + return ; + } + + /* 给ape7 event1发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + //g_u32_case21_ape5_event1_alloc2_err++; + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case21_ape5_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape5_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + 7, // ape7 + 40, // src task id + 40); // dst task id + + if (0 != ret) + { + //g_u32_case21_ape5_event1_send2_err++; + ///debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case21_ape5_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape5_event1_send_ok); + return ; +} + +/* 收到他核event1发来的消息 */ +void ape5_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape5_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape5_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape5_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape5_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape5_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape5_timer1_slot_no_continuous = 0; // 50 0xB7E00AC8 +static uint32_t g_u32_case22_ape5_timer1_sfn_no_continuous = 0; // 51 0xB7E00ACC +static uint32_t g_u32_case22_ape5_timer1_slot_indication = 0; // 52 0xB7E00AD0 +static uint32_t g_u32_case22_ape5_timer1_update_sfn_slot = 0; // 53 0xB7E00AD4 +static uint32_t g_u32_case22_ape5_timer1_process_cnt = 0; // 54 0xB7E00AD8 +static uint32_t g_u32_case22_ape5_timer1_process_tick = 0; // 55 0xB7E00ADC +static uint32_t g_u32_case22_ape5_timer1_process_tick_err = 0; // 56 0xB7E00AE0 +static uint32_t g_u32_case22_ape5_timer2_process_cnt = 0; // 57 0xB7E00AE4 +static uint32_t g_u32_case22_ape5_timer2_process_tick = 0; // 58 0xB7E00AE8 +static uint32_t g_u32_case22_ape5_timer2_process_tick_err = 0; // 59 0xB7E00AEC +static uint32_t g_u32_case22_ape5_timer2_tx_slot_max = 0; // 64 0xB7E00B00 +static uint32_t g_u32_case22_ape5_timer2_tx_slot_min = 0x32000;//65 0xB7E00B04 +static uint32_t g_u32_case22_ape5_timer2_tx_slot_cur = 0; // 66 0xB7E00B08 +static uint32_t g_u32_case22_ape5_timer2_rx_slot_max = 0; // 67 0xB7E00B0C +static uint32_t g_u32_case22_ape5_timer2_rx_slot_min = 0x32000; // 68 0xB7E00B10 +static uint32_t g_u32_case22_ape5_timer2_rx_slot_cur = 0; // 69 0xB7E00B14 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape5_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape5_timer1_sfn_no_continuous); + } + } + return; +} + +uint32_t gu32_ape5_send_cnt = 0; //(61) 0xb7e002f4 +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = C_PLANE;//U_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 1; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape5_send_cnt); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case22_ape5_timer1_slot_indication); + + return; +} + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape5_timer1_update_sfn_slot); + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape5_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape5_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape5_timer1_process_cnt); + + update_sfn_slot(); + + send_slot_indication(); + + if (0 == g_u32_case22_ape5_timer1_process_tick) + { + g_u32_case22_ape5_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape5_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape5_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape5_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape5_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case22_ape1_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape5_timer1_process_tick_err); + return; +} + +void ape5_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape5_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape5_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape5_timer2_tx_slot_max = get_max(g_u32_case22_ape5_timer2_tx_slot_cur, g_u32_case22_ape5_timer2_tx_slot_max); + g_u32_case22_ape5_timer2_tx_slot_min = get_min(g_u32_case22_ape5_timer2_tx_slot_cur, g_u32_case22_ape5_timer2_tx_slot_min); + + g_u32_case22_ape5_timer2_rx_slot_max = get_max(g_u32_case22_ape5_timer2_rx_slot_cur, g_u32_case22_ape5_timer2_rx_slot_max); + g_u32_case22_ape5_timer2_rx_slot_min = get_min(g_u32_case22_ape5_timer2_rx_slot_cur, g_u32_case22_ape5_timer2_rx_slot_min); + + g_u32_case22_ape5_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape5_timer2_process_cnt); + + if (0 == g_u32_case22_ape5_timer2_process_tick) + { + g_u32_case22_ape5_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape5_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape5_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape5_timer2_process_tick_err++; + } + } + g_u32_case22_ape5_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape5_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape5_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape5_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape5_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape5_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape5_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape5_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape5_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape5_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape5_task_event1 = {40, (int8_t*)"ape5_task_event1", 40, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape5_event1_task}; + osp_task_info_ex ape5_task_event2 = {41, (int8_t*)"ape5_task_event2", 41, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape5_event2_task}; + osp_task_info_ex ape5_task_event3 = {42, (int8_t*)"ape5_task_event3", 42, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape5_event3_task}; + osp_task_info_ex ape5_task_timer1 = {43, (int8_t*)"ape5_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape5_timer1_task}; + osp_task_info_ex ape5_task_timer2 = {44, (int8_t*)"ape5_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape5_timer2_task}; + + osp_task_create(&ape5_task_event1); + osp_task_create(&ape5_task_event2); + osp_task_create(&ape5_task_event3); + osp_task_create(&ape5_task_timer1); + osp_task_create(&ape5_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return ; +} + +/* 收到消息后删除任务 */ +void ape5_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape6_task.s.c b/public/test/testcases/case22/osp/src/case22_ape6_task.s.c new file mode 100644 index 0000000..1dd5ceb --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape6_task.s.c @@ -0,0 +1,453 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case20_ape2_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape6_event1_rev_num = 0; // 30 0xB7E00C78 +static uint32_t g_u32_case22_ape6_event1_rev_ok = 0; // 31 0xB7E00C7C +static uint32_t g_u32_case22_ape6_event1_addr_err = 0; // 32 0xB7E00C80 +//static uint32_t g_u32_case22_ape6_event1_tick = 0; +//static uint32_t g_u32_case22_ape6_event1_tick_err = 0; // 33 0xB7E00C84 +//static uint32_t g_u32_case22_ape6_event1_sfn_slot_err = 0; // 35 0xB7E00C8C +static uint32_t g_u32_case22_ape6_event1_alloc1_err = 0; // 40 0xB7E00CA0 +static uint32_t g_u32_case22_ape6_event1_send1_err = 0; // 41 0xB7E00CA4 +static uint32_t g_u32_case22_ape6_event1_alloc2_err = 0; // 42 0xB7E00CA8 +static uint32_t g_u32_case22_ape6_event1_send2_err = 0; // 43 0xB7E00CAC +static uint32_t g_u32_case22_ape6_event1_send_ok = 0; // 44 0xB7E00CB0 + +static uint32_t g_u32_case22_ape6_event2_num = 0; // 45 0xB7E00CB4 +static uint32_t g_u32_case22_ape6_event3_num = 0; // 46 0xB7E00CB8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape6_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + //uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + //uint16_t sfn_l = 0; + //uint16_t slot_l = 0; + //uint32_t u32_clock_offset = 0; + //uint32_t u32_clock_tick = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape6_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape6_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape6_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape6_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape6_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape6_event1_rev_ok); + +#if 0 + rdmcycle(&u32_clock_tick); + + if (0 == g_u32_case22_ape6_event1_tick) + { + g_u32_case22_ape6_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape6_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape6_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape6_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case22_ape6_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape6_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case21_ape6_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case22_ape6_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } +#endif + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape6_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape6_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape6_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape6_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape6_event1_send1_err); + //return ; + } + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape6_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape6_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape6_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + ape_id+1, // dst que id + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape6_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape6_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape6_event1_send_ok); + return ; +} + +/* 收到他核event1发来的消息 */ +void ape6_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape6_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape6_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape6_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape6_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape6_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape6_timer1_slot_no_continuous = 0; // 50 0xB7E00CC8 +static uint32_t g_u32_case22_ape6_timer1_sfn_no_continuous = 0; // 51 0xB7E00CCC +//static uint32_t g_u32_case22_ape6_timer1_slot_indication = 0; // 52 0xB7E00CD0 +static uint32_t g_u32_case22_ape6_timer1_update_sfn_slot = 0; // 53 0xB7E00CD4 +static uint32_t g_u32_case22_ape6_timer1_process_cnt = 0; // 54 0xB7E00CD8 +static uint32_t g_u32_case22_ape6_timer1_process_tick = 0; // 55 0xB7E00CDC +static uint32_t g_u32_case22_ape6_timer1_process_tick_err = 0; // 56 0xB7E00CE0 +static uint32_t g_u32_case22_ape6_timer2_process_cnt = 0; // 57 0xB7E00CE4 +static uint32_t g_u32_case22_ape6_timer2_process_tick = 0; // 58 0xB7E00CE8 +static uint32_t g_u32_case22_ape6_timer2_process_tick_err = 0; // 59 0xB7E00CEC +static uint32_t g_u32_case22_ape6_timer2_tx_slot_max = 0; // 64 0xB7E00D00 +static uint32_t g_u32_case22_ape6_timer2_tx_slot_min = 0x32000;//65 0xB7E00D04 +static uint32_t g_u32_case22_ape6_timer2_tx_slot_cur = 0; // 66 0xB7E00D08 +static uint32_t g_u32_case22_ape6_timer2_rx_slot_max = 0; // 67 0xB7E00D0C +static uint32_t g_u32_case22_ape6_timer2_rx_slot_min = 0x32000; // 68 0xB7E00D10 +static uint32_t g_u32_case22_ape6_timer2_rx_slot_cur = 0; // 69 0xB7E00D14 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape6_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape6_timer1_sfn_no_continuous); + } + } + return; +} + +#if 0 +uint32_t gu32_ape6_send_cnt = 0; + +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = C_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 1; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + //UCP_PRINT_ERROR("value(0x%x), inst(%d)", handler.value, handler.inst_id); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape6_send_cnt); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case22_ape6_timer1_slot_indication); + + return; +} +#endif + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape6_timer1_update_sfn_slot); + + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape6_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape6_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape6_timer1_process_cnt); + + update_sfn_slot(); + + //send_slot_indication(); + + if (0 == g_u32_case22_ape6_timer1_process_tick) + { + g_u32_case22_ape6_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape6_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape6_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape6_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape6_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case20_ape2_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape6_timer1_process_tick_err); + return; +} + +void ape6_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape6_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape6_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape6_timer2_tx_slot_max = get_max(g_u32_case22_ape6_timer2_tx_slot_cur, g_u32_case22_ape6_timer2_tx_slot_max); + g_u32_case22_ape6_timer2_tx_slot_min = get_min(g_u32_case22_ape6_timer2_tx_slot_cur, g_u32_case22_ape6_timer2_tx_slot_min); + + g_u32_case22_ape6_timer2_rx_slot_max = get_max(g_u32_case22_ape6_timer2_rx_slot_cur, g_u32_case22_ape6_timer2_rx_slot_max); + g_u32_case22_ape6_timer2_rx_slot_min = get_min(g_u32_case22_ape6_timer2_rx_slot_cur, g_u32_case22_ape6_timer2_rx_slot_min); + + g_u32_case22_ape6_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape6_timer2_process_cnt); + + if (0 == g_u32_case22_ape6_timer2_process_tick) + { + g_u32_case22_ape6_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape6_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape6_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape6_timer2_process_tick_err++; + } + } + g_u32_case22_ape6_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape6_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape6_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape6_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape6_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape6_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape6_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape6_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape6_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape6_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape6_task_event1 = {40, (int8_t*)"ape6_task_event1", 40, 1024, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape6_event1_task}; + osp_task_info_ex ape6_task_event2 = {41, (int8_t*)"ape6_task_event2", 41, 1024, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape6_event2_task}; + osp_task_info_ex ape6_task_event3 = {42, (int8_t*)"ape6_task_event3", 42, 1024, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape6_event3_task}; + osp_task_info_ex ape6_task_timer1 = {43, (int8_t*)"ape6_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape6_timer1_task}; + osp_task_info_ex ape6_task_timer2 = {44, (int8_t*)"ape6_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape6_timer2_task}; + + osp_task_create(&ape6_task_event1); + osp_task_create(&ape6_task_event2); + osp_task_create(&ape6_task_event3); + osp_task_create(&ape6_task_timer1); + osp_task_create(&ape6_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return ; +} + +/* 收到消息后删除任务 */ +void ape6_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} + diff --git a/public/test/testcases/case22/osp/src/case22_ape7_task.s.c b/public/test/testcases/case22/osp/src/case22_ape7_task.s.c new file mode 100644 index 0000000..ff7beda --- /dev/null +++ b/public/test/testcases/case22/osp/src/case22_ape7_task.s.c @@ -0,0 +1,446 @@ +// +FHDR------------------------------------------------------------ +// Copyright (c) 2022 SmartLogic. +// ALL RIGHTS RESERVED +// ----------------------------------------------------------------- +// Filename : case20_ape3_task.s.c +// Author : +// Created On : 2023-01-05 +// Last Modified : +// ----------------------------------------------------------------- +// Description: +// +// +// -FHDR------------------------------------------------------------ +#include "ucp_utility.h" +#include "ucp_tick.h" +#include "ucp_printf.h" +#include "phy_para.h" +#include "osp_msg.h" +#include "ucp_testcase.h" +#include "msg_transfer_layer.h" +#include "ucp_port.h" +#include "ape_mtimer.h" +#include "osp_task.h" +#include "osp_timer.h" + +/***************************************************************/ +/* 事件任务相关打点 */ +static uint32_t g_u32_case22_ape7_event1_rev_num = 0; // 30 0xB7E00E78 +static uint32_t g_u32_case22_ape7_event1_rev_ok = 0; // 31 0xB7E00E7C +static uint32_t g_u32_case22_ape7_event1_addr_err = 0; // 32 0xB7E00E80 +//static uint32_t g_u32_case22_ape7_event1_tick = 0; +//static uint32_t g_u32_case22_ape7_event1_tick_err = 0; // 33 0xB7E00E84 +//static uint32_t g_u32_case22_ape7_event1_sfn_slot_err = 0; // 35 0xB7E00E8C +static uint32_t g_u32_case22_ape7_event1_alloc1_err = 0; // 40 0xB7E00EA0 +static uint32_t g_u32_case22_ape7_event1_send1_err = 0; // 41 0xB7E00EA4 +static uint32_t g_u32_case22_ape7_event1_alloc2_err = 0; // 42 0xB7E00EA8 +static uint32_t g_u32_case22_ape7_event1_send2_err = 0; // 43 0xB7E00EAC +static uint32_t g_u32_case22_ape7_event1_send_ok = 0; // 44 0xB7E00EB0 + +static uint32_t g_u32_case22_ape7_event2_num = 0; // 45 0xB7E00EB4 +static uint32_t g_u32_case22_ape7_event3_num = 0; // 46 0xB7E00EB8 + +/* 收到ARM侧发来的消息（通过RFM转发） */ +void ape7_event1_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + uint32_t msg_addr = 0; + uint32_t que_num = 0; + uint32_t value = 0; + //uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = 0; + uint16_t slot = 0; + //uint16_t sfn_l = 0; + //uint16_t slot_l = 0; + //uint32_t u32_clock_offset = 0; + //uint32_t u32_clock_tick = 0; + char *paddr = NULL; + int ret = 0; + + g_u32_case22_ape7_event1_rev_num++; + if (0 == addr) + { + g_u32_case22_ape7_event1_addr_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 32), g_u32_case22_ape7_event1_addr_err); + return ; + } + + msg_addr = do_read(addr); + que_num = do_read(addr+4); + + value = *(uint32_t*)msg_addr; + sfn = value >> 16; + slot = value & 0xffff; + //msg_transfer_free_msg(TEST_QUE_PORT_ID, que_num, 0, (char*)msg_addr); + g_u32_case22_ape7_event1_rev_ok++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 30), g_u32_case22_ape7_event1_rev_num); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 31), g_u32_case22_ape7_event1_rev_ok); + +#if 0 + rdmcycle(&u32_clock_tick); + + if (0 == g_u32_case22_ape7_event1_tick) + { + g_u32_case22_ape7_event1_tick = u32_clock_tick; + } + else + { + if (u32_clock_tick > g_u32_case22_ape7_event1_tick) + { + u32_clock_offset = u32_clock_tick - g_u32_case22_ape7_event1_tick; + if ((u32_clock_offset > TIMER_OFFSET_MAX_15K) || (u32_clock_offset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case21_ape7_event1_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 33), g_u32_case22_ape7_event1_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 34), u32_clock_offset); + } + } + g_u32_case22_ape7_event1_tick = u32_clock_tick; + } + + sfn_l = get_tx_nr_sfn(scs); + slot_l = get_tx_nr_slot(scs); + if ((sfn != sfn_l) || (slot != slot_l)) + { + g_u32_case21_ape7_event1_sfn_slot_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 35), g_u32_case22_ape7_event1_sfn_slot_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 36), sfn); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 37), sfn_l); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 38), slot); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 39), slot_l); + } +#endif + + /* 给本核event3发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape7_event1_alloc1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 40), g_u32_case22_ape7_event1_alloc1_err); + return ; + } + + do_write(paddr, g_u32_case22_ape7_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INNER, + ape_id, // src que id + ape_id, // dst que id + 40, // src task id + 42); // dst task id + + if (0 != ret) + { + g_u32_case22_ape7_event1_send1_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case22_ape7_event1_send1_err); + //return ; + } + + /* 给其核event2发消息 */ + paddr = osp_alloc_msg(TEST_MSG_SIZE); + if (NULL == paddr) + { + g_u32_case22_ape7_event1_alloc2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case22_ape7_event1_alloc2_err); + return ; + } + + do_write(paddr, g_u32_case22_ape7_event1_rev_num); + do_write((paddr+4), 0xA001B002); + + ret = osp_send_msg((uint32_t)(paddr), + TEST_MSG_SIZE, + UCP4008_KERNEL_INTER, + ape_id, // src que id + 4, // sendto ape4(4 apes 1 cell) + 40, // src task id + 41); // dst task id + + if (0 != ret) + { + g_u32_case22_ape7_event1_send2_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case22_ape7_event1_send2_err); + return ; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case22_ape7_event1_send_ok); + return ; +} + +/* 收到他核event1发来的消息 */ +void ape7_event2_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape7_event2_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 45), g_u32_case22_ape7_event2_num); + return ; +} + +/* 收到本核event1发来的消息 */ +void ape7_event3_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + g_u32_case22_ape7_event3_num++; + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 46), g_u32_case22_ape7_event3_num); + return ; +} + +/***************************************************************/ +/* 定时时任务相关打点 */ +static uint32_t g_u32_case22_ape7_timer1_slot_no_continuous = 0; // 50 0xB7E00EC8 +static uint32_t g_u32_case22_ape7_timer1_sfn_no_continuous = 0; // 51 0xB7E00ECC +//static uint32_t g_u32_case22_ape7_timer1_slot_indication = 0; // 52 0xB7E00ED0 +static uint32_t g_u32_case22_ape7_timer1_update_sfn_slot = 0; // 53 0xB7E00ED4 +static uint32_t g_u32_case22_ape7_timer1_process_cnt = 0; // 54 0xB7E00ED8 +static uint32_t g_u32_case22_ape7_timer1_process_tick = 0; // 55 0xB7E00EDC +static uint32_t g_u32_case22_ape7_timer1_process_tick_err = 0; // 56 0xB7E00EE0 +static uint32_t g_u32_case22_ape7_timer2_process_cnt = 0; // 57 0xB7E00EE4 +static uint32_t g_u32_case22_ape7_timer2_process_tick = 0; // 58 0xB7E00EE8 +static uint32_t g_u32_case22_ape7_timer2_process_tick_err = 0; // 59 0xB7E00EEC +static uint32_t g_u32_case22_ape7_timer2_tx_slot_max = 0; // 64 0xB7E00F00 +static uint32_t g_u32_case22_ape7_timer2_tx_slot_min = 0x32000;//65 0xB7E00F04 +static uint32_t g_u32_case22_ape7_timer2_tx_slot_cur = 0; // 66 0xB7E00F08 +static uint32_t g_u32_case22_ape7_timer2_rx_slot_max = 0; // 67 0xB7E00F0C +static uint32_t g_u32_case22_ape7_timer2_rx_slot_min = 0x32000; // 68 0xB7E00F10 +static uint32_t g_u32_case22_ape7_timer2_rx_slot_cur = 0; // 69 0xB7E00F14 + +static uint16_t gPreviousSlot = 0; +static uint16_t gCurrentSlot = 0; +static uint8_t gSlotFlagInit = 1; +static uint8_t gSfnFlagInit = 1; +static uint16_t gPreviousSfn = 0; +static uint16_t gCurrentSfn = 0; + +static inline void check_continuous_slot(uint16_t slot) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSlotFlagInit == 1) + { + gSlotFlagInit = 0; + gCurrentSlot = slot; + } + else + { + gPreviousSlot = gCurrentSlot; + gCurrentSlot = slot; + delta = (SFN_SLOT_NUM_15K + gCurrentSlot - gPreviousSlot) % SFN_SLOT_NUM_15K; + if (delta != 1) + { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 50), ++g_u32_case22_ape7_timer1_slot_no_continuous); + } + } + return; +} + +static inline void check_continuous_sfn(uint16_t sfn) +{ + uint16_t delta = 0; + uint32_t ape_id = get_core_id(); + + if (gSfnFlagInit == 1) + { + gSfnFlagInit = 0; + gCurrentSfn = sfn; + } + else + { + gPreviousSfn = gCurrentSfn; + gCurrentSfn = sfn; + delta = (1024 + gCurrentSfn - gPreviousSfn) % 1024; + if (delta != 1) { + debug_write(DBG_DDR_COMMON_IDX(ape_id, 51), ++g_u32_case22_ape7_timer1_sfn_no_continuous); + } + } + return; +} + +#if 0 +static inline void send_slot_indication(void) +{ + uint16_t scs = LTE_SCS_ID; + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t value = (sfn << 16) + slot; + uint32_t ape_id = get_core_id(); + + uint32_t size = 8; + char* buf; + uint32_t availableSize,offset; + + uint16_t cu_flag = U_PLANE; + HandleId_t handler; + handler.port_id = get_ucp_port_id(); + handler.inst_id = 1; + handler.type_id = CU_SPLIT; + int32_t ret = msg_transfer_send_start(handler.value); + + ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); + if (SUCCESS != ret) + { + UCP_PRINT_ERROR("send_slot_indication C_PLANE ret[0x%08x]", ret); + return; + } + uint32_t clockBegin; + rdmcycle(&clockBegin); + do_write(buf, value); + do_write(buf+4, clockBegin); + ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); + + ret = msg_transfer_send_end(handler.value); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 52), ++g_u32_case22_ape7_timer1_slot_indication); + + return; +} +#endif + +static inline void update_sfn_slot(void) +{ + uint32_t clockBegin; + rdmcycle(&clockBegin); + + uint16_t scs = LTE_SCS_ID;//15KHz + uint16_t sfn = get_tx_nr_sfn(scs); + uint16_t slot = get_tx_nr_slot(scs); + uint32_t ape_id = get_core_id(); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 53), ++g_u32_case22_ape7_timer1_update_sfn_slot); + + UCP_PRINT_ERROR("ape[0x%x]:enter[%d], sfn[%d], slot[%d].", ape_id, g_u32_case22_ape7_timer1_update_sfn_slot, sfn, slot); + + check_continuous_slot(slot); + + if (slot == 0) { + check_continuous_sfn(sfn); + } + + return; +} + + +/* 定时点任务 */ +void ape7_timer1_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 54), ++g_u32_case22_ape7_timer1_process_cnt); + + update_sfn_slot(); + + //send_slot_indication(); + + if (0 == g_u32_case22_ape7_timer1_process_tick) + { + g_u32_case22_ape7_timer1_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape7_timer1_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape7_timer1_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape7_timer1_process_tick_err++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), clockOffset); + } + } + g_u32_case22_ape7_timer1_process_tick = clockTick; + } + //debug_write(DBG_DDR_COMMON_IDX(ape_id, 55), g_u32_case20_ape3_timer1_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 56), g_u32_case22_ape7_timer1_process_tick_err); + return; +} + +void ape7_timer2_task(void) +{ + uint32_t ape_id = get_core_id(); + uint32_t clockTick = 0; + uint32_t clockOffset = 0; + rdmcycle(&clockTick); + + g_u32_case22_ape7_timer2_tx_slot_cur = get_tx_nr_slot_cycle(); + g_u32_case22_ape7_timer2_rx_slot_cur = get_rx_nr_slot_cycle(); + + g_u32_case22_ape7_timer2_tx_slot_max = get_max(g_u32_case22_ape7_timer2_tx_slot_cur, g_u32_case22_ape7_timer2_tx_slot_max); + g_u32_case22_ape7_timer2_tx_slot_min = get_min(g_u32_case22_ape7_timer2_tx_slot_cur, g_u32_case22_ape7_timer2_tx_slot_min); + + g_u32_case22_ape7_timer2_rx_slot_max = get_max(g_u32_case22_ape7_timer2_rx_slot_cur, g_u32_case22_ape7_timer2_rx_slot_max); + g_u32_case22_ape7_timer2_rx_slot_min = get_min(g_u32_case22_ape7_timer2_rx_slot_cur, g_u32_case22_ape7_timer2_rx_slot_min); + + g_u32_case22_ape7_timer2_process_cnt++; + debug_write(DBG_DDR_COMMON_IDX(ape_id, 57), g_u32_case22_ape7_timer2_process_cnt); + + if (0 == g_u32_case22_ape7_timer2_process_tick) + { + g_u32_case22_ape7_timer2_process_tick = clockTick; + } + else + { + if (clockTick > g_u32_case22_ape7_timer2_process_tick) + { + clockOffset = clockTick - g_u32_case22_ape7_timer2_process_tick; + if ((clockOffset > TIMER_OFFSET_MAX_15K) || (clockOffset < TIMER_OFFSET_MIN_15K)) + { + g_u32_case22_ape7_timer2_process_tick_err++; + } + } + g_u32_case22_ape7_timer2_process_tick = clockTick; + } + debug_write(DBG_DDR_COMMON_IDX(ape_id, 58), g_u32_case22_ape7_timer2_process_tick); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 59), g_u32_case22_ape7_timer2_process_tick_err); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 64), g_u32_case22_ape7_timer2_tx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 65), g_u32_case22_ape7_timer2_tx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 66), g_u32_case22_ape7_timer2_tx_slot_cur); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 67), g_u32_case22_ape7_timer2_rx_slot_max); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 68), g_u32_case22_ape7_timer2_rx_slot_min); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 69), g_u32_case22_ape7_timer2_rx_slot_cur); + + return ; +} + +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape7_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x01010101); + + osp_task_info_ex ape7_task_event1 = {40, (int8_t*)"ape7_task_event1", 40, 1024, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape7_event1_task}; + osp_task_info_ex ape7_task_event2 = {41, (int8_t*)"ape7_task_event2", 41, 1024, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape7_event2_task}; + osp_task_info_ex ape7_task_event3 = {42, (int8_t*)"ape7_task_event3", 42, 1024, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape7_event3_task}; + osp_task_info_ex ape7_task_timer1 = {43, (int8_t*)"ape7_task_timer1", 43, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 0, NULL, (OSP_TASKENTRY_FUNC)ape7_timer1_task}; + osp_task_info_ex ape7_task_timer2 = {44, (int8_t*)"ape7_task_timer2", 44, 2048, OSP_TIMER_TYPE, 0, 0x3ff, 200, NULL, (OSP_TASKENTRY_FUNC)ape7_timer2_task}; + + osp_task_create(&ape7_task_event1); + osp_task_create(&ape7_task_event2); + osp_task_create(&ape7_task_event3); + osp_task_create(&ape7_task_timer1); + osp_task_create(&ape7_task_timer2); + + osp_timer_sync(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x03030303); + return ; +} + +/* 收到消息后删除任务 */ +void ape7_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x05050505); + + //osp_del_task_all(LTE_SCS_ID); + + debug_write(DBG_DDR_COMMON_IDX(ape_id, 29), 0x06060606); + return; +} +