Merge branch 'dev_ck_v2.1_xls_feature#1694#' into 'dev_ck_v2.1'
update feature#1694# merge dev_ck_v2.1_xls_feature#1694# to dev_ck_v2.1 See merge request ucp/driver/ucp4008_platform_spu!96
This commit is contained in:
commit
d6ea3f72f3
@ -1,87 +1,87 @@
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// +FHDR------------------------------------------------------------
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// +FHDR------------------------------------------------------------
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// Copyright (c) 2022 SmartLogic.
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// Copyright (c) 2022 SmartLogic.
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||||||
// ALL RIGHTS RESERVED
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// ALL RIGHTS RESERVED
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||||||
// -----------------------------------------------------------------
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// -----------------------------------------------------------------
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||||||
// Filename : msg_transfer_layer.h
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// Filename : msg_transfer_layer.h
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||||||
// Author : xianfeng.du
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// Author : xianfeng.du
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||||||
// Created On : 2022-06-29
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// Created On : 2022-06-29
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||||||
// Last Modified :
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// Last Modified :
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||||||
// -----------------------------------------------------------------
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// -----------------------------------------------------------------
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||||||
// Description:
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// Description:
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||||||
//
|
//
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||||||
//
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//
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||||||
// -FHDR------------------------------------------------------------
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// -FHDR------------------------------------------------------------
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||||||
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||||||
#ifndef __MSG_TRANSFER_LAYER_H__
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#ifndef __MSG_TRANSFER_LAYER_H__
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#define __MSG_TRANSFER_LAYER_H__
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#define __MSG_TRANSFER_LAYER_H__
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||||||
#define MAX_INSTANCE_NUM (2)
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#define MAX_INSTANCE_NUM (4)
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#define MAX_PORT_NUM (4)
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#define MAX_PORT_NUM (4)
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#define SUCCESS (0)
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#define SUCCESS (0)
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#define FAILURE (-1)
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#define FAILURE (-1)
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#define UNINITIALIZED_QUEUE (1)
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#define UNINITIALIZED_QUEUE (1)
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#define FULLEDED_QUEUE (2)
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#define FULLEDED_QUEUE (2)
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#define EMPTY_QUEUE (2)
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#define EMPTY_QUEUE (2)
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#define OUT_OF_BLOCK_MEMORY (2)
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#define OUT_OF_BLOCK_MEMORY (2)
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typedef enum e_transfer_type {
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typedef enum e_transfer_type {
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NON_CU_SPLIT,
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NON_CU_SPLIT,
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CU_SPLIT,
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CU_SPLIT,
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OAM,
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OAM,
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TRANSFER_TYPE_NUM
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TRANSFER_TYPE_NUM
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} transfer_type_e;
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} transfer_type_e;
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#define MAX_TRANS_NUM (TRANSFER_TYPE_NUM-1)
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#define MAX_TRANS_NUM (TRANSFER_TYPE_NUM-1)
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typedef enum e_cu_flag {
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typedef enum e_cu_flag {
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C_PLANE,
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C_PLANE,
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U_PLANE
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U_PLANE
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} cu_flag_e;
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} cu_flag_e;
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typedef union tHandleId {
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typedef union tHandleId {
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uint32_t value;
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uint32_t value;
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struct {
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struct {
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uint8_t rsv;
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uint8_t rsv;
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uint8_t type_id;
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uint8_t type_id;
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uint8_t inst_id;
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uint8_t inst_id;
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uint8_t port_id;
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uint8_t port_id;
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};
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};
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} HandleId_t;
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} HandleId_t;
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typedef uint32_t (*msg_transfer_callback)(const char* buf,uint32_t payloadSize);
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typedef uint32_t (*msg_transfer_callback)(const char* buf,uint32_t payloadSize);
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typedef struct t_queue_info {
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typedef struct t_queue_info {
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uint32_t tx_desc_num;
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uint32_t tx_desc_num;
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uint32_t rx_desc_num;
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uint32_t rx_desc_num;
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uint32_t tx_block_size;
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uint32_t tx_block_size;
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uint32_t rx_block_size;
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uint32_t rx_block_size;
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uint16_t tx_block_num;
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uint16_t tx_block_num;
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uint16_t rx_block_num;
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uint16_t rx_block_num;
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uint16_t directions;
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uint16_t directions;
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uint16_t rsv;
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uint16_t rsv;
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union {
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union {
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uint64_t ele0;//aligned 64bit for NPU
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uint64_t ele0;//aligned 64bit for NPU
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msg_transfer_callback tx_callback;
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msg_transfer_callback tx_callback;
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};
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};
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union {
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union {
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uint64_t ele1;//aligned 64bit for NPU
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uint64_t ele1;//aligned 64bit for NPU
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msg_transfer_callback rx_callback;
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msg_transfer_callback rx_callback;
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};
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};
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} queue_info_s;
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} queue_info_s;
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typedef struct t_transfer_type_info {
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typedef struct t_transfer_type_info {
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queue_info_s queue_cplane_info;
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queue_info_s queue_cplane_info;
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queue_info_s queue_uplane_info;
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queue_info_s queue_uplane_info;
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} transfer_type_info_s;
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} transfer_type_info_s;
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//int32_t msg_transfer_init(uint16_t port_index, uint16_t transfer_type, uint16_t inst_id, const transfer_type_info_s* transfer_type_info);
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//int32_t msg_transfer_init(uint16_t port_index, uint16_t transfer_type, uint16_t inst_id, const transfer_type_info_s* transfer_type_info);
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int32_t msg_transfer_callback_register(uint16_t transfer_type, uint16_t inst_id, uint16_t cu_flag, msg_transfer_callback rx_callback);
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int32_t msg_transfer_callback_register(uint16_t transfer_type, uint16_t inst_id, uint16_t cu_flag, msg_transfer_callback rx_callback);
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int32_t msg_transfer_send_start(int32_t handle_id);
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int32_t msg_transfer_send_start(int32_t handle_id);
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int32_t msg_transfer_alloc_msg(int32_t handle_id, uint16_t cu_flag, uint32_t bufSize, char** buf, uint32_t* availableSize, uint32_t* offset);
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int32_t msg_transfer_alloc_msg(int32_t handle_id, uint16_t cu_flag, uint32_t bufSize, char** buf, uint32_t* availableSize, uint32_t* offset);
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int32_t msg_transfer_send_msg(int32_t handle_id, uint16_t cu_flag, uint8_t* msg_ptr, uint32_t offset, uint32_t msg_len);
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int32_t msg_transfer_send_msg(int32_t handle_id, uint16_t cu_flag, uint8_t* msg_ptr, uint32_t offset, uint32_t msg_len);
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int32_t msg_transfer_send_end(int32_t handle_id);
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int32_t msg_transfer_send_end(int32_t handle_id);
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int32_t msg_transfer_receive(int32_t handle_id, uint16_t cu_flag, uint32_t offset, uint32_t len, uint8_t** msg_ptr);
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int32_t msg_transfer_receive(int32_t handle_id, uint16_t cu_flag, uint32_t offset, uint32_t len, uint8_t** msg_ptr);
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int32_t msg_transfer_close(int32_t handle_id);
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int32_t msg_transfer_close(int32_t handle_id);
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#endif
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#endif
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@ -1,89 +1,89 @@
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// +FHDR------------------------------------------------------------
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// +FHDR------------------------------------------------------------
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||||||
// Copyright (c) 2022 SmartLogic.
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// Copyright (c) 2022 SmartLogic.
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// ALL RIGHTS RESERVED
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// ALL RIGHTS RESERVED
|
||||||
// -----------------------------------------------------------------
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// -----------------------------------------------------------------
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// Filename : msg_transfer_layer.h
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// Filename : msg_transfer_layer.h
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// Author : xianfeng.du
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// Author : xianfeng.du
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// Created On : 2022-06-29
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// Created On : 2022-06-29
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// Last Modified :
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// Last Modified :
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// -----------------------------------------------------------------
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// -----------------------------------------------------------------
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||||||
// Description:
|
// Description:
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||||||
//
|
//
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||||||
//
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//
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// -FHDR------------------------------------------------------------
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// -FHDR------------------------------------------------------------
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#ifndef __MSG_TRANSFER_LAYER_H__
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#ifndef __MSG_TRANSFER_LAYER_H__
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#define __MSG_TRANSFER_LAYER_H__
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#define __MSG_TRANSFER_LAYER_H__
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#include "typedef.h"
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#include "typedef.h"
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#define MAX_INSTANCE_NUM (2)
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#define MAX_INSTANCE_NUM (4) //(2)
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#define MAX_PORT_NUM (4)
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#define MAX_PORT_NUM (4)
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#define SUCCESS (0)
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#define SUCCESS (0)
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#define FAILURE (-1)
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#define FAILURE (-1)
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#define UNINITIALIZED_QUEUE (1)
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#define UNINITIALIZED_QUEUE (1)
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#define FULLEDED_QUEUE (2)
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#define FULLEDED_QUEUE (2)
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#define EMPTY_QUEUE (2)
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#define EMPTY_QUEUE (2)
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#define OUT_OF_BLOCK_MEMORY (2)
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#define OUT_OF_BLOCK_MEMORY (2)
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typedef enum e_transfer_type {
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typedef enum e_transfer_type {
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NON_CU_SPLIT,
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NON_CU_SPLIT,
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CU_SPLIT,
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CU_SPLIT,
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||||||
OAM,
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OAM,
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TRANSFER_TYPE_NUM
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TRANSFER_TYPE_NUM
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} transfer_type_e;
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} transfer_type_e;
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#define MAX_TRANS_NUM (TRANSFER_TYPE_NUM-1)
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#define MAX_TRANS_NUM (TRANSFER_TYPE_NUM-1)
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typedef enum e_cu_flag {
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typedef enum e_cu_flag {
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C_PLANE,
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C_PLANE,
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U_PLANE
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U_PLANE
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} cu_flag_e;
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} cu_flag_e;
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typedef union tHandleId {
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typedef union tHandleId {
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uint32_t value;
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uint32_t value;
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struct {
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struct {
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uint8_t rsv;
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uint8_t rsv;
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uint8_t type_id;
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uint8_t type_id;
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uint8_t inst_id;
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uint8_t inst_id;
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uint8_t port_id;
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uint8_t port_id;
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};
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};
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} HandleId_t;
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} HandleId_t;
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typedef uint32_t (*msg_transfer_callback)(const char* buf,uint32_t payloadSize);
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typedef uint32_t (*msg_transfer_callback)(const char* buf,uint32_t payloadSize);
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typedef struct t_queue_info {
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typedef struct t_queue_info {
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uint32_t tx_desc_num;
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uint32_t tx_desc_num;
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uint32_t rx_desc_num;
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uint32_t rx_desc_num;
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uint32_t tx_block_size;
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uint32_t tx_block_size;
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uint32_t rx_block_size;
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uint32_t rx_block_size;
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uint16_t tx_block_num;
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uint16_t tx_block_num;
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uint16_t rx_block_num;
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uint16_t rx_block_num;
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uint16_t directions;
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uint16_t directions;
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uint16_t rsv;
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uint16_t rsv;
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union {
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union {
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uint64_t ele0;//aligned 64bit for NPU
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uint64_t ele0;//aligned 64bit for NPU
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msg_transfer_callback tx_callback;
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msg_transfer_callback tx_callback;
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};
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};
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union {
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union {
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uint64_t ele1;//aligned 64bit for NPU
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uint64_t ele1;//aligned 64bit for NPU
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msg_transfer_callback rx_callback;
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msg_transfer_callback rx_callback;
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};
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};
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} queue_info_s;
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} queue_info_s;
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typedef struct t_transfer_type_info {
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typedef struct t_transfer_type_info {
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queue_info_s queue_cplane_info;
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queue_info_s queue_cplane_info;
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queue_info_s queue_uplane_info;
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queue_info_s queue_uplane_info;
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} transfer_type_info_s;
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} transfer_type_info_s;
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//int32_t msg_transfer_init(uint16_t port_index, uint16_t transfer_type, uint16_t inst_id, const transfer_type_info_s* transfer_type_info);
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//int32_t msg_transfer_init(uint16_t port_index, uint16_t transfer_type, uint16_t inst_id, const transfer_type_info_s* transfer_type_info);
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int32_t msg_transfer_callback_register(uint16_t transfer_type, uint16_t inst_id, uint16_t cu_flag, msg_transfer_callback rx_callback);
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int32_t msg_transfer_callback_register(uint16_t transfer_type, uint16_t inst_id, uint16_t cu_flag, msg_transfer_callback rx_callback);
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int32_t msg_transfer_send_start(int32_t handle_id);
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int32_t msg_transfer_send_start(int32_t handle_id);
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int32_t msg_transfer_alloc_msg(int32_t handle_id, uint16_t cu_flag, uint32_t bufSize, char** buf, uint32_t* availableSize, uint32_t* offset);
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int32_t msg_transfer_alloc_msg(int32_t handle_id, uint16_t cu_flag, uint32_t bufSize, char** buf, uint32_t* availableSize, uint32_t* offset);
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int32_t msg_transfer_send_msg(int32_t handle_id, uint16_t cu_flag, uint8_t* msg_ptr, uint32_t offset, uint32_t msg_len);
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int32_t msg_transfer_send_msg(int32_t handle_id, uint16_t cu_flag, uint8_t* msg_ptr, uint32_t offset, uint32_t msg_len);
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int32_t msg_transfer_send_end(int32_t handle_id);
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int32_t msg_transfer_send_end(int32_t handle_id);
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int32_t msg_transfer_receive(int32_t handle_id, uint16_t cu_flag, uint32_t offset, uint32_t len, uint8_t** msg_ptr);
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int32_t msg_transfer_receive(int32_t handle_id, uint16_t cu_flag, uint32_t offset, uint32_t len, uint8_t** msg_ptr);
|
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int32_t msg_transfer_close(int32_t handle_id);
|
int32_t msg_transfer_close(int32_t handle_id);
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||||||
|
|
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#endif
|
#endif
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|
||||||
|
@ -1,90 +1,90 @@
|
|||||||
// +FHDR------------------------------------------------------------
|
// +FHDR------------------------------------------------------------
|
||||||
// Copyright (c) 2022 SmartLogic.
|
// Copyright (c) 2022 SmartLogic.
|
||||||
// ALL RIGHTS RESERVED
|
// ALL RIGHTS RESERVED
|
||||||
// -----------------------------------------------------------------
|
// -----------------------------------------------------------------
|
||||||
// Filename : phy_init.c
|
// Filename : phy_init.c
|
||||||
// Author : xianfeng.du
|
// Author : xianfeng.du
|
||||||
// Created On : 2022-12-27
|
// Created On : 2022-12-27
|
||||||
// Last Modified :
|
// Last Modified :
|
||||||
// -----------------------------------------------------------------
|
// -----------------------------------------------------------------
|
||||||
// Description:
|
// Description:
|
||||||
// ecs_rfm_spu0 msg_transfer_cfg
|
// ecs_rfm_spu0 msg_transfer_cfg
|
||||||
//
|
//
|
||||||
// -FHDR------------------------------------------------------------
|
// -FHDR------------------------------------------------------------
|
||||||
|
|
||||||
#include "typedef.h"
|
#include "typedef.h"
|
||||||
#include "ucp_printf.h"
|
#include "ucp_printf.h"
|
||||||
#include "ucp_utility.h"
|
#include "ucp_utility.h"
|
||||||
#include "ucp_tick.h"
|
#include "ucp_tick.h"
|
||||||
#include "msg_transfer_queue.h"
|
#include "msg_transfer_queue.h"
|
||||||
#include "app_interface.h"
|
#include "app_interface.h"
|
||||||
|
|
||||||
#define RFM_TEST_MSG_SIZE (8)
|
#define RFM_TEST_MSG_SIZE (8)
|
||||||
#define RFM_MSG_TYPE (0)
|
#define RFM_MSG_TYPE (0)
|
||||||
#define CELL_SETUP_TYPE_SIMULATION (0x5a6b7c8d)
|
#define CELL_SETUP_TYPE_SIMULATION (0x5a6b7c8d)
|
||||||
#define ORX_MSG_TYPE_SIMULATION (0xaabb7788)
|
#define ORX_MSG_TYPE_SIMULATION (0xaabb7788)
|
||||||
|
|
||||||
static uint32_t g_u32_rfm_alloc_err = 0; //(15) 0xB7E0143C
|
static uint32_t g_u32_rfm_alloc_err = 0; //(15) 0xB7E0143C
|
||||||
static uint32_t g_u32_rfm_send_err = 0; //(16) 0xB7E01440
|
static uint32_t g_u32_rfm_send_err = 0; //(16) 0xB7E01440
|
||||||
static uint32_t g_u32_rfm_recv_num = 0; //(17) 0xB7E01444
|
static uint32_t g_u32_rfm_recv_num = 0; //(17) 0xB7E01444
|
||||||
static uint32_t g_u32_rfm_send_ok = 0; //(18) 0xB7E01448
|
static uint32_t g_u32_rfm_send_ok = 0; //(18) 0xB7E01448
|
||||||
|
|
||||||
uint32_t rx_callback_data(const char* buf,uint32_t payloadSize)
|
uint32_t rx_callback_data(const char* buf,uint32_t payloadSize)
|
||||||
{
|
{
|
||||||
/* RFM0接收消息后发给APE0 */
|
/* RFM0接收消息后发给APE0 */
|
||||||
uint32_t core_id = get_core_id();
|
uint32_t core_id = get_core_id();
|
||||||
int32_t ret = 0;
|
int32_t ret = 0;
|
||||||
char *addr = NULL;
|
char *addr = NULL;
|
||||||
uint32_t u32_clock_tick = 0;
|
uint32_t u32_clock_tick = 0;
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
g_u32_rfm_recv_num++;
|
g_u32_rfm_recv_num++;
|
||||||
|
|
||||||
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
if (NULL == addr)
|
if (NULL == addr)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 15), ++g_u32_rfm_alloc_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 15), ++g_u32_rfm_alloc_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
do_write(addr, (uint32_t)buf);
|
do_write(addr, (uint32_t)buf);
|
||||||
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_DATA);
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_DATA);
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
ret = osp_send_msg((uint32_t)(addr),
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
RFM_TEST_MSG_SIZE,
|
RFM_TEST_MSG_SIZE,
|
||||||
RFM_MSG_TYPE,
|
RFM_MSG_TYPE,
|
||||||
10, // src que id
|
9, // src que id
|
||||||
0, // dst que id
|
0, // dst que id
|
||||||
40, // src task id
|
40, // src task id
|
||||||
40); // dst task id
|
40); // dst task id
|
||||||
|
|
||||||
if (0 != ret)
|
if (0 != ret)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 16), ++g_u32_rfm_send_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 16), ++g_u32_rfm_send_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
g_u32_rfm_send_ok++;
|
g_u32_rfm_send_ok++;
|
||||||
|
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 17), g_u32_rfm_recv_num);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 17), g_u32_rfm_recv_num);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 18), g_u32_rfm_send_ok);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 18), g_u32_rfm_send_ok);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
static uint32_t g_u32_rfm_alloc1_err = 0; //(19) 0xB7E0144C
|
static uint32_t g_u32_rfm_alloc1_err = 0; //(19) 0xB7E0144C
|
||||||
static uint32_t g_u32_rfm_send1_err = 0; //(20) 0xB7E01450
|
static uint32_t g_u32_rfm_send1_err = 0; //(20) 0xB7E01450
|
||||||
static uint32_t g_u32_rfm_send2_err = 0; //(20) 0xB7E01450
|
static uint32_t g_u32_rfm_send2_err = 0; //(20) 0xB7E01450
|
||||||
static uint32_t g_u32_rfm_recv1_num = 0; //(21) 0xB7E01454
|
static uint32_t g_u32_rfm_recv1_num = 0; //(21) 0xB7E01454
|
||||||
static uint32_t g_u32_rfm_send1_ok = 0; //(22) 0xB7E01458
|
static uint32_t g_u32_rfm_send1_ok = 0; //(22) 0xB7E01458
|
||||||
static uint32_t g_u32_rfm_send2_ok = 0; //(22) 0xB7E01458
|
static uint32_t g_u32_rfm_send2_ok = 0; //(22) 0xB7E01458
|
||||||
|
|
||||||
int32_t cell_setup_msg_forward(char* buf, uint32_t payloadSize)
|
int32_t cell_setup_msg_forward(char* buf, uint32_t payloadSize)
|
||||||
{
|
{
|
||||||
/* RFM0接收消息后发给RFM1 */
|
/* RFM0接收消息后发给RFM1 */
|
||||||
uint32_t core_id = get_core_id();
|
uint32_t core_id = get_core_id();
|
||||||
int32_t ret = 0;
|
int32_t ret = 0;
|
||||||
char *addr = NULL;
|
char *addr = NULL;
|
||||||
|
|
||||||
@ -93,258 +93,477 @@ int32_t cell_setup_msg_forward(char* buf, uint32_t payloadSize)
|
|||||||
if ((CELL_SETUP_TYPE_SIMULATION != msg_type) && (ORX_MSG_TYPE_SIMULATION != msg_type)) {
|
if ((CELL_SETUP_TYPE_SIMULATION != msg_type) && (ORX_MSG_TYPE_SIMULATION != msg_type)) {
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
uint32_t u32_clock_tick = 0;
|
uint32_t u32_clock_tick = 0;
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+8), u32_clock_tick); //RFM forward tick
|
do_write((buf+8), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
if (NULL == addr)
|
if (NULL == addr)
|
||||||
{
|
{
|
||||||
return 2;
|
return 2;
|
||||||
}
|
}
|
||||||
do_write(addr, buf);
|
do_write(addr, buf);
|
||||||
|
|
||||||
/*send cell setup message*/
|
/*send cell setup message*/
|
||||||
ret = osp_send_msg((uint32_t)addr,
|
ret = osp_send_msg((uint32_t)addr,
|
||||||
RFM_TEST_MSG_SIZE,
|
RFM_TEST_MSG_SIZE,
|
||||||
RFM_MSG_TYPE,
|
RFM_MSG_TYPE,
|
||||||
10, // src que id
|
9, // src que id
|
||||||
11, // dst que id
|
11, // dst que id
|
||||||
41, // src task id
|
41, // src task id
|
||||||
41); // dst task id
|
41); // dst task id
|
||||||
|
|
||||||
if (0 != ret)
|
if (0 != ret)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 23), ++g_u32_rfm_send2_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 23), ++g_u32_rfm_send2_err);
|
||||||
return 3;
|
return 3;
|
||||||
}
|
}
|
||||||
g_u32_rfm_send2_ok++;
|
g_u32_rfm_send2_ok++;
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 24), g_u32_rfm_send2_ok);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 24), g_u32_rfm_send2_ok);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t rx_callback_ctrl(const char* buf,uint32_t payloadSize)
|
uint32_t rx_callback_ctrl(const char* buf,uint32_t payloadSize)
|
||||||
{
|
{
|
||||||
int32_t ret = cell_setup_msg_forward((char*)buf, payloadSize);
|
int32_t ret = cell_setup_msg_forward((char*)buf, payloadSize);
|
||||||
if (0 == ret) {
|
if (0 == ret) {
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* RFM0接收消息后发给APE1 */
|
/* RFM0接收消息后发给APE1 */
|
||||||
uint32_t core_id = get_core_id();
|
uint32_t core_id = get_core_id();
|
||||||
char *addr = NULL;
|
char *addr = NULL;
|
||||||
uint32_t u32_clock_tick = 0;
|
uint32_t u32_clock_tick = 0;
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
g_u32_rfm_recv1_num++;
|
g_u32_rfm_recv1_num++;
|
||||||
|
|
||||||
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
if (NULL == addr)
|
if (NULL == addr)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 19), ++g_u32_rfm_alloc1_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 19), ++g_u32_rfm_alloc1_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
do_write(addr, (uint32_t)buf);
|
do_write(addr, (uint32_t)buf);
|
||||||
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_CTRL);
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_CTRL);
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
ret = osp_send_msg((uint32_t)(addr),
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
RFM_TEST_MSG_SIZE,
|
RFM_TEST_MSG_SIZE,
|
||||||
RFM_MSG_TYPE,
|
RFM_MSG_TYPE,
|
||||||
10, // src que id
|
9, // src que id
|
||||||
1, // dst que id
|
1, // dst que id
|
||||||
40, // src task id
|
40, // src task id
|
||||||
40); // dst task id
|
40); // dst task id
|
||||||
|
|
||||||
if (0 != ret)
|
if (0 != ret)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 20), ++g_u32_rfm_send1_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 20), ++g_u32_rfm_send1_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
g_u32_rfm_send1_ok++;
|
g_u32_rfm_send1_ok++;
|
||||||
|
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 21), g_u32_rfm_recv1_num);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 21), g_u32_rfm_recv1_num);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 22), g_u32_rfm_send1_ok);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 22), g_u32_rfm_send1_ok);
|
||||||
|
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t rx_callback_oam(const char* buf,uint32_t payloadSize)
|
uint32_t rx_callback_oam(const char* buf,uint32_t payloadSize)
|
||||||
{
|
{
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
static uint32_t g_u32_rfm_1_alloc_err = 0; //(23) 0xB7E0145C
|
static uint32_t g_u32_rfm_1_alloc_err = 0; //(23) 0xB7E0145C
|
||||||
static uint32_t g_u32_rfm_1_send_err = 0; //(24) 0xB7E01460
|
static uint32_t g_u32_rfm_1_send_err = 0; //(24) 0xB7E01460
|
||||||
static uint32_t g_u32_rfm_1_recv_num = 0; //(25) 0xB7E01464
|
static uint32_t g_u32_rfm_1_recv_num = 0; //(25) 0xB7E01464
|
||||||
static uint32_t g_u32_rfm_1_send_ok = 0; //(26) 0xB7E01468
|
static uint32_t g_u32_rfm_1_send_ok = 0; //(26) 0xB7E01468
|
||||||
|
|
||||||
uint32_t rx1_callback_data(const char* buf,uint32_t payloadSize)
|
uint32_t rx1_callback_data(const char* buf,uint32_t payloadSize)
|
||||||
{
|
{
|
||||||
/* RFM0接收消息后发给APE0 */
|
/* RFM0接收消息后发给APE0 */
|
||||||
uint32_t core_id = get_core_id();
|
uint32_t core_id = get_core_id();
|
||||||
int32_t ret = 0;
|
int32_t ret = 0;
|
||||||
char *addr = NULL;
|
char *addr = NULL;
|
||||||
uint32_t u32_clock_tick = 0;
|
uint32_t u32_clock_tick = 0;
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
g_u32_rfm_1_recv_num++;
|
g_u32_rfm_1_recv_num++;
|
||||||
|
|
||||||
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
if (NULL == addr)
|
if (NULL == addr)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 23), ++g_u32_rfm_1_alloc_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 23), ++g_u32_rfm_1_alloc_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
do_write(addr, (uint32_t)buf);
|
do_write(addr, (uint32_t)buf);
|
||||||
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_DATA);
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_DATA);
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
ret = osp_send_msg((uint32_t)(addr),
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
RFM_TEST_MSG_SIZE,
|
RFM_TEST_MSG_SIZE,
|
||||||
RFM_MSG_TYPE,
|
RFM_MSG_TYPE,
|
||||||
10, // src que id
|
9, // src que id
|
||||||
4, // dst que id
|
2, // dst que id
|
||||||
40, // src task id
|
40, // src task id
|
||||||
40); // dst task id
|
40); // dst task id
|
||||||
|
|
||||||
if (0 != ret)
|
if (0 != ret)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 24), ++g_u32_rfm_1_send_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 24), ++g_u32_rfm_1_send_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
g_u32_rfm_1_send_ok++;
|
g_u32_rfm_1_send_ok++;
|
||||||
|
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 25), g_u32_rfm_1_recv_num);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 25), g_u32_rfm_1_recv_num);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 26), g_u32_rfm_1_send_ok);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 26), g_u32_rfm_1_send_ok);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
static uint32_t g_u32_rfm_1_alloc1_err = 0; //(27) 0xB7E0144C
|
static uint32_t g_u32_rfm_1_alloc1_err = 0; //(27) 0xB7E0146C
|
||||||
static uint32_t g_u32_rfm_1_send1_err = 0; //(28) 0xB7E01450
|
static uint32_t g_u32_rfm_1_send1_err = 0; //(28) 0xB7E01470
|
||||||
static uint32_t g_u32_rfm_1_recv1_num = 0; //(29) 0xB7E01454
|
static uint32_t g_u32_rfm_1_recv1_num = 0; //(29) 0xB7E01474
|
||||||
static uint32_t g_u32_rfm_1_send1_ok = 0; //(30) 0xB7E01458
|
static uint32_t g_u32_rfm_1_send1_ok = 0; //(30) 0xB7E01478
|
||||||
|
|
||||||
uint32_t rx1_callback_ctrl(const char* buf,uint32_t payloadSize)
|
uint32_t rx1_callback_ctrl(const char* buf,uint32_t payloadSize)
|
||||||
{
|
{
|
||||||
int32_t ret = cell_setup_msg_forward((char*)buf, payloadSize);
|
int32_t ret = cell_setup_msg_forward((char*)buf, payloadSize);
|
||||||
if (0 == ret) {
|
if (0 == ret) {
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* RFM0接收消息后发给APE1 */
|
/* RFM0接收消息后发给APE1 */
|
||||||
uint32_t core_id = get_core_id();
|
uint32_t core_id = get_core_id();
|
||||||
char *addr = NULL;
|
char *addr = NULL;
|
||||||
uint32_t u32_clock_tick = 0;
|
uint32_t u32_clock_tick = 0;
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
g_u32_rfm_1_recv1_num++;
|
g_u32_rfm_1_recv1_num++;
|
||||||
|
|
||||||
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
if (NULL == addr)
|
if (NULL == addr)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 27), ++g_u32_rfm_1_alloc1_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 27), ++g_u32_rfm_1_alloc1_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
do_write(addr, (uint32_t)buf);
|
do_write(addr, (uint32_t)buf);
|
||||||
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_CTRL);
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_CTRL);
|
||||||
|
|
||||||
rdmcycle(&u32_clock_tick);
|
rdmcycle(&u32_clock_tick);
|
||||||
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
ret = osp_send_msg((uint32_t)(addr),
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
RFM_TEST_MSG_SIZE,
|
RFM_TEST_MSG_SIZE,
|
||||||
RFM_MSG_TYPE,
|
RFM_MSG_TYPE,
|
||||||
10, // src que id
|
9, // src que id
|
||||||
5, // dst que id
|
3, // dst que id
|
||||||
40, // src task id
|
40, // src task id
|
||||||
40); // dst task id
|
40); // dst task id
|
||||||
|
|
||||||
if (0 != ret)
|
if (0 != ret)
|
||||||
{
|
{
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 28), ++g_u32_rfm_1_send1_err);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 28), ++g_u32_rfm_1_send1_err);
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
g_u32_rfm_1_send1_ok++;
|
g_u32_rfm_1_send1_ok++;
|
||||||
|
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 29), g_u32_rfm_1_recv1_num);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 29), g_u32_rfm_1_recv1_num);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(core_id, 30), g_u32_rfm_1_send1_ok);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 30), g_u32_rfm_1_send1_ok);
|
||||||
|
|
||||||
return payloadSize;
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
//void msg_transfer_cfg()
|
static uint32_t g_u32_rfm_2_alloc_err = 0; //(31) 0xB7E0147C
|
||||||
void phy_init(void)
|
static uint32_t g_u32_rfm_2_send_err = 0; //(32) 0xB7E01480
|
||||||
{
|
static uint32_t g_u32_rfm_2_recv_num = 0; //(33) 0xB7E01484
|
||||||
//uint8_t port_id = get_ucp_port_id();
|
static uint32_t g_u32_rfm_2_send_ok = 0; //(34) 0xB7E01488
|
||||||
uint16_t inst_id = 0;
|
|
||||||
uint16_t transfer_type = 0;
|
uint32_t rx2_callback_data(const char* buf,uint32_t payloadSize)
|
||||||
uint16_t cu_flag = C_PLANE;
|
{
|
||||||
int32_t handle_id = 0;
|
/* RFM0接收消息后发给APE0 */
|
||||||
//transfer_type_info_s transfer_type_info;
|
uint32_t core_id = get_core_id();
|
||||||
|
int32_t ret = 0;
|
||||||
for (inst_id=0; inst_id<MAX_INSTANCE_NUM; inst_id++) {
|
char *addr = NULL;
|
||||||
#if 0
|
uint32_t u32_clock_tick = 0;
|
||||||
/*********************************transfer_type = CU_SPLIT**********************************/
|
|
||||||
transfer_type = CU_SPLIT;
|
rdmcycle(&u32_clock_tick);
|
||||||
cu_flag = C_PLANE;
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
handle_id = msg_transfer_callback_register(transfer_type,inst_id,cu_flag,rx_callback_ctrl);
|
g_u32_rfm_2_recv_num++;
|
||||||
if (handle_id < 0) {
|
|
||||||
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
}
|
if (NULL == addr)
|
||||||
|
{
|
||||||
cu_flag = U_PLANE;
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 31), ++g_u32_rfm_2_alloc_err);
|
||||||
handle_id = msg_transfer_callback_register(transfer_type,inst_id,cu_flag,rx_callback_data);
|
return payloadSize;
|
||||||
if (handle_id < 0) {
|
}
|
||||||
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
|
||||||
}
|
do_write(addr, (uint32_t)buf);
|
||||||
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_DATA);
|
||||||
/*********************************transfer_type = OAM**********************************/
|
|
||||||
#endif
|
rdmcycle(&u32_clock_tick);
|
||||||
transfer_type = OAM;
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
handle_id = msg_transfer_callback_register(transfer_type,inst_id,cu_flag,rx_callback_oam);
|
|
||||||
if (handle_id < 0) {
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:OAM, handle_id[0x%08x] error.",handle_id);
|
RFM_TEST_MSG_SIZE,
|
||||||
}
|
RFM_MSG_TYPE,
|
||||||
}
|
9, // src que id
|
||||||
|
4, // dst que id
|
||||||
/*********************************transfer_type = CU_SPLIT**********************************/
|
40, // src task id
|
||||||
transfer_type = CU_SPLIT;
|
40); // dst task id
|
||||||
cu_flag = C_PLANE;
|
|
||||||
handle_id = msg_transfer_callback_register(transfer_type, 0, cu_flag, rx_callback_ctrl);
|
if (0 != ret)
|
||||||
if (handle_id < 0) {
|
{
|
||||||
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 32), ++g_u32_rfm_2_send_err);
|
||||||
}
|
return payloadSize;
|
||||||
|
}
|
||||||
cu_flag = U_PLANE;
|
g_u32_rfm_2_send_ok++;
|
||||||
handle_id = msg_transfer_callback_register(transfer_type, 0, cu_flag, rx_callback_data);
|
|
||||||
if (handle_id < 0) {
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 33), g_u32_rfm_2_recv_num);
|
||||||
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 34), g_u32_rfm_2_send_ok);
|
||||||
}
|
return payloadSize;
|
||||||
|
}
|
||||||
transfer_type = CU_SPLIT;
|
|
||||||
cu_flag = C_PLANE;
|
static uint32_t g_u32_rfm_2_alloc1_err = 0; //(35) 0xB7E0148C
|
||||||
handle_id = msg_transfer_callback_register(transfer_type, 1, cu_flag, rx1_callback_ctrl);
|
static uint32_t g_u32_rfm_2_send1_err = 0; //(36) 0xB7E01490
|
||||||
if (handle_id < 0) {
|
static uint32_t g_u32_rfm_2_recv1_num = 0; //(37) 0xB7E01494
|
||||||
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
static uint32_t g_u32_rfm_2_send1_ok = 0; //(38) 0xB7E01498
|
||||||
}
|
|
||||||
|
uint32_t rx2_callback_ctrl(const char* buf,uint32_t payloadSize)
|
||||||
cu_flag = U_PLANE;
|
{
|
||||||
handle_id = msg_transfer_callback_register(transfer_type, 1, cu_flag, rx1_callback_data);
|
int32_t ret = cell_setup_msg_forward((char*)buf, payloadSize);
|
||||||
if (handle_id < 0) {
|
if (0 == ret) {
|
||||||
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
return payloadSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
return;
|
/* RFM0接收消息后发给APE1 */
|
||||||
}
|
uint32_t core_id = get_core_id();
|
||||||
|
char *addr = NULL;
|
||||||
|
uint32_t u32_clock_tick = 0;
|
||||||
|
|
||||||
|
rdmcycle(&u32_clock_tick);
|
||||||
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
|
g_u32_rfm_2_recv1_num++;
|
||||||
|
|
||||||
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
|
if (NULL == addr)
|
||||||
|
{
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 35), ++g_u32_rfm_2_alloc1_err);
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
do_write(addr, (uint32_t)buf);
|
||||||
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_CTRL);
|
||||||
|
|
||||||
|
rdmcycle(&u32_clock_tick);
|
||||||
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
|
RFM_TEST_MSG_SIZE,
|
||||||
|
RFM_MSG_TYPE,
|
||||||
|
9, // src que id
|
||||||
|
5, // dst que id
|
||||||
|
40, // src task id
|
||||||
|
40); // dst task id
|
||||||
|
|
||||||
|
if (0 != ret)
|
||||||
|
{
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 36), ++g_u32_rfm_2_send1_err);
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
g_u32_rfm_2_send1_ok++;
|
||||||
|
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 37), g_u32_rfm_2_recv1_num);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 38), g_u32_rfm_2_send1_ok);
|
||||||
|
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint32_t g_u32_rfm_3_alloc_err = 0; //(39) 0xB7E0149C
|
||||||
|
static uint32_t g_u32_rfm_3_send_err = 0; //(40) 0xB7E014A0
|
||||||
|
static uint32_t g_u32_rfm_3_recv_num = 0; //(41) 0xB7E014A4
|
||||||
|
static uint32_t g_u32_rfm_3_send_ok = 0; //(42) 0xB7E014A8
|
||||||
|
|
||||||
|
uint32_t rx3_callback_data(const char* buf,uint32_t payloadSize)
|
||||||
|
{
|
||||||
|
/* RFM0接收消息后发给APE0 */
|
||||||
|
uint32_t core_id = get_core_id();
|
||||||
|
int32_t ret = 0;
|
||||||
|
char *addr = NULL;
|
||||||
|
uint32_t u32_clock_tick = 0;
|
||||||
|
|
||||||
|
rdmcycle(&u32_clock_tick);
|
||||||
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
|
g_u32_rfm_3_recv_num++;
|
||||||
|
|
||||||
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
|
if (NULL == addr)
|
||||||
|
{
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 39), ++g_u32_rfm_3_alloc_err);
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
do_write(addr, (uint32_t)buf);
|
||||||
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_DATA);
|
||||||
|
|
||||||
|
rdmcycle(&u32_clock_tick);
|
||||||
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
|
RFM_TEST_MSG_SIZE,
|
||||||
|
RFM_MSG_TYPE,
|
||||||
|
9, // src que id
|
||||||
|
6, // dst que id
|
||||||
|
40, // src task id
|
||||||
|
40); // dst task id
|
||||||
|
|
||||||
|
if (0 != ret)
|
||||||
|
{
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 40), ++g_u32_rfm_3_send_err);
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
g_u32_rfm_3_send_ok++;
|
||||||
|
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 41), g_u32_rfm_3_recv_num);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 42), g_u32_rfm_3_send_ok);
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint32_t g_u32_rfm_3_alloc1_err = 0; //(43) 0xB7E014AC
|
||||||
|
static uint32_t g_u32_rfm_3_send1_err = 0; //(44) 0xB7E014B0
|
||||||
|
static uint32_t g_u32_rfm_3_recv1_num = 0; //(45) 0xB7E014B4
|
||||||
|
static uint32_t g_u32_rfm_3_send1_ok = 0; //(46) 0xB7E014B8
|
||||||
|
|
||||||
|
uint32_t rx3_callback_ctrl(const char* buf,uint32_t payloadSize)
|
||||||
|
{
|
||||||
|
int32_t ret = cell_setup_msg_forward((char*)buf, payloadSize);
|
||||||
|
if (0 == ret) {
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* RFM0接收消息后发给APE1 */
|
||||||
|
uint32_t core_id = get_core_id();
|
||||||
|
char *addr = NULL;
|
||||||
|
uint32_t u32_clock_tick = 0;
|
||||||
|
|
||||||
|
rdmcycle(&u32_clock_tick);
|
||||||
|
do_write((buf+16), u32_clock_tick); //RFM receive tick
|
||||||
|
g_u32_rfm_3_recv1_num++;
|
||||||
|
|
||||||
|
addr = osp_alloc_msg(RFM_TEST_MSG_SIZE);
|
||||||
|
if (NULL == addr)
|
||||||
|
{
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 43), ++g_u32_rfm_3_alloc1_err);
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
do_write(addr, (uint32_t)buf);
|
||||||
|
do_write((addr+4), UCP4008_TRAFFIC_NR_eMBB_CTRL);
|
||||||
|
|
||||||
|
rdmcycle(&u32_clock_tick);
|
||||||
|
do_write((buf+20), u32_clock_tick); //RFM forward tick
|
||||||
|
|
||||||
|
ret = osp_send_msg((uint32_t)(addr),
|
||||||
|
RFM_TEST_MSG_SIZE,
|
||||||
|
RFM_MSG_TYPE,
|
||||||
|
9, // src que id
|
||||||
|
7, // dst que id
|
||||||
|
40, // src task id
|
||||||
|
40); // dst task id
|
||||||
|
|
||||||
|
if (0 != ret)
|
||||||
|
{
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 44), ++g_u32_rfm_3_send1_err);
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
g_u32_rfm_3_send1_ok++;
|
||||||
|
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 45), g_u32_rfm_3_recv1_num);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(core_id, 46), g_u32_rfm_3_send1_ok);
|
||||||
|
|
||||||
|
return payloadSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
void phy_init(void)
|
||||||
|
{
|
||||||
|
//uint8_t port_id = get_ucp_port_id();
|
||||||
|
uint16_t inst_id = 0;
|
||||||
|
uint16_t transfer_type = 0;
|
||||||
|
uint16_t cu_flag = C_PLANE;
|
||||||
|
int32_t handle_id = 0;
|
||||||
|
//transfer_type_info_s transfer_type_info;
|
||||||
|
|
||||||
|
for (inst_id=0; inst_id<MAX_INSTANCE_NUM; inst_id++)
|
||||||
|
{
|
||||||
|
transfer_type = OAM;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type,inst_id,cu_flag,rx_callback_oam);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:OAM, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*********************************transfer_type = CU_SPLIT**********************************/
|
||||||
|
transfer_type = CU_SPLIT;
|
||||||
|
cu_flag = C_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 0, cu_flag, rx_callback_ctrl);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
cu_flag = U_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 0, cu_flag, rx_callback_data);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
transfer_type = CU_SPLIT;
|
||||||
|
cu_flag = C_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 1, cu_flag, rx1_callback_ctrl);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
cu_flag = U_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 1, cu_flag, rx1_callback_data);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
transfer_type = CU_SPLIT;
|
||||||
|
cu_flag = C_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 2, cu_flag, rx2_callback_ctrl);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
cu_flag = U_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 2, cu_flag, rx2_callback_data);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
transfer_type = CU_SPLIT;
|
||||||
|
cu_flag = C_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 3, cu_flag, rx3_callback_ctrl);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
cu_flag = U_PLANE;
|
||||||
|
handle_id = msg_transfer_callback_register(transfer_type, 3, cu_flag, rx3_callback_data);
|
||||||
|
if (handle_id < 0) {
|
||||||
|
UCP_PRINT_EMPTY("msg_transfer_cfg transfer_type:CU_SPLIT, handle_id[0x%08x] error.",handle_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
@ -163,34 +163,6 @@ void ape0_event1_task(uint32_t addr, uint32_t size)
|
|||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case24_ape0_event1_send2_err);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case24_ape0_event1_send2_err);
|
||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
#if 0
|
|
||||||
/* 给ape2 event1发消息 */
|
|
||||||
paddr = osp_alloc_msg(TEST_MSG_SIZE);
|
|
||||||
if (NULL == paddr)
|
|
||||||
{
|
|
||||||
//g_u32_case21_ape0_event1_alloc2_err++;
|
|
||||||
//debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case21_ape0_event1_alloc2_err);
|
|
||||||
return ;
|
|
||||||
}
|
|
||||||
|
|
||||||
do_write(paddr, g_u32_case22_ape0_event1_rev_num);
|
|
||||||
do_write((paddr+4), 0xA001B002);
|
|
||||||
|
|
||||||
ret = osp_send_msg((uint32_t)(paddr),
|
|
||||||
TEST_MSG_SIZE,
|
|
||||||
UCP4008_KERNEL_INTER,
|
|
||||||
ape_id, // src que id
|
|
||||||
2, // ape2
|
|
||||||
40, // src task id
|
|
||||||
40); // dst task id
|
|
||||||
|
|
||||||
if (0 != ret)
|
|
||||||
{
|
|
||||||
//g_u32_case21_ape0_event1_send2_err++;
|
|
||||||
//debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case21_ape0_event1_send2_err);
|
|
||||||
return ;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case24_ape0_event1_send_ok);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case24_ape0_event1_send_ok);
|
||||||
|
|
||||||
@ -301,7 +273,7 @@ static inline void send_slot_indication(void)
|
|||||||
char* buf;
|
char* buf;
|
||||||
uint32_t availableSize,offset;
|
uint32_t availableSize,offset;
|
||||||
|
|
||||||
uint16_t cu_flag = U_PLANE;//C_PLANE;
|
uint16_t cu_flag = U_PLANE;
|
||||||
HandleId_t handler;
|
HandleId_t handler;
|
||||||
handler.port_id = get_ucp_port_id();
|
handler.port_id = get_ucp_port_id();
|
||||||
handler.inst_id = 0;
|
handler.inst_id = 0;
|
||||||
|
@ -192,34 +192,7 @@ void ape1_event1_task(uint32_t addr, uint32_t size)
|
|||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case24_ape1_event1_send2_err);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case24_ape1_event1_send2_err);
|
||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
#if 0
|
|
||||||
/* 给ape3 event1发消息 */
|
|
||||||
paddr = osp_alloc_msg(TEST_MSG_SIZE);
|
|
||||||
if (NULL == paddr)
|
|
||||||
{
|
|
||||||
//g_u32_case21_ape1_event1_alloc2_err++;
|
|
||||||
//debug_write(DBG_DDR_COMMON_IDX(ape_id, 42), g_u32_case21_ape1_event1_alloc2_err);
|
|
||||||
return ;
|
|
||||||
}
|
|
||||||
|
|
||||||
do_write(paddr, g_u32_case22_ape1_event1_rev_num);
|
|
||||||
do_write((paddr+4), 0xA001B002);
|
|
||||||
|
|
||||||
ret = osp_send_msg((uint32_t)(paddr),
|
|
||||||
TEST_MSG_SIZE,
|
|
||||||
UCP4008_KERNEL_INTER,
|
|
||||||
ape_id, // src que id
|
|
||||||
3, // ape3
|
|
||||||
40, // src task id
|
|
||||||
40); // dst task id
|
|
||||||
|
|
||||||
if (0 != ret)
|
|
||||||
{
|
|
||||||
//g_u32_case21_ape1_event1_send2_err++;
|
|
||||||
//debug_write(DBG_DDR_COMMON_IDX(ape_id, 43), g_u32_case21_ape1_event1_send2_err);
|
|
||||||
return ;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case24_ape1_event1_send_ok);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 44), ++g_u32_case24_ape1_event1_send_ok);
|
||||||
|
|
||||||
return ;
|
return ;
|
||||||
@ -329,7 +302,7 @@ static inline void send_slot_indication(void)
|
|||||||
char* buf;
|
char* buf;
|
||||||
uint32_t availableSize,offset;
|
uint32_t availableSize,offset;
|
||||||
|
|
||||||
uint16_t cu_flag = C_PLANE;//U_PLANE;
|
uint16_t cu_flag = C_PLANE;
|
||||||
HandleId_t handler;
|
HandleId_t handler;
|
||||||
handler.port_id = get_ucp_port_id();
|
handler.port_id = get_ucp_port_id();
|
||||||
handler.inst_id = 0;
|
handler.inst_id = 0;
|
||||||
|
@ -28,9 +28,9 @@
|
|||||||
static uint32_t g_u32_case24_ape2_event1_rev_num = 0; // 30 0xB7E00478
|
static uint32_t g_u32_case24_ape2_event1_rev_num = 0; // 30 0xB7E00478
|
||||||
static uint32_t g_u32_case24_ape2_event1_rev_ok = 0; // 31 0xB7E0047C
|
static uint32_t g_u32_case24_ape2_event1_rev_ok = 0; // 31 0xB7E0047C
|
||||||
static uint32_t g_u32_case24_ape2_event1_addr_err = 0; // 32 0xB7E00480
|
static uint32_t g_u32_case24_ape2_event1_addr_err = 0; // 32 0xB7E00480
|
||||||
//static uint32_t g_u32_case22_ape2_event1_tick = 0;
|
//static uint32_t g_u32_case24_ape2_event1_tick = 0;
|
||||||
//static uint32_t g_u32_case22_ape2_event1_tick_err = 0; // 33 0xB7E00484
|
//static uint32_t g_u32_case24_ape2_event1_tick_err = 0; // 33 0xB7E00484
|
||||||
//static uint32_t g_u32_case22_ape2_event1_sfn_slot_err = 0; // 35 0xB7E0048C
|
//static uint32_t g_u32_case24_ape2_event1_sfn_slot_err = 0; // 35 0xB7E0048C
|
||||||
static uint32_t g_u32_case24_ape2_event1_alloc1_err = 0; // 40 0xB7E004A0
|
static uint32_t g_u32_case24_ape2_event1_alloc1_err = 0; // 40 0xB7E004A0
|
||||||
static uint32_t g_u32_case24_ape2_event1_send1_err = 0; // 41 0xB7E004A4
|
static uint32_t g_u32_case24_ape2_event1_send1_err = 0; // 41 0xB7E004A4
|
||||||
static uint32_t g_u32_case24_ape2_event1_alloc2_err = 0; // 42 0xB7E004A8
|
static uint32_t g_u32_case24_ape2_event1_alloc2_err = 0; // 42 0xB7E004A8
|
||||||
@ -261,7 +261,7 @@ static inline void check_continuous_sfn(uint16_t sfn)
|
|||||||
}
|
}
|
||||||
|
|
||||||
#if 1
|
#if 1
|
||||||
uint32_t gu32_send_cnt = 0;
|
uint32_t gu32_ape2_send_cnt = 0; //(61) 0xb7e004f4
|
||||||
|
|
||||||
static inline void send_slot_indication(void)
|
static inline void send_slot_indication(void)
|
||||||
{
|
{
|
||||||
@ -283,7 +283,7 @@ static inline void send_slot_indication(void)
|
|||||||
int32_t ret = msg_transfer_send_start(handler.value);
|
int32_t ret = msg_transfer_send_start(handler.value);
|
||||||
//UCP_PRINT_ERROR("value(0x%x), inst(%d)", handler.value, handler.inst_id);
|
//UCP_PRINT_ERROR("value(0x%x), inst(%d)", handler.value, handler.inst_id);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_send_cnt);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape2_send_cnt);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot);
|
||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff);
|
||||||
|
|
||||||
|
@ -28,9 +28,9 @@
|
|||||||
static uint32_t g_u32_case24_ape3_event1_rev_num = 0; // 30 0xB7E00678
|
static uint32_t g_u32_case24_ape3_event1_rev_num = 0; // 30 0xB7E00678
|
||||||
static uint32_t g_u32_case24_ape3_event1_rev_ok = 0; // 31 0xB7E0067C
|
static uint32_t g_u32_case24_ape3_event1_rev_ok = 0; // 31 0xB7E0067C
|
||||||
static uint32_t g_u32_case24_ape3_event1_addr_err = 0; // 32 0xB7E00680
|
static uint32_t g_u32_case24_ape3_event1_addr_err = 0; // 32 0xB7E00680
|
||||||
//static uint32_t g_u32_case22_ape3_event1_tick = 0;
|
//static uint32_t g_u32_case24_ape3_event1_tick = 0;
|
||||||
//static uint32_t g_u32_case22_ape3_event1_tick_err = 0; // 33 0xB7E00684
|
//static uint32_t g_u32_case24_ape3_event1_tick_err = 0; // 33 0xB7E00684
|
||||||
//static uint32_t g_u32_case22_ape3_event1_sfn_slot_err = 0; // 35 0xB7E0068C
|
//static uint32_t g_u32_case24_ape3_event1_sfn_slot_err = 0; // 35 0xB7E0068C
|
||||||
static uint32_t g_u32_case24_ape3_event1_alloc1_err = 0; // 40 0xB7E006A0
|
static uint32_t g_u32_case24_ape3_event1_alloc1_err = 0; // 40 0xB7E006A0
|
||||||
static uint32_t g_u32_case24_ape3_event1_send1_err = 0; // 41 0xB7E006A4
|
static uint32_t g_u32_case24_ape3_event1_send1_err = 0; // 41 0xB7E006A4
|
||||||
static uint32_t g_u32_case24_ape3_event1_alloc2_err = 0; // 42 0xB7E006A8
|
static uint32_t g_u32_case24_ape3_event1_alloc2_err = 0; // 42 0xB7E006A8
|
||||||
@ -261,6 +261,8 @@ static inline void check_continuous_sfn(uint16_t sfn)
|
|||||||
}
|
}
|
||||||
|
|
||||||
#if 1
|
#if 1
|
||||||
|
uint32_t gu32_ape3_send_cnt = 0; //(61) 0xb7e006f4
|
||||||
|
|
||||||
static inline void send_slot_indication(void)
|
static inline void send_slot_indication(void)
|
||||||
{
|
{
|
||||||
uint16_t scs = LTE_SCS_ID;
|
uint16_t scs = LTE_SCS_ID;
|
||||||
@ -279,6 +281,10 @@ static inline void send_slot_indication(void)
|
|||||||
handler.inst_id = 1;
|
handler.inst_id = 1;
|
||||||
handler.type_id = CU_SPLIT;
|
handler.type_id = CU_SPLIT;
|
||||||
int32_t ret = msg_transfer_send_start(handler.value);
|
int32_t ret = msg_transfer_send_start(handler.value);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape3_send_cnt);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff);
|
||||||
|
|
||||||
ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset);
|
ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset);
|
||||||
if (SUCCESS != ret)
|
if (SUCCESS != ret)
|
||||||
|
@ -137,7 +137,6 @@ void ape4_event1_task(uint32_t addr, uint32_t size)
|
|||||||
debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case24_ape4_event1_send1_err);
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 41), g_u32_case24_ape4_event1_send1_err);
|
||||||
//return ;
|
//return ;
|
||||||
}
|
}
|
||||||
UCP_PRINT_ERROR("send_ok_1");
|
|
||||||
|
|
||||||
/* 给其核event2发消息 */
|
/* 给其核event2发消息 */
|
||||||
paddr = osp_alloc_msg(TEST_MSG_SIZE);
|
paddr = osp_alloc_msg(TEST_MSG_SIZE);
|
||||||
@ -222,7 +221,7 @@ void ape4_event3_task(uint32_t addr, uint32_t size)
|
|||||||
/* 定时时任务相关打点 */
|
/* 定时时任务相关打点 */
|
||||||
static uint32_t g_u32_case24_ape4_timer1_slot_no_continuous = 0; // 50 0xB7E008C8
|
static uint32_t g_u32_case24_ape4_timer1_slot_no_continuous = 0; // 50 0xB7E008C8
|
||||||
static uint32_t g_u32_case24_ape4_timer1_sfn_no_continuous = 0; // 51 0xB7E008CC
|
static uint32_t g_u32_case24_ape4_timer1_sfn_no_continuous = 0; // 51 0xB7E008CC
|
||||||
//static uint32_t g_u32_case24_ape4_timer1_slot_indication = 0; // 52 0xB7E008D0
|
static uint32_t g_u32_case24_ape4_timer1_slot_indication = 0; // 52 0xB7E008D0
|
||||||
static uint32_t g_u32_case24_ape4_timer1_update_sfn_slot = 0; // 53 0xB7E008D4
|
static uint32_t g_u32_case24_ape4_timer1_update_sfn_slot = 0; // 53 0xB7E008D4
|
||||||
static uint32_t g_u32_case24_ape4_timer1_process_cnt = 0; // 54 0xB7E008D8
|
static uint32_t g_u32_case24_ape4_timer1_process_cnt = 0; // 54 0xB7E008D8
|
||||||
static uint32_t g_u32_case24_ape4_timer1_process_tick = 0; // 55 0xB7E008DC
|
static uint32_t g_u32_case24_ape4_timer1_process_tick = 0; // 55 0xB7E008DC
|
||||||
@ -288,7 +287,7 @@ static inline void check_continuous_sfn(uint16_t sfn)
|
|||||||
}
|
}
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
#if 0
|
#if 1
|
||||||
uint32_t gu32_ape4_send_cnt = 0;
|
uint32_t gu32_ape4_send_cnt = 0;
|
||||||
static inline void send_slot_indication(void)
|
static inline void send_slot_indication(void)
|
||||||
{
|
{
|
||||||
@ -302,7 +301,7 @@ static inline void send_slot_indication(void)
|
|||||||
char* buf;
|
char* buf;
|
||||||
uint32_t availableSize,offset;
|
uint32_t availableSize,offset;
|
||||||
|
|
||||||
uint16_t cu_flag = U_PLANE;//C_PLANE;
|
uint16_t cu_flag = U_PLANE;
|
||||||
HandleId_t handler;
|
HandleId_t handler;
|
||||||
handler.port_id = get_ucp_port_id();
|
handler.port_id = get_ucp_port_id();
|
||||||
handler.inst_id = 2;
|
handler.inst_id = 2;
|
||||||
@ -368,7 +367,7 @@ void ape4_timer1_task(void)
|
|||||||
|
|
||||||
update_sfn_slot();
|
update_sfn_slot();
|
||||||
|
|
||||||
//send_slot_indication();
|
send_slot_indication();
|
||||||
|
|
||||||
if (0 == g_u32_case24_ape4_timer1_process_tick)
|
if (0 == g_u32_case24_ape4_timer1_process_tick)
|
||||||
{
|
{
|
||||||
|
@ -249,7 +249,7 @@ void ape5_event3_task(uint32_t addr, uint32_t size)
|
|||||||
/* 定时时任务相关打点 */
|
/* 定时时任务相关打点 */
|
||||||
static uint32_t g_u32_case24_ape5_timer1_slot_no_continuous = 0; // 50 0xB7E00AC8
|
static uint32_t g_u32_case24_ape5_timer1_slot_no_continuous = 0; // 50 0xB7E00AC8
|
||||||
static uint32_t g_u32_case24_ape5_timer1_sfn_no_continuous = 0; // 51 0xB7E00ACC
|
static uint32_t g_u32_case24_ape5_timer1_sfn_no_continuous = 0; // 51 0xB7E00ACC
|
||||||
//static uint32_t g_u32_case24_ape5_timer1_slot_indication = 0; // 52 0xB7E00AD0
|
static uint32_t g_u32_case24_ape5_timer1_slot_indication = 0; // 52 0xB7E00AD0
|
||||||
static uint32_t g_u32_case24_ape5_timer1_update_sfn_slot = 0; // 53 0xB7E00AD4
|
static uint32_t g_u32_case24_ape5_timer1_update_sfn_slot = 0; // 53 0xB7E00AD4
|
||||||
static uint32_t g_u32_case24_ape5_timer1_process_cnt = 0; // 54 0xB7E00AD8
|
static uint32_t g_u32_case24_ape5_timer1_process_cnt = 0; // 54 0xB7E00AD8
|
||||||
static uint32_t g_u32_case24_ape5_timer1_process_tick = 0; // 55 0xB7E00ADC
|
static uint32_t g_u32_case24_ape5_timer1_process_tick = 0; // 55 0xB7E00ADC
|
||||||
@ -315,7 +315,7 @@ static inline void check_continuous_sfn(uint16_t sfn)
|
|||||||
}
|
}
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
#if 0
|
#if 1
|
||||||
uint32_t gu32_ape5_send_cnt = 0; //(61) 0xb7e002f4
|
uint32_t gu32_ape5_send_cnt = 0; //(61) 0xb7e002f4
|
||||||
static inline void send_slot_indication(void)
|
static inline void send_slot_indication(void)
|
||||||
{
|
{
|
||||||
@ -329,7 +329,7 @@ static inline void send_slot_indication(void)
|
|||||||
char* buf;
|
char* buf;
|
||||||
uint32_t availableSize,offset;
|
uint32_t availableSize,offset;
|
||||||
|
|
||||||
uint16_t cu_flag = C_PLANE;//U_PLANE;
|
uint16_t cu_flag = C_PLANE;
|
||||||
HandleId_t handler;
|
HandleId_t handler;
|
||||||
handler.port_id = get_ucp_port_id();
|
handler.port_id = get_ucp_port_id();
|
||||||
handler.inst_id = 2;
|
handler.inst_id = 2;
|
||||||
@ -394,7 +394,7 @@ void ape5_timer1_task(void)
|
|||||||
|
|
||||||
update_sfn_slot();
|
update_sfn_slot();
|
||||||
|
|
||||||
//send_slot_indication();
|
send_slot_indication();
|
||||||
|
|
||||||
if (0 == g_u32_case24_ape5_timer1_process_tick)
|
if (0 == g_u32_case24_ape5_timer1_process_tick)
|
||||||
{
|
{
|
||||||
|
@ -193,7 +193,7 @@ void ape6_event3_task(uint32_t addr, uint32_t size)
|
|||||||
/* 定时时任务相关打点 */
|
/* 定时时任务相关打点 */
|
||||||
static uint32_t g_u32_case24_ape6_timer1_slot_no_continuous = 0; // 50 0xB7E00CC8
|
static uint32_t g_u32_case24_ape6_timer1_slot_no_continuous = 0; // 50 0xB7E00CC8
|
||||||
static uint32_t g_u32_case24_ape6_timer1_sfn_no_continuous = 0; // 51 0xB7E00CCC
|
static uint32_t g_u32_case24_ape6_timer1_sfn_no_continuous = 0; // 51 0xB7E00CCC
|
||||||
//static uint32_t g_u32_case24_ape6_timer1_slot_indication = 0; // 52 0xB7E00CD0
|
static uint32_t g_u32_case24_ape6_timer1_slot_indication = 0; // 52 0xB7E00CD0
|
||||||
static uint32_t g_u32_case24_ape6_timer1_update_sfn_slot = 0; // 53 0xB7E00CD4
|
static uint32_t g_u32_case24_ape6_timer1_update_sfn_slot = 0; // 53 0xB7E00CD4
|
||||||
static uint32_t g_u32_case24_ape6_timer1_process_cnt = 0; // 54 0xB7E00CD8
|
static uint32_t g_u32_case24_ape6_timer1_process_cnt = 0; // 54 0xB7E00CD8
|
||||||
static uint32_t g_u32_case24_ape6_timer1_process_tick = 0; // 55 0xB7E00CDC
|
static uint32_t g_u32_case24_ape6_timer1_process_tick = 0; // 55 0xB7E00CDC
|
||||||
@ -260,7 +260,7 @@ static inline void check_continuous_sfn(uint16_t sfn)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if 0
|
#if 1
|
||||||
uint32_t gu32_ape6_send_cnt = 0;
|
uint32_t gu32_ape6_send_cnt = 0;
|
||||||
|
|
||||||
static inline void send_slot_indication(void)
|
static inline void send_slot_indication(void)
|
||||||
@ -343,7 +343,7 @@ void ape6_timer1_task(void)
|
|||||||
|
|
||||||
update_sfn_slot();
|
update_sfn_slot();
|
||||||
|
|
||||||
//send_slot_indication();
|
send_slot_indication();
|
||||||
|
|
||||||
if (0 == g_u32_case24_ape6_timer1_process_tick)
|
if (0 == g_u32_case24_ape6_timer1_process_tick)
|
||||||
{
|
{
|
||||||
|
@ -193,7 +193,7 @@ void ape7_event3_task(uint32_t addr, uint32_t size)
|
|||||||
/* 定时时任务相关打点 */
|
/* 定时时任务相关打点 */
|
||||||
static uint32_t g_u32_case24_ape7_timer1_slot_no_continuous = 0; // 50 0xB7E00EC8
|
static uint32_t g_u32_case24_ape7_timer1_slot_no_continuous = 0; // 50 0xB7E00EC8
|
||||||
static uint32_t g_u32_case24_ape7_timer1_sfn_no_continuous = 0; // 51 0xB7E00ECC
|
static uint32_t g_u32_case24_ape7_timer1_sfn_no_continuous = 0; // 51 0xB7E00ECC
|
||||||
//static uint32_t g_u32_case24_ape7_timer1_slot_indication = 0; // 52 0xB7E00ED0
|
static uint32_t g_u32_case24_ape7_timer1_slot_indication = 0; // 52 0xB7E00ED0
|
||||||
static uint32_t g_u32_case24_ape7_timer1_update_sfn_slot = 0; // 53 0xB7E00ED4
|
static uint32_t g_u32_case24_ape7_timer1_update_sfn_slot = 0; // 53 0xB7E00ED4
|
||||||
static uint32_t g_u32_case24_ape7_timer1_process_cnt = 0; // 54 0xB7E00ED8
|
static uint32_t g_u32_case24_ape7_timer1_process_cnt = 0; // 54 0xB7E00ED8
|
||||||
static uint32_t g_u32_case24_ape7_timer1_process_tick = 0; // 55 0xB7E00EDC
|
static uint32_t g_u32_case24_ape7_timer1_process_tick = 0; // 55 0xB7E00EDC
|
||||||
@ -260,7 +260,9 @@ static inline void check_continuous_sfn(uint16_t sfn)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if 0
|
#if 1
|
||||||
|
uint32_t gu32_ape7_send_cnt = 0;
|
||||||
|
|
||||||
static inline void send_slot_indication(void)
|
static inline void send_slot_indication(void)
|
||||||
{
|
{
|
||||||
uint16_t scs = LTE_SCS_ID;
|
uint16_t scs = LTE_SCS_ID;
|
||||||
@ -279,6 +281,10 @@ static inline void send_slot_indication(void)
|
|||||||
handler.inst_id = 3;
|
handler.inst_id = 3;
|
||||||
handler.type_id = CU_SPLIT;
|
handler.type_id = CU_SPLIT;
|
||||||
int32_t ret = msg_transfer_send_start(handler.value);
|
int32_t ret = msg_transfer_send_start(handler.value);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 60), handler.value);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 61), ++gu32_ape7_send_cnt);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 62), slot);
|
||||||
|
debug_write(DBG_DDR_COMMON_IDX(ape_id, 63), 0xffff);
|
||||||
|
|
||||||
ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset);
|
ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset);
|
||||||
if (SUCCESS != ret)
|
if (SUCCESS != ret)
|
||||||
@ -336,7 +342,7 @@ void ape7_timer1_task(void)
|
|||||||
|
|
||||||
update_sfn_slot();
|
update_sfn_slot();
|
||||||
|
|
||||||
//send_slot_indication();
|
send_slot_indication();
|
||||||
|
|
||||||
if (0 == g_u32_case24_ape7_timer1_process_tick)
|
if (0 == g_u32_case24_ape7_timer1_process_tick)
|
||||||
{
|
{
|
||||||
|
Loading…
x
Reference in New Issue
Block a user