From d7eb9d91d7b88408a5f0402815370cad35ef504d Mon Sep 17 00:00:00 2001 From: "yonglin.gui" Date: Thu, 27 Jul 2023 18:46:09 +0800 Subject: [PATCH] merge pcie code to v2.1 --- public/common/platform/inc/spu_log.h | 4 ++ public/common/platform/src/spu_log.s.c | 45 +++++++++++++ public/pet_rfm_spu0/driver/inc/dw_pcie_ep.h | 1 + .../driver/inc/ucp_pcie_traffic.h | 22 +++---- public/pet_rfm_spu0/driver/src/dw_pcie_ep.s.c | 13 +++- .../driver/src/ucp_pcie_setup.s.c | 64 +++++++++++++++---- .../pet_rfm_spu0/msg/inc/msg_transfer_host.h | 5 +- .../msg/src/msg_transfer_host.s.c | 38 +++++++---- public/pet_rfm_spu0/top/src/main.s.c | 14 +++- .../test/testcase/case50/src/pcie_testcase.c | 31 ++++----- 10 files changed, 181 insertions(+), 56 deletions(-) diff --git a/public/common/platform/inc/spu_log.h b/public/common/platform/inc/spu_log.h index c78966b..e6db64a 100644 --- a/public/common/platform/inc/spu_log.h +++ b/public/common/platform/inc/spu_log.h @@ -44,5 +44,9 @@ void spu_log_output(uint8_t level, const char *fmt, ...); uint8_t spu_log_level_set(spu_log_level_e emlog_level); uint8_t spu_log_level_get(void); +#ifdef PCIE_BACKHAUL +void com_debug_log(const char *fmt, ...); +#endif + #endif /*__SPU_LOG_H__*/ diff --git a/public/common/platform/src/spu_log.s.c b/public/common/platform/src/spu_log.s.c index c89f3e8..fb7df96 100644 --- a/public/common/platform/src/spu_log.s.c +++ b/public/common/platform/src/spu_log.s.c @@ -322,4 +322,49 @@ void osp_sendLog_print(int level, char* pbuf, int size, int cell_id) #endif } +#ifdef PCIE_BACKHAUL +#include "../../../pet_rfm_spu0/driver/inc/ucp_pcie_traffic.h" +#define LOGBUFSIZE 512 +void com_debug_log(const char *fmt, ...) +{ + PcieEpMemBarStruct_t* pUcpMemBar = (PcieEpMemBarStruct_t *)0x08740000;//pMemSection->baseAddr; + uint32_t core_id = get_core_id(); + uint32_t count = 0; + uint32_t i = 0; + char tmp_buf[LOGBUFSIZE] = {0}; + + va_list args; + va_start(args,fmt); + while(1) + { + count++; + debug_write(DBG_DDR_COMMON_IDX(core_id, 40), do_read((void *)&pUcpMemBar->command[PCI_ENDPOINT_UCPEP_EP_ED]));//0xb7e0245c + debug_write(DBG_DDR_COMMON_IDX(core_id, 41), count);//0xb7e0245c + if(do_read((void *)&pUcpMemBar->command[PCI_ENDPOINT_UCPEP_EP_ED]) == 0) + { + vsnprintf(tmp_buf, LOGBUFSIZE, fmt, args); + //ape_csu_dma_1D_L2G_ch2ch3_transfer((uint64_t)((uint32_t)(tmp_buf-0x100000)), pUcpMemBar->log_buf, 1024, inst_id, 1); + //memcpy_ucp(pUcpMemBar->log_buf, tmp_buf, 1024); + for(i=0;ilog_buf[i]), tmp_buf[i]); + } + do_write((uint32_t*)&pUcpMemBar->command[PCI_ENDPOINT_UCPEP_EP_ED], 1); + //do_write(((uint32_t*)(&APC_CSU_DMAZSTEPL0) + (apeId<<6) + (i<<3)), 4096); + break; + } + else + { + #if 1 + if(count > 1000) + { + break; + } + #endif + ucp_nop(100); + } + } + va_end(args); +} +#endif diff --git a/public/pet_rfm_spu0/driver/inc/dw_pcie_ep.h b/public/pet_rfm_spu0/driver/inc/dw_pcie_ep.h index 1f3cb4c..21b1fa1 100644 --- a/public/pet_rfm_spu0/driver/inc/dw_pcie_ep.h +++ b/public/pet_rfm_spu0/driver/inc/dw_pcie_ep.h @@ -648,6 +648,7 @@ typedef struct tDwPcieEp { void pcie_ep_drv_init(void); DwPcieEp_t* get_pcie_ep_dev(void); uint32_t dw_pcie_dma_busy(DwPcieEpDma_t* dma, uint8_t ch); +void pcie_ep_dma_recfg(void); #endif diff --git a/public/pet_rfm_spu0/driver/inc/ucp_pcie_traffic.h b/public/pet_rfm_spu0/driver/inc/ucp_pcie_traffic.h index 3378355..4f1cc6f 100644 --- a/public/pet_rfm_spu0/driver/inc/ucp_pcie_traffic.h +++ b/public/pet_rfm_spu0/driver/inc/ucp_pcie_traffic.h @@ -95,9 +95,9 @@ typedef struct tPcieLinkStatus { //RC和EP通信的counter结构体 typedef struct tPcieTrafficCounter { - uint32_t dlDescNum[MAX_INSTANCE_NUM][MAX_Q_NUM_DL_TRAFFIC];//通道描述符的个数，固定为128 - uint32_t dlTxCounter[MAX_INSTANCE_NUM][MAX_Q_NUM_DL_TRAFFIC];//由RC侧来填充，RC侧写下来的数据包的个数 - uint32_t dlRxCounter[MAX_INSTANCE_NUM][MAX_Q_NUM_DL_TRAFFIC];//EP侧接收到的数据包的个数 + uint32_t dlDescNum[MAX_INSTANCE_NUM][MAX_Q_NUM_DL_TRAFFIC];//通道描述符的个数，固定为128 24字节 + uint32_t dlTxCounter[MAX_INSTANCE_NUM][MAX_Q_NUM_DL_TRAFFIC];//由RC侧来填充，RC侧写下来的数据包的个数 24字节 + uint32_t dlRxCounter[MAX_INSTANCE_NUM][MAX_Q_NUM_DL_TRAFFIC];//EP侧接收到的数据包的个数 24字节 //int8_t dlDescIdx[MAX_Q_NUM_DL_TRAFFIC][MAX_DESC_NUM];//该通道的DMA描述符的索引计数，最大128 uint32_t ulDescNum[MAX_INSTANCE_NUM][MAX_Q_NUM_UL_TRAFFIC];//通道描述符的个数，固定为12s8 @@ -134,7 +134,7 @@ typedef enum pcieCommandType{ PCI_ENDPOINT_UCPEP_EP_ED, PCI_ENDPOINT_UCPEP_RC_STATUS, PCI_ENDPOINT_UCPEP_EP_STATUS, - PCI_ENDPOINT_UCPEP_LOWER_DST_ADDR, + PCI_ENDPOINT_UCPEP_DMA_STATUS, PCI_ENDPOINT_UCPEP_UPPER_DST_ADDR, PCI_ENDPOINT_UCPEP_SIZE, PCI_ENDPOINT_UCPEP_CHECKSUM, @@ -151,12 +151,12 @@ typedef enum pcieCommandType{ //bar空间的数据结构体，用来存放bar空间的收发计数，DMA的ll描述符 typedef struct tPcieEpMemBarStruct { - PcieLinkStatus_t status;//PCIE链路状态 - SyncInfo_t trafficSyncInfo; - transfer_type_info_s traffic[MAX_INSTANCE_NUM][TRANSFER_TYPE_NUM];//业务配置下来的按照业务配置信息 - PcieTrafficCounter_t cnt; //每个通道本次收发数据包状态结构体 - UcpTaskDescriptor_t desc;//RC和EP之间DMA任务收发数据的描述符， - uint32_t command[14];//RC和EP通信的command的命令, add by gyl + PcieLinkStatus_t status;//PCIE链路状态 地址 0x08740000 // 8字节 + SyncInfo_t trafficSyncInfo; // 0x08740000+8 // + transfer_type_info_s traffic[MAX_INSTANCE_NUM][TRANSFER_TYPE_NUM];//业务配置下来的按照业务配置信息 0x08740000+ 0x18 //（8+16)字节 + PcieTrafficCounter_t cnt; //每个通道本次收发数据包状态结构体 //0x08740000+ 0x1F8 //(8+16+480)字节 + UcpTaskDescriptor_t desc;//RC和EP之间DMA任务收发数据的描述符，// 6*128*2= 1536字节// 0x08740000+ 0x288 (8+16+480+144)= 648 + uint32_t command[14];//RC和EP通信的command的命令, // 0x08740000+ 0x888 88A=(8+16+480+144+1536)= 2184 char log_buf[1024];//用于将EP侧log输出到RC侧 } PcieEpMemBarStruct_t; @@ -179,7 +179,7 @@ typedef struct tUcpPcieEpMemInfo { UcpPcieEpMemInfo_t* get_ucp_pcie_mem_info(void); void ucp_pcie_worker(void); void ucp_pcie_reset(void); -void ucp_pcie_recfg_reset(void); +int ucp_pcie_recfg_reset(void); void ucp_pcie_reset_bar(void); void debug_log(const char *fmt, ...); diff --git a/public/pet_rfm_spu0/driver/src/dw_pcie_ep.s.c b/public/pet_rfm_spu0/driver/src/dw_pcie_ep.s.c index 084c5c6..98b2d15 100644 --- a/public/pet_rfm_spu0/driver/src/dw_pcie_ep.s.c +++ b/public/pet_rfm_spu0/driver/src/dw_pcie_ep.s.c @@ -760,7 +760,7 @@ void pcie_ep_drv_init(void) pci_endpoint_dma_write_init(1); PCIE_DEBUG_LOG("dw_pcie_ep_init, write intrrpt counter\n"); - debug_write(0x00, 0x00); + //debug_write(0x00, 0x00); register_int_handler(DMA_PIC_INT_NUM, (irq_handler)pcie_dma_handler); #if 0 @@ -781,3 +781,14 @@ void pcie_ep_drv_init(void) } + +//dma 重配 +void pcie_ep_dma_recfg(void) +{ + pci_endpoint_dma_read_init(1); + pci_endpoint_dma_write_init(1); + PCIE_ERROR_LOG("pcie_ep_dma_recfg, finished!\n"); + return; +} + + diff --git a/public/pet_rfm_spu0/driver/src/ucp_pcie_setup.s.c b/public/pet_rfm_spu0/driver/src/ucp_pcie_setup.s.c index a321ea0..709e143 100644 --- a/public/pet_rfm_spu0/driver/src/ucp_pcie_setup.s.c +++ b/public/pet_rfm_spu0/driver/src/ucp_pcie_setup.s.c @@ -18,6 +18,7 @@ #include "ucp_printf.h" #include "ucp_pcie_traffic.h" #include "msg_transfer_host.h" +#include "dw_pcie_ep.h" static inline void ucp_variables_init() { @@ -52,6 +53,7 @@ static inline void ucp_variables_init() return; } + static inline void ucp_counter_setup(void) { uint32_t i = 0; @@ -212,6 +214,8 @@ void ucp_pcie_reset(void) ucp_variables_setup();//对extTrafic变量进行初始化 //ucp_queue_setup(); #endif + pUcpPcieMemInfo->pUcpMemBar->command[PCI_ENDPOINT_UCPEP_RC_STATUS]=RC_NG; + pDevStatus->devReady = epRunning; UCP_PRINT_LOG("UCP PCIE EP Finish checking reset !\n"); return; @@ -227,35 +231,66 @@ void ucp_pcie_reset_bar(void) //主机侧app发生了重启后，需要重新进行配置 -void ucp_pcie_recfg_reset(void) +int ucp_pcie_recfg_reset(void) { - //uint32_t i = 0; + uint32_t i = 0; + int ret = FAILURE; + int count = 0; + int deadCount = 1000; UcpPcieEpMemInfo_t* pUcpPcieMemInfo = get_ucp_pcie_mem_info(); volatile PcieLinkStatus_t* pDevStatus = &pUcpPcieMemInfo->pUcpMemBar->status; //RC set enable; if (pDevStatus->devEnable) { - return; + ret = SUCCESS; + return ret; } + else + { + PCIE_ERROR_LOG("UCP PCIE EP enter recfg...\n"); + volatile UcpPcieDmaState_e state; + for (i = 0; i < MAX_CH_NUM_UCP_DMA; i++) + { + count = 0; + do + { + count++; + state = pUcpPcieMemInfo->pDmaDlCh[i]->state; + PCIE_ERROR_LOG("UCP PCIE EP wait for DL dma finish!\n"); + ucp_nop(100); + } while ((UCP_DMA_STATE_WORKING == state) && (count < deadCount)); + memset(pUcpPcieMemInfo->pDmaDlCh[i], 0, sizeof(UcpPcieDmaCh_t)); + count = 0; + do + { + count++; + state = pUcpPcieMemInfo->pDmaUlCh[i]->state; + PCIE_ERROR_LOG("UCP PCIE EP wait for UL dma finish!\n"); + ucp_nop(100); + } while ((UCP_DMA_STATE_WORKING == state) && (count < deadCount)); + memset(pUcpPcieMemInfo->pDmaUlCh[i], 0, sizeof(UcpPcieDmaCh_t)); + } + //notify the RC that DMA had stoped + pUcpPcieMemInfo->pUcpMemBar->command[PCI_ENDPOINT_UCPEP_DMA_STATUS] = 0; + PCIE_ERROR_LOG("UCP PCIE EP DMA had sotpped!\n"); + } pDevStatus->devReady = epInit; - UCP_PRINT_LOG("UCP PCIE EP is initializing...\n"); + PCIE_DEBUG_LOG("UCP PCIE EP is initializing...\n"); ucp_variables_init(); //对DMA状态结构体初始化 pDevStatus->devReady = epReady; - UCP_PRINT_LOG("UCP is waiting for enabling by RC ...\n"); - + PCIE_DEBUG_LOG("UCP is waiting for enabling by RC ...\n"); do { //devStatus = pUcpPcieMemInfo->pUcpMemBar->status.devEnable; pDevStatus->devReady = epReady; //NOP; - UCP_PRINT_LOG("UCP is waiting for enabling by RC ...\n"); - // delay_us(1000); - + PCIE_ERROR_LOG("UCP is waiting for enabling by RC ...\n"); + ucp_nop(200); } while(0 == pDevStatus->devEnable); - UCP_PRINT_LOG("UCP has been enabled by RC !\n"); + PCIE_DEBUG_LOG("UCP has been enabled by RC !\n"); #if 0 //此处RC的配置还未设置下来，需要等RC配置完成后，再配置traffic和counter ucp_counter_setup(); //对DMA 的counter 结构体初始化 UCP_PRINT_LOG("UCP PCIE EP Fucp_counter_setup end !\n"); @@ -264,9 +299,12 @@ void ucp_pcie_recfg_reset(void) //ucp_queue_setup(); #endif pDevStatus->devReady = epRunning; - UCP_PRINT_LOG("UCP PCIE EP Finish checking reset !\n"); - msg_transfer_reset_recfg(); - return; + PCIE_ERROR_LOG("UCP PCIE EP Finish checking reset !\n"); + + ret = msg_transfer_reset_recfg(); + //重新配置DMA + //pcie_ep_drv_init(); + return ret; } diff --git a/public/pet_rfm_spu0/msg/inc/msg_transfer_host.h b/public/pet_rfm_spu0/msg/inc/msg_transfer_host.h index e7301c4..788d881 100644 --- a/public/pet_rfm_spu0/msg/inc/msg_transfer_host.h +++ b/public/pet_rfm_spu0/msg/inc/msg_transfer_host.h @@ -18,6 +18,9 @@ #include "typedef.h" #include "msg_transfer_layer.h" +#define RC_READY 1 +#define RC_NG 0 + void msg_transfer_mem_alloc_host(void); void msg_queue_ul_update_in(uint32_t inst_id, uint32_t que_id); uint8_t* msg_queue_ul_get_buf(uint32_t inst_id, uint32_t que_id); @@ -28,7 +31,7 @@ void msg_transfer_queue_setup(uint8_t inst_id, uint8_t que_id); void msg_transfer_cfg(void); void msg_transfer_recfg(void); void msg_transfer_cfg_finished(void); -void msg_transfer_reset_recfg(void); +int msg_transfer_reset_recfg(void); #endif diff --git a/public/pet_rfm_spu0/msg/src/msg_transfer_host.s.c b/public/pet_rfm_spu0/msg/src/msg_transfer_host.s.c index 8b03183..0a7cd56 100644 --- a/public/pet_rfm_spu0/msg/src/msg_transfer_host.s.c +++ b/public/pet_rfm_spu0/msg/src/msg_transfer_host.s.c @@ -499,40 +499,54 @@ void msg_transfer_cfg_finished(void) pUcpPcieMemInfo->pUcpMemBar->command[PCI_ENDPOINT_UCPEP_COMMAND] = 1; } //app重启配置 -void msg_transfer_reset_recfg(void) +int msg_transfer_reset_recfg(void) { UcpPcieEpMemInfo_t* pUcpPcieMemInfo = get_ucp_pcie_mem_info(); PcieEpMemBarStruct_t* pUcpMemBar = pUcpPcieMemInfo->pUcpMemBar; SyncInfo_t* pSyncInfo = (SyncInfo_t *)&pUcpMemBar->trafficSyncInfo; MsgQueueLocalMgt_t* pMsgQueueLocalMgt = get_msg_queue_local_mgt(); uint32_t count = 0; + int32_t ret = FAILURE; while(1) { - if (pSyncInfo->queueCfgFlag == pMsgQueueLocalMgt->localSyncInfo.queueCfgFlag) + if (pSyncInfo->queueCfgFlag == pMsgQueueLocalMgt->localSyncInfo.queueCfgFlag) { - PCIE_ERROR_LOG("wait msg_transfer_recfg pSyncInfo->queueCfgFlag = %d pMsgQueueLocalMgt->localSyncInfo.queueCfgFlag = %d\n", + PCIE_ERROR_LOG("wait msg_transfer_recfg pSyncInfo->queueCfgFlag = %d pMsgQueueLocalMgt->localSyncInfo.queueCfgFlag = %d\n", pSyncInfo->queueCfgFlag, - pMsgQueueLocalMgt->localSyncInfo.queueCfgFlag); + pMsgQueueLocalMgt->localSyncInfo.queueCfgFlag); + count++; //return; - } - else + } + else { pMsgQueueLocalMgt->localSyncInfo.queueCfgFlag = pSyncInfo->queueCfgFlag; + ret = SUCCESS; break; } #if 1 - if(count > 5000) + if(count > 50000) { + ret = FAILURE; break; } #endif - ucp_nop(1000); + ucp_nop(1000); } - msg_transfer_cfg(); - //重置pcie bar空间的变量值 - ucp_pcie_reset_bar(); - return; + if(pUcpPcieMemInfo->pUcpMemBar->command[PCI_ENDPOINT_UCPEP_RC_STATUS]) + { + PCIE_ERROR_LOG("rc had reboot need recfg dma!\n"); + pcie_ep_dma_recfg(); + pUcpPcieMemInfo->pUcpMemBar->command[PCI_ENDPOINT_UCPEP_RC_STATUS] = RC_NG; + } + + if(SUCCESS == ret) + { + msg_transfer_cfg(); + //重置pcie bar空间的变量值 + //ucp_pcie_reset_bar(); + } + return ret; } diff --git a/public/pet_rfm_spu0/top/src/main.s.c b/public/pet_rfm_spu0/top/src/main.s.c index ba285e0..de5339a 100644 --- a/public/pet_rfm_spu0/top/src/main.s.c +++ b/public/pet_rfm_spu0/top/src/main.s.c @@ -26,7 +26,7 @@ int32_t main(int32_t argc, char* argv[]) { //SET_CLK_CFG_EMU(); - + int ret = FAILURE; UCP_PRINT_LOG("Hello world from PET RFM SPU0,coreId[0x%x]", get_core_id()); debug_write(DBG_DDR_COMMON_IDX(get_core_id(), 0), PLATFORM_BUILD_DATA); @@ -48,8 +48,16 @@ int32_t main(int32_t argc, char* argv[]) //test_case_sendmsg_pcie(); /******************************/ //ucp_pcie_reset(); - ucp_pcie_recfg_reset(); - ucp_pcie_worker(); + #if 1 + ret = ucp_pcie_recfg_reset(); + if(SUCCESS == ret) + { + ucp_pcie_worker(); + } + #endif + //ucp_pcie_recfg_reset(); + //ucp_pcie_worker(); + //msg_transfer_recfg(); /*********test code************/ //test_case_recv_msg_pcie(); diff --git a/public/test/testcase/case50/src/pcie_testcase.c b/public/test/testcase/case50/src/pcie_testcase.c index 9391210..9f96748 100644 --- a/public/test/testcase/case50/src/pcie_testcase.c +++ b/public/test/testcase/case50/src/pcie_testcase.c @@ -37,7 +37,7 @@ uint32_t pcie_rx_callback_data(const char* buf,uint32_t payloadSize) { memcpy_ucp(tmplogbuf, buf, 1024); } - UCP_PRINT_LOG("received buf : %s\n", tmplogbuf); + com_debug_log("received buf : %s\n", tmplogbuf); return payloadSize; } @@ -53,7 +53,7 @@ uint32_t pcie_rx_callback_ctrl(const char* buf,uint32_t payloadSize) { memcpy_ucp(tmplogbuf, buf, 1024); } - UCP_PRINT_LOG("received buf : %s\n", tmplogbuf); + com_debug_log("received buf : %s\n", tmplogbuf); return payloadSize; } @@ -69,7 +69,7 @@ uint32_t pcie_rx_callback_oam(const char* buf,uint32_t payloadSize) { memcpy_ucp(tmplogbuf, buf, 1024); } - UCP_PRINT_LOG("received buf : %s\n", tmplogbuf); + com_debug_log("received buf : %s\n", tmplogbuf); return payloadSize; } @@ -102,7 +102,7 @@ int8_t get_id(uint16_t type_id, uint16_t cu_flag) que_id = UCP4008_TRAFFIC_OAM; break; default: - UCP_PRINT_ERROR("get_queue_id doesn't support transfer_type[%d] .",type_id); + com_debug_log("get_queue_id doesn't support transfer_type[%d] .",type_id); break; } @@ -152,12 +152,12 @@ void test_case_sendmsg_pcie() size = ch->bufSize-MSG_MBUF_HEAD_SIZE; ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); if ( SUCCESS != ret) { - UCP_PRINT_ERROR("alloc msg failed!\n"); + com_debug_log("alloc msg failed!\n"); continue; } //size = availableSize; //buf = *bufAddr; - UCP_PRINT_ERROR("msg transfer alloced ul msg C_PLANE buf = 0x%x!\n", buf); + com_debug_log("msg transfer alloced ul msg C_PLANE buf = 0x%x!\n", buf); memset(templogbuf, 0x00, sizeof(templogbuf)); sprintf(templogbuf, "%s", "this is test for ul CU_SPLIT ctrl transfer!\n"); memcpy_ucp(buf, templogbuf, strlen(templogbuf)+1); @@ -171,7 +171,7 @@ void test_case_sendmsg_pcie() ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); if(ret != SUCCESS) { - UCP_PRINT_ERROR("ul msg_transfer_send_msg CU_SPLIT ctrl failed! ret = %d\n", ret); + com_debug_log("ul msg_transfer_send_msg CU_SPLIT ctrl failed! ret = %d\n", ret); } /************U_PLANE***************/ @@ -182,12 +182,12 @@ void test_case_sendmsg_pcie() ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); if ( SUCCESS != ret) { - UCP_PRINT_ERROR("alloc msg failed!\n"); + com_debug_log("alloc msg failed!\n"); continue; } //size = availableSize; //buf = *bufAddr; - UCP_PRINT_ERROR("msg transfer alloced ul U_PLANE msg buf = 0x%x!\n", buf); + com_debug_log("msg transfer alloced ul U_PLANE msg buf = 0x%x!\n", buf); memset(templogbuf, 0x00, sizeof(templogbuf)); sprintf(templogbuf, "%s", "this is test for ul CU_SPLIT data transfer!\n"); memcpy_ucp(buf, templogbuf, strlen(templogbuf)+1); @@ -202,7 +202,7 @@ void test_case_sendmsg_pcie() ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); if(ret != SUCCESS) { - UCP_PRINT_ERROR("ul msg_transfer_send_msg CU_SPLIT data failed! ret = %d\n", ret); + com_debug_log("ul msg_transfer_send_msg CU_SPLIT data failed! ret = %d\n", ret); } ret = msg_transfer_send_end(handler.value); @@ -224,12 +224,12 @@ void test_case_sendmsg_pcie() ret = msg_transfer_alloc_msg(handler.value, cu_flag, size, &buf, &availableSize, &offset); if ( SUCCESS != ret) { - UCP_PRINT_ERROR("alloc msg failed!\n"); + com_debug_log("alloc msg failed!\n"); continue; } //size = availableSize; //buf = *bufAddr; - UCP_PRINT_ERROR("msg transfer alloced msg OAM buf = 0x%x!\n", buf); + com_debug_log("msg transfer alloced msg OAM buf = 0x%x!\n", buf); memset(templogbuf, 0x00, sizeof(templogbuf)); sprintf(templogbuf, "%s", "this is test for ul OAM ctrl transfer!\n"); memcpy_ucp(buf, templogbuf, strlen(templogbuf)+1); @@ -243,11 +243,11 @@ void test_case_sendmsg_pcie() ret = msg_transfer_send_msg(handler.value, cu_flag, (uint8_t *)buf, offset, size); if(ret != SUCCESS) { - UCP_PRINT_ERROR("ul msg_transfer_send_msg failed! CU_SPLIT oam ! ret = %d\n", ret); + com_debug_log("ul msg_transfer_send_msg failed! CU_SPLIT oam ! ret = %d\n", ret); continue; } - UCP_PRINT_ERROR("msg_transfer_send_msg end!\n"); + com_debug_log("msg_transfer_send_msg end!\n"); ret = msg_transfer_send_end(handler.value); } @@ -403,7 +403,8 @@ void pcie_test_task_func(void) void ape0_test_task_reg(void) { - //uint32_t core_id = get_core_id(); + //uint32_t core_id = get_core_id(); + // test_case_cfgpar_pcie(); osp_task_info_ex pcie_timer_task_stc = {50, (int8_t*)"pcie_test_taskc", 50, 4096, OSP_NORMAL_TYPE, 1, 0, 0, NULL, (OSP_TASKENTRY_FUNC)pcie_test_task_func}; osp_task_create(&pcie_timer_task_stc); osp_timer_sync(1);