From dabd0fc4c3a4c9e1d8815e19cffc7c8c22d3c5b1 Mon Sep 17 00:00:00 2001
From: "xinxin.li" <xinxin.li@263.com>
Date: Tue, 25 Jul 2023 14:16:42 +0800
Subject: [PATCH] =?UTF-8?q?cpri=20timer=E5=88=9D=E5=A7=8B=E5=8C=96?=
 =?UTF-8?q?=E6=97=B6=EF=BC=8C=E6=B7=BB=E5=8A=A0LTE=E5=AE=8F=EF=BC=8CLTE?=
 =?UTF-8?q?=E4=B8=8ENR=E5=88=9D=E5=A7=8B=E5=8C=96=E4=B8=8D=E5=90=8C?=
 =?UTF-8?q?=E5=8F=82=E6=95=B0?=
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---
 public/ecs_rfm_spu1/driver/src/hw_cpri.s.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/public/ecs_rfm_spu1/driver/src/hw_cpri.s.c b/public/ecs_rfm_spu1/driver/src/hw_cpri.s.c
index 37846ee..75d2f23 100644
--- a/public/ecs_rfm_spu1/driver/src/hw_cpri.s.c
+++ b/public/ecs_rfm_spu1/driver/src/hw_cpri.s.c
@@ -71,7 +71,11 @@ void cpri_init(uint32_t option)
     debug_write((DBG_DDR_IDX_DRV_BASE+2+(apeId<<2)), flag);
 #endif
 
+#ifdef CPRI_TIMING_LTE_FDD_TEST
+    cpri_mtimer_init(LTE_SCS_ID, 10); // slot:1000us, one tdd has 10 slots
+#else
     cpri_mtimer_init(NR_SCS_30K, 10); // slot:500us, one tdd has 10 slots
+#endif
     //start_cpri_timer();
 
     UCP_PRINT_EMPTY("cpri_timer init.\r\n");