1. fix UCP4008_SL_EVMY feature#1139#;
2. test case: case21, case34, case44, case49 3. modify jesd csu code; 4. modify jesd timer code.
This commit is contained in:
xinxin.li
parent
0042b331a6
commit
fabe631974
@ -7,10 +7,14 @@
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#define JS_204B_CS_BITS 0 // 2
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#define JS_204B_CF_VAL 0
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#define JESD_CSU_RX0_TAG 0
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#define JESD_CSU_RX1_TAG 1
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#define JESD_CSU_TX0_TAG 2
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#define JESD_CSU_TX1_TAG 3
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#define JESD_CSU_RX0_TAG 0
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#define JESD_CSU_TX0_TAG 1
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#define JESD_CSU_RX1_TAG 2
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#define JESD_CSU_TX1_TAG 3
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#define JESD_CH_NUM 2 // rx0/rx1, tx0/tx1
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#define JESD_LIST_NUM 2 // double 2.5ms, 2 lists for every ch
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typedef enum _tagJesdCsuCh
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{
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JESD_CSU_CH0 = 0,
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@ -41,19 +45,18 @@ int32_t jesd_csu_init(uint8_t antNum, uint8_t margin);
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int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint32_t almostfull_threshold);
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int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode);
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/***********************************************************************************
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ch list RegGroup CmdFIFO tagId = RegGroupId
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rx0 0/1/2/3 0/4/8/12 0 0/4/8/12
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tx0 0/1/2/3 1/5/9/13 1 1/5/9/13
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rx1 0/1/2/3 2/6/10/14 2 2/6/10/14
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tx1 0/1/2/3 3/7/11/15 3 3/7/11/15
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************************************************************************************/
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int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode);
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int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_rx_dmaReg_Cfg(uint8_t ch, uint32_t listAddr, uint32_t nodeNum);
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int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_tx_dmaReg_Cfg(uint8_t ch, uint32_t listAddr, uint32_t nodeNum);
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int32_t jesd_csu_rx_start(uint8_t ch);
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int32_t jesd_csu_tx_start(uint8_t ch);
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int32_t jesd_csu_start();
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#endif
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@ -14,7 +14,6 @@
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#define CPRI_TX_SERDES_DELAY 103 // serdes datasheet, table5-1
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#define CPRI_RX_SERDES_DELAY 74 // serdes datasheet, table5-3
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typedef enum _tagMTmrIntID
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{
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MTMR_INT_SLOT_OFFSET = 0,
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@ -113,6 +112,13 @@ typedef struct _tagFhAlarmStat
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uint32_t alarmMeasureCnt;
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}stFhAlarmStat;
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typedef struct _tagMtimerPointPara{
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int32_t timerPoint;
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uint32_t pointL;
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uint16_t pointM;
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uint16_t pointH;
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}stMtimerPointPara;
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typedef struct _tagMtimerPara{
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// timerʱÖÓÏà¹Ø
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uint32_t tmrClk;
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@ -135,6 +141,16 @@ typedef struct _tagMtimerPara{
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uint32_t tddSlotNum; // slot num of every tdd period
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uint32_t slotMaxNum;
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uint32_t symbolMaxNum;
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stMtimerPointPara txCsuOn[2]; // 2.5ms double period
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stMtimerPointPara txCsuOff[2];
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stMtimerPointPara rxCsuOn[2];
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stMtimerPointPara rxCsuOff[2];
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stMtimerPointPara txRfOn[2];
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stMtimerPointPara txRfOff[2];
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stMtimerPointPara rxRfOn[2];
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stMtimerPointPara rxRfOff[2];
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}stMtimerPara;
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typedef struct _tagMtimerIntStat{
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@ -7,10 +7,13 @@
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#define JS_204B_CS_BITS 0 // 2
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#define JS_204B_CF_VAL 0
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#define JESD_CSU_RX0_TAG 0
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#define JESD_CSU_RX1_TAG 1
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#define JESD_CSU_TX0_TAG 2
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#define JESD_CSU_TX1_TAG 3
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#define JESD_CSU_RX0_TAG 0
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#define JESD_CSU_TX0_TAG 1
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#define JESD_CSU_RX1_TAG 2
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#define JESD_CSU_TX1_TAG 3
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#define JESD_CH_NUM 2 // rx0/rx1, tx0/tx1
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#define JESD_LIST_NUM 2 // double 2.5ms, 2 lists for every ch
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typedef enum _tagJesdCsuCh
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{
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@ -38,25 +41,43 @@ typedef struct _tagJesdCsuNodePara
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uint32_t allNum;
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}stJesdCsuNodePara;
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typedef struct _tagJesdListPara
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{
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uint32_t listAddr;
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uint32_t listNodeNum;
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}stJesdListPara;
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int32_t jesd_csu_init(uint8_t antNum, uint8_t margin);
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int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint32_t almostfull_threshold);
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int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode);
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/***********************************************************************************
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ch list RegGroup CmdFIFO tagId = RegGroupId
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rx0 0/1/2/3 0/4/8/12 0 0/4/8/12
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tx0 0/1/2/3 1/5/9/13 1 1/5/9/13
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rx1 0/1/2/3 2/6/10/14 2 2/6/10/14
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tx1 0/1/2/3 3/7/11/15 3 3/7/11/15
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************************************************************************************/
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int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode);
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int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_rx_dmaReg_Cfg(uint8_t ch, uint32_t listAddr, uint32_t nodeNum);
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int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_tx_dmaReg_Cfg(uint8_t ch, uint32_t listAddr, uint32_t nodeNum);
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int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_rx_start_ch(uint8_t ch);
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int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_tx_start_ch(uint8_t ch);
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int32_t jesd_csu_rx_dmaReg_Cfg(uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_rx_start();
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int32_t jesd_csu_tx_dmaReg_Cfg(uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_start();
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int32_t jesd_csu_rx_start_ch(uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_tx_start_ch(uint8_t nChId, uint8_t nListId);
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int32_t jesd_csu_rx_start(uint8_t nListId);
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int32_t jesd_csu_tx_start(uint8_t nListId);
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#endif
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@ -11,11 +11,20 @@
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#define JESD_NR7DS2U_TX_NODENUM 15
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#define JESD_NR7DS2U_RX_NODENUM 3
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#define JESD_2500US_DOUBLE_TX_NODENUM1 7
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#define JESD_2500US_DOUBLE_TX_NODENUM2 3
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#define JESD_2500US_DOUBLE_RX_NODENUM1 2
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#define JESD_2500US_DOUBLE_RX_NODENUM2 3
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#define LONGCP_SAM_CNT 4448
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#define SHORTCP_SAM_CNT 4384
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#define SLOT_SAM_CNT (LONGCP_SAM_CNT+13*SHORTCP_SAM_CNT)
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#define JESD_TX_LIST_ADDR 0x8A000000
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#define JESD_RX_LIST_ADDR 0x8A008000
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#define JESD_TX_LIST2_ADDR 0x8A004000
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#define JESD_RX_LIST2_ADDR 0x8A00C000
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#define JESD_NR7DS2U_TX_DUMMY_AXCDATA_LEN 0x9A400 // 0x22400+0x78000
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#define JESD_NR7DS2U_TX_DUMMY_AXC1DATA_ADDR 0xB4200000
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@ -59,9 +68,10 @@ int32_t jesd_csu_init_nr_7d2u_slot0();
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int32_t jesd_csu_init_nr_7ds2u_iomode();
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int32_t jesd_csu_init_nr_7ds2u_8t8r();
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int32_t jesd_csu_init_nr_7ds2u_4t4r_98();
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int32_t jesd_csu_init_nr_2500us_double();
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int32_t jesd_csu_start_nr_7ds2u();
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int32_t jesd_csu_start_nr_7ds2u_8t8r();
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//int32_t jesd_csu_start_nr_7ds2u_8t8r();
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#endif
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@ -7,9 +7,12 @@
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#define JESD_TXRX_CHANGE_GAP 13
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#define JESD_RF_ON_GAP 8
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#define JESD_RF_OFF_GAP 2
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#define JESD_TX_ADVANCE_SAMPLE 0 // 500 // sample
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#define JESD_RX_ADVANCE_SAMPLE 1600 // sample
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#define JESD_RRU_TD 0 // 480 // sample
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//#define JESD_TX_ADVANCE_SAMPLE 0 // 500 // sample
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//#define JESD_RX_ADVANCE_SAMPLE 1600 // sample
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//#define JESD_RRU_TD 0 // 480 // sample
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#define JESD_TX_ADVANCE_NS 0
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#define JESD_RX_ADVANCE_NS 13000
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#define JESD_RRU_TD 0 // ns
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typedef enum _tagJesdSndRcvMode
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{
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@ -92,15 +95,17 @@ int32_t set_jesd_ape_slot_offset(int32_t nTmrId, uint32_t apeCoreId);
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int32_t clear_jesd_ape_slot_offset(int32_t nTmrId, uint32_t apeCoreId);
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void set_jesd_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr);
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//int32_t set_jesd_csu_point(int32_t nTmrId, uint8_t nPointId);
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int32_t set_jesd_csuon_point(int32_t nTmrId, uint8_t nPointId);
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int32_t set_jesd_csuoff_point(int32_t nTmrId, uint8_t nPointId);
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void set_jesd_txon_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr);
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void set_jesd_txon_point(int32_t nTmrId, uint8_t nPointId);
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void set_jesd_txoff_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr);
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void set_jesd_txoff_point(int32_t nTmrId, uint8_t nPointId);
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void set_jesd_rxon_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr);
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void set_jesd_rxon_point(int32_t nTmrId, uint8_t nPointId);
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void set_jesd_rxoff_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr);
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void set_jesd_rxoff_point(int32_t nTmrId, uint8_t nPointId);
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void start_jesd_timer(int32_t nTmrId);
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@ -124,7 +129,7 @@ void isr_jesd_slot_rx1(void);
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//void jesd_1pps_sfn_cal();
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void jesd_tdd_start_csu();
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//void jesd_tdd_start_csu();
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#endif
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@ -6,7 +6,8 @@
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#include "ucp_drv_common.h"
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stJesdCsuPara gJesdCsuPara;
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stJesdListPara gJesdTxListPara[JESD_CH_NUM][JESD_LIST_NUM];
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stJesdListPara gJesdRxListPara[JESD_CH_NUM][JESD_LIST_NUM];
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int32_t jesd_csu_init(uint8_t antNum, uint8_t margin)
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{
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@ -86,12 +87,64 @@ int32_t jesd_csu_rx_inlatch_thres_cfg(uint8_t ch, uint32_t send_threshold, uint3
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return 0;
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}
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int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode)
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/***********************************************************************************
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ch list RegGroup CmdFIFO tagId = RegGroupId
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rx0 0/1/2/3 0/4/8/12 0 0/4/8/12
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tx0 0/1/2/3 1/5/9/13 1 1/5/9/13
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rx1 0/1/2/3 2/6/10/14 2 2/6/10/14
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tx1 0/1/2/3 3/7/11/15 3 3/7/11/15
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************************************************************************************/
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int32_t jesd_csu_rx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
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{
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if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum))
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int32_t ret = 0;
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if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum) || (JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
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{
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return -1;
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}
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ret = jesd_csu_rx_list_init(listAddr, nodeNum, pListNode, nChId, nListId);
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if (-1 == ret)
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{
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return -2;
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}
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ret = jesd_csu_rx_dmaReg_Cfg(nChId, nListId);
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if (-1 == ret)
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{
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return -3;
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}
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return ret;
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}
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int32_t jesd_csu_tx_cfg(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
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{
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int32_t ret = 0;
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if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum) || (JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
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{
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return -1;
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}
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ret = jesd_csu_tx_list_init(listAddr, nodeNum, pListNode, nChId, nListId);
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if (-1 == ret)
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{
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return -2;
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}
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ret = jesd_csu_tx_dmaReg_Cfg(nChId, nListId);
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if (-1 == ret)
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{
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return -3;
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}
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return ret;
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}
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int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
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{
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uint8_t mrg = gJesdCsuPara.margin;
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// 设置链表节点cmd
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uint32_t rxListCmdL = 0;
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@ -101,6 +154,9 @@ int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNode
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// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
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rxListCmdL = (1<<4)+(0<<5)+(3<<6);
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gJesdRxListPara[nChId][nListId].listAddr = listAddr;
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gJesdRxListPara[nChId][nListId].listNodeNum = nodeNum;
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stCsuLinkDesc1L3D* pLinkDesc = NULL;
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stCsuLinkDesc1L3D stLinkDesc;
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@ -151,12 +207,8 @@ int32_t jesd_csu_rx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNode
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return 0;
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}
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int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode)
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int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNodePara* pListNode, uint8_t nChId, uint8_t nListId)
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{
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if ((NULL == pListNode) || (0 == listAddr) || (0 == nodeNum))
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{
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return -1;
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}
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uint8_t mrg = gJesdCsuPara.margin;
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// 设置链表节点CMD
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uint32_t txListCmdL = 0;
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@ -166,11 +218,13 @@ int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNode
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// bit[7:6]=3，该DMA可跟随上一个DMA，下一个DMA可跟随本DMA
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txListCmdL = (1<<4)+(0<<5)+(3<<6);
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gJesdTxListPara[nChId][nListId].listAddr = listAddr;
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gJesdTxListPara[nChId][nListId].listNodeNum = nodeNum;
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stCsuLinkDesc1L3D* pLinkDesc = NULL;
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stCsuLinkDesc1L3D stLinkDesc;
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// tx: ddr -> cpri
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// 特殊时隙的后4个符号+后2个上行时隙
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// tx: ddr -> jesd
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int32_t i = 0;
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for(i = 0; i < nodeNum; i++)
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{
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@ -209,33 +263,44 @@ int32_t jesd_csu_tx_list_init(uint32_t listAddr, uint32_t nodeNum, stJesdCsuNode
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return 0;
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||||
}
|
||||
|
||||
int32_t jesd_csu_rx_dmaReg_Cfg(uint8_t ch, uint32_t listAddr, uint32_t nodeNum)
|
||||
int32_t jesd_csu_rx_dmaReg_Cfg(uint8_t nChId, uint8_t nListId) // uint32_t listAddr, uint32_t nodeNum)
|
||||
{
|
||||
uint32_t offset_w = (ch<<3);
|
||||
if ((JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
uint8_t nRegId = (nChId << 1) + (nListId << 2);
|
||||
uint32_t offset_w = (nRegId<<3);
|
||||
// set dma buffer
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRL0)+offset_w), listAddr); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRH0)+offset_w), 0); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMASIZEGRANALLNUM0)+offset_w), nodeNum); // allnum is id num
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRL0)+offset_w), gJesdRxListPara[nChId][nListId].listAddr); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRH0)+offset_w), 0); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMASIZEGRANALLNUM0)+offset_w), gJesdRxListPara[nChId][nListId].listNodeNum); // allnum is id num
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_csu_tx_dmaReg_Cfg(uint8_t ch, uint32_t listAddr, uint32_t nodeNum)
|
||||
int32_t jesd_csu_tx_dmaReg_Cfg(uint8_t nChId, uint8_t nListId) // uint32_t listAddr, uint32_t nodeNum)
|
||||
{
|
||||
uint32_t offset_w = (ch<<3);
|
||||
if ((JESD_CH_NUM <= nChId) || (JESD_LIST_NUM <= nListId))
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
uint8_t nRegId = (nChId << 1) + (nListId << 2);
|
||||
uint32_t offset_w = (nRegId<<3);
|
||||
// set dma buffer
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRL2)+offset_w), listAddr); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRH2)+offset_w), 0); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMASIZEGRANALLNUM2)+offset_w), nodeNum); // allnum is id num
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRL1)+offset_w), gJesdTxListPara[nChId][nListId].listAddr); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMAADDRH1)+offset_w), 0); // DDR or SM
|
||||
do_write(((uint32_t*)(&JS_CSU_DMASIZEGRANALLNUM1)+offset_w), gJesdTxListPara[nChId][nListId].listNodeNum); // allnum is id num
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_csu_rx_start_ch(uint8_t ch)
|
||||
int32_t jesd_csu_rx_start_ch(uint8_t nChId, uint8_t nListId)
|
||||
{
|
||||
stCsuDmaCmdL cpriCmdL;
|
||||
*(uint32_t*)(&cpriCmdL) = 0;
|
||||
|
||||
uint8_t nRegId = (nChId << 1) + (nListId << 2);
|
||||
// rx cmd
|
||||
// 1 link
|
||||
// 读一级链表，写一级链表，多维DMA，非cache模式，src buf=0，tag=0
|
||||
@ -244,21 +309,22 @@ int32_t jesd_csu_rx_start_ch(uint8_t ch)
|
||||
cpriCmdL.dmaType = 1;
|
||||
cpriCmdL.continueLast = 0;
|
||||
cpriCmdL.continueNext = 0;
|
||||
cpriCmdL.idSrc = JESD_CSU_RX0_TAG+ch;
|
||||
cpriCmdL.dmaTag = JESD_CSU_RX0_TAG+ch;
|
||||
cpriCmdL.idSrc = nRegId;
|
||||
cpriCmdL.dmaTag = nRegId;
|
||||
//cpriCmdL.flush = 1;
|
||||
|
||||
do_write(&(JS_CSU_CMDHIGHDATA), 0);
|
||||
do_write(((uint32_t*)&(JS_CSU_CMDFIFO0)+(ch<<1)), *(uint32_t*)(&cpriCmdL));
|
||||
do_write(((uint32_t*)&(JS_CSU_CMDFIFO0)+(nChId<<1)), *(uint32_t*)(&cpriCmdL));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_csu_tx_start_ch(uint8_t ch)
|
||||
int32_t jesd_csu_tx_start_ch(uint8_t nChId, uint8_t nListId)
|
||||
{
|
||||
stCsuDmaCmdL cpriCmdL;
|
||||
*(uint32_t*)(&cpriCmdL) = 0;
|
||||
|
||||
uint8_t nRegId = 1 + (nChId << 1) + (nListId << 2);
|
||||
// tx cmd
|
||||
// 1 link
|
||||
// 读一级链表，写一级链表，多维DMA，非cache模式，src buf=1，tag=1
|
||||
@ -267,33 +333,33 @@ int32_t jesd_csu_tx_start_ch(uint8_t ch)
|
||||
cpriCmdL.dmaType = 1;
|
||||
cpriCmdL.continueLast = 1;
|
||||
cpriCmdL.continueNext = 1;
|
||||
cpriCmdL.idSrc = JESD_CSU_TX0_TAG+ch;
|
||||
cpriCmdL.dmaTag = JESD_CSU_TX0_TAG+ch;
|
||||
cpriCmdL.idSrc = nRegId;
|
||||
cpriCmdL.dmaTag = nRegId;
|
||||
//cpriCmdL.flush = 1;
|
||||
|
||||
do_write(&(JS_CSU_CMDHIGHDATA), 0);
|
||||
do_write(((uint32_t*)&(JS_CSU_CMDFIFO1)+(ch<<1)), (*(uint32_t*)(&cpriCmdL)));
|
||||
do_write(((uint32_t*)&(JS_CSU_CMDFIFO1)+(nChId<<1)), (*(uint32_t*)(&cpriCmdL)));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_csu_start()
|
||||
int32_t jesd_csu_tx_start(uint8_t nListId)
|
||||
{
|
||||
jesd_csu_tx_start_ch(0);
|
||||
jesd_csu_tx_start_ch(0, nListId);
|
||||
if (4 < gJesdCsuPara.antNum)
|
||||
{
|
||||
jesd_csu_tx_start_ch(1);
|
||||
jesd_csu_tx_start_ch(1, nListId);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_csu_rx_start()
|
||||
int32_t jesd_csu_rx_start(uint8_t nListId)
|
||||
{
|
||||
jesd_csu_rx_start_ch(0);
|
||||
jesd_csu_rx_start_ch(0, nListId);
|
||||
if (4 < gJesdCsuPara.antNum)
|
||||
{
|
||||
jesd_csu_rx_start_ch(1);
|
||||
jesd_csu_rx_start_ch(1, nListId);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -38,11 +38,14 @@ int32_t jesd_csu_init_lte_fdd()
|
||||
}
|
||||
}
|
||||
|
||||
jesd_csu_tx_cfg(txListAddr, JESD_LTEFDD_TX_NODENUM, txCsuNode, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rxListAddr, JESD_LTEFDD_RX_NODENUM, rxCsuNode, JESD_CSU_CH0, 0);
|
||||
#if 0
|
||||
jesd_csu_tx_list_init(txListAddr, JESD_LTEFDD_TX_NODENUM, txCsuNode);
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH0, txListAddr, JESD_LTEFDD_TX_NODENUM);
|
||||
jesd_csu_rx_list_init(rxListAddr, JESD_LTEFDD_RX_NODENUM, rxCsuNode);
|
||||
jesd_csu_rx_dmaReg_Cfg(JESD_CSU_CH0, rxListAddr, JESD_LTEFDD_RX_NODENUM);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -59,12 +59,15 @@ int32_t jesd_csu_init_nr_7ds2u()
|
||||
rxCsuNode[2].dataAddr = JESD_NR7DS2U_RX_SLOT_ODD_DATA_ADDR;
|
||||
rxCsuNode[2].yStep = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2;
|
||||
rxCsuNode[2].allNum = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4;
|
||||
|
||||
|
||||
jesd_csu_tx_cfg(txListAddr, JESD_NR7DS2U_TX_NODENUM, txCsuNode, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rxListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode, JESD_CSU_CH0, 0);
|
||||
#if 0
|
||||
jesd_csu_tx_list_init(txListAddr, JESD_NR7DS2U_TX_NODENUM, txCsuNode);
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH0, txListAddr, JESD_NR7DS2U_TX_NODENUM);
|
||||
jesd_csu_rx_list_init(rxListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode);
|
||||
jesd_csu_rx_dmaReg_Cfg(JESD_CSU_CH0, rxListAddr, JESD_NR7DS2U_RX_NODENUM);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -122,11 +125,14 @@ int32_t jesd_csu_init_nr_7d2u()
|
||||
rxCsuNode[2].yStep = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2;
|
||||
rxCsuNode[2].allNum = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4;
|
||||
|
||||
jesd_csu_tx_cfg(txListAddr, 14, txCsuNode, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rxListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode, JESD_CSU_CH0, 0);
|
||||
#if 0
|
||||
jesd_csu_tx_list_init(txListAddr, 14, txCsuNode);
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH0, txListAddr, 14);
|
||||
jesd_csu_rx_list_init(rxListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode);
|
||||
jesd_csu_rx_dmaReg_Cfg(JESD_CSU_CH0, rxListAddr, JESD_NR7DS2U_RX_NODENUM);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -184,11 +190,14 @@ int32_t jesd_csu_init_nr_7d2u_slot0()
|
||||
rxCsuNode[2].yStep = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2;
|
||||
rxCsuNode[2].allNum = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4;
|
||||
|
||||
jesd_csu_tx_cfg(txListAddr, 2, txCsuNode, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rxListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode, JESD_CSU_CH0, 0);
|
||||
#if 0
|
||||
jesd_csu_tx_list_init(txListAddr, 2, txCsuNode);
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH0, txListAddr, 2);
|
||||
jesd_csu_rx_list_init(rxListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode);
|
||||
jesd_csu_rx_dmaReg_Cfg(JESD_CSU_CH0, rxListAddr, JESD_NR7DS2U_RX_NODENUM);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -250,11 +259,14 @@ int32_t jesd_csu_init_nr_7ds2u_iomode()
|
||||
}
|
||||
}
|
||||
|
||||
jesd_csu_tx_cfg(txListAddr, 20, txCsuNode, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rxListAddr, 10, rxCsuNode, JESD_CSU_CH0, 0);
|
||||
#if 0
|
||||
jesd_csu_tx_list_init(txListAddr, 20, txCsuNode);
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH0, txListAddr, 20);
|
||||
jesd_csu_rx_list_init(rxListAddr, 10, rxCsuNode);
|
||||
jesd_csu_rx_dmaReg_Cfg(JESD_CSU_CH0, rxListAddr, 10);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -318,6 +330,12 @@ int32_t jesd_csu_init_nr_7ds2u_8t8r()
|
||||
rxCsuNode[2].yStep = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2;
|
||||
rxCsuNode[2].allNum = (LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4;
|
||||
|
||||
jesd_csu_tx_cfg(tx0ListAddr, JESD_NR7DS2U_TX_NODENUM, txCsuNode, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rx0ListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode, JESD_CSU_CH0, 0);
|
||||
|
||||
jesd_csu_tx_cfg(tx1ListAddr, JESD_NR7DS2U_TX_NODENUM, txCsuNode, JESD_CSU_CH1, 0);
|
||||
jesd_csu_rx_cfg(rx1ListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode, JESD_CSU_CH1, 0);
|
||||
#if 0
|
||||
jesd_csu_tx_list_init(tx0ListAddr, JESD_NR7DS2U_TX_NODENUM, txCsuNode);
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH0, tx0ListAddr, JESD_NR7DS2U_TX_NODENUM);
|
||||
jesd_csu_rx_list_init(rx0ListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode);
|
||||
@ -327,7 +345,7 @@ int32_t jesd_csu_init_nr_7ds2u_8t8r()
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH1, tx1ListAddr, JESD_NR7DS2U_TX_NODENUM);
|
||||
jesd_csu_rx_list_init(rx1ListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode);
|
||||
jesd_csu_rx_dmaReg_Cfg(JESD_CSU_CH1, rx1ListAddr, JESD_NR7DS2U_RX_NODENUM);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -391,17 +409,137 @@ int32_t jesd_csu_init_nr_7ds2u_4t4r_98()
|
||||
rxCsuNode[2].yStep = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2)*2;
|
||||
rxCsuNode[2].allNum = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4)*2;
|
||||
|
||||
jesd_csu_tx_cfg(tx0ListAddr, JESD_NR7DS2U_TX_NODENUM, txCsuNode, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rx0ListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode, JESD_CSU_CH0, 0);
|
||||
#if 0
|
||||
jesd_csu_tx_list_init(tx0ListAddr, JESD_NR7DS2U_TX_NODENUM, txCsuNode);
|
||||
jesd_csu_tx_dmaReg_Cfg(JESD_CSU_CH0, tx0ListAddr, JESD_NR7DS2U_TX_NODENUM);
|
||||
jesd_csu_rx_list_init(rx0ListAddr, JESD_NR7DS2U_RX_NODENUM, rxCsuNode);
|
||||
jesd_csu_rx_dmaReg_Cfg(JESD_CSU_CH0, rx0ListAddr, JESD_NR7DS2U_RX_NODENUM);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
// 4t4r, 245.76M
|
||||
int32_t jesd_csu_init_nr_2500us_double()
|
||||
{
|
||||
jesd_csu_init(4, 4);
|
||||
stJesdCsuNodePara txCsuNode1[JESD_2500US_DOUBLE_TX_NODENUM1];
|
||||
stJesdCsuNodePara rxCsuNode1[JESD_2500US_DOUBLE_RX_NODENUM1];
|
||||
stJesdCsuNodePara txCsuNode2[JESD_2500US_DOUBLE_TX_NODENUM2];
|
||||
stJesdCsuNodePara rxCsuNode2[JESD_2500US_DOUBLE_RX_NODENUM2];
|
||||
//tx的链表地址
|
||||
uint32_t tx1ListAddr = JESD_TX_LIST_ADDR;
|
||||
uint32_t tx2ListAddr = JESD_TX_LIST2_ADDR;
|
||||
//rx的链表地址
|
||||
uint32_t rx1ListAddr = JESD_RX_LIST_ADDR;
|
||||
uint32_t rx2ListAddr = JESD_RX_LIST2_ADDR;
|
||||
int32_t i = 0;
|
||||
|
||||
// tx, slot0~2
|
||||
for (i = 0; i < (JESD_2500US_DOUBLE_TX_NODENUM1-1); i++)
|
||||
{
|
||||
if (0 == (i&0x3))
|
||||
{
|
||||
txCsuNode1[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR; // JESD_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR;
|
||||
txCsuNode1[i].yStep = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode1[i].allNum = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
else if (1 == (i&0x3))
|
||||
{
|
||||
txCsuNode1[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR;
|
||||
txCsuNode1[i].yStep = ((7*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode1[i].allNum = ((7*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
else if (2 == (i&0x3))
|
||||
{
|
||||
txCsuNode1[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR;
|
||||
txCsuNode1[i].yStep = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode1[i].allNum = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
else if (3 == (i&0x3))
|
||||
{
|
||||
txCsuNode1[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR;
|
||||
txCsuNode1[i].yStep = ((7*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode1[i].allNum = ((7*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
}
|
||||
// slot3, slots
|
||||
txCsuNode1[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR;
|
||||
txCsuNode1[i].yStep = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode1[i].allNum = ((LONGCP_SAM_CNT+5*SHORTCP_SAM_CNT)<<4)*2;
|
||||
|
||||
// rx list nodes
|
||||
// slot3, slots
|
||||
rxCsuNode1[0].dataAddr = JESD_98_NR7DS2U_RX_SLOTS_DATA_ADDR;
|
||||
rxCsuNode1[0].yStep = ((SHORTCP_SAM_CNT*4)<<2)*2;
|
||||
rxCsuNode1[0].allNum = ((SHORTCP_SAM_CNT*4)<<4)*2;
|
||||
// slot4
|
||||
rxCsuNode1[1].dataAddr = JESD_98_NR7DS2U_RX_SLOT_EVEN_DATA_ADDR;
|
||||
rxCsuNode1[1].yStep = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2)*2;
|
||||
rxCsuNode1[1].allNum = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4)*2;
|
||||
|
||||
jesd_csu_tx_cfg(tx1ListAddr, JESD_2500US_DOUBLE_TX_NODENUM1, txCsuNode1, JESD_CSU_CH0, 0);
|
||||
jesd_csu_rx_cfg(rx1ListAddr, JESD_2500US_DOUBLE_RX_NODENUM1, rxCsuNode1, JESD_CSU_CH0, 0);
|
||||
|
||||
// tx, slot5~6
|
||||
for (i = 0; i < (JESD_2500US_DOUBLE_TX_NODENUM2-1); i++)
|
||||
{
|
||||
if (0 == (i&0x3))
|
||||
{
|
||||
txCsuNode2[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR; // JESD_NR7DS2U_TX_SLOT_EVEN_F7SYMBOL_ADDR;
|
||||
txCsuNode2[i].yStep = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode2[i].allNum = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
else if (1 == (i&0x3))
|
||||
{
|
||||
txCsuNode2[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_EVEN_B7SYMBOL_ADDR;
|
||||
txCsuNode2[i].yStep = ((7*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode2[i].allNum = ((7*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
else if (2 == (i&0x3))
|
||||
{
|
||||
txCsuNode2[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR;
|
||||
txCsuNode2[i].yStep = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode2[i].allNum = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
else if (3 == (i&0x3))
|
||||
{
|
||||
txCsuNode2[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_ODD_B7SYMBOL_ADDR;
|
||||
txCsuNode2[i].yStep = ((7*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode2[i].allNum = ((7*SHORTCP_SAM_CNT)<<4)*2;
|
||||
}
|
||||
}
|
||||
// slot7, slots
|
||||
txCsuNode2[i].dataAddr = JESD_98_NR7DS2U_TX_SLOT_ODD_F7SYMBOL_ADDR;
|
||||
txCsuNode2[i].yStep = ((LONGCP_SAM_CNT+6*SHORTCP_SAM_CNT)<<2)*2;
|
||||
txCsuNode2[i].allNum = ((LONGCP_SAM_CNT+5*SHORTCP_SAM_CNT)<<4)*2;
|
||||
|
||||
// rx list nodes
|
||||
// slot7, slots
|
||||
rxCsuNode2[0].dataAddr = JESD_98_NR7DS2U_RX_SLOTS_DATA_ADDR;
|
||||
rxCsuNode2[0].yStep = ((SHORTCP_SAM_CNT*4)<<2)*2;
|
||||
rxCsuNode2[0].allNum = ((SHORTCP_SAM_CNT*4)<<4)*2;
|
||||
// slot8
|
||||
rxCsuNode2[1].dataAddr = JESD_98_NR7DS2U_RX_SLOT_EVEN_DATA_ADDR;
|
||||
rxCsuNode2[1].yStep = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2)*2;
|
||||
rxCsuNode2[1].allNum = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4)*2;
|
||||
// slot9
|
||||
rxCsuNode2[2].dataAddr = JESD_98_NR7DS2U_RX_SLOT_ODD_DATA_ADDR;
|
||||
rxCsuNode2[2].yStep = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<2)*2;
|
||||
rxCsuNode2[2].allNum = ((LONGCP_SAM_CNT + SHORTCP_SAM_CNT*13)<<4)*2;
|
||||
|
||||
jesd_csu_tx_cfg(tx2ListAddr, JESD_2500US_DOUBLE_TX_NODENUM2, txCsuNode2, JESD_CSU_CH0, 1);
|
||||
jesd_csu_rx_cfg(rx2ListAddr, JESD_2500US_DOUBLE_RX_NODENUM2, rxCsuNode2, JESD_CSU_CH0, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#if 1
|
||||
int32_t jesd_csu_start_nr_7ds2u()
|
||||
{
|
||||
jesd_csu_start();
|
||||
//jesd_csu_start();
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@ -45,8 +45,8 @@ extern stMtimerSfnCal gMtimerSfnCalPara[SCS_MAX_NUM];
|
||||
|
||||
stJesdDelay gJesdDelay;
|
||||
|
||||
int32_t gCsuTxAdvanceSam = JESD_TX_ADVANCE_SAMPLE;
|
||||
int32_t gCsuRxAdvanceSam = JESD_RX_ADVANCE_SAMPLE - JESD_RRU_TD;
|
||||
int32_t gCsuTxAdvanceNs = JESD_TX_ADVANCE_NS;
|
||||
int32_t gCsuRxAdvanceNs = JESD_RX_ADVANCE_NS - JESD_RRU_TD;
|
||||
|
||||
extern void rfm1_fapi_callback();
|
||||
|
||||
@ -65,7 +65,7 @@ void jesd_init()
|
||||
phy_para_init(PROTOCOL_JESD, PROTO_OPTION_NULL);
|
||||
|
||||
do_write(CSU_RX_TD_SAMPLE, JESD_RRU_TD);
|
||||
do_write(CSU_TX_ADVANCE_SAMPLE, gCsuTxAdvanceSam);
|
||||
do_write(CSU_TX_ADVANCE_SAMPLE, gCsuTxAdvanceNs);
|
||||
|
||||
while (1 > (do_read_volatile(SERDES_INIT_FLAG_ADDR))) // wait jesd serdes clk init finished
|
||||
{
|
||||
@ -163,6 +163,145 @@ int32_t jesd_timer_init(int32_t nTmrId, int32_t nScsId, int32_t nTddSlotNum)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t get_jesd_timer_point_para(int32_t nTmrId, int32_t tmrPoint, uint32_t* tempL, uint16_t* tempM, uint16_t* tempH)
|
||||
{
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
|
||||
if (tmrPoint < 0)
|
||||
{
|
||||
tmrPoint += SFN_PERIOD;
|
||||
}
|
||||
|
||||
*tempL = pMtimerPara->tmrMsPeriod * (tmrPoint % pMtimerPara->slotPeriod) / 1000;
|
||||
*tempM = tmrPoint / pMtimerPara->slotPeriod;
|
||||
if (0 == *tempL)
|
||||
{
|
||||
*tempM = (*tempM > 0) ? (*tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
*tempL = (*tempL > 0) ? (*tempL - 1) : (pMtimerPara->tempL_max);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_timer_get_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
{
|
||||
if (NULL == my_jesdtmr)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
uint32_t gapSymbolCnt = SLOT_SYMBOL_NUM - my_jesdtmr->num_t_dl_symb[0] - my_jesdtmr->num_t_ul_symb[0]; // 14-6-4=4
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
stMtimerPara* pMtimerTxPara = pEcsDmLocalMgt->pMtimerPara[nTmrId+2];
|
||||
uint32_t tdd = pMtimerPara->tddPeriod;
|
||||
uint32_t slotUs = pMtimerPara->slotPeriod;
|
||||
uint32_t longSymbCost = slotUs*1000*LONGCP_SAM_CNT/SLOT_SAM_CNT; // ns
|
||||
uint32_t shortSymbCost = slotUs*1000*SHORTCP_SAM_CNT/SLOT_SAM_CNT; // ns
|
||||
uint8_t dlSlotCnt = 0;
|
||||
uint8_t dlSymbolCnt = 0;
|
||||
|
||||
//if (TDD_2500US_DOUBLE == pMtimerPara->frameType)
|
||||
{
|
||||
//tdd = tdd>>1;
|
||||
}
|
||||
|
||||
for (int i = 0; i < 2; i++)
|
||||
{
|
||||
if ((TDD_2500US_DOUBLE == pMtimerPara->frameType) && (i&0x1))
|
||||
{
|
||||
dlSlotCnt = my_jesdtmr->num_t_dl[1];
|
||||
dlSymbolCnt = my_jesdtmr->num_t_dl_symb[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
dlSlotCnt = my_jesdtmr->num_t_dl[0];
|
||||
dlSymbolCnt = my_jesdtmr->num_t_dl_symb[0];
|
||||
}
|
||||
pMtimerTxPara->txCsuOn[i].timerPoint = tdd - gCsuTxAdvanceNs/1000;
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerTxPara->txCsuOn[i].timerPoint, &pMtimerTxPara->txCsuOn[i].pointL,
|
||||
&pMtimerTxPara->txCsuOn[i].pointM, &pMtimerTxPara->txCsuOn[i].pointH);
|
||||
|
||||
pMtimerTxPara->txCsuOff[i].timerPoint = dlSlotCnt*slotUs + (longSymbCost+(dlSymbolCnt-1)*shortSymbCost)/1000;
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerTxPara->txCsuOff[i].timerPoint, &pMtimerTxPara->txCsuOff[i].pointL,
|
||||
&pMtimerTxPara->txCsuOff[i].pointM, &pMtimerTxPara->txCsuOff[i].pointH);
|
||||
|
||||
pMtimerPara->rxCsuOn[i].timerPoint = pMtimerTxPara->txCsuOff[i].timerPoint + (gapSymbolCnt*shortSymbCost - gCsuRxAdvanceNs)/1000;
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerPara->rxCsuOn[i].timerPoint, &pMtimerPara->rxCsuOn[i].pointL,
|
||||
&pMtimerPara->rxCsuOn[i].pointM, &pMtimerPara->rxCsuOn[i].pointH);
|
||||
|
||||
pMtimerPara->rxCsuOff[i].timerPoint = tdd - gCsuRxAdvanceNs/1000;
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerPara->rxCsuOff[i].timerPoint, &pMtimerPara->rxCsuOff[i].pointL,
|
||||
&pMtimerPara->rxCsuOff[i].pointM, &pMtimerPara->rxCsuOff[i].pointH);
|
||||
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+108+(i<<2)), pMtimerTxPara->txCsuOn[i].timerPoint); // 0x1b0
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+109+(i<<2)), pMtimerTxPara->txCsuOff[i].timerPoint); // 0x1b4
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+110+(i<<2)), pMtimerPara->rxCsuOn[i].timerPoint); // 0x1b8
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+111+(i<<2)), pMtimerPara->rxCsuOff[i].timerPoint); // 0x1bc
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_timer_get_rf_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
{
|
||||
if (NULL == my_jesdtmr)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
uint32_t tdd = pMtimerPara->tddPeriod;
|
||||
uint32_t slotUs = pMtimerPara->slotPeriod;
|
||||
uint32_t longSymbCost = slotUs*1000*LONGCP_SAM_CNT/SLOT_SAM_CNT; // ns
|
||||
uint32_t shortSymbCost = slotUs*1000*SHORTCP_SAM_CNT/SLOT_SAM_CNT; // ns
|
||||
uint8_t dlSlotCnt = 0;
|
||||
uint8_t dlSymbolCnt = 0;
|
||||
|
||||
//if (TDD_2500US_DOUBLE == pMtimerPara->frameType)
|
||||
{
|
||||
//tdd = tdd>>1;
|
||||
}
|
||||
|
||||
for (int i = 0; i < 2; i++)
|
||||
{
|
||||
if ((TDD_2500US_DOUBLE == pMtimerPara->frameType) && (i&0x1))
|
||||
{
|
||||
dlSlotCnt = my_jesdtmr->num_t_dl[1];
|
||||
dlSymbolCnt = my_jesdtmr->num_t_dl_symb[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
dlSlotCnt = my_jesdtmr->num_t_dl[0];
|
||||
dlSymbolCnt = my_jesdtmr->num_t_dl_symb[0];
|
||||
}
|
||||
pMtimerPara->txRfOn[i].timerPoint = tdd - JESD_RF_ON_GAP; // tdd-8us
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerPara->txRfOn[i].timerPoint, &pMtimerPara->txRfOn[i].pointL,
|
||||
&pMtimerPara->txRfOn[i].pointM, &pMtimerPara->txRfOn[i].pointH);
|
||||
|
||||
pMtimerPara->txRfOff[i].timerPoint = dlSlotCnt*slotUs + (longSymbCost+(dlSymbolCnt-1)*shortSymbCost)/1000;
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerPara->txRfOff[i].timerPoint, &pMtimerPara->txRfOff[i].pointL,
|
||||
&pMtimerPara->txRfOff[i].pointM, &pMtimerPara->txRfOff[i].pointH);
|
||||
|
||||
pMtimerPara->rxRfOn[i].timerPoint = pMtimerPara->txRfOff[i].timerPoint + JESD_TXRX_CHANGE_GAP;
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerPara->rxRfOn[i].timerPoint, &pMtimerPara->rxRfOn[i].pointL,
|
||||
&pMtimerPara->rxRfOn[i].pointM, &pMtimerPara->rxRfOn[i].pointH);
|
||||
|
||||
pMtimerPara->rxRfOff[i].timerPoint = tdd - JESD_TXRX_CHANGE_GAP; // tdd-13us
|
||||
get_jesd_timer_point_para(nTmrId, pMtimerPara->rxRfOff[i].timerPoint, &pMtimerPara->rxRfOff[i].pointL,
|
||||
&pMtimerPara->rxRfOff[i].pointM, &pMtimerPara->rxRfOff[i].pointH);
|
||||
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+100+(i<<2)), pMtimerPara->txRfOn[i].timerPoint); // 0x190
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+101+(i<<2)), pMtimerPara->txRfOff[i].timerPoint); // 0x194
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+102+(i<<2)), pMtimerPara->rxRfOn[i].timerPoint); // 0x198
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+103+(i<<2)), pMtimerPara->rxRfOff[i].timerPoint); // 0x19c
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
{
|
||||
if ((MTIMER_JESD_RX0_ID != nTmrId) && (MTIMER_JESD_RX1_ID != nTmrId))
|
||||
@ -205,6 +344,9 @@ int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
do_write_short((&(phyPara[scsId].mtimerId)), nTmrId);
|
||||
__ucps2_synch(0);
|
||||
|
||||
jesd_timer_get_csu_point(nTmrId, my_jesdtmr);
|
||||
jesd_timer_get_rf_point(nTmrId, my_jesdtmr);
|
||||
|
||||
while (2 != (do_read_volatile(SERDES_INIT_FLAG_ADDR))) // wait jesd serdes clk init finished
|
||||
{
|
||||
ucp_nop(1);
|
||||
@ -258,16 +400,21 @@ int32_t jesd_timer_reconfig(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
|
||||
if ((JESD_CSU_CTRL == gJesdIOMode) && (MTIMER_JESD_RX0_ID == nTmrId))
|
||||
{
|
||||
gCsuRxAdvanceSam = JESD_RX_ADVANCE_SAMPLE - do_read_volatile(CSU_RX_TD_SAMPLE);
|
||||
gCsuTxAdvanceSam = do_read_volatile(CSU_TX_ADVANCE_SAMPLE);
|
||||
|
||||
set_jesd_csu_point(MTIMER_JESD_RX0_ID, my_jesdtmr);
|
||||
set_jesd_csu_point(MTIMER_JESD_TX0_ID, my_jesdtmr);
|
||||
|
||||
set_jesd_rxon_point(nTmrId, my_jesdtmr);
|
||||
set_jesd_rxoff_point(nTmrId, my_jesdtmr);
|
||||
set_jesd_txon_point(nTmrId, my_jesdtmr);
|
||||
set_jesd_txoff_point(nTmrId, my_jesdtmr);
|
||||
gCsuRxAdvanceNs = JESD_RX_ADVANCE_NS - do_read_volatile(CSU_RX_TD_SAMPLE);
|
||||
gCsuTxAdvanceNs = do_read_volatile(CSU_TX_ADVANCE_SAMPLE);
|
||||
#if 0
|
||||
set_jesd_csu_point(MTIMER_JESD_RX0_ID, 0);
|
||||
set_jesd_csu_point(MTIMER_JESD_TX0_ID, 0);
|
||||
#else
|
||||
set_jesd_csuon_point(MTIMER_JESD_RX0_ID, 0);
|
||||
set_jesd_csuoff_point(MTIMER_JESD_RX0_ID, 0);
|
||||
set_jesd_csuon_point(MTIMER_JESD_TX0_ID, 0);
|
||||
set_jesd_csuoff_point(MTIMER_JESD_TX0_ID, 0);
|
||||
#endif
|
||||
set_jesd_rxon_point(nTmrId, 0);
|
||||
set_jesd_rxoff_point(nTmrId, 0);
|
||||
set_jesd_txon_point(nTmrId, 0);
|
||||
set_jesd_txoff_point(nTmrId, 0);
|
||||
#ifdef PALLADIUM_TEST
|
||||
flag++;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+3+(apeId<<2)), flag); // 0xBC
|
||||
@ -562,64 +709,65 @@ int32_t clear_jesd_ape_slot_offset(int32_t nTmrId, uint32_t apeCoreId)
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void set_jesd_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
#if 0
|
||||
int32_t set_jesd_csu_point(int32_t nTmrId, uint8_t nPointId)
|
||||
{
|
||||
if ((MTIMER_JESD_RX0_ID != nTmrId) && (MTIMER_JESD_TX0_ID != nTmrId))
|
||||
{
|
||||
return;
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
|
||||
uint32_t tmrBaseAddr = 0;
|
||||
tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId * 0x1000;
|
||||
uint32_t longcp_symbol_p,shortcp_symbol_p;
|
||||
uint32_t shortcp;
|
||||
uint32_t gapSymbolCnt = 0;
|
||||
//uint32_t ulStartSymbol = 0;
|
||||
uint32_t tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId * 0x1000;
|
||||
uint32_t val = 0;
|
||||
|
||||
longcp_symbol_p = LONGCP_SAM_CNT; // 4448; //sample
|
||||
shortcp_symbol_p = SHORTCP_SAM_CNT; // 4384;
|
||||
gapSymbolCnt = 14-my_jesdtmr->num_t_dl_symb[0]-my_jesdtmr->num_t_ul_symb[0]; // 14-6-4=4
|
||||
shortcp = my_jesdtmr->num_t_dl_symb[0] + gapSymbolCnt - 1; // ul start point
|
||||
//ulStartSymbol = my_jesdtmr->num_t_dl_symb + gapSymbolCnt - 1; // ul start point, 6+4-1, symbol9
|
||||
|
||||
uint32_t tempL = 0; //pMtimerPara->tmrMsPeriod * (nTmrPoint % pMtimerPara->slotPeriod) / 1000;
|
||||
uint32_t tempM = 0; //(nTmrPoint / pMtimerPara->slotPeriod) % periodM;
|
||||
|
||||
if (MTIMER_JESD_RX0_ID == nTmrId)
|
||||
{
|
||||
/* rx */
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CMSK_REG);
|
||||
val |= ((1<<16) | (1<<18));
|
||||
do_write(tmrBaseAddr+MTMR_CMSK_REG, val);
|
||||
|
||||
val = longcp_symbol_p + shortcp*shortcp_symbol_p - gCsuRxAdvanceSam - 1; // rx start point
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU0L_REG), val); /* csu RxOn */
|
||||
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->rxCsuOn[nPointId].timerPoint % pMtimerPara->slotPeriod) / 1000; // rx start point
|
||||
tempM = pMtimerPara->rxCsuOn[nPointId].timerPoint / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU0L_REG), tempL); /* csu RxOn */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+116+(nTmrId<<2)), val); // 0x1D0
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+116+(nTmrId<<2)), tempL); // 0x1D0
|
||||
#endif
|
||||
val = 0xC0000000 |(my_jesdtmr->num_t_dl[0]); // special slot
|
||||
val = 0xC0000000 | tempM; // special slot
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU0H_REG), val); /* enable jesd rxdma */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+117+(nTmrId<<2)), val); // 0x1D4
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_RXEN2CSU0H_REG)&BIT31);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_RXEN2CSU0H_REG)&BIT31);
|
||||
|
||||
val = pMtimerPara->tmrMsPeriod * pMtimerPara->slotPeriod / 1000 - 1;
|
||||
val -= gCsuRxAdvanceSam;
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU1L_REG), val); // -g_rfc_1us*(13-2)+RX_DELAY-OFFSET;//+CSU_RX_DELAY-OFFSET; /* csu RxOff */
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->rxCsuOff[nPointId].timerPoint % pMtimerPara->slotPeriod) / 1000;
|
||||
tempM = pMtimerPara->rxCsuOff[nPointId].timerPoint / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU1L_REG), tempL); // -g_rfc_1us*(13-2)+RX_DELAY-OFFSET;//+CSU_RX_DELAY-OFFSET; /* csu RxOff */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+118+(nTmrId<<2)), val); // 0x1D8
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+118+(nTmrId<<2)), tempL); // 0x1D8
|
||||
#endif
|
||||
val = 0x80000000 | (my_jesdtmr->num_tti - 1); // last slot of tdd
|
||||
val = 0x80000000 | tempM; // last slot of tdd
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU1H_REG), val);
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+119+(nTmrId<<2)), val); // 0x1DC
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_RXEN2CSU1H_REG)&BIT31);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_RXEN2CSU1H_REG)&BIT31);
|
||||
#if 0
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2));
|
||||
val |= (BIT11|BIT12);
|
||||
@ -633,47 +781,225 @@ void set_jesd_csu_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
val = ((1<<20) | (1<<22));
|
||||
do_write(tmrBaseAddr+MTMR_CMSK_REG, val);
|
||||
|
||||
val = longcp_symbol_p+(my_jesdtmr->num_t_dl_symb[0]-1)*shortcp_symbol_p - gCsuTxAdvanceSam - 1; // -TX_DELAY+g_rfc_1us*(1)-OFFSET;
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU0L_REG), val); /* csu TxOff */
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->txCsuOff[nPointId].timerPoint % pMtimerPara->slotPeriod) / 1000; // -TX_DELAY+g_rfc_1us*(1)-OFFSET;
|
||||
tempM = pMtimerPara->txCsuOff[nPointId].timerPoint / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU0L_REG), tempL); /* csu TxOff */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+116+(nTmrId<<2)), val); // 0x1F0
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+116+(nTmrId<<2)), tempL); // 0x1F0
|
||||
#endif
|
||||
val = 0x80000000 |(my_jesdtmr->num_t_dl[0]); // special slot
|
||||
val = 0x80000000 | tempM; // special slot
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU0H_REG), val);
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+117+(nTmrId<<2)), val); // 0x344
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+117+(nTmrId<<2)), val); // 0x1f4
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_TXEN2CSU0H_REG)&BIT31);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_TXEN2CSU0H_REG)&BIT31);
|
||||
|
||||
val = pMtimerPara->tmrMsPeriod * pMtimerPara->slotPeriod / 1000 - 1;
|
||||
val -= (gCsuTxAdvanceSam);
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU1L_REG), val); // -TX_DELAY-OFFSET; /* csu TxOn */
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->txCsuOn[nPointId].timerPoint % pMtimerPara->slotPeriod) / 1000;
|
||||
tempM = pMtimerPara->txCsuOn[nPointId].timerPoint / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU1L_REG), tempL); // -TX_DELAY-OFFSET; /* csu TxOn */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+118+(nTmrId<<2)), val); // 0x348
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+118+(nTmrId<<2)), tempL); // 0x1f8
|
||||
#endif
|
||||
val = 0xC0000000|(my_jesdtmr->num_tti - 1); // last slot of tdd
|
||||
val = 0xC0000000|tempM; // last slot of tdd
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU1H_REG), val); /* enable jesd txdma */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+119+(nTmrId<<2)), val); // 0x34C
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+119+(nTmrId<<2)), val); // 0x1fC
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_TXEN2CSU1H_REG)&BIT31);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_TXEN2CSU1H_REG)&BIT31);
|
||||
#if 0
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2));
|
||||
val |= (BIT13|BIT14);
|
||||
do_write(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2), val);
|
||||
#endif
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
return 0;
|
||||
}
|
||||
void set_jesd_txon_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
#endif
|
||||
int32_t set_jesd_csuon_point(int32_t nTmrId, uint8_t nPointId)
|
||||
{
|
||||
if ((MTIMER_JESD_RX0_ID != nTmrId) && (MTIMER_JESD_TX0_ID != nTmrId))
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
uint32_t tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId * 0x1000;
|
||||
uint32_t val = 0;
|
||||
//uint32_t tempL = 0; //pMtimerPara->tmrMsPeriod * (nTmrPoint % pMtimerPara->slotPeriod) / 1000;
|
||||
//uint32_t tempM = 0; //(nTmrPoint / pMtimerPara->slotPeriod) % periodM;
|
||||
|
||||
if (MTIMER_JESD_RX0_ID == nTmrId)
|
||||
{
|
||||
/* rx 0 */
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CMSK_REG);
|
||||
val |= (1<<16);
|
||||
do_write(tmrBaseAddr+MTMR_CMSK_REG, val);
|
||||
#if 0
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->rxCsuOn[nPointId] % pMtimerPara->slotPeriod) / 1000; // rx start point
|
||||
tempM = pMtimerPara->rxCsuOn[nPointId] / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
#endif
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU0L_REG), pMtimerPara->rxCsuOn[nPointId].pointL); /* csu RxOn */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+116+(nTmrId<<2)), pMtimerPara->rxCsuOn[nPointId].pointL); // 0x1D0
|
||||
#endif
|
||||
val = 0xC0000000 | pMtimerPara->rxCsuOn[nPointId].pointM; // special slot
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU0H_REG), val); /* enable jesd rxdma */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+117+(nTmrId<<2)), val); // 0x1D4
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_RXEN2CSU0H_REG)&BIT31);
|
||||
#if 0
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2));
|
||||
val |= (BIT11|BIT12);
|
||||
do_write((tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2)), val);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* tx 1 */
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CMSK_REG);
|
||||
val |= (1<<22);
|
||||
do_write(tmrBaseAddr+MTMR_CMSK_REG, val);
|
||||
#if 0
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->txCsuOn[nPointId] % pMtimerPara->slotPeriod) / 1000;
|
||||
tempM = pMtimerPara->txCsuOn[nPointId] / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
#endif
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU1L_REG), pMtimerPara->txCsuOn[nPointId].pointL); // -TX_DELAY-OFFSET; /* csu TxOn */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+118+(nTmrId<<2)), pMtimerPara->txCsuOn[nPointId].pointL); // 0x1f8
|
||||
#endif
|
||||
val = 0xC0000000 | pMtimerPara->txCsuOn[nPointId].pointM; // last slot of tdd
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU1H_REG), val); /* enable jesd txdma */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+119+(nTmrId<<2)), val); // 0x1fC
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_TXEN2CSU1H_REG)&BIT31);
|
||||
#if 0
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2));
|
||||
val |= (BIT13|BIT14);
|
||||
do_write(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2), val);
|
||||
#endif
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int32_t set_jesd_csuoff_point(int32_t nTmrId, uint8_t nPointId)
|
||||
{
|
||||
if ((MTIMER_JESD_RX0_ID != nTmrId) && (MTIMER_JESD_TX0_ID != nTmrId))
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
uint32_t tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId * 0x1000;
|
||||
uint32_t val = 0;
|
||||
//uint32_t tempL = 0; //pMtimerPara->tmrMsPeriod * (nTmrPoint % pMtimerPara->slotPeriod) / 1000;
|
||||
//uint32_t tempM = 0; //(nTmrPoint / pMtimerPara->slotPeriod) % periodM;
|
||||
|
||||
if (MTIMER_JESD_RX0_ID == nTmrId)
|
||||
{
|
||||
/* rx 1*/
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CMSK_REG);
|
||||
val |= (1<<18);
|
||||
do_write(tmrBaseAddr+MTMR_CMSK_REG, val);
|
||||
#if 0
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->rxCsuOff[nPointId] % pMtimerPara->slotPeriod) / 1000;
|
||||
tempM = pMtimerPara->rxCsuOff[nPointId] / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
#endif
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU1L_REG), pMtimerPara->rxCsuOff[nPointId].pointL); // -g_rfc_1us*(13-2)+RX_DELAY-OFFSET;//+CSU_RX_DELAY-OFFSET; /* csu RxOff */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+118+(nTmrId<<2)), pMtimerPara->rxCsuOff[nPointId].pointL); // 0x1D8
|
||||
#endif
|
||||
val = 0x80000000 | pMtimerPara->rxCsuOff[nPointId].pointM; // last slot of tdd
|
||||
do_write((tmrBaseAddr+MTMR_RXEN2CSU1H_REG), val);
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+119+(nTmrId<<2)), val); // 0x1DC
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_RXEN2CSU1H_REG)&BIT31);
|
||||
#if 0
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2));
|
||||
val |= (BIT11|BIT12);
|
||||
do_write((tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2)), val);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* tx 0*/
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CMSK_REG);
|
||||
val |= (1<<20);
|
||||
do_write(tmrBaseAddr+MTMR_CMSK_REG, val);
|
||||
#if 0
|
||||
tempL = pMtimerPara->tmrMsPeriod * (pMtimerPara->txCsuOff[nPointId] % pMtimerPara->slotPeriod) / 1000; // -TX_DELAY+g_rfc_1us*(1)-OFFSET;
|
||||
tempM = pMtimerPara->txCsuOff[nPointId] / pMtimerPara->slotPeriod;
|
||||
if (0 == tempL)
|
||||
{
|
||||
tempM = (tempM > 0) ? (tempM - 1) : (pMtimerPara->tempM_max);
|
||||
}
|
||||
tempL = (tempL > 0) ? (tempL - 1) : (pMtimerPara->tempL_max);
|
||||
#endif
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU0L_REG), pMtimerPara->txCsuOff[nPointId].pointL); /* csu TxOff */
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+116+(nTmrId<<2)), pMtimerPara->txCsuOff[nPointId].pointL); // 0x1F0
|
||||
#endif
|
||||
val = 0x80000000 | pMtimerPara->txCsuOff[nPointId].pointM; // special slot
|
||||
do_write((tmrBaseAddr+MTMR_TXEN2CSU0H_REG), val);
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+117+(nTmrId<<2)), val); // 0x1f4
|
||||
#endif
|
||||
__ucps2_synch(0);
|
||||
while (do_read_volatile(tmrBaseAddr+MTMR_TXEN2CSU0H_REG)&BIT31);
|
||||
|
||||
#if 0
|
||||
val = do_read_volatile(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2));
|
||||
val |= (BIT13|BIT14);
|
||||
do_write(tmrBaseAddr+MTMR_CINTE0_REG+2*(MTMR_INT_TDD_OFFSET<<2), val);
|
||||
#endif
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void set_jesd_txon_point(int32_t nTmrId, uint8_t nPointId)
|
||||
{
|
||||
uint32_t tmrBaseAddr = 0;
|
||||
if (MTIMER_JESD_RX0_ID != nTmrId)
|
||||
{
|
||||
UCP_PRINT_EMPTY("jesd timer clear event error! nTmrId = 0x%x. \r\n", nTmrId);
|
||||
return;
|
||||
}
|
||||
tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId * 0x1000;
|
||||
@ -681,13 +1007,13 @@ void set_jesd_txon_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
|
||||
uint32_t tmr29Point = pMtimerPara->tddPeriod - JESD_RF_ON_GAP;
|
||||
int32_t tmr29Point = pMtimerPara->txRfOn[nPointId].timerPoint;
|
||||
|
||||
set_mtimer_tmrpoint(nTmrId, MTMR_JESD_TXON, tmr29Point, MTIMER_MASK_48BIT);
|
||||
enable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_TXON, MTMR_INT_TDD_OFFSET);
|
||||
}
|
||||
|
||||
void set_jesd_txoff_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
void set_jesd_txoff_point(int32_t nTmrId, uint8_t nPointId)
|
||||
{
|
||||
uint32_t tmrBaseAddr = 0;
|
||||
if (MTIMER_JESD_RX0_ID != nTmrId)
|
||||
@ -698,16 +1024,26 @@ void set_jesd_txoff_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
|
||||
uint32_t sSymbolStart = (LONGCP_SAM_CNT+13*SHORTCP_SAM_CNT)*my_jesdtmr->num_t_dl[0];
|
||||
uint32_t gapSymbolStart = LONGCP_SAM_CNT + (my_jesdtmr->num_t_dl_symb[0]-1) * SHORTCP_SAM_CNT;
|
||||
uint32_t tmr28Point = (sSymbolStart + gapSymbolStart) * 1000 / pMtimerPara->tmrMsPeriod;
|
||||
#if 1
|
||||
int32_t tmr28Point = pMtimerPara->txRfOff[nPointId].timerPoint;
|
||||
|
||||
set_mtimer_tmrpoint(nTmrId, MTMR_JESD_TXOFF, tmr28Point, MTIMER_MASK_48BIT);
|
||||
#else
|
||||
uint32_t startTick = 0;
|
||||
uint32_t cost = 0;
|
||||
do_write((tmrBaseAddr + MTMR_TnL_REG0 + (MTMR_JESD_TXOFF<<3)), pMtimerPara->txRfOff[nPointId].pointL);
|
||||
do_write((tmrBaseAddr + MTMR_TnH_REG0 + (MTMR_JESD_TXOFF<<3)), ((MTIMER_MASK_48BIT<<30) + pMtimerPara->txRfOff[nPointId].pointM));
|
||||
do_write((tmrBaseAddr + MTMR_TWREQ0_REG + ((MTMR_JESD_TXOFF>>5)<<2)), (1<<(MTMR_JESD_TXOFF&0x1F)));
|
||||
__ucps2_synch(0);
|
||||
startTick = GET_STC_CNT();
|
||||
while(do_read_volatile(tmrBaseAddr + MTMR_TWREQ0_REG + ((MTMR_JESD_TXOFF>>5)<<2)) & (1<<(MTMR_JESD_TXOFF&0x1F))); // REQ reg, wait until the T0L and T0H set finished
|
||||
cost = GET_STC_CNT() - startTick;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+121), cost); // 0x1e0
|
||||
#endif
|
||||
enable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_TXOFF, MTMR_INT_TDD_OFFSET);
|
||||
}
|
||||
|
||||
void set_jesd_rxon_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
void set_jesd_rxon_point(int32_t nTmrId, uint8_t nPointId)
|
||||
{
|
||||
uint32_t tmrBaseAddr = 0;
|
||||
if (MTIMER_JESD_RX0_ID != nTmrId)
|
||||
@ -719,16 +1055,21 @@ void set_jesd_rxon_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
|
||||
uint32_t sSymbolStart = (LONGCP_SAM_CNT+13*SHORTCP_SAM_CNT)*my_jesdtmr->num_t_dl[0];
|
||||
uint32_t gapSymbolStart = LONGCP_SAM_CNT + (my_jesdtmr->num_t_dl_symb[0]-1) * SHORTCP_SAM_CNT;
|
||||
uint32_t tmr26Point = (sSymbolStart + gapSymbolStart) * 1000 / pMtimerPara->tmrMsPeriod + JESD_TXRX_CHANGE_GAP;
|
||||
#if 1
|
||||
int32_t tmr26Point = pMtimerPara->rxRfOn[nPointId].timerPoint;
|
||||
|
||||
set_mtimer_tmrpoint(nTmrId, MTMR_JESD_RXON, tmr26Point, MTIMER_MASK_48BIT);
|
||||
#else
|
||||
do_write((tmrBaseAddr + MTMR_TnL_REG0 + (MTMR_JESD_RXON<<3)), pMtimerPara->rxRfOn[nPointId].pointL);
|
||||
do_write((tmrBaseAddr + MTMR_TnH_REG0 + (MTMR_JESD_RXON<<3)), ((MTIMER_MASK_48BIT<<30) + pMtimerPara->rxRfOn[nPointId].pointM));
|
||||
do_write((tmrBaseAddr + MTMR_TWREQ0_REG + ((MTMR_JESD_RXON>>5)<<2)), (1<<(MTMR_JESD_RXON&0x1F)));
|
||||
__ucps2_synch(0);
|
||||
while(do_read_volatile(tmrBaseAddr + MTMR_TWREQ0_REG + ((MTMR_JESD_RXON>>5)<<2)) & (1<<(MTMR_JESD_RXON&0x1F))); // REQ reg, wait until the T0L and T0H set finished
|
||||
#endif
|
||||
enable_mtimer_tmrpoint_int(nTmrId, MTMR_JESD_RXON, MTMR_INT_TDD_OFFSET);
|
||||
}
|
||||
|
||||
void set_jesd_rxoff_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
void set_jesd_rxoff_point(int32_t nTmrId, uint8_t nPointId)
|
||||
{
|
||||
uint32_t tmrBaseAddr = 0;
|
||||
if (MTIMER_JESD_RX0_ID != nTmrId)
|
||||
@ -741,7 +1082,7 @@ void set_jesd_rxoff_point(int32_t nTmrId, phy_timer_config_ind_t *my_jesdtmr)
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
|
||||
uint32_t tmr27Point = pMtimerPara->tddPeriod - JESD_TXRX_CHANGE_GAP;
|
||||
int32_t tmr27Point = pMtimerPara->rxRfOff[nPointId].timerPoint;
|
||||
|
||||
set_mtimer_tmrpoint(nTmrId, MTMR_CSU_INSERT, tmr27Point, MTIMER_MASK_48BIT);
|
||||
enable_mtimer_tmrpoint_int(nTmrId, MTMR_CSU_INSERT, MTMR_INT_TDD_OFFSET);
|
||||
@ -947,7 +1288,13 @@ void jesd_tdd_callback(uint8_t nTmrId)
|
||||
uint32_t cEventFlag = 0;
|
||||
uint32_t tmrBaseAddr = JS_RX0_TMR_BASE + nTmrId*0x1000;
|
||||
stMtimerIntStat* pMtimerInt = &gMtimerIntCnt[nTmrId];
|
||||
EcsRfmDmLocalMgt_t* pEcsDmLocalMgt = get_ecs_rfm_dm_local_mgt();
|
||||
stMtimerPara* pMtimerPara = pEcsDmLocalMgt->pMtimerPara[nTmrId];
|
||||
|
||||
uint32_t tddVal = (1<<MTMR_TDD_OFFSET);
|
||||
uint32_t rfCtlVal = (1<<MTMR_JESD_TXOFF)|(1<<MTMR_JESD_TXON)|(1<<MTMR_JESD_RXON)|(1<<MTMR_CSU_INSERT);
|
||||
uint32_t csuCtlVal = (1<<MTMR_CEVENT_RXEN2CSU0) | (1<<MTMR_CEVENT_RXEN2CSU1) | (1<<MTMR_CEVENT_TXEN2CSU0) | (1<<MTMR_CEVENT_TXEN2CSU1);
|
||||
|
||||
tmrIntcFlag = do_read_volatile(tmrBaseAddr+MTMR_INTC_REG);
|
||||
__ucps2_synch(0);
|
||||
if ((tmrIntcFlag & (1 << MTMR_INT_TDD_OFFSET))) /* tmr int */
|
||||
@ -958,22 +1305,29 @@ void jesd_tdd_callback(uint8_t nTmrId)
|
||||
tEventFlag = do_read_volatile(tFlagAddr);
|
||||
__ucps2_synch(0);
|
||||
|
||||
if ((tEventFlag & ((1<<MTMR_TDD_OFFSET)|(1<<MTMR_JESD_TXOFF)|(1<<MTMR_JESD_TXON)|(1<<MTMR_JESD_RXON)|(1<<MTMR_CSU_INSERT))) || (cEventFlag & (BIT11|BIT12)))
|
||||
if ((tEventFlag & (tddVal | rfCtlVal)) || (cEventFlag & (csuCtlVal)))
|
||||
{
|
||||
if (tEventFlag & (1<<MTMR_TDD_OFFSET)) // tdd offset int
|
||||
if (tEventFlag & tddVal) // tdd offset // 2.5/7.5/5/10ms offset
|
||||
{
|
||||
do_write((tmrBaseAddr+MTMR_TEVENT0_REG), (1<<MTMR_TDD_OFFSET));
|
||||
do_write(tFlagAddr, (1<<MTMR_TDD_OFFSET)); // clear int flag
|
||||
do_write((tmrBaseAddr+MTMR_TEVENT0_REG), (tEventFlag & tddVal));
|
||||
do_write(tFlagAddr, (tEventFlag & tddVal)); // clear int flag
|
||||
pMtimerInt->tddOffsetIntCnt++;
|
||||
// start_csu_timing
|
||||
#ifdef PALLADIUM_TEST
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+64+4), pMtimerInt->tddOffsetIntCnt); // 0x110
|
||||
#endif
|
||||
jesd_csu_start();
|
||||
if ((FDD_MODE == gJesdTFMode) || (JESD_IO_CTRL == gJesdIOMode))
|
||||
{
|
||||
jesd_csu_rx_start();
|
||||
}
|
||||
|
||||
uint8_t nListId = 0;
|
||||
if ((TDD_2500US_DOUBLE == pMtimerPara->frameType) && (pMtimerInt->tddOffsetIntCnt&0x1))
|
||||
{
|
||||
nListId = 1;
|
||||
}
|
||||
jesd_csu_tx_start(nListId);
|
||||
if ((FDD_MODE == gJesdTFMode) || (JESD_IO_CTRL == gJesdIOMode))
|
||||
{
|
||||
jesd_csu_rx_start(nListId);
|
||||
}
|
||||
|
||||
}
|
||||
if (tEventFlag & (1<<MTMR_JESD_RXON)) // rx on int
|
||||
{
|
||||
@ -981,8 +1335,15 @@ void jesd_tdd_callback(uint8_t nTmrId)
|
||||
do_write(tFlagAddr, (1<<MTMR_JESD_RXON)); // clear int flag
|
||||
gRxOnCnt++;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+78), gRxOnCnt); // 0x138
|
||||
set_jesd_rf_state(JESD_RF_RX, GPIO_ON);
|
||||
jesd_csu_rx_start();
|
||||
|
||||
set_jesd_rf_state(JESD_RF_RX, GPIO_ON);
|
||||
|
||||
uint8_t nListId = 0;
|
||||
if ((TDD_2500US_DOUBLE == pMtimerPara->frameType) && (pMtimerInt->tddOffsetIntCnt&0x1))
|
||||
{
|
||||
nListId = 1;
|
||||
}
|
||||
jesd_csu_rx_start(nListId);
|
||||
}
|
||||
if (tEventFlag & (1<<MTMR_CSU_INSERT)) // rx off int
|
||||
{
|
||||
@ -990,7 +1351,8 @@ void jesd_tdd_callback(uint8_t nTmrId)
|
||||
do_write(tFlagAddr, (1<<MTMR_CSU_INSERT)); // clear int flag
|
||||
gRxOffCnt++;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+79), gRxOffCnt); // 0x13C
|
||||
set_jesd_rf_state(JESD_RF_RX, GPIO_OFF);
|
||||
|
||||
set_jesd_rf_state(JESD_RF_RX, GPIO_OFF);
|
||||
}
|
||||
if (tEventFlag & (1<<MTMR_JESD_TXON)) // tx on int
|
||||
{
|
||||
@ -998,8 +1360,53 @@ void jesd_tdd_callback(uint8_t nTmrId)
|
||||
do_write(tFlagAddr, (1<<MTMR_JESD_TXON)); // clear int flag
|
||||
gTxOnCnt++;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+76), gTxOnCnt); // 0x130
|
||||
set_jesd_rf_state(JESD_RF_TX, GPIO_ON);
|
||||
|
||||
uint32_t startTick = 0;
|
||||
uint32_t cost = 0;
|
||||
//startTick = GET_STC_CNT();
|
||||
set_jesd_rf_state(JESD_RF_TX, GPIO_ON);
|
||||
//cost = GET_STC_CNT() - startTick;
|
||||
//debug_write((DBG_DDR_IDX_DRV_BASE+120), cost); // 0x1e0
|
||||
//jesd_csu_start();
|
||||
#if 1
|
||||
uint8_t nTddTxId = 0;
|
||||
uint8_t nTddRxId = 0;
|
||||
if ((JESD_CSU_CTRL == gJesdIOMode) && (MTIMER_JESD_RX0_ID == nTmrId))
|
||||
{
|
||||
if (TDD_2500US_DOUBLE == pMtimerPara->frameType)
|
||||
{
|
||||
if (pMtimerInt->tddOffsetIntCnt & 0x1)
|
||||
{
|
||||
nTddTxId = 1;
|
||||
nTddRxId = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
nTddTxId = 0;
|
||||
nTddRxId = 0;
|
||||
}
|
||||
startTick = GET_STC_CNT();
|
||||
set_jesd_txoff_point(nTmrId, nTddTxId);
|
||||
cost = GET_STC_CNT() - startTick;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+121), cost); // 0x1e0
|
||||
|
||||
startTick = GET_STC_CNT();
|
||||
set_jesd_csuoff_point(MTIMER_JESD_TX0_ID, nTddTxId);
|
||||
cost = GET_STC_CNT() - startTick;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+120), cost); // 0x1e0
|
||||
|
||||
startTick = GET_STC_CNT();
|
||||
set_jesd_rxon_point(nTmrId, nTddRxId);
|
||||
cost = GET_STC_CNT() - startTick;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+123), cost); // 0x1e0
|
||||
|
||||
startTick = GET_STC_CNT();
|
||||
set_jesd_csuon_point(MTIMER_JESD_RX0_ID, nTddRxId);
|
||||
cost = GET_STC_CNT() - startTick;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+122), cost); // 0x1e0
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
if (tEventFlag & (1<<MTMR_JESD_TXOFF)) // tx off int
|
||||
{
|
||||
@ -1216,7 +1623,7 @@ void isr_jesd_slot_rx1(void)
|
||||
|
||||
jesd_slot_callback(tmrId);
|
||||
}
|
||||
|
||||
#if 0
|
||||
void jesd_tdd_start_csu()
|
||||
{
|
||||
//uint32_t tmrBaseAddr = JS_RX0_TMR_BASE;
|
||||
@ -1236,11 +1643,11 @@ void jesd_tdd_start_csu()
|
||||
#endif
|
||||
{
|
||||
// start csu
|
||||
jesd_csu_start();
|
||||
jesd_csu_tx_start(0);
|
||||
pMtimerInt->csuEnCnt++;
|
||||
debug_write((DBG_DDR_IDX_DRV_BASE+64+7), pMtimerInt->csuEnCnt); // 0x11c
|
||||
}
|
||||
}
|
||||
|
||||
//#endif
|
||||
#endif
|
||||
|
||||
|
||||
@ -132,16 +132,34 @@ void ecs_rfm1_build_cell(uint32_t scsId, uint32_t cellId, uint32_t coreId)
|
||||
|
||||
if (NR_SCS_30K == scsId)
|
||||
{
|
||||
#if 1
|
||||
my_cpritmr.frameType = TDD_MODE;
|
||||
my_cpritmr.t_period = 5000; //2500; //
|
||||
my_cpritmr.t_us = 500;
|
||||
my_cpritmr.num_tti = 10; //5; //
|
||||
my_cpritmr.num_tti_per_sfn = 20;
|
||||
|
||||
my_cpritmr.num_t_dl[0] = 7; //1; // // dl slot num
|
||||
my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num
|
||||
my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num
|
||||
my_cpritmr.num_ants[0] = 4;
|
||||
my_cpritmr.t_period = 5000;
|
||||
my_cpritmr.t_us = 500;
|
||||
my_cpritmr.num_tti = 10;
|
||||
my_cpritmr.num_tti_per_sfn = 20;
|
||||
|
||||
my_cpritmr.num_t_dl[0] = 7; // dl slot num
|
||||
my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num
|
||||
my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num
|
||||
my_cpritmr.num_ants[0] = 4;
|
||||
#else
|
||||
my_cpritmr.frameType = TDD_2500US_DOUBLE;
|
||||
my_cpritmr.t_period = 2500;
|
||||
my_cpritmr.t_us = 500;
|
||||
my_cpritmr.num_tti = 5;
|
||||
my_cpritmr.num_tti_per_sfn = 20;
|
||||
|
||||
my_cpritmr.num_t_dl[0] = 3; // dl slot num
|
||||
my_cpritmr.num_t_dl_symb[0] = 6; // dl symbol num
|
||||
my_cpritmr.num_t_ul_symb[0] = 4; // ul symbol num
|
||||
my_cpritmr.num_ants[0] = 4;
|
||||
|
||||
my_cpritmr.num_t_dl[1] = 2; // dl slot num
|
||||
my_cpritmr.num_t_dl_symb[1] = 6; // dl symbol num
|
||||
my_cpritmr.num_t_ul_symb[1] = 4; // ul symbol num
|
||||
my_cpritmr.num_ants[1] = 4;
|
||||
#endif
|
||||
}
|
||||
else if (LTE_SCS_ID == scsId)
|
||||
{
|
||||
|
||||
@ -56,7 +56,7 @@ int32_t fh_drv_init(void)
|
||||
|
||||
int32_t fh_csu_test_init(void)
|
||||
{
|
||||
jesd_csu_init_nr_7ds2u_4t4r_98();
|
||||
jesd_csu_init_nr_2500us_double();
|
||||
|
||||
//jesd_pin_ctrl(MTIMER_JESD_RX0_ID);
|
||||
//jesd_pin_ctrl(MTIMER_JESD_TX0_ID);
|
||||
|
||||
@ -56,7 +56,8 @@ int32_t fh_drv_init(void)
|
||||
|
||||
int32_t fh_csu_test_init(void)
|
||||
{
|
||||
jesd_csu_init_nr_7ds2u_4t4r_98();
|
||||
//jesd_csu_init_nr_7ds2u_4t4r_98();
|
||||
jesd_csu_init_nr_2500us_double();
|
||||
|
||||
//jesd_pin_ctrl(MTIMER_JESD_RX0_ID);
|
||||
//jesd_pin_ctrl(MTIMER_JESD_TX0_ID);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user