xinxin.li
fabe631974
1. fix UCP4008_SL_EVMY feature#1139#;
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2. test case: case21, case34, case44, case49
3. modify jesd csu code;
4. modify jesd timer code.
2023-10-13 17:11:53 +08:00
xinxin.li
2a9b479f2a
1. fix UCP4008_SL_EVMY bug#1133#;
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2. modify case44 data source(3.1a slot0);
3. test case : case21(CPRI/JESD), case44(7d2u/1d3u), case34.
2023-10-13 09:20:52 +08:00
lishuang.xie
e34abce4e1
update New Feature#1113
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1. update component to week40
2. add new function smart_no_idle_sw_init
3. change name of smart_ddr_spinlock_init
4. change type of smart_task_del and smart_enable_q_nempty
5. if call smart_enable_q_nempty return faild, we'll call 8 times
6. if call smart_task_del return faild, we'll record
7. smart_reclaim_init_res() don't be called!!!
8. test:
8.1 SPU(case14)+ARM(case3) :PASS
8.2 SPU(case20)+ARM(case20):PASS
8.3 SPU(case21)+ARM(case21):PASS
8.4 SPU(case34)+ARM(case5) :PASS
8.5 SPU(case44)+ARM(case5) :PASS
2023-10-12 10:28:46 +08:00
huanfeng.wang
4b86608e44
解决平台log存储在rodata问题
2023-10-11 15:45:06 +08:00
yonglin.gui
7f00a0aa74
1 modify pcie test case to adapt new code architecher
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2 modify pcie log interface to reduce function stack size
2023-10-08 18:02:38 +08:00
xinxin.li
75cccffd10
1. add cpri map struct;
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2. modify struct stFrontHaulDrvPara;
2023-09-27 20:29:13 +08:00
xinxin.li
eb20c173aa
1. UCP4008_SL#1024# new feature;
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2. add function fronthaul_drv_cfg;
3. add jesd test case;
4. tested case: case21/case34/case44/case40/case43/case49
2023-09-27 19:24:30 +08:00
yanzhi.wang
eac53151cf
1.add NR FDD 15K testcase80~83;2.add 25g testcase72;3.modify cpri map typedef
2023-09-26 09:49:01 +08:00
lishuang.xie
295a44d46b
1. fix Bug#1061
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2. fix Bug#1081
3. fix Bug#1079
4. update New Feature#945
5. component debug_init call in spu_lib_debug_init() functon
6. testcase:
6.1 spu(case34)+arm(case5): pass
6.2 spu(case44)+arm(case5): pass
6.3 spu(case21)+arm(case21):pass
6.4 spu(case14)+arm(case3): pass
2023-09-25 09:46:27 +08:00
xinxin.li
a9180edc85
1.commit normalization drv version;
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2.add ecpri code;
3.test case: case34,case44,case21(CPRI/JESD mode)
2023-09-22 19:47:02 +08:00
xinxin.li
f3ff36cc8c
1. JESD 9.8g, UCP4008_SL_EVB, new feature #1028 ;
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2. cell setup/delete bug, UCP4008_SL_EVB, bug #1071 ;
3. task delete bug when deleting cell, bug #1061 ;
4. delete board direction;
5. add some cell setup parameters for FDD mode extend
2023-09-15 14:59:25 +08:00
huanfeng.wang
e659f4e069
平台log首次入库
2023-09-11 19:16:30 +08:00
xinxin.li
f9960a4e8c
1. modify gpio funciton for jesd version;
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2. verified case: case21, case34, case44
2023-08-26 12:36:10 +08:00
xinxin.li
61a8435a6d
> 1. 增加cpri模式,帧头提前2ms的功能,UCP4008-SL-EVB New Feature #926 ;
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> 2. 系统平台lib库更新;
> 3. 增加单模模式下,双小区的删建功能;
> 4. 回归测试case:case21/case22(NR15K)/case34/case37/case68(LTE)
2023-08-18 20:30:52 +08:00
lishuang.xie
88d47d6557
1. pet rfm1 has no shell cmd, don't call spu_shell_task()
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2. update the spu_shell_task dadian's information
3. adjust the initialization: osp_var_init() should call before ape_stc_init()
2023-08-14 16:14:57 +08:00
xianfeng.du
9f74573a80
modified handshake bitmask
2023-08-03 20:48:13 +08:00
xianfeng.du
75c56173f1
fixed the handshake flow bug
2023-08-03 20:38:46 +08:00
xianfeng.du
f5ab763719
updated handshake flow for stack
2023-08-03 20:23:52 +08:00
liweihua
07c78c4cd7
fixed the bug#955#
2023-08-03 09:17:24 +08:00
xianfeng.du
b16159b07a
fixed msg_transfer issues
2023-08-02 09:09:41 +08:00
huanfeng.wang
5daef34d95
oam修改dm获取方式
2023-07-31 18:13:52 +08:00
Xianfeng Du
e4896d8e97
Merge branch 'dev_ck_v2.1-GYL' into 'dev_ck_v2.1'
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merge pcie code to v2.1
See merge request ucp/driver/ucp4008_platform_spu!12
2023-07-27 19:03:03 +00:00
yonglin.gui
d7eb9d91d7
merge pcie code to v2.1
2023-07-27 18:46:09 +08:00
xinxin.li
119cf625a3
modify LTE cell setup process, bug# 847, UCP4008_SL; modify libinterrupt.a
2023-07-27 17:30:19 +08:00
Xianfeng Du
10055ff6a2
Merge branch 'dev_ck_v2.1_wyz' into 'dev_ck_v2.1'
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1.modify from CPRI_24G_TEST to CPRI_10G_TEST;2.translate Chinese note .txt of testcase to English
See merge request ucp/driver/ucp4008_platform_spu!7
2023-07-25 14:09:18 +00:00
yanzhi.wang
fe1d9ca6bb
1.modify from CPRI_24G_TEST to CPRI_10G_TEST;2.translate Chinese note .txt of testcase to English
2023-07-25 11:11:08 +08:00
huanfeng.wang
0caeda5853
1:HANDSHKAE_MASK根据PCIE_BACKHAUL区分;2:修改pcie场景case51
2023-07-25 09:29:29 +08:00
Xianfeng Du
63cf238d85
Merge branch 'dev_ck_v2.1_xls_910_914' into 'dev_ck_v2.1'
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1. add synch to spu_sw_queue.s.c
See merge request ucp/driver/ucp4008_platform_spu!5
2023-07-24 10:04:05 +00:00
Xianfeng Du
8f48f2e369
Merge branch 'dev_ck_v2.1_wyz' into 'dev_ck_v2.1'
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1.modify LTE DG cpri csu config;2.add cpri 25g driver and case
See merge request ucp/driver/ucp4008_platform_spu!4
2023-07-24 10:00:06 +00:00
Xianfeng Du
e7be6ab607
Merge branch 'dev_ck_v2.1_jesd' into 'dev_ck_v2.1'
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驱动入库v2.1
See merge request ucp/driver/ucp4008_platform_spu!3
2023-07-24 09:59:36 +00:00
lishuang.xie
0a4146be80
1. add synch to spu_sw_queue.s.c
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2. change memcpy bu spu_shell.s.c
The above are possible problems found during the current process
2023-07-24 09:43:59 +08:00
yanzhi.wang
070adb6c3b
1.modify LTE DG cpri csu config;2.add cpri 25g driver and case
2023-07-24 09:27:15 +08:00
xinxin.li
1938906c1d
jesd
2023-07-22 20:22:57 +08:00
lishuang.xie
7e2437c0d6
1. New Feature#910
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2. Feature Enhancement#914
3. update from V2.0, by msg_transfer synch
4. add osp_send_msg/osp_var_init by synch
2023-07-22 17:27:21 +08:00
chao1.wang
d74566ec2c
First commit
2023-07-13 11:27:03 +08:00