jinhong/YB_Platform
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30 Commits

Author SHA1 Message Date
yonglin.gui
842d1d638d 删除了ul方向数据包是否及时被RC读取的判断 2023-09-09 10:10:39 +08:00
yonglin.gui
cf575de36e add RC control EP pcie log 2023-08-05 08:18:36 +08:00
xianfeng.du
9f74573a80 modified handshake bitmask 2023-08-03 20:48:13 +08:00
xianfeng.du
75c56173f1 fixed the handshake flow bug 2023-08-03 20:38:46 +08:00
xianfeng.du
f5ab763719 updated handshake flow for stack 2023-08-03 20:23:52 +08:00
Xianfeng Du
e0fbf114b5 Merge branch 'dev_ck_v2.1_bug#955#' into 'dev_ck_v2.1' 
fixed the bug#955#

See merge request ucp/driver/ucp4008_platform_spu!17
 2023-08-03 09:35:46 +00:00
Xianfeng Du
d85a69c0bc Merge branch 'dev_ck_v2.1-GYL' into 'dev_ck_v2.1' 
modify the pcie tranfic bug  ----Bug #953

See merge request ucp/driver/ucp4008_platform_spu!16
 2023-08-03 09:34:05 +00:00
liweihua
07c78c4cd7 fixed the bug#955# 2023-08-03 09:17:24 +08:00
yonglin.gui
99f4310ae8 modify the pcie tranfic bug 2023-08-02 17:55:39 +08:00
xianfeng.du
b16159b07a fixed msg_transfer issues 2023-08-02 09:09:41 +08:00
huanfeng.wang
5daef34d95 oam修改dm获取方式 2023-07-31 18:13:52 +08:00
xinxin.li
de7985feef UCP4008-SL-EVB Bug# 932, 修改stc定时点配置接口 2023-07-31 09:24:54 +08:00
Xianfeng Du
e4896d8e97 Merge branch 'dev_ck_v2.1-GYL' into 'dev_ck_v2.1' 
merge pcie code to v2.1

See merge request ucp/driver/ucp4008_platform_spu!12
 2023-07-27 19:03:03 +00:00
yonglin.gui
d7eb9d91d7 merge pcie code to v2.1 2023-07-27 18:46:09 +08:00
xinxin.li
119cf625a3 modify LTE cell setup process, bug# 847, UCP4008_SL; modify libinterrupt.a 2023-07-27 17:30:19 +08:00
Xianfeng Du
8dd4b80e63 Merge branch 'dev_ck_v2.1_xls_910_914' into 'dev_ck_v2.1' 
the shell task stack change 2048 to 4096

See merge request ucp/driver/ucp4008_platform_spu!9
 2023-07-26 09:08:43 +00:00
lishuang.xie
f800892a62 the shell task stack change 2048 to 4096 
some shell cmd callback define char too big
 2023-07-25 16:50:20 +08:00
xinxin.li
3c62c3e12d case0 modified as LTE OSP case 2023-07-25 14:23:23 +08:00
xinxin.li
dabd0fc4c3 cpri timer初始化时，添加LTE宏，LTE与NR初始化不同参数 2023-07-25 14:16:42 +08:00
Xianfeng Du
10055ff6a2 Merge branch 'dev_ck_v2.1_wyz' into 'dev_ck_v2.1' 
1.modify from CPRI_24G_TEST to CPRI_10G_TEST;2.translate Chinese note .txt of testcase to English

See merge request ucp/driver/ucp4008_platform_spu!7
 2023-07-25 14:09:18 +00:00
yanzhi.wang
fe1d9ca6bb 1.modify from CPRI_24G_TEST to CPRI_10G_TEST;2.translate Chinese note .txt of testcase to English 2023-07-25 11:11:08 +08:00
huanfeng.wang
0caeda5853 1：HANDSHKAE_MASK根据PCIE_BACKHAUL区分；2：修改pcie场景case51 2023-07-25 09:29:29 +08:00
Xianfeng Du
63cf238d85 Merge branch 'dev_ck_v2.1_xls_910_914' into 'dev_ck_v2.1' 
1. add synch to spu_sw_queue.s.c

See merge request ucp/driver/ucp4008_platform_spu!5
 2023-07-24 10:04:05 +00:00
Xianfeng Du
8f48f2e369 Merge branch 'dev_ck_v2.1_wyz' into 'dev_ck_v2.1' 
1.modify LTE DG cpri csu config;2.add cpri 25g driver and case

See merge request ucp/driver/ucp4008_platform_spu!4
 2023-07-24 10:00:06 +00:00
Xianfeng Du
e7be6ab607 Merge branch 'dev_ck_v2.1_jesd' into 'dev_ck_v2.1' 
驱动入库v2.1

See merge request ucp/driver/ucp4008_platform_spu!3
 2023-07-24 09:59:36 +00:00
lishuang.xie
0a4146be80 1. add synch to spu_sw_queue.s.c 
2. change memcpy bu spu_shell.s.c
The above are possible problems found during the current process
 2023-07-24 09:43:59 +08:00
yanzhi.wang
070adb6c3b 1.modify LTE DG cpri csu config;2.add cpri 25g driver and case 2023-07-24 09:27:15 +08:00
xinxin.li
1938906c1d jesd 2023-07-22 20:22:57 +08:00
lishuang.xie
7e2437c0d6 1. New Feature#910 
2. Feature Enhancement#914
3. update from V2.0, by msg_transfer synch
4. add osp_send_msg/osp_var_init by synch
 2023-07-22 17:27:21 +08:00
chao1.wang
d74566ec2c First commit 2023-07-13 11:27:03 +08:00