HUOHUO
154ba542c0
1.platform PCIE support 2.readme.txt update
2025-03-23 05:53:30 -07:00
xinxin.li
7f00eaf5a8
1. fix UCP4008-SL bug#2002;
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2. 解决扩皮项目,打开tfu帧号校准功能后,重建小区,上行数据对不齐的问题;
3. 调整ape csu访问总线的效率。
2024-06-13 11:17:11 +08:00
xinxin.li
b689529029
> 1.解决UCP4008-SL bug#1967;
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> 2.小区建立完成,再启动CSU;
> 3.10ms中断提前pp1s 30us;
4.sniffer启动后,每个pp1s都重启定时器。
2024-06-12 20:22:11 +08:00
cheng.wan
b6ff644c4f
CPRI初始化时,增加RS-FEC功能可配接口
2024-06-05 16:44:31 +08:00
huanfeng.wang
b78f47a5c5
1:扩大shell软件队列大小 2:修改case24 core6,core7任务栈为4k
2024-05-28 19:01:31 +08:00
zhanghaochen
827398e7d8
添加获取版本信息接口
2024-05-17 13:58:40 +08:00
xinxin.li
79c795ee4d
1. UCP4008-SL-EVB feature enhancement#1740/1741;
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2. 将pp1s中断从APE0移到PET RFM1;
3. 去掉APE上的接收时隙中断,并修改接收帧号/时隙号/时隙cycle的计算方式;
4. 测试case:case21、case24、case34.
2024-04-24 20:28:37 +08:00
xinxin.li
9cc9b0b094
1. fix UCP4008-SL feature enhancement #1854 ;
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2. delete tx/rx slot int on ecs_rfm1 for jesd version;
3. modify sfn updating algorithm for jesd version;
4. optimize jesd gpio on/off code;
5. test case: case24/34/44/45/41/42.
2024-04-20 17:09:54 +08:00
xinxin.li
052f738838
1. fix UCP4008-SL feature enhancement #1807 ;
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2. modify sfn counting mode;
2024-04-07 17:38:05 +08:00
cheng.wan
fa69f44d8b
RJ 8NR+8LTE Mapping方案驱动配合CASE90回环测试通过
2024-04-01 09:47:34 +08:00
xinxin.li
ab192ce627
1. fix UCP4008-SL new feature#1574;
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2. modify timing precision from us to ns;
3. test case: case24, case34, case44, case45, case48, case41, case42.
2024-03-29 13:55:02 +08:00
Weihua Li
d6ea3f72f3
Merge branch 'dev_ck_v2.1_xls_feature#1694#' into 'dev_ck_v2.1'
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update feature#1694# merge dev_ck_v2.1_xls_feature#1694# to dev_ck_v2.1
See merge request ucp/driver/ucp4008_platform_spu!96
2024-03-18 07:44:38 +00:00
lishuang.xie
e32716e367
update feature#1694# merge dev_ck_v2.1_xls_feature#1694# to dev_ck_v2.1
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1. Four-channel support
2. modified the public/pet_rfm_spu1/top/src/phy_init.s.c to sendto different apes
3. now case21 no use
4. Test:
4.1 spu_case0_arm_case0_cpri: Pass
4.2 spu_case14_arm_case20_cpri:Pass
4.3 spu_case20_arm_case20_cpri:Pass
4.4 spu_case24_arm_case24_cpri:Pass
4.5 spu_case34_arm_case5: Pass
4.6 spu_case44_arm_case5: Pass
2024-03-18 15:30:04 +08:00
huihui.shang
26ab30ac20
ecpri link detection & recovery
2024-03-16 10:10:40 +08:00
lishuang.xie
44c5ec0414
update New Feature#1655 to dev_ck_V2.1
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1. modified the function of void handshake_master_with_slave(uint32_t u32_core_mask) add the input parameter.
2. phy should support the function of uint32_t get_core_mask_by_phy(void).
3. Test:
3.1 spu_case0_arm_case0_cpri: Pass
3.2 spu_case14_arm_case20_cpri:Pass
3.3 spu_case20_arm_case20_cpri:Pass
3.4 spu_case21_arm_case21_cpri:Pass
3.5 spu_case34_arm_case5: Pass
3.6 spu_case44_arm_case5: Pass
2024-03-04 18:10:03 +08:00
xinxin.li
ba39178f5d
1. fix UCP4008-SL feature enhancement#1675#;
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2. change pp1s sratching position;
3. modify cpri tx/rxxrx
4. test case: case44, case34, case21.
2024-02-20 11:36:52 +08:00
xinxin.li
926ce7e7a9
1. fix UCP4008-SL-EVB feature #1612 ;
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2. add para for phy_sniffer_start;
3. test case: case34, case44, case45, case48, case41, case42, case21.
2024-01-29 14:47:15 +08:00
xinxin.li
8da2b23130
1. fix UCP4008_SL new feature#1412;
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2. add fdd function of 122.88M and 61.44M;
3. test case : case41,case42,case44,case48
2023-12-28 15:05:58 +08:00
xinxin.li
4655f82bf0
1. add 10ms trigger for sniffer before cell building;
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2. int cost modify: 4us to 3.5us;
3. modify case41: NR FDD 15K, 122.88M, 40M, test ok;
2023-12-22 16:37:58 +08:00
xinxin.li
f4dd3ccf8c
1. UCP4008_SL new feature #1412 ;
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2. fdd 122.88M, 4 ants;
3. test case: case41,case44
2023-12-20 12:24:27 +08:00
huihui.shang
96ec809d27
ecpri function
2023-12-14 10:55:49 +08:00
xinxin.li
6c294ce0bc
1. fix UCP4008_SL feature enhancement #1378 ;
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2. disable rf switch int after all of cells are deleted;
3. adjust slot offset, csu offset, rf switch offset;
4. add init para about 204C;
5. test case: case21, case34, case44.
2023-12-11 20:19:20 +08:00
lishuang.xie
8c59de6c96
1. update New Feature#945 to dev_ck_v2.1
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2. update New Feature#1347 to dev_ck_v2.1
3. add new interface for ecs rfm1 and ape: spu_get_oam_handle_id for get oam handle_id by inst_id
4. Move Mem_init() from ape to ecs rfm1
5. TEST:
5.1 spu(case0)+arm(case0): pass
5.2 spu(case14)+arm(case20):pass
5.3 spu(case20)+arm(case20):pass
5.4 spu(case21)+arm(case21):pass
5.5 spu(case34)+arm(case5): pass
5.6 spu(case44)+arm(case5): pass
2023-12-06 17:43:42 +08:00
Xianfeng Du
0bd1487ff0
Merge branch 'dev_ck_v2.1_feature_enhancement#1360' into 'dev_ck_v2.1'
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优化IM空间,删除gastCmdExt数组、命令字长度最大12字节#feature_enhancement#1360
See merge request ucp/driver/ucp4008_platform_spu!67
2023-12-06 01:55:31 +00:00
lishuang.xie
4da71189f9
1. update Feature Enhancement#1353 to dev_ck_v2.1
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2. update Feature Enhancement#1360 to dev_ck_v2.1
3. add test macro: OSP_DEBUG_TEST
4. TASK_MAX: 64 --> 20 (task num and timer task num)
5. one slot supports max 20 tasks
6. TEST:
6.1 spu(case0)+arm(case0): pass
6.2 spu(case14)+arm(case20): pass
6.3 spu(case20)+arm(case20): pass
6.4 spu(case21)+arm(case21): pass
6.5 spu(case34)+arm(case5): pass
6.6 spu(case44)+arm(case5): pass
2023-12-05 19:55:38 +08:00
huanfeng.wang
8dfcdfebc9
优化shellIM空间,命令字长度最大12字节
2023-12-04 19:46:37 +08:00
lishuang.xie
275c6f1eea
fix bug#1349 from dev_ck_v2.1_bug#1349# to dev_ck_v2.1_bug
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modified the file: public/common/platform/src/spu_hw_queue.s.c
test:
spu(case14)+arm(case20): pass
spu(case20)+arm(case20): pass
spu(case21)+arm(case21): pass
spu(case34)+arm(case5) : pass
spu(case44)+arm(case5) : pass
wq
2023-11-29 14:38:09 +08:00
Xianfeng Du
9440e8a1d6
Merge branch 'dev_ck_v2.1_new_feature#1335' into 'dev_ck_v2.1'
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基站时延配置增加上行数据相对CPRI帧头偏移new feature#1335
See merge request ucp/driver/ucp4008_platform_spu!64
2023-11-29 02:51:14 +00:00
huanfeng.wang
28a226e4a4
优化shell代码,节省1.9kIM空间
2023-11-28 19:26:47 +08:00
xinxin.li
c43c6e3f21
add api of getting cpri offset of frame header to data
2023-11-28 09:33:54 +08:00
huanfeng.wang
4b23d3136e
基站时延增加上行数据相对cpri帧头偏移
2023-11-22 16:37:25 +08:00
huanfeng.wang
c1bfea09a3
优化shell模块IM空间
2023-11-22 15:34:19 +08:00
xinxin.li
a02bf422ff
1. fix UCP4008_SL feature enhancement #1296 ;
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2. add jesd gpio pins;
3. add jesd orx test case(45);
4. add jesd 200M test case(48);
2023-11-16 14:23:38 +08:00
xinxin.li
a8151f2767
1. UCP4008_SL new feature #1256 ;
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2. add function of jesd frame header offset;
3. test case: case21, case34, case44.
2023-11-02 10:42:30 +08:00
lishuang.xie
ebf95caf37
update feature#1250 Support hearbeat function
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1. SPU and ARM both update
2. 8 APE and 3 RFM(no pet_rfm_spu0) support hearbeat
3. ARM support new function get_heartbeat_status() to get the cores status
4. test:
4.1 spu(case34)+arm(case5): Pass
4.2 spu(case44)+arm(case5): Pass --> spu(case44)should use previous version
4.3 spu(case21)+arm(case21):Pass
4.4 spu(case14)+arm(case3): Pass
2023-11-01 11:32:46 +08:00
xinxin.li
726d268715
1. fix UCP4008-SL-EVB new feature #1173 ;
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2. modify shared SM5 address.
2023-10-30 16:45:47 +08:00
xinxin.li
04bd71b25d
1. UCP4008_SL new feature #1167#;
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2. add jesd orx funciton.
2023-10-30 14:23:55 +08:00
xinxin.li
5048143f94
1. fix UCP4008_SL_EVB feature enhancement#1214#;
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2. test case: case21(CPRI/JESD),case14,case34,case44;
3. add gpio1b26 for cpri trigger;
git commit -m
2023-10-25 16:48:22 +08:00
lishuang.xie
4577e2c80f
update Featuer Enhancement#1171#
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1. APE add case0
2. update public/common/platform/inc/spu_log.h, delete static
3. test:
3.1 spu(case0)+arm(case0): pass
3.2 spu(case14)+arm(case14):pass
3.3 spu(case20)+arm(case20):pass
3.4 spu(case21)+arm(case21):pass
3.5 spu(case34)+arm(case5) :pass
3.6 spu(case44)+arm(case5) :pass
2023-10-23 11:37:23 +08:00
huanfeng.wang
2e0da377ba
帧头偏移设置、查询入库
2023-10-18 11:08:20 +08:00
xinxin.li
fabe631974
1. fix UCP4008_SL_EVMY feature#1139#;
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2. test case: case21, case34, case44, case49
3. modify jesd csu code;
4. modify jesd timer code.
2023-10-13 17:11:53 +08:00
xinxin.li
2a9b479f2a
1. fix UCP4008_SL_EVMY bug#1133#;
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2. modify case44 data source(3.1a slot0);
3. test case : case21(CPRI/JESD), case44(7d2u/1d3u), case34.
2023-10-13 09:20:52 +08:00
lishuang.xie
e34abce4e1
update New Feature#1113
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1. update component to week40
2. add new function smart_no_idle_sw_init
3. change name of smart_ddr_spinlock_init
4. change type of smart_task_del and smart_enable_q_nempty
5. if call smart_enable_q_nempty return faild, we'll call 8 times
6. if call smart_task_del return faild, we'll record
7. smart_reclaim_init_res() don't be called!!!
8. test:
8.1 SPU(case14)+ARM(case3) :PASS
8.2 SPU(case20)+ARM(case20):PASS
8.3 SPU(case21)+ARM(case21):PASS
8.4 SPU(case34)+ARM(case5) :PASS
8.5 SPU(case44)+ARM(case5) :PASS
2023-10-12 10:28:46 +08:00
huanfeng.wang
4b86608e44
解决平台log存储在rodata问题
2023-10-11 15:45:06 +08:00
yonglin.gui
7f00a0aa74
1 modify pcie test case to adapt new code architecher
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2 modify pcie log interface to reduce function stack size
2023-10-08 18:02:38 +08:00
xinxin.li
75cccffd10
1. add cpri map struct;
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2. modify struct stFrontHaulDrvPara;
2023-09-27 20:29:13 +08:00
xinxin.li
eb20c173aa
1. UCP4008_SL#1024# new feature;
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2. add function fronthaul_drv_cfg;
3. add jesd test case;
4. tested case: case21/case34/case44/case40/case43/case49
2023-09-27 19:24:30 +08:00
yanzhi.wang
eac53151cf
1.add NR FDD 15K testcase80~83;2.add 25g testcase72;3.modify cpri map typedef
2023-09-26 09:49:01 +08:00
lishuang.xie
295a44d46b
1. fix Bug#1061
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2. fix Bug#1081
3. fix Bug#1079
4. update New Feature#945
5. component debug_init call in spu_lib_debug_init() functon
6. testcase:
6.1 spu(case34)+arm(case5): pass
6.2 spu(case44)+arm(case5): pass
6.3 spu(case21)+arm(case21):pass
6.4 spu(case14)+arm(case3): pass
2023-09-25 09:46:27 +08:00
xinxin.li
a9180edc85
1.commit normalization drv version;
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2.add ecpri code;
3.test case: case34,case44,case21(CPRI/JESD mode)
2023-09-22 19:47:02 +08:00