8 Commits

Author SHA1 Message Date
HUOHUO
154ba542c0 1.platform PCIE support 2.readme.txt update 2025-03-23 05:53:30 -07:00
lishuang.xie
295a44d46b 1. fix Bug#1061
2. fix Bug#1081
3. fix Bug#1079
4. update New Feature#945
5. component debug_init call in spu_lib_debug_init() functon
6. testcase:
   6.1 spu(case34)+arm(case5): pass
   6.2 spu(case44)+arm(case5): pass
   6.3 spu(case21)+arm(case21):pass
   6.4 spu(case14)+arm(case3): pass
2023-09-25 09:46:27 +08:00
xinxin.li
a9180edc85 1.commit normalization drv version;
2.add ecpri code;
3.test case: case34,case44,case21(CPRI/JESD mode)
2023-09-22 19:47:02 +08:00
yonglin.gui
842d1d638d 删除了ul方向数据包是否及时被RC读取的判断 2023-09-09 10:10:39 +08:00
yonglin.gui
cf575de36e add RC control EP pcie log 2023-08-05 08:18:36 +08:00
yonglin.gui
99f4310ae8 modify the pcie tranfic bug 2023-08-02 17:55:39 +08:00
yonglin.gui
d7eb9d91d7 merge pcie code to v2.1 2023-07-27 18:46:09 +08:00
chao1.wang
d74566ec2c First commit 2023-07-13 11:27:03 +08:00