63 Commits

Author SHA1 Message Date
xinxin.li
ab192ce627 1. fix UCP4008-SL new feature#1574;
2. modify timing precision from us to ns;
3. test case: case24, case34, case44, case45, case48, case41, case42.
2024-03-29 13:55:02 +08:00
xinxin.li
7e28ec5ded 1. fix UCP4008-SL bug#1756#;
2. add sync in the gpio config interface;
3. add testcase case25 for lte 3cells test;
4. tested case: case21, case24, case25, case34, case44.
2024-03-20 16:11:30 +08:00
huihui.shang
26ab30ac20 ecpri link detection & recovery 2024-03-16 10:10:40 +08:00
lishuang.xie
44c5ec0414 update New Feature#1655 to dev_ck_V2.1
1. modified the function of void handshake_master_with_slave(uint32_t u32_core_mask) add the input parameter.
2. phy should support the function of uint32_t get_core_mask_by_phy(void).
3. Test:
   3.1 spu_case0_arm_case0_cpri:  Pass
   3.2 spu_case14_arm_case20_cpri:Pass
   3.3 spu_case20_arm_case20_cpri:Pass
   3.4 spu_case21_arm_case21_cpri:Pass
   3.5 spu_case34_arm_case5:      Pass
   3.6 spu_case44_arm_case5:      Pass
2024-03-04 18:10:03 +08:00
Weihua Li
48a563ce90 Merge branch 'dev_ck_v2.1_bug#1693#' into 'dev_ck_v2.1'
优化CPRI链路失步时的重同步机制

See merge request ucp/driver/ucp4008_platform_spu!92
2024-03-04 01:12:56 +00:00
xinxin.li
6a366b6d40 1. fix UCP4008-SL new feature#1694#;
2. add testcase24, lte 4cell test;
3. modify code for lte 4cell built.
2024-03-01 11:34:49 +08:00
cheng.wan
384d6573f6 优化CPRI链路失步时的重同步机制 2024-02-29 10:48:31 +08:00
xinxin.li
ba39178f5d 1. fix UCP4008-SL feature enhancement#1675#;
2. change pp1s sratching position;
3. modify cpri tx/rxxrx
4. test case: case44, case34, case21.
2024-02-20 11:36:52 +08:00
xinxin.li
c95d515a70 1. fix UCP4008-SL bug#1645;
2. modify api jesd_orx_csu_init;
2024-01-31 19:14:13 +08:00
xinxin.li
20d3c88a00 1. fix UCP4008-SL bug#1641; 2024-01-29 16:19:25 +08:00
Xianfeng Du
ba985c67ac Merge branch 'dev_ck_v2.1_feature#1640#' into 'dev_ck_v2.1'
UCP4008-SL feature #1640

See merge request ucp/driver/ucp4008_platform_spu!86
2024-01-29 08:13:08 +00:00
xinxin.li
43e55934c3 1. fix UCP4008-SL feature #1640;
2. add csu config file for cpri csu 2period;
3. add test case22(SCS15K).
2024-01-29 14:57:56 +08:00
xinxin.li
926ce7e7a9 1. fix UCP4008-SL-EVB feature #1612;
2. add para for phy_sniffer_start;
3. test case: case34, case44, case45, case48, case41, case42, case21.
2024-01-29 14:47:15 +08:00
xinxin.li
bd89dac8bf 1. fix UCP4008_SL feature enhancement #1597;
2. modify mtimer pp1s source from stc pp1s output to stc tod pp1s output;
2024-01-15 14:49:41 +08:00
xinxin.li
53d6a3888c 1. fix feature enhancement #1557#;
2. add input para about tdd/fdd mode for jesd_csu_init;
3. add spu_ddr_monitor_start api;
4. flush jesd csu inlatch on the first time for fdd mode.
2024-01-05 10:58:50 +08:00
Xianfeng Du
a16d06c143 Merge branch 'dev_ck_v2.1_feature#1412#_fdd' into 'dev_ck_v2.1'
UCP4008_SL new feature #1412

See merge request ucp/driver/ucp4008_platform_spu!80
2023-12-28 07:43:02 +00:00
xinxin.li
8da2b23130 1. fix UCP4008_SL new feature#1412;
2. add fdd function of 122.88M and 61.44M;
3. test case : case41,case42,case44,case48
2023-12-28 15:05:58 +08:00
huihui.shang
0e31610af0 ecpri testcase update 2023-12-26 19:03:20 +08:00
xinxin.li
4655f82bf0 1. add 10ms trigger for sniffer before cell building;
2. int cost modify: 4us to 3.5us;
3. modify case41: NR FDD 15K, 122.88M, 40M, test ok;
2023-12-22 16:37:58 +08:00
xinxin.li
2280641528 add orx callback 2023-12-20 14:19:55 +08:00
xinxin.li
f4dd3ccf8c 1. UCP4008_SL new feature #1412;
2. fdd 122.88M, 4 ants;
3. test case: case41,case44
2023-12-20 12:24:27 +08:00
huihui.shang
96ec809d27 ecpri function 2023-12-14 10:55:49 +08:00
xinxin.li
b0fd7237f7 1. fix UCP4008_SL feature enhancement #1378;
2. disable rf switch int after all of cells are deleted;
    3. adjust slot offset, csu offset, rf switch offset;
    4. add init para about 204C;
    5. test case: case21, case34, case44.
2023-12-12 09:22:06 +08:00
xinxin.li
6c294ce0bc 1. fix UCP4008_SL feature enhancement #1378;
2. disable rf switch int after all of cells are deleted;
3. adjust slot offset, csu offset, rf switch offset;
4. add init para about 204C;
5. test case: case21, case34, case44.
2023-12-11 20:19:20 +08:00
cheng.wan
00d662b168 1.将APE_CFG_FILE_NAME_LEN由64恢复为32(之前误改) 2.删除重复定义的g_rru_msg_data 3.读物理层控制字信息改为使用do_read_volatile方式 2023-12-08 19:17:34 +08:00
cheng.wan
48ffee72b7 1.解决数组g_rru_msg_data的地址4字节对齐问题 2.函数set_cpri_rru_msg增加大小端转换功能 3.更新25G宽带信号case72 2023-12-08 15:50:48 +08:00
lishuang.xie
8c59de6c96 1. update New Feature#945 to dev_ck_v2.1
2. update New Feature#1347 to dev_ck_v2.1
3. add new interface for ecs rfm1 and ape: spu_get_oam_handle_id for get oam handle_id by inst_id
4. Move Mem_init() from ape to ecs rfm1
5. TEST:
   5.1 spu(case0)+arm(case0):  pass
   5.2 spu(case14)+arm(case20):pass
   5.3 spu(case20)+arm(case20):pass
   5.4 spu(case21)+arm(case21):pass
   5.5 spu(case34)+arm(case5): pass
   5.6 spu(case44)+arm(case5): pass
2023-12-06 17:43:42 +08:00
Xianfeng Du
9440e8a1d6 Merge branch 'dev_ck_v2.1_new_feature#1335' into 'dev_ck_v2.1'
基站时延配置增加上行数据相对CPRI帧头偏移new feature#1335

See merge request ucp/driver/ucp4008_platform_spu!64
2023-11-29 02:51:14 +00:00
huanfeng.wang
b27233a65d 完善打印信息 2023-11-29 10:30:04 +08:00
xinxin.li
c43c6e3f21 add api of getting cpri offset of frame header to data 2023-11-28 09:33:54 +08:00
xinxin.li
28a4a55b5a 1. fix bug #1345;
2. modify orx csu interrupt;
3. modify case48: 2cell, 160M data source;
4. test case: case21, case34, case44, case45, case48
2023-11-27 20:31:03 +08:00
huanfeng.wang
4b23d3136e 基站时延增加上行数据相对cpri帧头偏移 2023-11-22 16:37:25 +08:00
xinxin.li
a02bf422ff 1. fix UCP4008_SL feature enhancement #1296;
2. add jesd gpio pins;
3. add jesd orx test case(45);
4. add jesd 200M test case(48);
2023-11-16 14:23:38 +08:00
xinxin.li
a8151f2767 1. UCP4008_SL new feature #1256;
2. add function of jesd frame header offset;
3. test case: case21, case34, case44.
2023-11-02 10:42:30 +08:00
lishuang.xie
ebf95caf37 update feature#1250 Support hearbeat function
1. SPU and ARM both update
2. 8 APE and 3 RFM(no pet_rfm_spu0) support hearbeat
3. ARM support new function get_heartbeat_status() to get the cores status
4. test:
   4.1 spu(case34)+arm(case5): Pass
   4.2 spu(case44)+arm(case5): Pass --> spu(case44)should use previous version
   4.3 spu(case21)+arm(case21):Pass
   4.4 spu(case14)+arm(case3): Pass
2023-11-01 11:32:46 +08:00
xinxin.li
0e0db1f53a delete test code for orx 2023-10-30 15:55:45 +08:00
xinxin.li
04bd71b25d 1. UCP4008_SL new feature #1167#;
2. add jesd orx funciton.
2023-10-30 14:23:55 +08:00
Xianfeng Du
41fa8df011 Merge branch 'dev_ck_v2.1_EVB_feature#1214#' into 'dev_ck_v2.1'
UCP4008_SL_EVB feature enhancement#1214#

See merge request ucp/driver/ucp4008_platform_spu!51
2023-10-26 00:11:46 +00:00
xinxin.li
5048143f94 1. fix UCP4008_SL_EVB feature enhancement#1214#;
2. test case: case21(CPRI/JESD),case14,case34,case44;
3. add gpio1b26 for cpri trigger;
git commit -m
2023-10-25 16:48:22 +08:00
yanzhi.wang
09d2c906e9 添加164B控制字传输接口,修改控制字发送接口函数 2023-10-24 17:19:02 +08:00
huanfeng.wang
2e0da377ba 帧头偏移设置、查询入库 2023-10-18 11:08:20 +08:00
xinxin.li
fabe631974 1. fix UCP4008_SL_EVMY feature#1139#;
2. test case: case21, case34, case44, case49
3. modify jesd csu code;
4. modify jesd timer code.
2023-10-13 17:11:53 +08:00
xinxin.li
2a9b479f2a 1. fix UCP4008_SL_EVMY bug#1133#;
2. modify case44 data source(3.1a slot0);
3. test case : case21(CPRI/JESD), case44(7d2u/1d3u), case34.
2023-10-13 09:20:52 +08:00
xinxin.li
75cccffd10 1. add cpri map struct;
2. modify struct stFrontHaulDrvPara;
2023-09-27 20:29:13 +08:00
xinxin.li
eb20c173aa 1. UCP4008_SL#1024# new feature;
2. add function fronthaul_drv_cfg;
3. add jesd test case;
4. tested case: case21/case34/case44/case40/case43/case49
2023-09-27 19:24:30 +08:00
yanzhi.wang
eac53151cf 1.add NR FDD 15K testcase80~83;2.add 25g testcase72;3.modify cpri map typedef 2023-09-26 09:49:01 +08:00
lishuang.xie
295a44d46b 1. fix Bug#1061
2. fix Bug#1081
3. fix Bug#1079
4. update New Feature#945
5. component debug_init call in spu_lib_debug_init() functon
6. testcase:
   6.1 spu(case34)+arm(case5): pass
   6.2 spu(case44)+arm(case5): pass
   6.3 spu(case21)+arm(case21):pass
   6.4 spu(case14)+arm(case3): pass
2023-09-25 09:46:27 +08:00
xinxin.li
a9180edc85 1.commit normalization drv version;
2.add ecpri code;
3.test case: case34,case44,case21(CPRI/JESD mode)
2023-09-22 19:47:02 +08:00
xinxin.li
f3ff36cc8c 1. JESD 9.8g, UCP4008_SL_EVB, new feature #1028;
2. cell setup/delete bug, UCP4008_SL_EVB, bug #1071;
3. task delete bug when deleting cell, bug #1061;
4. delete board direction;
5. add some cell setup parameters for FDD mode extend
2023-09-15 14:59:25 +08:00
lishuang.xie
bbf0b958cf merge branch dev_ck_v2.1_bug#1038# to dev_ck_v2.1
1. update libhwque.a and hwque.h
2. pet_rfm1/ecs_rfm0/ecs_rfm1 main.c add call smart_hq_debug_init()
3. spu(case14)+arm(case3): pass
4. spu(case21)+arm(case21):pass
5. spu(case34)+arm(case0): pass
6. spu(case44)+arm(case0): pass
2023-09-06 15:48:54 +08:00