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25 Commits

Author SHA1 Message Date
huanfeng.wang
97d3801253 pcie场景增加case51,修改case14 feature enhancement#1110 2023-10-11 16:12:52 +08:00
yonglin.gui
7f00a0aa74 1 modify pcie test case to adapt new code architecher 
2 modify pcie log interface to reduce function stack size
 2023-10-08 18:02:38 +08:00
yonglin.gui
946789f001 修改pcie testcase，以适配新代码框架 2023-10-08 09:43:07 +08:00
xinxin.li
75cccffd10 1. add cpri map struct; 
2. modify struct stFrontHaulDrvPara;
 2023-09-27 20:29:13 +08:00
xinxin.li
eb20c173aa 1. UCP4008_SL#1024# new feature; 
2. add function fronthaul_drv_cfg;
3. add jesd test case;
4. tested case: case21/case34/case44/case40/case43/case49
 2023-09-27 19:24:30 +08:00
xianfeng.du
89c3533c47 updated testcases/osp 34/44 2023-09-26 17:03:12 +08:00
xianfeng.du
bd48bbd1c3 refactored test architecture 2023-09-26 16:46:56 +08:00
yanzhi.wang
eac53151cf 1.add NR FDD 15K testcase80~83;2.add 25g testcase72;3.modify cpri map typedef 2023-09-26 09:49:01 +08:00
xinxin.li
a9180edc85 1.commit normalization drv version; 
2.add ecpri code;
3.test case: case34,case44,case21(CPRI/JESD mode)
 2023-09-22 19:47:02 +08:00
xinxin.li
f3ff36cc8c 1. JESD 9.8g, UCP4008_SL_EVB, new feature #1028; 
2. cell setup/delete bug, UCP4008_SL_EVB, bug #1071;
3. task delete bug when deleting cell, bug #1061;
4. delete board direction;
5. add some cell setup parameters for FDD mode extend
 2023-09-15 14:59:25 +08:00
lishuang.xie
974bd109b3 merge dev_ck_v2.1_feature#1019 to dev_ck_v2.1 
1. fix case14/case50/case51 for 8 apes apex_test_task_reg() by New Feature#1019
2. SPU(case34)+ARM(case0)  pass
3. SPU(case44)+ARM(case0)  pass
4. SPU(case21)+ARM(case21) pass
5. SPU(case14)+ARM(case3)  pass
 2023-08-28 17:29:23 +08:00
huanfeng.wang
235162cbcd 修改case20任务栈为2048 2023-08-25 16:49:46 +08:00
lishuang.xie
b4919a9c92 1. update New Feature#1006 
2. modify case 0:  LTE 2 ape testcase(1 cell)
3. modify case 20: NR  4 ape testcase(1 cell)
4. modify case 21: NR  8 ape testcase(2 cell)
5. modify case 22: LTE 8 ape testcase(2 cell)
 2023-08-23 16:18:40 +08:00
xinxin.li
61a8435a6d > 1. 增加cpri模式，帧头提前2ms的功能，UCP4008-SL-EVB New Feature #926; 
> 2. 系统平台lib库更新；
> 3. 增加单模模式下，双小区的删建功能；
> 4. 回归测试case：case21/case22(NR15K)/case34/case37/case68(LTE)
 2023-08-18 20:30:52 +08:00
huanfeng.wang
a5340570ca 修改case51 rc oam环回测试 2023-08-09 16:34:11 +08:00
yonglin.gui
cf575de36e add RC control EP pcie log 2023-08-05 08:18:36 +08:00
yonglin.gui
d7eb9d91d7 merge pcie code to v2.1 2023-07-27 18:46:09 +08:00
xinxin.li
3c62c3e12d case0 modified as LTE OSP case 2023-07-25 14:23:23 +08:00
Xianfeng Du
10055ff6a2 Merge branch 'dev_ck_v2.1_wyz' into 'dev_ck_v2.1' 
1.modify from CPRI_24G_TEST to CPRI_10G_TEST;2.translate Chinese note .txt of testcase to English

See merge request ucp/driver/ucp4008_platform_spu!7
 2023-07-25 14:09:18 +00:00
yanzhi.wang
fe1d9ca6bb 1.modify from CPRI_24G_TEST to CPRI_10G_TEST;2.translate Chinese note .txt of testcase to English 2023-07-25 11:11:08 +08:00
huanfeng.wang
0caeda5853 1：HANDSHKAE_MASK根据PCIE_BACKHAUL区分；2：修改pcie场景case51 2023-07-25 09:29:29 +08:00
Xianfeng Du
8f48f2e369 Merge branch 'dev_ck_v2.1_wyz' into 'dev_ck_v2.1' 
1.modify LTE DG cpri csu config;2.add cpri 25g driver and case

See merge request ucp/driver/ucp4008_platform_spu!4
 2023-07-24 10:00:06 +00:00
yanzhi.wang
070adb6c3b 1.modify LTE DG cpri csu config;2.add cpri 25g driver and case 2023-07-24 09:27:15 +08:00
lishuang.xie
7e2437c0d6 1. New Feature#910 
2. Feature Enhancement#914
3. update from V2.0, by msg_transfer synch
4. add osp_send_msg/osp_var_init by synch
 2023-07-22 17:27:21 +08:00
chao1.wang
d74566ec2c First commit 2023-07-13 11:27:03 +08:00