9 Commits

Author SHA1 Message Date
xinxin.li
fabe631974 1. fix UCP4008_SL_EVMY feature#1139#;
2. test case: case21, case34, case44, case49
3. modify jesd csu code;
4. modify jesd timer code.
2023-10-13 17:11:53 +08:00
xinxin.li
2a9b479f2a 1. fix UCP4008_SL_EVMY bug#1133#;
2. modify case44 data source(3.1a slot0);
3. test case : case21(CPRI/JESD), case44(7d2u/1d3u), case34.
2023-10-13 09:20:52 +08:00
huanfeng.wang
97d3801253 pcie场景增加case51,修改case14 feature enhancement#1110 2023-10-11 16:12:52 +08:00
yonglin.gui
7f00a0aa74 1 modify pcie test case to adapt new code architecher
2 modify pcie log interface to reduce function stack size
2023-10-08 18:02:38 +08:00
yonglin.gui
946789f001 修改pcie testcase,以适配新代码框架 2023-10-08 09:43:07 +08:00
xinxin.li
75cccffd10 1. add cpri map struct;
2. modify struct stFrontHaulDrvPara;
2023-09-27 20:29:13 +08:00
xinxin.li
eb20c173aa 1. UCP4008_SL#1024# new feature;
2. add function fronthaul_drv_cfg;
3. add jesd test case;
4. tested case: case21/case34/case44/case40/case43/case49
2023-09-27 19:24:30 +08:00
xianfeng.du
89c3533c47 updated testcases/osp 34/44 2023-09-26 17:03:12 +08:00
xianfeng.du
bd48bbd1c3 refactored test architecture 2023-09-26 16:46:56 +08:00