/* * =================================================================== * * Filename: apcs.h * * Created: 2021-11-11 03:56:42 PM * Last Modified: 2022-01-10 11:25:38 AM * * Author: Lipeng YANG, lipeng.yang@ia.ac.cn * Organization: Beijing Smart Logic Technology Co., Ltd. * National ASIC Design Engineering Center, IACAS * * Description: * * =================================================================== */ #ifndef __APCS_H__ #define __APCS_H__ #define APC0_CNT0_BASE 0x04A80000 #define APC0_CNT1_BASE 0x04A82000 #define APC0_CNT2_BASE 0x04A84000 #define APC0_CNT3_BASE 0x04A86000 #define APC0_SUBCTRL_BASE 0x04A88000 #define APC0_S0_BASE 0x04A90000 #define APC0_S1_BASE 0x09400000 #define APC0_S2_BASE 0x0D000000 #define APE0_START (*((volatile uint32_t *)(APC0_S0_BASE + 0x000*4 ))) #define APE1_START (*((volatile uint32_t *)(APC0_S0_BASE + 0x001*4 ))) #define APC1_CNT0_BASE 0x04AD0000 #define APC1_CNT1_BASE 0x04AD2000 #define APC1_CNT2_BASE 0x04AD4000 #define APC1_CNT3_BASE 0x04AD6000 #define APC1_SUBCTRL_BASE 0x04AD8000 #define APC1_S0_BASE 0x04AE0000 #define APC1_S1_BASE 0x09600000 #define APC1_S2_BASE 0x0D200000 #define APE2_START (*((volatile uint32_t *)(APC1_S0_BASE + 0x000*4 ))) #define APE3_START (*((volatile uint32_t *)(APC1_S0_BASE + 0x001*4 ))) #define APC2_CNT0_BASE 0x04B20000 #define APC2_CNT1_BASE 0x04B22000 #define APC2_CNT2_BASE 0x04B24000 #define APC2_CNT3_BASE 0x04B26000 #define APC2_SUBCTRL_BASE 0x04B28000 #define APC2_S0_BASE 0x04B30000 #define APC2_S1_BASE 0x09800000 #define APC2_S2_BASE 0x0D400000 #define APE4_START (*((volatile uint32_t *)(APC2_S0_BASE + 0x000*4 ))) #define APE5_START (*((volatile uint32_t *)(APC2_S0_BASE + 0x001*4 ))) #define APC3_CNT0_BASE 0x04B70000 #define APC3_CNT1_BASE 0x04B72000 #define APC3_CNT2_BASE 0x04B74000 #define APC3_CNT3_BASE 0x04B76000 #define APC3_SUBCTRL_BASE 0x04B78000 #define APC3_S0_BASE 0x04B80000 #define APC3_S1_BASE 0x09A00000 #define APC3_S2_BASE 0x0D600000 #define APE6_START (*((volatile uint32_t *)(APC3_S0_BASE + 0x000*4 ))) #define APE7_START (*((volatile uint32_t *)(APC3_S0_BASE + 0x001*4 ))) //#define APRFM_S0_BASE 0x04278000 //#define APRFM_S1_BASE 0x04728000 #define JECS_RFM_S0_BASE 0x08610000 #define JECS_RFM_S1_BASE 0x07220000 #define JECSRFM0_START (*((volatile uint32_t *)(JECS_RFM_S0_BASE + 0x000*4 ))) #define JECSRFM1_START (*((volatile uint32_t *)(JECS_RFM_S0_BASE + 0x001*4 ))) #define PETRFM_S0_BASE 0x08F50000 #define PETRFM_S1_BASE 0x08720000 #define PETRFM0_START (*((volatile uint32_t *)(PETRFM_S0_BASE + 0x000*4 ))) #define PETRFM1_START (*((volatile uint32_t *)(PETRFM_S0_BASE + 0x001*4 ))) #define APC_IML_BASE 0x0 #define APC_MIML_BASE 0x40000 #define APC_IMH_BASE 0x200000 #define APC_MIMH_BASE 0x240000 #define APC_DM0_BASE 0x100000 #define APC_DM1_BASE 0x140000 #define APC_DM2_BASE 0x180000 #define APC_DM3_BASE 0x1C0000 #define APC_DM4_BASE 0x300000 #define APC_DM5_BASE 0x340000 #define APC_DM6_BASE 0x380000 #define APC_DM7_BASE 0x3C0000 #define RFM_IML_BASE 0x300000 #define RFM_IMH_BASE 0x340000 #define RFM_DM0_BASE 0x100000 #define RFM_DM1_BASE 0x140000 #define RFM_DM_SIZE S128KB #define APE_DM_SIZE S256KB #define APC0_CNT0_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x00000*4))) #define APC0_CNT0_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x00001*4))) #define APC0_CNT0_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x00002*4))) #define APC0_CNT0_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x00003*4))) #define APC0_CNT0_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x00008*4))) #define APC0_CNT0_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x00000*4))) #define APC0_CNT0_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x00001*4))) #define APC0_CNT0_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003F8*4))) #define APC0_CNT0_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003F9*4))) #define APC0_CNT0_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003FA*4))) #define APC0_CNT0_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003FB*4))) #define APC0_CNT0_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003F4*4))) #define APC0_CNT0_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003F5*4))) #define APC0_CNT0_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003F6*4))) #define APC0_CNT0_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003F7*4))) #define APC0_CNT0_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003FC*4))) #define APC0_CNT0_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003FD*4))) #define APC0_CNT0_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003FE*4))) #define APC0_CNT0_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC0_CNT0_BASE + 0x003FF*4))) #define APC0_CNT1_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x00000*4))) #define APC0_CNT1_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x00001*4))) #define APC0_CNT1_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x00002*4))) #define APC0_CNT1_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x00003*4))) #define APC0_CNT1_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x00008*4))) #define APC0_CNT1_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x00000*4))) #define APC0_CNT1_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x00001*4))) #define APC0_CNT1_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003F8*4))) #define APC0_CNT1_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003F9*4))) #define APC0_CNT1_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003FA*4))) #define APC0_CNT1_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003FB*4))) #define APC0_CNT1_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003F4*4))) #define APC0_CNT1_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003F5*4))) #define APC0_CNT1_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003F6*4))) #define APC0_CNT1_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003F7*4))) #define APC0_CNT1_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003FC*4))) #define APC0_CNT1_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003FD*4))) #define APC0_CNT1_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003FE*4))) #define APC0_CNT1_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC0_CNT1_BASE + 0x003FF*4))) #define APC0_CNT2_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x00000*4))) #define APC0_CNT2_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x00001*4))) #define APC0_CNT2_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x00002*4))) #define APC0_CNT2_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x00003*4))) #define APC0_CNT2_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x00008*4))) #define APC0_CNT2_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x00000*4))) #define APC0_CNT2_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x00001*4))) #define APC0_CNT2_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003F8*4))) #define APC0_CNT2_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003F9*4))) #define APC0_CNT2_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003FA*4))) #define APC0_CNT2_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003FB*4))) #define APC0_CNT2_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003F4*4))) #define APC0_CNT2_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003F5*4))) #define APC0_CNT2_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003F6*4))) #define APC0_CNT2_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003F7*4))) #define APC0_CNT2_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003FC*4))) #define APC0_CNT2_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003FD*4))) #define APC0_CNT2_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003FE*4))) #define APC0_CNT2_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC0_CNT2_BASE + 0x003FF*4))) #define APC0_CNT3_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x00000*4))) #define APC0_CNT3_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x00001*4))) #define APC0_CNT3_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x00002*4))) #define APC0_CNT3_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x00003*4))) #define APC0_CNT3_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x00008*4))) #define APC0_CNT3_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x00000*4))) #define APC0_CNT3_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x00001*4))) #define APC0_CNT3_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003F8*4))) #define APC0_CNT3_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003F9*4))) #define APC0_CNT3_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003FA*4))) #define APC0_CNT3_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003FB*4))) #define APC0_CNT3_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003F4*4))) #define APC0_CNT3_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003F5*4))) #define APC0_CNT3_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003F6*4))) #define APC0_CNT3_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003F7*4))) #define APC0_CNT3_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003FC*4))) #define APC0_CNT3_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003FD*4))) #define APC0_CNT3_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003FE*4))) #define APC0_CNT3_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC0_CNT3_BASE + 0x003FF*4))) #define APC0_SUBCTRL_REG0 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00000))) #define APC0_SUBCTRL_REG1 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00004))) #define APC0_SUBCTRL_REG2 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00008))) #define APC0_SUBCTRL_REG3 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x0000C))) #define APC0_SUBCTRL_REG4 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00010))) #define APC0_SUBCTRL_REG5 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00014))) #define APC0_SUBCTRL_REG6 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00018))) #define APC0_SUBCTRL_REG7 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x0001C))) #define APC0_SUBCTRL_REG8 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00020))) #define APC0_SUBCTRL_REG9 (*((volatile uint32_t *)(APC0_SUBCTRL_BASE + 0x00024))) #define APC1_CNT0_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x00000*4))) #define APC1_CNT0_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x00001*4))) #define APC1_CNT0_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x00002*4))) #define APC1_CNT0_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x00003*4))) #define APC1_CNT0_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x00008*4))) #define APC1_CNT0_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x00000*4))) #define APC1_CNT0_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x00001*4))) #define APC1_CNT0_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003F8*4))) #define APC1_CNT0_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003F9*4))) #define APC1_CNT0_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003FA*4))) #define APC1_CNT0_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003FB*4))) #define APC1_CNT0_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003F4*4))) #define APC1_CNT0_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003F5*4))) #define APC1_CNT0_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003F6*4))) #define APC1_CNT0_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003F7*4))) #define APC1_CNT0_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003FC*4))) #define APC1_CNT0_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003FD*4))) #define APC1_CNT0_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003FE*4))) #define APC1_CNT0_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC1_CNT0_BASE + 0x003FF*4))) #define APC1_CNT1_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x00000*4))) #define APC1_CNT1_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x00001*4))) #define APC1_CNT1_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x00002*4))) #define APC1_CNT1_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x00003*4))) #define APC1_CNT1_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x00008*4))) #define APC1_CNT1_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x00000*4))) #define APC1_CNT1_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x00001*4))) #define APC1_CNT1_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003F8*4))) #define APC1_CNT1_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003F9*4))) #define APC1_CNT1_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003FA*4))) #define APC1_CNT1_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003FB*4))) #define APC1_CNT1_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003F4*4))) #define APC1_CNT1_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003F5*4))) #define APC1_CNT1_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003F6*4))) #define APC1_CNT1_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003F7*4))) #define APC1_CNT1_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003FC*4))) #define APC1_CNT1_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003FD*4))) #define APC1_CNT1_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003FE*4))) #define APC1_CNT1_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC1_CNT1_BASE + 0x003FF*4))) #define APC1_CNT2_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x00000*4))) #define APC1_CNT2_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x00001*4))) #define APC1_CNT2_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x00002*4))) #define APC1_CNT2_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x00003*4))) #define APC1_CNT2_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x00008*4))) #define APC1_CNT2_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x00000*4))) #define APC1_CNT2_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x00001*4))) #define APC1_CNT2_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003F8*4))) #define APC1_CNT2_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003F9*4))) #define APC1_CNT2_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003FA*4))) #define APC1_CNT2_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003FB*4))) #define APC1_CNT2_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003F4*4))) #define APC1_CNT2_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003F5*4))) #define APC1_CNT2_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003F6*4))) #define APC1_CNT2_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003F7*4))) #define APC1_CNT2_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003FC*4))) #define APC1_CNT2_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003FD*4))) #define APC1_CNT2_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003FE*4))) #define APC1_CNT2_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC1_CNT2_BASE + 0x003FF*4))) #define APC1_CNT3_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x00000*4))) #define APC1_CNT3_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x00001*4))) #define APC1_CNT3_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x00002*4))) #define APC1_CNT3_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x00003*4))) #define APC1_CNT3_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x00008*4))) #define APC1_CNT3_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x00000*4))) #define APC1_CNT3_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x00001*4))) #define APC1_CNT3_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003F8*4))) #define APC1_CNT3_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003F9*4))) #define APC1_CNT3_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003FA*4))) #define APC1_CNT3_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003FB*4))) #define APC1_CNT3_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003F4*4))) #define APC1_CNT3_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003F5*4))) #define APC1_CNT3_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003F6*4))) #define APC1_CNT3_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003F7*4))) #define APC1_CNT3_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003FC*4))) #define APC1_CNT3_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003FD*4))) #define APC1_CNT3_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003FE*4))) #define APC1_CNT3_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC1_CNT3_BASE + 0x003FF*4))) #define APC1_SUBCTRL_REG0 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00000))) #define APC1_SUBCTRL_REG1 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00004))) #define APC1_SUBCTRL_REG2 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00008))) #define APC1_SUBCTRL_REG3 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x0000C))) #define APC1_SUBCTRL_REG4 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00010))) #define APC1_SUBCTRL_REG5 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00014))) #define APC1_SUBCTRL_REG6 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00018))) #define APC1_SUBCTRL_REG7 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x0001C))) #define APC1_SUBCTRL_REG8 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00020))) #define APC1_SUBCTRL_REG9 (*((volatile uint32_t *)(APC1_SUBCTRL_BASE + 0x00024))) #define APC2_CNT0_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x00000*4))) #define APC2_CNT0_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x00001*4))) #define APC2_CNT0_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x00002*4))) #define APC2_CNT0_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x00003*4))) #define APC2_CNT0_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x00008*4))) #define APC2_CNT0_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x00000*4))) #define APC2_CNT0_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x00001*4))) #define APC2_CNT0_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003F8*4))) #define APC2_CNT0_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003F9*4))) #define APC2_CNT0_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003FA*4))) #define APC2_CNT0_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003FB*4))) #define APC2_CNT0_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003F4*4))) #define APC2_CNT0_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003F5*4))) #define APC2_CNT0_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003F6*4))) #define APC2_CNT0_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003F7*4))) #define APC2_CNT0_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003FC*4))) #define APC2_CNT0_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003FD*4))) #define APC2_CNT0_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003FE*4))) #define APC2_CNT0_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC2_CNT0_BASE + 0x003FF*4))) #define APC2_CNT1_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x00000*4))) #define APC2_CNT1_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x00001*4))) #define APC2_CNT1_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x00002*4))) #define APC2_CNT1_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x00003*4))) #define APC2_CNT1_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x00008*4))) #define APC2_CNT1_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x00000*4))) #define APC2_CNT1_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x00001*4))) #define APC2_CNT1_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003F8*4))) #define APC2_CNT1_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003F9*4))) #define APC2_CNT1_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003FA*4))) #define APC2_CNT1_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003FB*4))) #define APC2_CNT1_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003F4*4))) #define APC2_CNT1_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003F5*4))) #define APC2_CNT1_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003F6*4))) #define APC2_CNT1_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003F7*4))) #define APC2_CNT1_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003FC*4))) #define APC2_CNT1_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003FD*4))) #define APC2_CNT1_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003FE*4))) #define APC2_CNT1_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC2_CNT1_BASE + 0x003FF*4))) #define APC2_CNT2_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x00000*4))) #define APC2_CNT2_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x00001*4))) #define APC2_CNT2_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x00002*4))) #define APC2_CNT2_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x00003*4))) #define APC2_CNT2_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x00008*4))) #define APC2_CNT2_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x00000*4))) #define APC2_CNT2_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x00001*4))) #define APC2_CNT2_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003F8*4))) #define APC2_CNT2_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003F9*4))) #define APC2_CNT2_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003FA*4))) #define APC2_CNT2_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003FB*4))) #define APC2_CNT2_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003F4*4))) #define APC2_CNT2_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003F5*4))) #define APC2_CNT2_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003F6*4))) #define APC2_CNT2_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003F7*4))) #define APC2_CNT2_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003FC*4))) #define APC2_CNT2_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003FD*4))) #define APC2_CNT2_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003FE*4))) #define APC2_CNT2_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC2_CNT2_BASE + 0x003FF*4))) #define APC2_CNT3_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x00000*4))) #define APC2_CNT3_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x00001*4))) #define APC2_CNT3_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x00002*4))) #define APC2_CNT3_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x00003*4))) #define APC2_CNT3_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x00008*4))) #define APC2_CNT3_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x00000*4))) #define APC2_CNT3_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x00001*4))) #define APC2_CNT3_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003F8*4))) #define APC2_CNT3_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003F9*4))) #define APC2_CNT3_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003FA*4))) #define APC2_CNT3_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003FB*4))) #define APC2_CNT3_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003F4*4))) #define APC2_CNT3_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003F5*4))) #define APC2_CNT3_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003F6*4))) #define APC2_CNT3_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003F7*4))) #define APC2_CNT3_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003FC*4))) #define APC2_CNT3_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003FD*4))) #define APC2_CNT3_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003FE*4))) #define APC2_CNT3_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC2_CNT3_BASE + 0x003FF*4))) #define APC2_SUBCTRL_REG0 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00000))) #define APC2_SUBCTRL_REG1 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00004))) #define APC2_SUBCTRL_REG2 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00008))) #define APC2_SUBCTRL_REG3 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x0000C))) #define APC2_SUBCTRL_REG4 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00010))) #define APC2_SUBCTRL_REG5 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00014))) #define APC2_SUBCTRL_REG6 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00018))) #define APC2_SUBCTRL_REG7 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x0001C))) #define APC2_SUBCTRL_REG8 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00020))) #define APC2_SUBCTRL_REG9 (*((volatile uint32_t *)(APC2_SUBCTRL_BASE + 0x00024))) #define APC3_CNT0_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x00000*4))) #define APC3_CNT0_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x00001*4))) #define APC3_CNT0_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x00002*4))) #define APC3_CNT0_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x00003*4))) #define APC3_CNT0_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x00008*4))) #define APC3_CNT0_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x00000*4))) #define APC3_CNT0_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x00001*4))) #define APC3_CNT0_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003F8*4))) #define APC3_CNT0_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003F9*4))) #define APC3_CNT0_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003FA*4))) #define APC3_CNT0_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003FB*4))) #define APC3_CNT0_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003F4*4))) #define APC3_CNT0_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003F5*4))) #define APC3_CNT0_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003F6*4))) #define APC3_CNT0_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003F7*4))) #define APC3_CNT0_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003FC*4))) #define APC3_CNT0_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003FD*4))) #define APC3_CNT0_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003FE*4))) #define APC3_CNT0_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC3_CNT0_BASE + 0x003FF*4))) #define APC3_CNT1_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x00000*4))) #define APC3_CNT1_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x00001*4))) #define APC3_CNT1_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x00002*4))) #define APC3_CNT1_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x00003*4))) #define APC3_CNT1_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x00008*4))) #define APC3_CNT1_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x00000*4))) #define APC3_CNT1_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x00001*4))) #define APC3_CNT1_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003F8*4))) #define APC3_CNT1_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003F9*4))) #define APC3_CNT1_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003FA*4))) #define APC3_CNT1_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003FB*4))) #define APC3_CNT1_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003F4*4))) #define APC3_CNT1_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003F5*4))) #define APC3_CNT1_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003F6*4))) #define APC3_CNT1_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003F7*4))) #define APC3_CNT1_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003FC*4))) #define APC3_CNT1_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003FD*4))) #define APC3_CNT1_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003FE*4))) #define APC3_CNT1_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC3_CNT1_BASE + 0x003FF*4))) #define APC3_CNT2_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x00000*4))) #define APC3_CNT2_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x00001*4))) #define APC3_CNT2_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x00002*4))) #define APC3_CNT2_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x00003*4))) #define APC3_CNT2_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x00008*4))) #define APC3_CNT2_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x00000*4))) #define APC3_CNT2_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x00001*4))) #define APC3_CNT2_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003F8*4))) #define APC3_CNT2_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003F9*4))) #define APC3_CNT2_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003FA*4))) #define APC3_CNT2_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003FB*4))) #define APC3_CNT2_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003F4*4))) #define APC3_CNT2_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003F5*4))) #define APC3_CNT2_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003F6*4))) #define APC3_CNT2_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003F7*4))) #define APC3_CNT2_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003FC*4))) #define APC3_CNT2_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003FD*4))) #define APC3_CNT2_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003FE*4))) #define APC3_CNT2_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC3_CNT2_BASE + 0x003FF*4))) #define APC3_CNT3_TSG_CTRL_CNTCR (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x00000*4))) #define APC3_CNT3_TSG_CTRL_CNTSR (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x00001*4))) #define APC3_CNT3_TSG_CTRL_CNTCVL (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x00002*4))) #define APC3_CNT3_TSG_CTRL_CNTCVU (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x00003*4))) #define APC3_CNT3_TSG_CTRL_CNTFID0 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x00008*4))) #define APC3_CNT3_TSG_READ_CNTCVL (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x00000*4))) #define APC3_CNT3_TSG_READ_CNTCVU (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x00001*4))) #define APC3_CNT3_CSR_PERIPH_ID_0 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003F8*4))) #define APC3_CNT3_CSR_PERIPH_ID_1 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003F9*4))) #define APC3_CNT3_CSR_PERIPH_ID_2 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003FA*4))) #define APC3_CNT3_CSR_PERIPH_ID_3 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003FB*4))) #define APC3_CNT3_CSR_PERIPH_ID_4 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003F4*4))) #define APC3_CNT3_CSR_PERIPH_ID_5 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003F5*4))) #define APC3_CNT3_CSR_PERIPH_ID_6 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003F6*4))) #define APC3_CNT3_CSR_PERIPH_ID_7 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003F7*4))) #define APC3_CNT3_CSR_COMP_ID_0 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003FC*4))) #define APC3_CNT3_CSR_COMP_ID_1 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003FD*4))) #define APC3_CNT3_CSR_COMP_ID_2 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003FE*4))) #define APC3_CNT3_CSR_COMP_ID_3 (*((volatile uint32_t *)(APC3_CNT3_BASE + 0x003FF*4))) #define APC3_SUBCTRL_REG0 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00000))) #define APC3_SUBCTRL_REG1 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00004))) #define APC3_SUBCTRL_REG2 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00008))) #define APC3_SUBCTRL_REG3 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x0000C))) #define APC3_SUBCTRL_REG4 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00010))) #define APC3_SUBCTRL_REG5 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00014))) #define APC3_SUBCTRL_REG6 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00018))) #define APC3_SUBCTRL_REG7 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x0001C))) #define APC3_SUBCTRL_REG8 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00020))) #define APC3_SUBCTRL_REG9 (*((volatile uint32_t *)(APC3_SUBCTRL_BASE + 0x00024))) #endif // __APCS_H__