//******************** (C) COPYRIGHT 2020 SmartLogic******************************* // FileName : ecpri.h // Author : xiakang, kang.xia@smartlogictech.com // Date First Issued : 2020-05-08 07:44:13 AM // Last Modified : 2022-06-29 03:07:56 AM // Description : // ------------------------------------------------------------ // Modification History: // Version Date Author Modification Description // //********************************************************************************** #ifndef __ECPRI_C_H__ #define __ECPRI_C_H__ #include "typedef.h" #define ECPRI_TIME_BASE 0x08352000 #define ECPRI_MANTICORE 0x08342000 #define ECPRI_MANTICORE_SWITCH 0x08342000 #define ECPRI_MANTICORE_SWITCH_MACTCH 0x08342000 + 0x200 #define ECPRI_MANTICORE_SWITCH_PORT0 0x08342000 + 0x500 + 0x200*0 #define ECPRI_MANTICORE_SWITCH_PORT1 0x08342000 + 0x500 + 0x200*1 #define ECPRI_MANTICORE_SWITCH_PORT2 0x08342000 + 0x500 + 0x200*2 #define ECPRI_MANTICORE_MAC 0x08342000 + 0X2000 #define ECPRI_MANTICORE_PCS 0x08342000 + 0X2800 #define ECPRI_MANTICORE_PCS_TSU 0x08342000 + 0X2800 + 0x400 //Ecpri TX LUT #define CMH_BASE 0x08320000 #define SCTH_BASE 0x08322000 #define EXTH_BASE 0x08323000 #define PCID_BASE 0x08324000 #define FMAP_BASE 0x08325000 #define FARC_BASE 0x08326000 #define SRL_CMH_BASE 0x08327000 #define SRL_SCTH_BASE 0x08328000 #define SRL_EXTH_BASE 0x08329000 #define ETH_BASE 0x0832a000 #define IPH_BASE 0x0832b000 #define UDP_BASE 0x0832c000 #define TXW_BASE 0x08337000 #define CPL_BASE 0x08338000 //Ecpri RX LUT #define MNS0_BASE 0x0832D000 #define AMP0_BASE 0x0832E000 #define WID0_BASE 0x08330000 #define METH0_BASE 0x08331000 #define MNS1_BASE 0x08332000 #define AMP1_BASE 0x08334000 #define WID1_BASE 0x08333000 #define METH1_BASE 0x08336000 #define SCTM0_BASE 0x08360000 #define SCTM1_BASE 0x08370000 //RPEC Reg #define ROE_REG_BASE 0x0833f000 //ip_run #define ROEC_ENABLE (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x0))) //ROEC TX Reg #define TX_WIN_PARAMETER (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x100))) #define TX_WIN_TIMER_MAXL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x101))) #define TX_WIN_TIMER_MAXH (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x102))) #define ECPRI_PAYLOAD_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x105))) #define TXUP_IP_OPT0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x106))) #define TXUP_IP_OPT1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x107))) #define TXUP_IP_OPT2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x108))) #define TXUP_IP_OPT3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x109))) #define TXUP_IP_OPT4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x10A))) #define TXUP_IP_OPT5 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x10B))) #define TXUP_IP_OPT6 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x10C))) #define TXUP_IP_OPT7 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x10D))) #define TXUP_IP_OPT8 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x10E))) #define TXUP_IP_OPT9 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x10F))) #define TXUP_IP_OPT_WREQ (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x110))) #define TXCP_IP_OPT0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x111))) #define TXCP_IP_OPT1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x112))) #define TXCP_IP_OPT2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x113))) #define TXCP_IP_OPT3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x114))) #define TXCP_IP_OPT4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x115))) #define TXCP_IP_OPT5 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x116))) #define TXCP_IP_OPT6 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x117))) #define TXCP_IP_OPT7 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x118))) #define TXCP_IP_OPT8 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x119))) #define TXCP_IP_OPT9 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x11A))) #define TXCP_IP_OPT_WREQ (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x11B))) #define TX_LOOP_STRUCTURE0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x11C))) #define TX_LOOP_STRUCTURE1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x11D))) #define TX_LOOP_STRUCTURE2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x11E))) #define TX_LOOP_STRUCTURE3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x11F))) #define TX_LOOP_STRUCTURE4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x120))) #define TX_LOOP_STRUCTURE5 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x121))) #define TX_LOOP_STRUCTURE6 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x122))) #define TX_LOOP_STRUCTURE7 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x123))) #define TX_LOOP_STRUCTURE8 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x124))) #define TX_LOOP_STRUCTURE9 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x125))) #define TX_LOOP_STRUCTURE10 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x126))) #define TX_LOOP_STRUCTURE11 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x127))) #define TX_LOOP_STRUCTURE12 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x128))) #define TX_LOOP_STRUCTURE13 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x129))) #define TX_LOOP_STRUCTURE14 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x12A))) #define TX_LOOP_STRUCTURE15 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x12B))) #define TX_LOOP_STRUCTURE_WREQ (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x12C))) #define TX_LB_MODE (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x12D))) #define TX_IPH_ID_CLR0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x12E))) #define TX_IPH_ID_CLR1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x12F))) #define TX_ETH_FRAME_FORMAT (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x130))) #define TX_IPH_SW_ID0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x131))) #define TX_IPH_SW_ID1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x132))) #define TX_IPH_SW_ID2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x133))) #define TX_IPH_SW_ID3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x134))) #define TX_IPH_SW_ID4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x135))) #define TX_IPH_SW_ID5 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x136))) #define TX_IPH_SW_ID6 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x137))) #define TX_IPH_SW_ID7 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x138))) #define TX_STAT_TXWIN_NG (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x139))) #define TX_STAT_TXBUF_PUSHED (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x13A))) #define TX_STAT_TXBUF_POPED (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x13B))) #define TX_UP_DPU_STATE (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x13C))) #define TX_UP_PKG_NUM (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x13D))) #define TX_CP_DPU_STAT (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x13E))) #define TX_CP_PKG_NUM (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x13F))) //ROEC RX Reg #define M_UDHDR_CONFIG (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x200))) #define M_EAXCID_CONFIG (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x201))) #define RX_ANTENNA_PORT0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x209))) #define RX_ANTENNA_PORT1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x20A))) #define RX_ANTENNA_PORT2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x20B))) #define RX_ANTENNA_PORT3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x20C))) #define RX_ANTENNA_PORT4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x20D))) #define RX_ANTENNA_PORT5 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x20E))) #define RX_ANTENNA_PORT6 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x20F))) #define RX_ANTENNA_PORT7 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x210))) #define RX_ANTENNA_PORT8 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x211))) #define RX_ANTENNA_PORT9 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x212))) #define RX_ANTENNA_PORT10 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x213))) #define RX_ANTENNA_PORT11 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x214))) #define RX_ANTENNA_PORT12 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x215))) #define RX_ANTENNA_PORT13 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x216))) #define RX_ANTENNA_PORT14 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x217))) #define RX_ANTENNA_PORT15 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x218))) #define RX_ANTENNA_PORT16 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x219))) #define RX_ANTENNA_PORT17 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x21A))) #define RX_ANTENNA_PORT18 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x21B))) #define RX_ANTENNA_PORT19 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x21C))) #define RX_ANTENNA_PORT20 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x21D))) #define RX_ANTENNA_PORT21 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x21E))) #define RX_ANTENNA_PORT22 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x21F))) #define RX_ANTENNA_PORT23 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x220))) #define RX_ANTENNA_PORT24 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x221))) #define RX_ANTENNA_PORT25 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x222))) #define RX_ANTENNA_PORT26 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x223))) #define RX_ANTENNA_PORT27 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x224))) #define RX_ANTENNA_PORT28 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x225))) #define RX_ANTENNA_PORT29 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x226))) #define RX_ANTENNA_PORT30 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x227))) #define RX_ANTENNA_PORT31 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x228))) #define RX_ANTENNA_PORT_WREQ (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x229))) #define RX_ECPRITYPE0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x22A))) #define RX_ECPRITYPE1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x22B))) #define RX_ECPRITYPE2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x22C))) #define RX_ECPRITYPE3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x22D))) #define RX_ECPRITYPE4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x22E))) #define RX_ECPRITYPE5 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x22F))) #define RX_ECPRITYPE6 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x230))) #define RX_ECPRITYPE7 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x231))) #define RX_ECPRITYPE8 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x232))) #define RX_ECPRITYPE9 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x233))) #define RX_ECPRITYPE10 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x234))) #define RX_ECPRITYPE11 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x235))) #define RX_ECPRITYPE12 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x236))) #define RX_ECPRITYPE13 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x237))) #define RX_ECPRITYPE14 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x238))) #define RX_ECPRITYPE15 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x239))) #define RX_ECPRITYPE16 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x23A))) #define RX_ECPRITYPE17 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x23B))) #define RX_ECPRITYPE18 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x23C))) #define RX_ECPRITYPE19 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x23D))) #define RX_ECPRITYPE20 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x23E))) #define RX_ECPRITYPE21 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x23F))) #define RX_ECPRITYPE22 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x240))) #define RX_ECPRITYPE23 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x241))) #define RX_ECPRITYPE24 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x242))) #define RX_ECPRITYPE25 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x243))) #define RX_ECPRITYPE26 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x244))) #define RX_ECPRITYPE27 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x245))) #define RX_ECPRITYPE28 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x246))) #define RX_ECPRITYPE29 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x247))) #define RX_ECPRITYPE30 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x248))) #define RX_ECPRITYPE31 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x249))) #define RX_ECPRITYPE_ADDSECTION0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x24A))) #define RX_ECPRITYPE_ADDSECTION1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x24B))) #define RX_ECPRITYPE_WREQ (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x24C))) #define RX_ECPRIMSG0_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x24D))) #define RX_ECPRIMSG1_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x24E))) #define RX_ECPRIMSG2_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x24F))) #define RX_ECPRIMSG3_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x250))) #define RX_ORANTYPE0_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x251))) #define RX_ORANTYPE1_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x252))) #define RX_ORANTYPE2_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x253))) #define RX_ORANTYPE3_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x254))) #define RX_ECPRICON0_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x255))) #define RX_ECPRICON1_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x256))) #define RX_ECPRICON2_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x257))) #define RX_ECPRICON3_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x258))) #define RX_ECPRIE0_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x259))) #define RX_ECPRIE1_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x25A))) #define RX_ECPRIE2_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x25B))) #define RX_ECPRIE3_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x25C))) #define RX_PCID0_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x25D))) #define RX_PCID1_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x25E))) #define RX_PCID2_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x25F))) #define RX_PCID3_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x260))) #define RX_PAYLOADSIZE0_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x261))) #define RX_PAYLOADSIZE1_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x262))) #define RX_PAYLOADSIZE2_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x263))) #define RX_PAYLOADSIZE3_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x264))) #define RX_EXTENSCTION_LENTH0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x265))) #define RX_EXTENSCTION_LENTH1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x266))) #define RX_EXTENSCTION_LENTH2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x267))) #define RX_EXTENSCTION_LENTH3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x268))) #define RX_EXTENSCTION_LENTH_WREQ (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x269))) #define RX_FILTER0_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x26A))) #define RX_FILTER1_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x26B))) #define RX_FILTER2_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x26C))) #define RX_FILTER3_LOCAL (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x26D))) #define DESC_BEGIN_ADDR_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x277))) #define DESC_TAIL_ADDR_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x278))) #define DESC_END_ADDR_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x279))) #define DESC_START_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x27A))) #define RX_DESC_INTR_CTRL_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x27B))) #define DESC_SHIFT_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x27C))) #define DESC_BEGIN_ADDR_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x27D))) #define DESC_TAIL_ADDR_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x27E))) #define DESC_END_ADDR_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x27F))) #define DESC_START_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x280))) #define RX_DESC_INTR_CTRL_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x281))) #define DESC_SHIFT_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x282))) #define DESC_BEGIN_ADDR_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x283))) #define DESC_TAIL_ADDR_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x284))) #define DESC_END_ADDR_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x285))) #define DESC_START_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x286))) #define RX_DESC_INTR_CTRL_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x287))) #define DESC_SHIFT_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x288))) #define DESC_PTR_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x289))) #define DESC_PTR_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x28A))) #define DESC_PTR_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x28B))) #define DESC_PTR_CNT_0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x28C))) #define DESC_PTR_CNT_1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x28D))) #define DESC_PTR_CNT_2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x28E))) #define RX_SCTM_METHPARA (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x28F))) #define RX_FRAME_CFG (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x290))) #define RX_MIXPCID0 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x292))) #define RX_MIXPCID1 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x293))) #define RX_MIXPCID2 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x294))) #define RX_MIXPCID3 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x295))) #define RX_MIXPCID4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x296))) #define RX_MIXPCID5 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x297))) #define RX_MIXPCID6 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x298))) #define RX_MIXPCID7 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x299))) #define RX_MIXPCID8 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x29A))) #define RX_MIXPCID9 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x29B))) #define RX_MIXPCID10 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x29C))) #define RX_MIXPCID11 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x29D))) #define RX_MIXPCID12 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x29E))) #define RX_MIXPCID13 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x29F))) #define RX_MIXPCID14 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A0))) #define RX_MIXPCID15 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A1))) #define RX_MIXPCID16 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A2))) #define RX_MIXPCID17 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A3))) #define RX_MIXPCID18 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A4))) #define RX_MIXPCID19 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A5))) #define RX_MIXPCID20 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A6))) #define RX_MIXPCID21 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A7))) #define RX_MIXPCID22 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A8))) #define RX_MIXPCID23 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2A9))) #define RX_MIXPCID24 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2AA))) #define RX_MIXPCID25 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2AB))) #define RX_MIXPCID26 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2AC))) #define RX_MIXPCID27 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2AD))) #define RX_MIXPCID28 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2AE))) #define RX_MIXPCID29 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2AF))) #define RX_MIXPCID30 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B0))) #define RX_MIXPCID31 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B1))) #define RX_STAT_FRM_DROP (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B2))) #define RX_STAT_FRM_FWD (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B3))) #define RX_STAT_JUDGE_MAX (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B4))) #define RX_FRM_FSM_DBG (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B5))) #define RX_NBYPS_PKG_NUM (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B6))) #define RX_NPARSE_PKG_NUM (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B7))) #define RX_EPARSE_PKG_NUM (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B8))) #define NOR_DBG_MONITOR (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2B9))) #define NOR_ERR_ECPRI_RX_AXI4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2BA))) #define EXT_DBG_MONITOR (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2BB))) #define EXT_ERR_ECPRI_RX_AXI4 (*((volatile uint32_t *)(ROE_REG_BASE + 4*0x2BC))) #define MC_SWITCH_IP_ID (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH + 0x0 ))) #define MC_SWITCH_IP_VERSION (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH + 0x4 ))) #define MC_SWITCH_IP_CONFIG (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH + 0x8 ))) #define MC_SWITCH_IP_CAPABILITIES (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH + 0xC ))) #define MC_SWITCH_TSN_CAPABILITIES (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH + 0x10))) #define MC_SWITCH_SOFT_RESET (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH + 0x14))) #define MC_SWITCH_OP_CTRL (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x0 ))) #define MC_SWITCH_PORT_MASK_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x4 ))) #define MC_SWITCH_PORT_MASK_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x8 ))) #define MC_SWITCH_FDB_MAC_INSERT_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0xC ))) #define MC_SWITCH_FDB_MAC_INSERT_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x10))) #define MC_SWITCH_VLAN_ID (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x14))) #define MC_SWITCH_CFG_MAE (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x18))) #define MC_SWITCH_FLOOD_MASK_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x1C))) #define MC_SWITCH_FLOOD_MASK_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x20))) #define MC_SWITCH_STAT_STATIC_EVICT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x24))) #define MC_SWITCH_STAT_AUTO_EVICT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_MACTCH + 0x28))) #define MC_SWITCH_PORT0_INFO (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x0 ))) #define MC_SWITCH_PORT0_CFG_PORT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x4 ))) #define MC_SWITCH_PORT0_CFG_VLAN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x8 ))) #define MC_SWITCH_PORT0_CFG_QINQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0xC ))) #define MC_SWITCH_PORT0_PCP_REGEN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x10 ))) #define MC_SWITCH_PORT0_CFG_WRED_GREEN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x14 ))) #define MC_SWITCH_PORT0_CFG_WRED_YELLOW (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x34 ))) #define MC_SWITCH_PORT0_CFG_PFC (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x54 ))) #define MC_SWITCH_PORT0_STAT_PKT_FLTR_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x58 ))) #define MC_SWITCH_PORT0_STAT_BYTES_FLTR_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x5C ))) #define MC_SWITCH_PORT0_STAT_DROP_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x60 ))) #define MC_SWITCH_PORT0_STAT_PKT_VOQ_NQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x64 ))) #define MC_SWITCH_PORT0_STAT_PKT_VOQ_DQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x84 ))) #define MC_SWITCH_PORT0_STAT_PKT_VOQ_DROP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0xA4 ))) #define MC_SWITCH_PORT0_STAT_BYTES_VOQ_NQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0xC4 ))) #define MC_SWITCH_PORT0_STAT_BYTES_VOQ_DQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0xE4 ))) #define MC_SWITCH_PORT0_STAT_BYTES_VOQ_DROP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x104))) #define MC_SWITCH_PORT0_STAT_UCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x124))) #define MC_SWITCH_PORT0_STAT_UCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x128))) #define MC_SWITCH_PORT0_STAT_UCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x12C))) #define MC_SWITCH_PORT0_STAT_UCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x130))) #define MC_SWITCH_PORT0_STAT_MCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x134))) #define MC_SWITCH_PORT0_STAT_MCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x138))) #define MC_SWITCH_PORT0_STAT_MCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x13C))) #define MC_SWITCH_PORT0_STAT_MCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x140))) #define MC_SWITCH_PORT0_STAT_BCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x144))) #define MC_SWITCH_PORT0_STAT_BCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x148))) #define MC_SWITCH_PORT0_STAT_BCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x14C))) #define MC_SWITCH_PORT0_STAT_BCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x150))) #define MC_SWITCH_PORT0_TRAP_ETHERTYPE_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x154))) #define MC_SWITCH_PORT0_TRAP_ETHERTYPE_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x158))) #define MC_SWITCH_PORT0_TRAP_VLAN_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x15C))) #define MC_SWITCH_PORT0_TRAP_VLAN_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x160))) #define MC_SWITCH_PORT0_TRAP_ECPRI (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x164))) #define MC_SWITCH_PORT0_PCP2IPV (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x168))) #define MC_SWITCH_PORT0_CFG_TRAP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x16C))) #define MC_SWITCH_PORT0_LABEL_FORWARDING_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x170))) #define MC_SWITCH_PORT0_LABEL_FORWARDING_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x174))) #define MC_SWITCH_PORT0_UDP_PORT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x178))) #define MC_SWITCH_PORT0_PORT_MAC_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x17C))) #define MC_SWITCH_PORT0_PORT_MAC_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x180))) #define MC_SWITCH_PORT0_STAT_PKT_BUF_OVFL (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x184))) #define MC_SWITCH_PORT0_STAT_BYTES_BUF_OVFL (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x188))) #define MC_SWITCH_PORT0_STAT_PKT_ERR (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x18C))) #define MC_SWITCH_PORT0_STAT_BYTES_ERR (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT0 + 0x190))) #define MC_SWITCH_PORT1_INFO (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x0 ))) #define MC_SWITCH_PORT1_CFG_PORT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x4 ))) #define MC_SWITCH_PORT1_CFG_VLAN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x8 ))) #define MC_SWITCH_PORT1_CFG_QINQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0xC ))) #define MC_SWITCH_PORT1_PCP_REGEN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x10 ))) #define MC_SWITCH_PORT1_CFG_WRED_GREEN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x14 ))) #define MC_SWITCH_PORT1_CFG_WRED_YELLOW (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x34 ))) #define MC_SWITCH_PORT1_CFG_PFC (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x54 ))) #define MC_SWITCH_PORT1_STAT_PKT_FLTR_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x58 ))) #define MC_SWITCH_PORT1_STAT_BYTES_FLTR_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x5C ))) #define MC_SWITCH_PORT1_STAT_DROP_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x60 ))) #define MC_SWITCH_PORT1_STAT_PKT_VOQ_NQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x64 ))) #define MC_SWITCH_PORT1_STAT_PKT_VOQ_DQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x84 ))) #define MC_SWITCH_PORT1_STAT_PKT_VOQ_DROP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0xA4 ))) #define MC_SWITCH_PORT1_STAT_BYTES_VOQ_NQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0xC4 ))) #define MC_SWITCH_PORT1_STAT_BYTES_VOQ_DQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0xE4 ))) #define MC_SWITCH_PORT1_STAT_BYTES_VOQ_DROP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x104))) #define MC_SWITCH_PORT1_STAT_UCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x124))) #define MC_SWITCH_PORT1_STAT_UCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x128))) #define MC_SWITCH_PORT1_STAT_UCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x12C))) #define MC_SWITCH_PORT1_STAT_UCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x130))) #define MC_SWITCH_PORT1_STAT_MCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x134))) #define MC_SWITCH_PORT1_STAT_MCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x138))) #define MC_SWITCH_PORT1_STAT_MCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x13C))) #define MC_SWITCH_PORT1_STAT_MCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x140))) #define MC_SWITCH_PORT1_STAT_BCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x144))) #define MC_SWITCH_PORT1_STAT_BCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x148))) #define MC_SWITCH_PORT1_STAT_BCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x14C))) #define MC_SWITCH_PORT1_STAT_BCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x150))) #define MC_SWITCH_PORT1_TRAP_ETHERTYPE_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x154))) #define MC_SWITCH_PORT1_TRAP_ETHERTYPE_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x158))) #define MC_SWITCH_PORT1_TRAP_VLAN_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x15C))) #define MC_SWITCH_PORT1_TRAP_VLAN_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x160))) #define MC_SWITCH_PORT1_TRAP_ECPRI (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x164))) #define MC_SWITCH_PORT1_PCP2IPV (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x168))) #define MC_SWITCH_PORT1_CFG_TRAP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x16C))) #define MC_SWITCH_PORT1_LABEL_FORWARDING_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x170))) #define MC_SWITCH_PORT1_LABEL_FORWARDING_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x174))) #define MC_SWITCH_PORT1_UDP_PORT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x178))) #define MC_SWITCH_PORT1_PORT_MAC_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x17C))) #define MC_SWITCH_PORT1_PORT_MAC_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x180))) #define MC_SWITCH_PORT1_STAT_PKT_BUF_OVFL (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x184))) #define MC_SWITCH_PORT1_STAT_BYTES_BUF_OVFL (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x188))) #define MC_SWITCH_PORT1_STAT_PKT_ERR (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x18C))) #define MC_SWITCH_PORT1_STAT_BYTES_ERR (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT1 + 0x190))) #define MC_SWITCH_PORT2_INFO (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x0 ))) #define MC_SWITCH_PORT2_CFG_PORT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x4 ))) #define MC_SWITCH_PORT2_CFG_VLAN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x8 ))) #define MC_SWITCH_PORT2_CFG_QINQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0xC ))) #define MC_SWITCH_PORT2_PCP_REGEN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x10 ))) #define MC_SWITCH_PORT2_CFG_WRED_GREEN (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x14 ))) #define MC_SWITCH_PORT2_CFG_WRED_YELLOW (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x34 ))) #define MC_SWITCH_PORT2_CFG_PFC (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x54 ))) #define MC_SWITCH_PORT2_STAT_PKT_FLTR_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x58 ))) #define MC_SWITCH_PORT2_STAT_BYTES_FLTR_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x5C ))) #define MC_SWITCH_PORT2_STAT_DROP_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x60 ))) #define MC_SWITCH_PORT2_STAT_PKT_VOQ_NQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x64 ))) #define MC_SWITCH_PORT2_STAT_PKT_VOQ_DQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x84 ))) #define MC_SWITCH_PORT2_STAT_PKT_VOQ_DROP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0xA4 ))) #define MC_SWITCH_PORT2_STAT_BYTES_VOQ_NQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0xC4 ))) #define MC_SWITCH_PORT2_STAT_BYTES_VOQ_DQ (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0xE4 ))) #define MC_SWITCH_PORT2_STAT_BYTES_VOQ_DROP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x104))) #define MC_SWITCH_PORT2_STAT_UCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x124))) #define MC_SWITCH_PORT2_STAT_UCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x128))) #define MC_SWITCH_PORT2_STAT_UCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x12C))) #define MC_SWITCH_PORT2_STAT_UCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x130))) #define MC_SWITCH_PORT2_STAT_MCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x134))) #define MC_SWITCH_PORT2_STAT_MCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x138))) #define MC_SWITCH_PORT2_STAT_MCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x13C))) #define MC_SWITCH_PORT2_STAT_MCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x140))) #define MC_SWITCH_PORT2_STAT_BCAST_PKT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x144))) #define MC_SWITCH_PORT2_STAT_BCAST_PKT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x148))) #define MC_SWITCH_PORT2_STAT_BCAST_BYTES_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x14C))) #define MC_SWITCH_PORT2_STAT_BCAST_BYTES_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x150))) #define MC_SWITCH_PORT2_TRAP_ETHERTYPE_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x154))) #define MC_SWITCH_PORT2_TRAP_ETHERTYPE_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x158))) #define MC_SWITCH_PORT2_TRAP_VLAN_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x15C))) #define MC_SWITCH_PORT2_TRAP_VLAN_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x160))) #define MC_SWITCH_PORT2_TRAP_ECPRI (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x164))) #define MC_SWITCH_PORT2_PCP2IPV (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x168))) #define MC_SWITCH_PORT2_CFG_TRAP (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x16C))) #define MC_SWITCH_PORT2_LABEL_FORWARDING_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x170))) #define MC_SWITCH_PORT2_LABEL_FORWARDING_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x174))) #define MC_SWITCH_PORT2_UDP_PORT (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x178))) #define MC_SWITCH_PORT2_PORT_MAC_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x17C))) #define MC_SWITCH_PORT2_PORT_MAC_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x180))) #define MC_SWITCH_PORT2_STAT_PKT_BUF_OVFL (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x184))) #define MC_SWITCH_PORT2_STAT_BYTES_BUF_OVFL (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x188))) #define MC_SWITCH_PORT2_STAT_PKT_ERR (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x18C))) #define MC_SWITCH_PORT2_STAT_BYTES_ERR (*((volatile uint32_t *)(ECPRI_MANTICORE_SWITCH_PORT2 + 0x190))) #define MC_MAC_ID (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x0 ))) #define MC_MAC_VERSION (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x4 ))) #define MC_MAC_CPB (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x8 ))) #define MC_VLAN_LINK_MODE (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0xC ))) #define MC_VLAN_PCP_CONFIGURATION (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x10 ))) #define MC_VLAN_NATIVE_PRIORITY (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x14 ))) #define MC_MAC_CONTROL (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x18 ))) #define MC_MAXIMUM_FRAME_SIZE (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x1C ))) #define MC_STATISTIC_CONFIGURATION (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x20 ))) #define MC_STAT_LOW_THD_CNT (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x24 ))) #define MC_STAT_MID_THD_CNT (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x28 ))) #define MC_STAT_HIGH_THD_LSB_CNT (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x2C ))) #define MC_STAT_HIGH_THD_MSB_CNT (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x30 ))) #define MC_STAT_IRQ_ENA (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x34 ))) #define MC_STAT_LOW_THD_IRQ_STS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x38 ))) #define MC_STAT_MID_THD_IRQ_STS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x3C ))) #define MC_STAT_HIGH_THD_IRQ_STS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x40 ))) #define MC_STAT_LOW_THD_SAT_STS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x44 ))) #define MC_STAT_MID_THD_SAT_STS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x48 ))) #define MC_STAT_HIGH_THD_SAT_STS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x4C ))) #define MC_STAT_MST_IRQ_STS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x50 ))) #define MC_STAT_TOT_RX_64B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x100))) #define MC_STAT_TOT_RX_65B_127B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x104))) #define MC_STAT_TOT_RX_128B_255B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x108))) #define MC_STAT_TOT_RX_256B_511B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x10C))) #define MC_STAT_TOT_RX_512B_1023B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x110))) #define MC_STAT_TOT_RX_1024B_1518B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x114))) #define MC_STAT_TOT_RX_1024B_1519B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x118))) #define MC_STAT_TOT_RX_UNDERSIZE_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x11C))) #define MC_STAT_TOT_RX_OVERSIZE_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x120))) #define MC_STAT_TOT_RX_IN_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x124))) #define MC_STAT_TOT_RX_IN_LSB_BYTES (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x128))) #define MC_STAT_TOT_RX_IN_MSB_BYTES (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x12C))) #define MC_STAT_RX_BAD_CRC_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x130))) #define MC_STAT_TOT_RX_TAG_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x134))) #define MC_STAT_TOT_RX_DMAC_FLTRD_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x138))) #define MC_STAT_TOT_RX_UC_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x13C))) #define MC_STAT_TOT_RX_MC_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x140))) #define MC_STAT_TOT_RX_BC_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x144))) #define MC_MAC_RX_FILTER_DMAC_0_0 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x148))) #define MC_MAC_RX_FILTER_DMAC_0_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x14C))) #define MC_MAC_RX_FILTER_DMAC_1_0 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x150))) #define MC_MAC_RX_FILTER_DMAC_1_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x154))) #define MC_MAC_RX_FILTER_DMAC_2_0 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x158))) #define MC_MAC_RX_FILTER_DMAC_2_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x15C))) #define MC_MAC_RX_FILTER_DMAC_3_0 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x160))) #define MC_MAC_RX_FILTER_DMAC_3_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x164))) #define MC_MAC_RX_FILTER_DMAC_4_0 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x168))) #define MC_MAC_RX_FILTER_DMAC_4_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x16C))) #define MC_MAC_RX_FILTER_DMAC_5_0 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x170))) #define MC_MAC_RX_FILTER_DMAC_5_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x174))) #define MC_STAT_TOT_RX_DISCARD_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x178))) #define MC_STAT_TOT_RX_OVRFLW_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x17C))) #define MC_STAT_TOT_TX_64B_PKTS_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x200))) #define MC_STAT_TOT_TX_65B_127B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x204))) #define MC_STAT_TOT_TX_128B_255B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x208))) #define MC_STAT_TOT_TX_256B_511B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x20C))) #define MC_STAT_TOT_TX_512B_1023B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x210))) #define MC_STAT_TOT_TX_1024B_1518B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x214))) #define MC_STAT_TOT_TX_1024B_1519B_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x218))) #define MC_STAT_TOT_TX_UNDERSIZE_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x21C))) #define MC_STAT_TOT_TX_OVERSIZE_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x220))) #define MC_STAT_TOT_TX_OUT_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x224))) #define MC_STAT_TOT_TX_OUT_LSB_BYTES (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x228))) #define MC_STAT_TOT_TX_OUT_MSB_BYTES (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x22C))) #define MC_STAT_TOT_TX_TAG_PKTS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x234))) #define MC_REG_MDIO_STATUS (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x300))) #define MC_REG_MDIO_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x304))) #define MC_REG_MDIO_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_MAC + 0x308))) #define MC_PCS_CONTROL_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x0 ))) #define MC_PCS_STATUS_1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x4 ))) #define MC_PCS_DEV_ID1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x8 ))) #define MC_PCS_DEV_ID2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xC ))) #define MC_PCS_SPEED_ABLT (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x10 ))) #define MC_PCS_DEV_PKG1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x14 ))) #define MC_PCS_DEV_PKG2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x18 ))) #define MC_PCS_CONTROL_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x1C ))) #define MC_PCS_STATUS_2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x20 ))) #define MC_PCS_STATUS_3 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x24 ))) #define MC_PCS_PKG_ID1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x38 ))) #define MC_PCS_PKG_ID2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x3C ))) #define MC_PCS_EEE_CC1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x50 ))) #define MC_PCS_EEE_CC2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x54 ))) #define MC_PCS_EEE_WEC (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x58 ))) #define MC_PCS_MLTBASER_STATUS1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x80 ))) #define MC_PCS_MLTBASER_STATUS4 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x84 ))) #define MC_PCS_SEED_A0 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x88 ))) #define MC_PCS_SEED_A1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x8C ))) #define MC_PCS_SEED_A2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x90 ))) #define MC_PCS_SEED_A3 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x94 ))) #define MC_PCS_SEED_B0 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x98 ))) #define MC_PCS_SEED_B1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x9C ))) #define MC_PCS_SEED_B2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xA0 ))) #define MC_PCS_SEED_B3 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xA4 ))) #define MC_PCS_TEST_CTRL (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xA8 ))) #define MC_PCS_ERROR_CNT (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xAC ))) #define MC_GENERAL_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xB8 ))) #define MC_GENERAL_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xBC ))) #define MC_CFG_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xC0 ))) #define MC_CFG_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xC4 ))) #define MC_BUF_STAT_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xC8 ))) #define MC_BUF_STAT_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xCC ))) #define MC_DELAY_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xD0 ))) #define MC_DISP_ERRORS (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xD4 ))) #define MC_CODE_ERRORS (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xD8 ))) #define MC_CPCS_SHCV (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xDC ))) #define MC_ANEG_CTRL (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xE8 ))) #define MC_ANEG_ADV (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xEC ))) #define MC_ANEG_NP (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xF0 ))) #define MC_ANEG_LP_ADV (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xF4 ))) #define MC_ANEG_LP_NP (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xF8 ))) #define MC_BER_TIMER_END (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0xFC ))) #define MC_SH_DELAY_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x100))) #define MC_SH_DELAY_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x104))) #define MC_SH_GB_POS_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x108))) #define MC_SH_GB_POS_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x10C))) #define MC_SCCFEC_ABILITY (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2A8))) #define MC_SCCFEC_CTRL (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2AC))) #define MC_SCCFEC_COR_BLKS1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2B0))) #define MC_SCCFEC_COR_BLKS2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2B4))) #define MC_SCCFEC_UNCOR_BLKS1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2B8))) #define MC_SCCFEC_UNCOR_BLKS2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2BC))) #define MC_SCCFEC_ERR_CNT1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2C0))) #define MC_SCCFEC_ERR_CNT2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x2C4))) #define MC_RSFEC_CTRL (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x320))) #define MC_RSFEC_STATUS (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x324))) #define MC_RSFEC_COR_CW1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x328))) #define MC_RSFEC_COR_CW2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x32C))) #define MC_RSFEC_UNCOR_CW1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x330))) #define MC_RSFEC_UNCOR_CW2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x334))) #define MC_RSFEC_SYM_ERR1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x348))) #define MC_RSFEC_SYM_ERR2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS + 0x34C))) #define MC_TSU_RX_READ_TIMESTAMP (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x0 ))) #define MC_TSU_RX_TIMESTAMP0 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x4 ))) #define MC_TSU_RX_TIMESTAMP1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x8 ))) #define MC_TSU_RX_TIMESTAMP2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0xC ))) #define MC_TSU_RX_TIMESTAMP3 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x10))) #define MC_TSU_RX_TIMESTAMP_BUFFER_EMPTY (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x14))) #define MC_TSU_TX_READ_TIMESTAMP (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x18))) #define MC_TSU_TX_TIMESTAMP0 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x1C))) #define MC_TSU_TX_TIMESTAMP1 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x20))) #define MC_TSU_TX_TIMESTAMP2 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x24))) #define MC_TSU_TX_TIMESTAMP3 (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x28))) #define MC_TSU_TX_TIMESTAMP_BUFFER_EMPTY (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x2C))) #define MC_TSU_PTP_IN_BAND_CONFIG (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x30))) #define MC_TSU_ECPRI_IN_BAND_CONFIG (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x34))) #define MC_TSU_TIMESTAMPING_MODE (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x38))) #define MC_TSU_STATIC_PHY_DELAY_RX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x3C))) #define MC_TSU_STATIC_PHY_DELAY_TX (*((volatile uint32_t *)(ECPRI_MANTICORE_PCS_TSU + 0x40))) #endif