#include "typedef.h"


#include "cpri_csu.h"
#include "hw_cpri.h"
#include "cpri_driver.h"
#include "ucp_utility.h"
#include "ucp_printf.h"
#include "cpri_timer.h"
#include "HeaderRam.h"

#ifdef TEST_ENABLE
#include "cpri_test.h"
#endif

uint32_t HeaderTxtimes = 0;
volatile uint32_t gVendorFlag;


void Cpri_Header_Tx(void)
{
	//uint32_t Txdata[16] ={0};
	uint32_t Txdata[48] ={0};//NS=8~19,each BF only bit[31:0]

	uint32_t j= 0;
	uint32_t  CurrentHfnCnt =0;
	if(NR4T4R_7DS2U == gVendorFlag)
	{
	CurrentHfnCnt = UCP_API_CPRI_GetTxHfnCnt();

	HeaderTxtimes++;

	if((CurrentHfnCnt ==HeaderTxHFN0) || ( CurrentHfnCnt == (HeaderTxHFN0-1)))
	{
		HeaderRam_ins_disable();
	#if 0
		memcpy_ucp((uint32_t*)Txdata,(uint32_t*)(HeaderTxDataAddr0 + ((HeaderTxtimes%2)*64)), 64);//NS=3
		for(j=0;j<4;j++)
		{
			HeaderRam_Tx(3+64*j,0,Txdata[j*4],0xF);//vendor
			HeaderRam_Tx(3+64*j,1,Txdata[1+j*4],0xF);//vendor
			HeaderRam_Tx(3+64*j,2,Txdata[2+j*4],0xF);//vendor
			HeaderRam_Tx(3+64*j,3,Txdata[3+j*4],0xF);//vendor

		}
	#endif

		memcpy_ucp((uint32_t*)Txdata,(uint32_t*)(HeaderTxDataAddr0 + ((HeaderTxtimes%2)*48*4)), 48*4);//NS=8~19
		for(j=0;j<4;j++)
		{
			HeaderRam_Tx(8+64*j, 0,Txdata[j*12],   0xF);//vendor
			HeaderRam_Tx(9+64*j, 0,Txdata[1+j*12], 0xF);//vendor
			HeaderRam_Tx(10+64*j,0,Txdata[2+j*12], 0xF);//vendor
			HeaderRam_Tx(11+64*j,0,Txdata[3+j*12], 0xF);//vendor
			HeaderRam_Tx(12+64*j,0,Txdata[4+j*12], 0xF);//vendor
			HeaderRam_Tx(13+64*j,0,Txdata[5+j*12], 0xF);//vendor
			HeaderRam_Tx(14+64*j,0,Txdata[6+j*12], 0xF);//vendor
			HeaderRam_Tx(15+64*j,0,Txdata[7+j*12], 0xF);//vendor
			HeaderRam_Tx(16+64*j,0,Txdata[8+j*12], 0xF);//vendor
			HeaderRam_Tx(17+64*j,0,Txdata[9+j*12], 0xF);//vendor
			HeaderRam_Tx(18+64*j,0,Txdata[10+j*12],0xF);//vendor
			HeaderRam_Tx(19+64*j,0,Txdata[11+j*12],0xF);//vendor

		}

		HeaderRam_ins_enable();

		debug_write((DBG_DDR_IDX_CPRI_BASE+141), do_read_volatile(&AUX_CNT0));
	}
	debug_write((DBG_DDR_IDX_CPRI_BASE+144), CurrentHfnCnt);
	}

}