YB_Platform/public/common/driver/inc/mtimer_com.h

#ifndef _INC_MTIMER_COM_H_
#define _INC_MTIMER_COM_H_

#define APE_NUM                             (8)         //4

#define FIBER_MIN_DELAY						1000	    // ns 
#define CPRI_INT_DELAY						3000        // ns
#define JESD_INT_DELAY						4000	    // ns
#define EDMA_OFFSET							50000	    // ns

#define CPRI_RE_TOFFSET						0 // 100 // 200    // ns  	// Toffset, to be change
#define CPRI_T2A							100 // 1 // 10			// ns
#define CPRI_RNDTRIP_EXCABLE_DELAY_MAX      5000 		// ns 
#define CPRI_RNDCABLE_DELAY_PRECISION		16.276 		// ns, cable delay precision
#define CPRI_TX_SERDES_DELAY				103			// serdes datasheet, table5-1
#define CPRI_RX_SERDES_DELAY				74			// serdes datasheet, table5-3

typedef enum _tagMTmrIntID
{
	MTMR_INT_SLOT_OFFSET = 0,
	MTMR_INT_10ms = 1,
	MTMR_INT_TDD_OFFSET = 2,
	MTMR_INT_RFM0_SLOT,
	MTMR_INT_APE0_SLOT,
	MTMR_INT_APE1_SLOT,
	MTMR_INT_APE2_SLOT,
	MTMR_INT_APE3_SLOT,
	MTMR_INT_APE4_SLOT,
	MTMR_INT_APE5_SLOT,
	MTMR_INT_APE6_SLOT,
	MTMR_INT_APE7_SLOT
}MTmrIntID;

typedef enum _tagMTmrTID
{
	MTMR_10ms_OFFSET = 0,
	MTMR_CSU_CH,
	MTMR_TDD_OFFSET,
	MTMR_TXSLOT_OFFSET,
	MTMR_RXSLOT_OFFSET,
	MTMR_APE0_TXSLOT,		// 5
	MTMR_APE0_RXSLOT,
	MTMR_APE1_TXSLOT,		// 7
	MTMR_APE1_RXSLOT,
	MTMR_APE2_TXSLOT,		// 9
	MTMR_APE2_RXSLOT,
	MTMR_APE3_TXSLOT,		// 11
	MTMR_APE3_RXSLOT,
	MTMR_APE4_TXSLOT,		// 13
	MTMR_APE4_RXSLOT,
	MTMR_APE5_TXSLOT,		// 15
	MTMR_APE5_RXSLOT,
	MTMR_APE6_TXSLOT,		// 17
	MTMR_APE6_RXSLOT,
	MTMR_APE7_TXSLOT,		// 19
	MTMR_APE7_RXSLOT,
	MTMR_RFM0_TXSLOT,		// 21
	MTMR_RFM0_RXSLOT,

	MTMR_JESD_RXON  = 23, 
	MTMR_CSU_INSERT = 24,	// also as MTMR_JESD_RXOFF = 24,
	MTMR_TDD_OFFSET_10000 = 25,
	
	MTMR_TDD_OFFSET_2500 = 26,
	MTMR_TDD_OFFSET_7500 = 27,

	MTMR_JESD_TXOFF  = 28,
	MTMR_JESD_TXON   = 29,
	MTMR_LTE_FAPI = 30,

	MTMR_ECPRI_TX_SYMBOL0 = 32,
	MTMR_ECPRI_TX_SYMBOL1 = 33,
	MTMR_ECPRI_TX_SYMBOL2 = 34,
	MTMR_ECPRI_TX_SYMBOL3 = 35,
	MTMR_ECPRI_TX_SYMBOL4 = 36,
	MTMR_ECPRI_TX_SYMBOL5 = 37,
	MTMR_ECPRI_TX_SYMBOL6 = 38,
	MTMR_ECPRI_TX_SYMBOL7 = 39,
	MTMR_ECPRI_TX_SYMBOL8 = 40,
	MTMR_ECPRI_TX_SYMBOL9 = 41,
	MTMR_ECPRI_TX_SYMBOL10 = 42,
	MTMR_ECPRI_TX_SYMBOL11 = 43,
	MTMR_ECPRI_TX_SYMBOL12 = 44,
	MTMR_ECPRI_TX_SYMBOL13 = 45
}MTmrTID;

typedef enum _tagMTmrCID
{
	MTMR_CEVENT_CNT32L = 0,
	MTMR_CEVENT_CNT16M,
	MTMR_CEVENT_CNT14H,
	MTMR_CEVENT_RXEN2CSU0 = 11,
	MTMR_CEVENT_RXEN2CSU1,
	MTMR_CEVENT_TXEN2CSU0,
	MTMR_CEVENT_TXEN2CSU1,
	MTMR_CEVENT_1PPS = 17
}MTmrCID;

typedef enum
{
	FH_NO_ALARM = 0,
	CPRI_ALARM_LINKSTATUS,
	ALARM_SFN_CAL,
	ALARM_SLOT_CNT,
	CPRI_ALARM_RNDTRIP,
	CPRI_ALARM_CABLE
}FhAlarmStatus;

typedef struct _tagFhAlarmStat
{
	uint32_t 		alarmFlag;
	uint32_t 		alarmSfnCalCnt;
	uint32_t		alarmMeasureCnt;
}stFhAlarmStat;

typedef struct _tagMtimerPointPara{
	int32_t timerPoint;
	uint32_t pointL;
	uint16_t pointM;
	uint16_t pointH;
}stMtimerPointPara;

typedef struct _tagMtimerPara{	
	// timerʱ<72><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
	uint32_t	tmrClk;
	uint32_t	tmrMsPeriod;
	uint32_t	tmrUsPeriod;
	uint32_t	tmr100UsPeriod;
	// timer cfg para
	uint32_t	tempL_max;
	uint32_t	tempM_max;
	uint32_t	tempH_max;
	// scratch count
	uint32_t	tmrScrCnt;
	// phy para
	uint32_t    frameType;
	uint32_t  	scsId;
	uint16_t	runCoreId;
	uint16_t	reCfgFlag;
	uint32_t	slotPeriod;			// slot period, us as unit
	uint32_t	tddPeriod;			// tdd period, us as unit
	uint32_t	tddSlotNum;			// slot num of every tdd period
	uint32_t	slotMaxNum;
	uint32_t	symbolMaxNum;

	stMtimerPointPara 	txCsuOn[2];			// 2.5ms double period
	stMtimerPointPara	txCsuOff[2];
	stMtimerPointPara	rxCsuOn[2];
	stMtimerPointPara	rxCsuOff[2];

	stMtimerPointPara	txRfOn[2];
	stMtimerPointPara	txRfOff[2];
	stMtimerPointPara 	rxRfOn[2];
	stMtimerPointPara	rxRfOff[2];
}stMtimerPara;

typedef struct _tagMtimerIntStat{
	// int cnt
	uint32_t	tmrIntInitFinished;
	uint32_t	tmrIntCnt;
	uint32_t	slotIntCnt;
	uint32_t	tddOffsetIntCnt;
	uint32_t	insOffsetIntCnt;
	uint32_t	sfnIntCnt;
	uint32_t	sfnOffsetIntCnt;
	uint32_t	lteFapiIntCnt;
	uint32_t	pp1sIntCnt;
	uint32_t	csuEnCnt;
	uint32_t	txSlotIntCnt;
	uint32_t	rxSlotIntCnt;
	uint32_t	txSymbolIntCnt;
	// int flag
	uint32_t	sfnOffsetIntFlag;
	// pp1s int cost
	uint32_t    tmrPP1sCost;    // ns
}stMtimerIntStat;

typedef struct _tagMtimerPhyPara{
	// symbol<6F><6C><EFBFBD><EFBFBD>
	uint32_t	symbolMaxNum;
	uint32_t	txSymbolNum;
	// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ϶<CAB1><CFB6><EFBFBD><EFBFBD>
	uint32_t	slotMaxNum;
	uint32_t	slotNumPP1s;
	uint32_t	txSlotNum;
	uint32_t	rxSlotNum;
	uint32_t	txSfnNum;
	uint32_t	rxSfnNum;
	uint64_t	txSlotTiming;
	uint64_t	rxSlotTiming;
}stMtimerPhyPara;

typedef struct _tagMtimerSfnCal{
	int32_t		pp1sLockFlagPre;	// <20><>һ<EFBFBD><D2BB>pp1sʱ<73>̼<EFBFBD>¼<EFBFBD><C2BC>pp1s<31><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
	int32_t		pp1sLockFlag;		// pp1s<31><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>arm<72><6D><EFBFBD><EFBFBD>Ϣ֪ͨ
	uint32_t	sfnCalCnt;			// sfn cnt from arm<72><6D>for sfn calibration of ape
	int32_t		startCalFlag;		// calibration flag
	int32_t		sfnCalFinished;		// calibration flag
	uint32_t	sfnValidFlag;		// sfn valid flag from arm
	uint32_t	sfnFlipFlag;		// sfn flip flag from arm
	uint32_t	sfnFlipFlagPre;
	
	int32_t		sfnCalBeta;
	float		sfnCalAlpha;		
}stMtimerSfnCal;


#endif /* _INC_MTIMER_COM_H_ */