	.section .text.m0, "ax"
	.file	"LDPCEnCoding384PreAsm.m0.asm"
	// DO NOT MODIFY THE CONTENT ABOVE
	.global	LDPCEnCoding384PreAsm
LDPCEnCoding384PreAsm:

	R1:M[0]->BIU1.T0;
	NOP;
	NOP;
	NOP;
	BIU1:Load(T0)(A++) -> M[0](W1)(Mode0);//KI
	BIU1:Load(T0)(A++) -> M[1](W1)(Mode0);//input BG1 H part1
	BIU1:Load(T0)(A++) -> M[2](W1)(Mode0);//input BG1 H part2
	BIU1:Load(T0)(A++) -> M[3](W1)(Mode0);//out [0xBit.shift Byte.shift] part1
	BIU1:Load(T0)(A++) -> M[4](W1)(Mode0);//out [0xBit.shift Byte.shift] part2
	BIU1:Load(T0)(A++) -> M[5](W1)(Mode0);//Zclen
	BIU1:Load(T0)(A++) -> M[6](W1)(Mode0);//Zclen SHU
	BIU1:Load(T0)(A++) -> M[7](W1)(Mode0);//7
	BIU1:Load(T0)(A++) -> M[8](W1)(Mode0);//SHU.T2
	BIU1:Load(T0)(A++) -> M[9](W1)(Mode0) || R5:PreConfig(M[0])(Mode0);//SHU.T3
	R0:M[1] -> BIU0.T0(Mode0) || R5:WriteConf(Mfetch)->KI[0-3](Mode0);
	R0:M[2] -> BIU0.T1(Mode0);
	R2:M[3] -> BIU2.T1(Mode0); //Output
	R3:M[4] -> BIU3.T1(Mode0);
	R0:M[5] -> SHU0.T0(Mode0) || R1:M[5] -> SHU1.T0(Mode0) || R2:M[5] -> SHU2.T0(Mode0) || R3:M[5] -> SHU3.T0(Mode0);
	R0:M[6] -> SHU0.T1(Mode0) || R1:M[6] -> SHU1.T1(Mode0) || R2:M[6] -> SHU2.T1(Mode0) || R3:M[6] -> SHU3.T1(Mode0);
	R0:M[7] -> IMA0.T4(Mode0) || R1:M[7] -> IMA1.T4(Mode0) || R2:M[7] -> IMA2.T4(Mode0) || R3:M[7] -> IMA3.T4(Mode0);
	R0:M[8] -> SHU0.T2(Mode0) || R1:M[8] -> SHU1.T2(Mode0) || R2:M[8] -> SHU2.T2(Mode0) || R3:M[8] -> SHU3.T2(Mode0);
	SHU0:Index(T0,T1) -> IMA0.T1(Mode0) || SHU1:Index(T0,T1) -> IMA1.T1(Mode0) || SHU2:Index(T0,T1) -> IMA2.T1(Mode0) || SHU3:Index(T0,T1) -> IMA3.T1(Mode0);
	R0:M[9] -> SHU0.T3(Mode0) || R1:M[9] -> SHU1.T3(Mode0) || R2:M[9] -> SHU2.T3(Mode0) || R3:M[9] -> SHU3.T3(Mode0);

	BIU0:Wait 0 || BIU1:Wait 0 || IMA0:Wait 10 || SHU0:Wait 16 ||IMA1:Wait 11 || SHU1:Wait 18 || IMA2:Wait 12 || SHU2:Wait 18 || IMA3:Wait 13 || SHU3:Wait 20 || BIU2:Wait 19 || BIU3:Wait 21;

	Mfetch:Lpto %LDPCEncoding384PreAsmCyc @(KI0);

	BIU0:Load(T0)(A++)->IMA0.T0(Mode0) || IMA0:ModAdd(T0,T1)(S)->IMA0.T3(Mode0) || SHU0:Index(T1,T0,T2)->BIU2.T0(Mode0) || IMA1:ModAdd(T0,T1)(S)->IMA1.T3(Mode0) || SHU1:Index(T1,T0,T2)->BIU2.T0(Mode0) || IMA2:ModAdd(T0,T1)(S)->IMA2.T3(Mode0) || SHU2:Index(T1,T0,T2)->BIU3.T0(Mode0) || IMA3:ModAdd(T0,T1)(S)->IMA3.T3(Mode0) || SHU3:Index(T1,T0,T2)->BIU3.T0(Mode0) ||	BIU2:Store(T0,T1)(A++)(Mask)(Mode0) || BIU3:Store(T0,T1)(A++)(Mask)(Mode0);
	BIU0:Load(T0)(A++)->IMA1.T0(Mode0) || IMA0:ModAdd(Ttmp,T1)(S)->IMA0.T3(Mode0) || SHU0:Index(T1,T0,T3)->BIU2.T0(Mode0) || IMA1:ModAdd(Ttmp,T1)(S)->IMA1.T3(Mode0) || SHU1:Index(T1,T0,T3)->BIU2.T0(Mode0) || IMA2:ModAdd(Ttmp,T1)(S)->IMA2.T3(Mode0) || SHU2:Index(T1,T0,T3)->BIU3.T0(Mode0) || IMA3:ModAdd(Ttmp,T1)(S)->IMA3.T3(Mode0) || SHU3:Index(T1,T0,T3)->BIU3.T0(Mode0) ||	BIU2:Store(T0,T1)(A++)(Mask)(Mode0) || BIU3:Store(T0,T1)(A++)(Mask)(Mode0);
	BIU0:Load(T1)(A++)->IMA2.T0(Mode0) || IMA0:ModAdd(Ttmp,T1)(S)->IMA0.T3(Mode0) || IMA1:ModAdd(Ttmp,T1)(S)->IMA1.T3(Mode0) || IMA2:ModAdd(Ttmp,T1)(S)->IMA2.T3(Mode0) || IMA3:ModAdd(Ttmp,T1)(S)->IMA3.T3(Mode0) || BIU2:Store(T0,T1)(A++)(Mask)(Mode0) || BIU3:Store(T0,T1)(A++)(Mask)(Mode0);
	BIU0:Load(T1)(A++)->IMA3.T0(Mode0) ||IMA0:Ttmp>>3(S)->SHU0.T0(Mode0) || IMA1:Ttmp>>3(S)->SHU1.T0(Mode0) || IMA2:Ttmp>>3(S)->SHU2.T0(Mode0)  || IMA3:Ttmp>>3(S)->SHU3.T0(Mode0)|| BIU2:Store(T0,T1)(A++)(Mask)(Mode0) || BIU3:Store(T0,T1)(A++)(Mask)(Mode0);
	IMA0:T3&T4->SHU0.T1(Mode0) || IMA1:T3&T4->SHU1.T1(Mode0) || IMA2:T3&T4->SHU2.T1(Mode0) || IMA3:T3&T4->SHU3.T1(Mode0);

	LDPCEncoding384PreAsmCyc:

	MFetch:REPEAT @(25);

	MFetch:MPU.STOP;
