
#include "receiver_symb_func.h"


void ChannelEqu_Proc(
	uint32_t* param_data_ptr,
    int32_t  *temp_dm0_ptr,
    int32_t  *temp_dm1_ptr,
	int32_t* temp_dm2_ptr,
	int32_t* temp_dm3_ptr

)
{
    //局部变量定义
    int32_t  *cfg_addr = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_FREOFF_CFG_LENGTH + RECEIVER_SYMB_CHANNELEST_CFG_LENGTH;
    int32_t  *lut_addr = receiver_symb_config_dm2_ptr + RECEIVER_SYMB_PilotOrig_LUT1_LENGTH;

    // Temporary input for test
    uint32_t * InputNoise = ((((uint32_t)&temp_dm3_ptr[0] + 4096*2 + 4095)>>12)<<12);
    for(int i=0;i<4096;i++){
    	InputNoise[i] = 0;
    }
    uint32_t res_ptr = CHANNELEQU_DATA_DDR_PTR;             //Store result of Equ

	v16u32 * SVRReg = (v16u32 *)temp_dm1_ptr;
	SVRReg[0] = (v16u32){0, 0, 0, 0,
					0x40, 0, 0, 0,
					0xff00ff, 0, 0, 0x0000,
					0xffff, 0x6, 0, 0};

	// available address space for channelEqu
	uint32_t * available_ptr_dm0 = temp_dm0_ptr;
	uint32_t * available_ptr_dm1 = temp_dm1_ptr + 0x1000;
	uint32_t * available_ptr_dm2 = temp_dm2_ptr;
	uint32_t * available_ptr_dm3 = InputNoise + 0x1000;


	// Configuration
    uint32_t *CfgFft4096Int32 = cfg_addr;
    uint32_t *CfgEQ21Part1 = cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH;
    uint32_t *CfgEQ1Part2 = cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH;
    uint32_t *CfgIFFT4096 =  cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH + RECEIVER_SYMB_EQ1Part2_CFG6_1_LENGTH;
    uint32_t *CfgIFFT4096TURN =  cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH + RECEIVER_SYMB_EQ1Part2_CFG6_1_LENGTH + RECEIVER_SYMB_IFFT4096_CFG7_LENGTH;
    uint32_t *CfgIFFT4096AddCP = CfgIFFT4096TURN + RECEIVER_SYMB_IFFT4096_TURN_CFG7_LENGTH;
    // LUT
    uint32_t *Lut_W4096 = lut_addr;
    uint32_t *Lut_EqFactor0 = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH;
    uint32_t *Lut_EqFactor1 = receiver_symb_config_dm3_ptr;
    uint32_t *Lut_EqFactor = receiver_symb_config_dm1_ptr;
    uint32_t *Lut_Zero = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + RECEIVER_SYMB_EqFactor1_LUT4_LENGTH;   //useless
    uint32_t *Lut_phase =  lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + RECEIVER_SYMB_EqFactor1_LUT4_LENGTH + RECEIVER_SYMB_EqFactor_LUT5_LENGTH ;

    // channelEst and data
    uint32_t *InputCHEst_ddr_ptr = (uint32_t *)CHANNELEST_DATA_DDR_PTR;
    uint32_t *InputData_ddr_ptr = (uint32_t *)COMPENSATED_DATA_DDR_PTR;
    ChannelEquImpl(SVRReg,CfgFft4096Int32,CfgEQ21Part1,CfgEQ1Part2,CfgIFFT4096,CfgIFFT4096TURN,CfgIFFT4096AddCP,
    			available_ptr_dm0,
    			available_ptr_dm1,
				available_ptr_dm2 ,
				available_ptr_dm3 ,
				InputCHEst_ddr_ptr,
				InputData_ddr_ptr,
				Lut_Zero,
    			InputNoise,
				Lut_W4096,
				Lut_EqFactor0,
				Lut_EqFactor1,
				Lut_EqFactor,
				Lut_phase,
				res_ptr
    );


}

