.section	.text.m0,"ax",@progbits
	.file	"IFFT4096DataTurnAsm.m0.asm"
	// DO NOT MODIFY THE CONTENT ABOVE

	.global IFFT4096DataTurnAsm

IFFT4096DataTurnAsm:
        R1:M[0]->BIU1.T0;
	    NOP;
	    NOP;
	    NOP;
		BIU1:Load(T0)(A++) -> M[0](Mode0);	//ConfigMFetch
		BIU1:Load(T0)(A++) -> M[1](Mode0);	//BIU0.T0_input
		BIU1:Load(T0)(A++) -> M[2](Mode0);	//BIU1.T0_input
		BIU1:Load(T0)(A++) -> M[3](Mode0);	//BIU2.T2_output
		BIU1:Load(T0)(A++) -> M[4](Mode0);	//BIU3.T2_output
		BIU1:Load(T0)(A++) -> M[5](Mode0);
		BIU1:Load(T0)(A++) -> M[6](Mode0);
	    NOP;
	    NOP;
	    NOP;
		R5:PreConfig(M[0])(Mode0);
		R5:WriteConf(Mfetch)->KI[0-3](Mode0);
		R0:M[1] -> BIU0.T0(Mode0);
		R1:M[2] -> BIU1.T0(Mode0);
		R2:M[3] -> BIU2.T2(Mode0);
		R3:M[4] -> BIU3.T2(Mode0);
		R1:M[5] -> IMA1.T2(Mode0)|| 	R2:M[5] -> IMA2.T2(Mode0) ;
		R0:M[6] -> IMA0.T0(Mode0)|| 	R1:M[6] -> IMA1.T0(Mode0)|| 	R2:M[6] -> IMA2.T0(Mode0)|| 	R3:M[6] -> IMA3.T0(Mode0);
	    NOP;
	    NOP;
	    IMA0: SetShiftMode (T0) -> SHIFTMODE0 (Mode0)|| 	IMA1: SetShiftMode (T0) -> SHIFTMODE0 (Mode0)|| 	IMA2: SetShiftMode (T0) -> SHIFTMODE0 (Mode0)|| 	IMA3: SetShiftMode (T0) -> SHIFTMODE0 (Mode0);
		BIU0:Wait 0  || 	IMA1: Wait 10 || 	BIU2:Wait 15   || 	BIU1:Wait 0  || 	IMA2: Wait 10 || 	BIU3:Wait 15   ;
		MFetch:LPTO %IFFT4096DataTurnAsmCyc0 @(KI0 - 0);	//dm2 cycle
		MFetch:LPTO %IFFT4096DataTurnAsmCyc1 @(KI2 - 0);	//4096 cycle
		BIU0:Load(T0)(A++) -> IMA1.T0(Mode0)|| 	IMA1: 0+T0*T2(SHIFTMODE0)(C) (S) (SSS)(P) -> BIU2.T0 (Mode0)|| 	BIU2:Store(T0,T2)(A++)(Mode0)|| 	BIU1:Load(T0)(A++) -> IMA2.T0(Mode0)|| 	IMA2: 0+T0*T2(SHIFTMODE0) (C)(S) (SSS)(P) -> BIU3.T0 (Mode0)|| 	BIU3:Store(T0,T2)(A++)(Mode0);
		IFFT4096DataTurnAsmCyc1:
		IFFT4096DataTurnAsmCyc0:
		BIU0:Wait 0  || 	BIU1:Wait 0   || 	BIU2:Wait 0   || 	BIU3:Wait 0  || 	IMA0: Wait 0 || 	IMA1: Wait 0 || 	IMA2: Wait 0 || 	IMA3: Wait 0 || 	R0:Wait 0 || 	R1:Wait 0  || 	R2:Wait 0 || 	R3:Wait 0  || 	SHU0:Wait 0 || 	SHU1:Wait 0   || 	SHU2:Wait 0 || 	SHU3:Wait 0  ;
		MFetch:REPEAT @(17);
		MFetch:MPU.STOP;
