
#include "receiver_symb_func.h"
#include "ape_common.h"
#include "log_interface.h"


void FreOff_Proc(
    uint32_t *param_ptr,
    int32_t  *temp_dm0_ptr,
    int32_t  *temp_dm1_ptr,
    int32_t* temp_dm2_ptr,
    int32_t* temp_dm3_ptr
)
{
    //局部变量定义
    int32_t  *cfg_addr;
    uint32_t time_data_ddr_ptr;
    uint32_t time_data_length;
    uint32_t time_data_dm3_ptr = ((((uint32_t)&temp_dm3_ptr[0] + 4095)>>12)<<12);
    uint32_t res_ptr = COMPENSATED_DATA_DDR_PTR;
    uint32_t time0, time1;
    time0 = Time_offset(0);
    // Read Global Buff
    time_data_ddr_ptr = (uint32_t)param_ptr;
    time_data_length = 2048;
    TRACE(TRACE_RECEIVER_SYMB_ADDR, 14, time_data_ddr_ptr);  
    ape_csu_task_lookup(DMA_TAG_G2L, 1);
    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)time_data_ddr_ptr,
                             (uint64_t)DM_TO_CSU_ADDR(time_data_dm3_ptr),
                             time_data_length*4,
                             DMA_TAG_G2L,
                             0);
    ape_csu_task_lookup(DMA_TAG_G2L, 1);
    // Get Configuration
    uint32_t *ConfigAddr_est = receiver_symb_config_dm0_ptr  + g_receiver_symb_table_param.FreOffEst_CFG1_Offset;
    uint32_t *ConfigAddr_comp = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.FreOffComp_CFG2_Offset;
    uint32_t *ConfigAddr_cordic = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.FreOffCordic_CFG3_Offset;
    uint32_t *CfgByteCopy= receiver_symb_config_dm0_ptr  + g_receiver_symb_table_param.ByteCopy_CFG16_Offset;



    // Get CP and Pilot
    uint32_t *InputCPAddr = (uint32_t *)time_data_dm3_ptr;
    uint32_t *InputPilotAddr = temp_dm2_ptr;
    //uint32_t *InputPilotAddr = InputCPAddr + 1024;

	int32_t *freEstOutAddr = (uint32_t *)(temp_dm1_ptr + 0x0020);


    ByteCopy((int)CfgByteCopy, 
              MPU_ADDR(InputCPAddr + 1024),
              MPU_ADDR(InputPilotAddr),
              1024*4);
	SVRReg[0] = MPU_ADDR(CfgByteCopy);
	ByteCopyAsm(SVRReg);

    //TODO:验证后可以优化删除掉
    WAIT_MPU_STOP;


    //20250509
    //ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)receiver_symb_config_dm0_ptr),
    //                                 (uint64_t)0x84c00000,
  	//							     144*4,
    //                                 DMA_TAG_L2G,
    //                                 1);
    //ape_csu_task_lookup(DMA_TAG_L2G, 1);


	freOffEst(ConfigAddr_est, 
              MPU_ADDR(InputCPAddr), 
              MPU_ADDR(InputPilotAddr), 
              MPU_ADDR(freEstOutAddr));
	WAIT_MPU_STOP;
	ape_csu_task_lookup(DMA_TAG_G2L, 1);

	SVRReg[0] = MPU_ADDR(ConfigAddr_est);
   	freOffEstAsm(SVRReg);
	


    WAIT_MPU_STOP;


    time1 = Time_offset(0);
    TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 9, time1-time0);
    time0 = time1;

    // // Low-pass Filter
    // if(storedfreoffestvalue > 600000){
    // 	storedfreoffestvalue = freEstOutAddr[0];
    // }
    // else{
    // 	 storedfreoffestvalue =  0.7*storedfreoffestvalue + 0.3*freEstOutAddr[0];
    // }
    // freEstOutAddr[0] = storedfreoffestvalue;
    LOG_ERROR_S("5 freEstOutAddr[0] =%d\n", freEstOutAddr[0] );

    // TRACE(TRACE_RECEIVER_SYMB_ADDR, 12, freEstOutAddr[0]);   
    // TRACE(TRACE_RECEIVER_SYMB_ADDR, 13, 0xa0870);

    freEstOutAddr[0] = storedfreoffestvalue;

    // Frequency Offset Compensate
    uint32_t *available_ptr_dm2 = temp_dm2_ptr;
    uint32_t *available_ptr_dm3 = temp_dm3_ptr;

	int count = 120;
	freEstOutAddr[0] = freEstOutAddr[0]>>10;
	int increment = freEstOutAddr[0]*128;

	for(int i=0;i<4;i++)
	{

		int res_ptr_offset = i*count*128*4;

		int *input_data_ptr = available_ptr_dm3;
		int *fre_comp_exp_ptr = available_ptr_dm2;
		int *output_data_ptr = freEstOutAddr + 0x1000;
		int time_data_length = count*128;

		
	    cordicSC(ConfigAddr_cordic,
                 MPU_ADDR(freEstOutAddr),
                 MPU_ADDR(fre_comp_exp_ptr),
                 increment,count);
		WAIT_MPU_STOP;
	    SVRReg[0] = MPU_ADDR(ConfigAddr_cordic);
	    cordicSCAsm(SVRReg);

		ape_csu_task_lookup(DMA_TAG_G2L, 1);
	    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)time_data_ddr_ptr + res_ptr_offset,
	                             (uint64_t)DM_TO_CSU_ADDR(input_data_ptr),
	                             time_data_length*4,
	                             DMA_TAG_G2L,
	                             1);
                                 
		WAIT_MPU_STOP;
        //LOG_ERROR_S("6 %d %d %d %d\n", *fre_comp_exp_ptr,*(fre_comp_exp_ptr+1), *(fre_comp_exp_ptr+2), *freEstOutAddr );
	    // TRACE(TRACE_RECEIVER_SYMB_ADDR, 17, *fre_comp_exp_ptr); 
		// TRACE(TRACE_RECEIVER_SYMB_ADDR, 18, *(fre_comp_exp_ptr+1)); 
		// TRACE(TRACE_RECEIVER_SYMB_ADDR, 19, *(fre_comp_exp_ptr+2)); 
		// TRACE(TRACE_RECEIVER_SYMB_ADDR, 20, *freEstOutAddr); 


		freOffComp(ConfigAddr_comp,
                   MPU_ADDR(input_data_ptr),
                   MPU_ADDR(fre_comp_exp_ptr),
                   MPU_ADDR(output_data_ptr));

		ape_csu_task_lookup(DMA_TAG_G2L, 1);
		WAIT_MPU_STOP;
		SVRReg[0] = MPU_ADDR(ConfigAddr_comp);
		freOffCompAsm1(SVRReg);
		WAIT_MPU_STOP;
        //LOG_ERROR_S("7 %d %d %d %d\n", *output_data_ptr,*(output_data_ptr+1), *(output_data_ptr+2), *(output_data_ptr+3) );
		// TRACE(TRACE_RECEIVER_SYMB_ADDR, 21, *output_data_ptr); 
		// TRACE(TRACE_RECEIVER_SYMB_ADDR, 22, *(output_data_ptr+1)); 
		// TRACE(TRACE_RECEIVER_SYMB_ADDR, 23, *(output_data_ptr+2)); 
		// TRACE(TRACE_RECEIVER_SYMB_ADDR, 24, *(output_data_ptr+3)); 

    	ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)output_data_ptr),
                                           (uint64_t)(res_ptr + res_ptr_offset),
                                           time_data_length*4 ,
                                           DMA_TAG_L2G,
                                           1);
	
	}

    time1 = Time_offset(0);
    TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 10, time1-time0);

}


