YB_TX_RX_APE_PRJ/Inc/rfm_interface.h

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2025-03-02 13:41:38 +08:00
#ifndef __RFM_INTERFACE_H__
#define __RFM_INTERFACE_H__
/****************************UCP2.0 Platform start***********************************/
/* 相关头文件 */
#include "err_num.h"
#include "msg_transfer_layer.h"
#define STC_LOCAL_TIME_BASE (0x08568000 + 0x4014)
#define GET_STC_CNT() (LOAD_EX_V_W(STC_LOCAL_TIME_BASE))
/*
delay_us
num
*/
void delay_us(uint32_t num);
/**************************************************/
/* 调试信息输出相关 */
/**************************************************/
/**************************************************/
/*
osp_sendLog
level1
pbufbuf地址osp_msg_head预留
size
*/
void osp_sendLog(int level,char* pbuf, int size);
/*
osp_sendLog_print
level1
pbufbuf地址osp_msg_head预留
size
*/
void osp_sendLog_print(int level,char* pbuf, int size);
/*
ecs_rfm0_shell_callback
port_id UCP port ID
queue_num7
el_ind, buffer index
buf, buffer
remainedLength, buffer长度
handledLength
shell,log功能回调函数arm发过来的消息转发到ape
*/
uint32_t ecs_rfm0_shell_callback(uint32_t port_id,
uint32_t queue_num,
uint32_t el_ind,
const char* buf,
uint32_t remainedLength,
uint32_t* handledLength);
/**************************************************/
/* PORT ID相关 */
/**************************************************/
/*
get_ucp_port_id
port id
*/
uint32_t get_ucp_port_id();
/**************************************************/
/* 核ID相关 */
/**************************************************/
/*
get_core_id
id
*/
uint32_t get_core_id(void);
/**************************************************/
/* 调试信息相关 */
/**************************************************/
/*
osp_printf
fmt
*/
int osp_printf(const char *fmt, ...);
/**************************************************/
/* 初始化接口 */
/**************************************************/
/*
rfm0_drv_init
RFM0模块驱动初始化
*/
void rfm0_drv_init(void);
/*
ecs_rfm0_app_init
RFM0模块应用初始化
*/
void ecs_rfm0_app_init(void);
/**************************************************/
/* 其他接口 */
/**************************************************/
/*
set_tx_slot_intflag
scs: ID号
flag, 1: 0
SM上rfm1负责在中断中置位
*/
void set_tx_slot_intflag(uint8_t scs, int flag);
/*
get_tx_slot_intflag
scs: ID号
*/
int get_tx_slot_intflag(uint8_t scs);
/*
set_rx_slot_intflag
scs: ID号
flag, 1: 0
SM上rfm1负责在中断中置位
*/
void set_rx_slot_intflag(uint8_t scs, int flag);
/*
get_rx_slot_intflag
scs: ID号
*/
int get_rx_slot_intflag(uint8_t scs);
typedef struct phy_timer_config_ind_t
{
uint32_t scsId;
uint32_t runCoreId; // 此次需要建小区的ape core idbitmap方式bit0对应ape0bit1对应ape1。。。
uint16_t bandWidth; //带宽:5M,10M,15M,20M,25M,30M,40M,50M,60M,80M,100M
uint16_t t_period; //timer周期=t_us*num_t, 500us, 625us, 1000us, 1250us, 2500us, 5000us, 10000us, 20000us
uint16_t t_us; //物理层时隙定时长度, 125us, 250us, 500us, 1000us
uint8_t num_t; //timer周期内时隙的个数5,10,20,40,80
uint8_t num_t_per_sfn; //一个SFN内的时隙个数
uint8_t num_t_dl; //下行时隙个数
uint8_t num_t_dl_symb; //时隙内下行符号个数
uint8_t num_t_ul_symb; //时隙内上行符号个数
uint8_t num_ants; //天线个数
}phy_timer_config_ind_t;
/*
cpri_timer_init4buildcell_c0
my_cpritmr
*/
void cpri_timer_init4buildcell_c0(phy_timer_config_ind_t *my_cpritmr);
/*
get_tx_nr_sfn
scs
*/
int get_tx_nr_sfn(uint8_t scs);
/*
get_tx_lte_sfn
*/
int get_tx_lte_sfn();
/*
get_tx_slot
scs
*/
int get_tx_nr_slot(uint8_t scs);
/*
get_tx_subframe
*/
int get_tx_lte_subframe();
/*
get_rx_nr_sfn
scs
*/
int get_rx_nr_sfn(uint8_t scs);
/*
get_rx_nr_sfn
*/
int get_rx_lte_sfn();
/*
get_rx_slot
scs
*/
int get_rx_nr_slot(uint8_t scs);
/*
get_rx_subframe
*/
int get_rx_lte_subframe();
/*
get_tx_nr_slot_cycle
scs
ns
*/
int get_tx_nr_slot_cycle(uint8_t scs);
/*
get_tx_lte_slot_cycle
ns
*/
int get_tx_lte_subframe_cycle();
/*
get_rx_nr_slot_cycle
scs
ns
*/
int get_rx_nr_slot_cycle(uint8_t scs);
/*
get_rx_lte_slot_cycle
ns
*/
int get_rx_lte_subframe_cycle();
/*
get_cpri_delay
*delay: cpri的接收延迟量us
cpri的接收延迟量
*/
void get_cpri_delay(uint32_t* delay);
/*
get_cpri_advance
*advance: cpri的发送提前量us
cpri的发送提前量
*/
void get_cpri_advance(uint32_t* advance);
/**************************************************/
/* ape csu相关 */
/**************************************************/
#define APC_DMA_REG_NUM 16
#define DMA_DIR_L2G 0
#define DMA_DIR_G2L 1
#define DMA_DIR_G2G 1
#define DMA_REG_GROUP0 0
#define DMA_REG_GROUP1 1
#define DMA_REG_GROUP2 2
#define DMA_REG_GROUP3 3
//ape-csu dma chain define
#define MAX_CHAIN_LEN (16)
#define APC_DMA_CHAIN_L2_SIZE_WORD (4)
#define APC_DMA_CHAIN_L1_3D_SIZE_WORD (8)
#define APC_DMA_CHAIN_L1_1D_SIZE_WORD (4)
/* apc-dma chain level2 info */
// word0
// cmdData Low 32bit
#define APC_DMA_CHAIN_L2_CMDDATAL_WORD_OFFSET (0)
#define APC_DMA_CHAIN_L2_CMDDATAL_BIT_OFFSET (0)
// word1
// bit26:24: next node address High 3bit
// bit17:16: base address for level1 chain High 2bit
// bit15:0: number of nodes for level1 chain 16bit
#define APC_DMA_CHAIN_L2_NXTADDRH_L1_BASEADDRH_NUMNODES_WORD_OFFSET (1)
#define APC_DMA_CHAIN_L2_L1_NUMNODES_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L2_L1_BASEADDRH_BIT_OFFSET (16)
#define APC_DMA_CHAIN_L2_NXTADDRH_BIT_OFFSET (24)
// word2
// base address for level1 chain Low 32bit
#define APC_DMA_CHAIN_LEVEL2_L1_BASEADDR_L32_WORD_OFFSET (2)
#define APC_DMA_CHAIN_LEVEL2_L1_BASEADDR_L32_BIT_OFFSET (0)
// word3
// bit31: node address mode 1bit
// bit30:0: next node address Low 31bit
#define APC_DMA_CHAIN_L2_ADDRMODE_NXTADDRL_WORD_OFFSET (3)
#define APC_DMA_CHAIN_L2_NXTADDR_L31_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L2_ADDRMODE_BIT_OFFSET (31)
/* apc-dma chain level1 2-3d info */
// word0
// cmdData Low 32bit
#define APC_DMA_CHAIN_L1_3D_CMDDATAL_WORD_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_CMDDATAL_BIT_OFFSET (0)
// word1
// xAddr Low 32bit
#define APC_DMA_CHAIN_L1_3D_XADDRL_WORD_OFFSET (1)
#define APC_DMA_CHAIN_L1_3D_XADDRL_BIT_OFFSET (0)
// word2
// bit29:16: cmdData High 14bit
// bit15:0: xNum 16bit
#define APC_DMA_CHAIN_L1_3D_CMDDATAH_XNUM_WORD_OFFSET (2)
#define APC_DMA_CHAIN_L1_3D_XNUM_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_CMDDATAH_BIT_OFFSET (16)
// word3
// yStep 32bit
#define APC_DMA_CHAIN_L1_3D_YSTEP_WORD_OFFSET (3)
#define APC_DMA_CHAIN_L1_3D_YSTEP_BIT_OFFSET (0)
// word4
// bit30:28: next node address High 3bit
// bit25:24: xAddr High 2bit
// bit23:20: GRAN
// bit19:16: SIZE
// bit15:0: YNum
#define APC_DMA_CHAIN_L1_3D_NXTADDRH_XADDRH_GRANSIZE_YNUM_WORD_OFFSET (4)
#define APC_DMA_CHAIN_L1_3D_YNUM_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_SIZE_BIT_OFFSET (16)
#define APC_DMA_CHAIN_L1_3D_GRAN_BIT_OFFSET (20)
#define APC_DMA_CHAIN_L1_3D_XADDRH_BIT_OFFSET (24)
#define APC_DMA_CHAIN_L1_3D_NXTADDRH_BIT_OFFSET (28)
// word5
// zStep 32bit
#define APC_DMA_CHAIN_L1_3D_ZSTEP_WORD_OFFSET (5)
#define APC_DMA_CHAIN_L1_3D_ZSTEP_BIT_OFFSET (0)
// word6
// AllNum 32bit (valid field is bit23:0)
#define APC_DMA_CHAIN_L1_3D_ALLNUM_WORD_OFFSET (6)
#define APC_DMA_CHAIN_L1_3D_ALLNUM_BIT_OFFSET (0)
// word7
// bit31: node address mode 1bit
// bit30:0: next node address Low 31bit
#define APC_DMA_CHAIN_L1_3D_ADDRMODE_NXTADDRL_WORD_OFFSET (7)
#define APC_DMA_CHAIN_L1_3D_NXTADDRL_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_3D_ADDRMODE_BIT_OFFSET (31)
/* apc-dma chain level1 1d info */
// word0
// cmdData Low 32bit
#define APC_DMA_CHAIN_L1_1D_CMDDATAL_WORD_OFFSET (0)
#define APC_DMA_CHAIN_L1_1D_CMDDATAL_BIT_OFFSET (0)
// word1
// xAddr Low 32bit
#define APC_DMA_CHAIN_L1_1D_XADDRL_WORD_OFFSET (1)
#define APC_DMA_CHAIN_L1_1D_XADDRL_BIT_OFFSET (0)
// word2
// bit31:30: xAddr High 2bit
// bit29:16: cmdData High 14bit
// bit15:0: AllNum 16bit (MaxBytes 65535)
#define APC_DMA_CHAIN_L1_1D_XADDRH_CMDDATAH_ALLNUM_WORD_OFFSET (2)
#define APC_DMA_CHAIN_L1_1D_ALLNUM_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_1D_CMDDATAH_BIT_OFFSET (16)
#define APC_DMA_CHAIN_L1_1D_XADDRH_BIT_OFFSET (30)
// word3
// bit31: node address mode 1bit
// bit30:0: next node address Low 31bit
#define APC_DMA_CHAIN_L1_1D_ADDRMODE_NXTADDRL_WORD_OFFSET (3)
#define APC_DMA_CHAIN_L1_1D_NXTADDRL_BIT_OFFSET (0)
#define APC_DMA_CHAIN_L1_1D_ADDRMODE_BIT_OFFSET (31)
//-------------------------------------------------------------
//struct define
//-------------------------------------------------------------
// cus dma 寄存器方式,结构体参数
typedef struct _tagCsuDmaReg
{
uint32_t dmaAddrL;
uint32_t dmaAddrH;
uint32_t dmaYStepL;
uint32_t dmaYStepH;
uint32_t dmaZStepL;
uint32_t dmaZStepH;
uint16_t dmaXNum;
uint16_t dmaYNum;
uint32_t dmaAllNum : 24;
uint32_t dmaGran : 4;
uint32_t dmaSize : 4;
}stCsuDmaReg;
typedef struct _tagCsuDmaCmdL
{
uint32_t rCmd : 2; // 0:普通DMA1:一级DMA2:一级DMA并等待ActNum3:二级DMA
uint32_t wCmd : 2;
uint32_t dmaType : 1; // 0:一维1:多维
uint32_t cacheMode : 1; // 0:common mode, 1:cache mode
uint32_t continueNext : 1; // continue the next dma
uint32_t continueLast : 1; // continue the last dma
uint32_t idSrc : 5; // src buffer id
uint32_t idDst : 5; // dst buffer id
uint32_t dmaTag : 5; // tag
uint32_t flush : 1;
uint32_t ecpriEnd : 3;
uint32_t zNumValid : 1;
uint32_t allOrYNum : 2;
uint32_t allNumSel : 1;
uint32_t stall : 1; // stall信号是否在传输之前触发stall中断
}stCsuDmaCmdL;
typedef struct _tagCsuDmaCmdH
{
uint32_t rXNumNextDma : 1; // 读操作完成一个XNum后换下一个DMA
uint32_t rYNumNextDma : 1; // 读操作完成一个YNum后换下一个DMA
uint32_t wXNumNextDma : 1; // 写操作完成一个XNum后换下一个DMA
uint32_t wYNumNextDma : 1; // 写操作完成一个YNum后换下一个DMA
uint32_t rRfpFirstDma : 1; // 读操作位对应AxC的rfp后第一组DMA请求
uint32_t reserved1 : 6;
uint32_t wLinkCycleMode : 1; // 写操作为链表循环模式
uint32_t reserved2 : 1;
uint32_t rLinkCycleMode : 1; // 读操作为链表循环模式
uint32_t reserved3 : 18;
}stCsuDmaCmdH;
// 一级链表多维DMA
typedef struct _tagCsuLinkDesc1L3D
{
uint32_t cmdFifoL; // [31:0] // fifo[31:0]
uint32_t dmaAddrL; // [63:32] // addr[31:0]
uint32_t dmaXNum : 16; // [79:64] // XNum
uint32_t cmdFifoH : 14; // [93:80] // fifo[45:32]
uint32_t reserved1 : 2; // [95:94]
uint32_t dmaYStep; // [127:96] // YStep[31:0]
uint32_t dmaYNum : 16; // [143:128] // YNum
uint32_t dmaSize : 4; // [147:144] // dmaSize
uint32_t dmaGran : 3; // [150:148] // gran
uint32_t dmaCGran : 1; // [151] // cgran
uint32_t dmaAddrH : 2; // [153:152] // addr[33:32]
uint32_t reserved2 : 2; // [155:154]
uint32_t nextAddrH : 3; // [158:156] // next addr[33:31]
uint32_t reserved3 : 1; // [159]
uint32_t dmaZStep; // [191:160] // ZStep[31:0]
uint32_t dmaAllNum; // [223:192] // all num
uint32_t nextAddrL : 31; // [254:224] // next addr[30:0]
uint32_t nAddrMode : 1; // [255] // 1使用nextAddr0地址自动加0x20/0x40
}stCsuLinkDesc1L3D;
//extern __attribute__((always_inline)) uint8_t os_get_apeid();
//-------------------------------------------------------------
//api
//-------------------------------------------------------------
/*!
* @brief: tag号对应的dma任务是否完成01
* isWait==1tag对应的任务完成1
* @author: xinxin.li
* @Date: 202261
* @param: task_tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @return: 10
*/
int ape_csu_task_lookup(uint8_t task_tag, uint8_t isWait);
/*!
* @brief: 使01L2G的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
*/
int ape_csu_dma_1D_L2G_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: 使23L2G的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
*/
int ape_csu_dma_1D_L2G_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: 使01G2L的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
*/
int ape_csu_dma_1D_G2L_ch0ch1_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief: 使23G2L的Dma搬移
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
*/
int ape_csu_dma_1D_G2L_ch2ch3_transfer(uint64_t addrSrc, uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
/*!
* @brief:
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: blockLenSrc : [ ]
* @param: blockStepSrc : [ ]
* @param: addrDst : [ ]
* @param: blockLenDst : [ ]
* @param: blockStepDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @param: regGroup : [245367 ]
* @param: dir : [0L2G1G2L or G2G ]
*/
int ape_csu_dma_2Dto2D_transfer(uint64_t addrSrc, uint16_t blockLenSrc, uint64_t blockStepSrc,
uint64_t addrDst, uint16_t blockLenDst, uint64_t blockStepDst,
uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir);
/*!
* @brief:
* @author: xinxin.li
* @Date: 202261
* @param: addrSrc : [ ]
* @param: xNumSrc : [ ]
* @param: yNumSrc : [ ]
* @param: yStepSrc : [ ]
* @param: zStepSrc : [ ]
* @param: addrDst : [ ]
* @param: dataLen : [ ]
* @param: tag : [DMA Tag: 0~31 ]
* @param: isWait : [DMA结束函数返回0:,1: ]
* @param: regGroup : [245367 ]
* @param: dir : [0L2G1G2L or G2G ]
*/
int ape_csu_dma_3Dto1D_transfer(uint64_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint64_t yStepSrc, uint64_t zStepSrc,
uint64_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait, uint8_t regGroup, uint8_t dir);
void ape_csu_dma_3Dto1D_G2L_ch4ch0_simp_transfer(uint32_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint32_t yStepSrc, uint32_t zStepSrc,
uint32_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
void ape_csu_dma_3Dto1D_G2L_ch6ch2_simp_transfer(uint32_t addrSrc, uint16_t xNumSrc, uint16_t yNumSrc, uint32_t yStepSrc, uint32_t zStepSrc,
uint32_t addrDst, uint32_t dataLen, uint8_t tag, uint8_t isWait);
void dma_1l3d1s_chain_G2L_ch0ch1_simp_config_start(uint32_t *paramPtr,
uint32_t paramCsuAddr,
uint32_t numNodes,
uint32_t dmaTag,
uint32_t *xAddrSrcPtr,
uint16_t xNum,
uint32_t *allNumPtr,
uint32_t addrDst,
uint32_t allNumTotal,
uint32_t waitFlag);
void dma_1l1d2s_chain_ch3_G2L_start(uint32_t *paramPtr,
uint32_t paramCsuAddr,
uint32_t *srcAddrPtr,
uint32_t *dstAddrPtr,
uint32_t *allNumPtr,
uint32_t numNodes,
uint32_t dmaTag,
uint32_t waitFlag);
void qounit_findK_config_start(uint32_t bitSequenceAddr,
uint32_t seqIndexAddr,
uint32_t seqLength,
uint32_t K0,
uint32_t K1);
void qounit_findEqual_config_start(uint32_t compData,
uint32_t seqAddr,
uint16_t seqLength);
uint32_t qounit_wait_complete();
/*!
* @brief: QOunit处理完成
* @author: yufei.wang
* @Date: 2022611
*/
int16_t qounit_equal_wait_complete();
/**************************************************/
/* 硬件队列收发消息接口 */
/**************************************************/
/*
osp_alloc_msg
DDR上
size
0
-NULLPTR
*/
extern char *osp_alloc_msg(int size);
/*
osp_send_msg
msg_addr
msg_len
msg_type
src_core_idID
dst_core_idID
src_task_idID
dst_task_idID
0
-2
-1
*/
extern int osp_send_msg(uint32_t msg_addr,
uint32_t msg_len,
uint8_t msg_type,
uint8_t src_core_id,
uint8_t dst_core_id,
uint8_t src_task_id,
uint8_t dst_task_id);
/* ECS侧硬件队列中断回调函数 */
typedef void(*ECS_HWQUE_IRQ_FUNC)();
/*
ecs_hw_que_irq_callback
ECS侧高层注册硬件队列中断回调处理函数
func
*/
void ecs_hw_que_irq_callback(ECS_HWQUE_IRQ_FUNC func);
/****************************UCP2.0 Platform end*************************************/
#endif /* __RFM_INTERFACE_H__ */