jinhong/YB_TX_RX_APE_PRJ
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1.recv_databuffer大小修改为6 2.pcie状态机地址更正

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HUOHUO 2025-04-23 10:29:00 -07:00
parent 5963024cc8
commit 05f3cd0b36
9 changed files with 36 additions and 41 deletions
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4
.vscode/settings.json vendored
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@ -37,6 +37,8 @@
"ucps2.h": "c", "ucps2.h": "c",
"channelest.h": "c", "channelest.h": "c",
"interface_rec_sync2_pcie.h": "c", "interface_rec_sync2_pcie.h": "c",
"fucp_ape7_pcie_testcase.h": "c" "fucp_ape7_pcie_testcase.h": "c",
"receiver_sync_vars.h": "c",
"receiver_sync_first_vars.h": "c"
} }
} }

8
APE7/ApeTask/src/Fucp_Ape7_pcie_testcase.s.c
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@ -34,6 +34,7 @@
#include "interface_rec_sync2_pcie.h" #include "interface_rec_sync2_pcie.h"
#include "Fucp_Ape7_pcie_testcase.h" #include "Fucp_Ape7_pcie_testcase.h"
#include "mem_def.h" #include "mem_def.h"
#include "interface_rec_sync2_rec_sync_first.h"
@ -478,7 +479,7 @@ void test_speed_recv_msg_pcie()
void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len) void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len)
{ {
//获取状态机状态 //获取状态机状态
volatile uint32_t status_SM_addr= (uint32_t)RECEIVER_SYNC2SYNC_FIRST_INF_ADDR; receiver_sync_status_t* status_SM_addr= (uint32_t)RECEIVER_SYNC2SYNC_FIRST_INF_ADDR;
/*typedef enum /*typedef enum
{ {
SYNC_IDLE=0, SYNC_IDLE=0,
@ -486,7 +487,7 @@ void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len)
SYNC_AI_PROCECING, SYNC_AI_PROCECING,
SYNC_TRACKING SYNC_TRACKING
}receiver_sync_status_e;*/ }receiver_sync_status_e;*/
if(2 != LOAD_EX_W(status_SM_addr)) if(2 != LOAD_EX_W(status_SM_addr->sync_status))
return ; return ;
//提供的数据地址(DDR)和本次数据的SFN SLOT号 //提供的数据地址(DDR)和本次数据的SFN SLOT号
uint32_t sfn = msg_ptr->sfn; uint32_t sfn = msg_ptr->sfn;
@ -520,8 +521,7 @@ void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len)
//TODO:接收到RK3588的数据后，必须更新状态机后级模块才能工作 //TODO:接收到RK3588的数据后，必须更新状态机后级模块才能工作
//WARNING:需要使用这个代码 //WARNING:需要使用这个代码
#if 0 #if 0
volatile uint32_t status_SM_addr= (uint32_t)RECEIVER_SYNC2SYNC_FIRST_INF_ADDR; STORE_EX_W(status_SM_addr->sync_status , 3);
STORE_EX_W(status_SM_addr , 3);
__ucps2_synch(0); __ucps2_synch(0);
#endif #endif

4
APELib/Receiver_sync/inc/receiver_sync_func.h
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@ -24,7 +24,7 @@
#include "trace.h" #include "trace.h"
#include "interface_rec_sync2_rec_sync_first.h" #include "interface_rec_sync2_rec_sync_first.h"
#include "interface_rec_sync2_pcie.h" #include "interface_rec_sync2_pcie.h"
#include "receiver_sync_vars.h"
//include mpu header files //include mpu header files
#include "ByteCopy.h" #include "ByteCopy.h"
@ -48,7 +48,7 @@ extern int32_t *receiver_sync_temp_dm2_ptr;
extern int32_t *receiver_sync_temp_dm3_ptr; extern int32_t *receiver_sync_temp_dm3_ptr;
extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr; extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr;
extern uint32_t sync2symb_data_buffer[4]; extern uint32_t sync2symb_data_buffer[RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER];
extern receiver_sync2symb_t data_send2symb_task[3]; extern receiver_sync2symb_t data_send2symb_task[3];
extern uint16_t g_proc_id; extern uint16_t g_proc_id;

2
APELib/Receiver_sync/inc/receiver_sync_vars.h
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@ -1,6 +1,6 @@
#ifndef RECEIVER_SYNC_VARS_H #ifndef RECEIVER_SYNC_VARS_H
#define RECEIVER_SYNC_VARS_H #define RECEIVER_SYNC_VARS_H
#define RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER (4) #define RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER (6)
#endif #endif

3
APELib/Receiver_sync/src/receiver_Sync_Init.s.c
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@ -87,7 +87,8 @@ void Receiver_Sync_Init()
sync2symb_data_buffer[1] = RECEIVER_SYNC2SYMB_BUFFER1_ADDR; sync2symb_data_buffer[1] = RECEIVER_SYNC2SYMB_BUFFER1_ADDR;
sync2symb_data_buffer[2] = RECEIVER_SYNC2SYMB_BUFFER2_ADDR; sync2symb_data_buffer[2] = RECEIVER_SYNC2SYMB_BUFFER2_ADDR;
sync2symb_data_buffer[3] = RECEIVER_SYNC2SYMB_BUFFER3_ADDR; sync2symb_data_buffer[3] = RECEIVER_SYNC2SYMB_BUFFER3_ADDR;
sync2symb_data_buffer[4] = RECEIVER_SYNC2SYMB_BUFFER4_ADDR;
sync2symb_data_buffer[5] = RECEIVER_SYNC2SYMB_BUFFER5_ADDR;
g_proc_id = 0; g_proc_id = 0;
#ifdef RECV_DBG_DATA_TEST #ifdef RECV_DBG_DATA_TEST

10
APELib/Receiver_sync/src/receiver_Sync_Proc.s.c
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@ -421,16 +421,16 @@ void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot, uint32_t proc_type)
//填写给symb任务的调度信息 //填写给symb任务的调度信息
data_send2symb_task[task_idx].sfn = sfn; data_send2symb_task[task_idx].sfn = sfn;
data_send2symb_task[task_idx].slot = slot; data_send2symb_task[task_idx].slot = slot;
data_send2symb_task[task_idx].num_data_section = (offset_temp > (61440 * 4) && (offset_temp < (61440 * 5)) ) ? 2 : 1; data_send2symb_task[task_idx].num_data_section = (offset_temp >= (61440 * RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER) && (offset_temp < (61440 * (RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER+1))) ) ? 2 : 1;
data_send2symb_task[task_idx].proc_id = g_proc_id; data_send2symb_task[task_idx].proc_id = g_proc_id;
data_send2symb_task[task_idx].data_section0_ptr = sync2symb_data_buffer[0] + (((offset_temp - 61440) % (61440*4))<<2); data_send2symb_task[task_idx].data_section0_ptr = sync2symb_data_buffer[0] + (((offset_temp - 61440) % (61440*RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER))<<2);
data_send2symb_task[task_idx].data_section0_length = (offset_temp > (61440 * 4)) ? ((61440 * 4) - (offset_temp - 61440)) : 61440; data_send2symb_task[task_idx].data_section0_length = (offset_temp > (61440 * RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER)) ? ((61440 * RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER) - (offset_temp - 61440)) : 61440;
data_send2symb_task[task_idx].data_section1_ptr = (2 == data_send2symb_task[task_idx].num_data_section) ? (sync2symb_data_buffer[0]) : 0; data_send2symb_task[task_idx].data_section1_ptr = (2 == data_send2symb_task[task_idx].num_data_section) ? (sync2symb_data_buffer[0]) : 0;
data_send2symb_task[task_idx].data_section1_length = (2 == data_send2symb_task[task_idx].num_data_section) ? (61440 - data_send2symb_task[task_idx].data_section0_length) : 0; data_send2symb_task[task_idx].data_section1_length = (2 == data_send2symb_task[task_idx].num_data_section) ? (61440 - data_send2symb_task[task_idx].data_section0_length) : 0;
//维护状态信息 //维护状态信息
cylic_buffer_data_len = cylic_buffer_data_offset_temp - offset_temp; cylic_buffer_data_len = cylic_buffer_data_offset_temp - offset_temp;
cylic_buffer_proc_data_offset = offset_temp % (61440*4); cylic_buffer_proc_data_offset = offset_temp % (61440*RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER);
//为了适配SYMB接口，如果数据是两段，搬移成一块 //为了适配SYMB接口，如果数据是两段，搬移成一块
if(2 == data_send2symb_task[task_idx].num_data_section) if(2 == data_send2symb_task[task_idx].num_data_section)
@ -445,7 +445,7 @@ void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot, uint32_t proc_type)
//发核间消息给SYMB_TASK, slot号为偶数APE5处理，奇数APE3处理 //发核间消息给SYMB_TASK, slot号为偶数APE5处理，奇数APE3处理
if(SYNC_TRACKING == proc_type) if(SYNC_TRACKING == proc_type)
{ {
uint32_t symb_proc_core_sel = (0 == ((task_idx +slot) & 0x1)) ? APE5_CORE_ID : APE3_CORE_ID; uint32_t symb_proc_core_sel = (0 == (slot & 0x1)) ? APE5_CORE_ID : APE3_CORE_ID;
phy_et_msg_send((uint32_t)(&data_send2symb_task[task_idx]), phy_et_msg_send((uint32_t)(&data_send2symb_task[task_idx]),

3
APELib/Receiver_sync_first/inc/receiver_sync_first_func.h
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@ -23,6 +23,7 @@
#include "task_define.h" #include "task_define.h"
#include "trace.h" #include "trace.h"
#include "interface_rec_sync2_rec_sync_first.h" #include "interface_rec_sync2_rec_sync_first.h"
#include "receiver_sync_first_vars.h"
//include mpu header files //include mpu header files
@ -49,7 +50,7 @@ extern int32_t *receiver_sync_first_temp_dm2_ptr;
extern int32_t *receiver_sync_first_temp_dm3_ptr; extern int32_t *receiver_sync_first_temp_dm3_ptr;
extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr; extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr;
extern uint32_t sync2symb_data_buffer[4]; extern uint32_t sync2symb_data_buffer[RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER];
extern receiver_sync2symb_t data_send2symb_task[3]; extern receiver_sync2symb_t data_send2symb_task[3];
extern uint16_t g_proc_id; extern uint16_t g_proc_id;

2
APELib/Receiver_sync_first/inc/receiver_sync_first_vars.h
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@ -1,5 +1,5 @@
#ifndef RECEIVER_SYNC_FIRST_VARS_H #ifndef RECEIVER_SYNC_FIRST_VARS_H
#define RECEIVER_SYNC_FIRST_VARS_H #define RECEIVER_SYNC_FIRST_VARS_H
#define RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER (6)
#endif #endif

41
Common/inc/mem_def.h
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@ -46,20 +46,8 @@
/************************************SM0--1M*************************************************/ /************************************SM0--1M*************************************************/
#define RECEIVER_BIT_CFG_BASE (SM0_BASE) #define RECEIVER_BIT_CFG_BASE (SM0_BASE)
/************************************SM1---1M ***********************************************/ /************************************SM1---1M ***********************************************/
#define RECEIVER_SYMB_OUT (SM1_BASE)
/************************************SM2--1.5M***********************************************/ #define RECEIVER_SYMB_OUT_ODD (RECEIVER_SYMB_OUT + 0x80000) //512KB each
#define TRANSMITTER_OUT (SM2_BASE) //4k对齐
/************************************SM3--1.5M***********************************************/
#define SM3_PHY_MSG_BUFFER_ADDR (SM3_BASE)
#define SM3_PHY_TASKS_MGR_ADDR (SM3_PHY_MSG_BUFFER_ADDR + SM3_PHY_MSG_BUFFER_LEN)
#define RECEIVER_OUT3 (SM3_BASE + 0x4000)
/************************************SM4--1.5M***********************************************/
//TODO:地址规划
#define RECEIVER_SYMB_OUT (SM4_BASE)
#define RECEIVER_SYMB_OUT_ODD (RECEIVER_SYMB_OUT + 0x3c000)
//TODO:定义ODD地址
#ifdef CORE_ODD #ifdef CORE_ODD
// CORE_ODD 的地址 // CORE_ODD 的地址
@ -74,22 +62,25 @@
#define CHANNELEQU_DATA_DDR_PTR (RECEIVER_SYMB_OUT + 0x3c000 + 0x8000) #define CHANNELEQU_DATA_DDR_PTR (RECEIVER_SYMB_OUT + 0x3c000 + 0x8000)
#define TRANSFORMER_DATA_DDR_PTR (RECEIVER_SYMB_OUT) #define TRANSFORMER_DATA_DDR_PTR (RECEIVER_SYMB_OUT)
#endif #endif
/************************************SM2--1.5M***********************************************/
#define TRANSMITTER_OUT (SM2_BASE) //4k对齐
// #define RECEIVER_SYMB_OUT (SM4_BASE) /************************************SM3--1.5M***********************************************/
// #define COMPENSATED_DATA_DDR_PTR (RECEIVER_SYMB_OUT) #define SM3_PHY_MSG_BUFFER_ADDR (SM3_BASE)
// #define CHANNELEST_DATA_DDR_PTR (RECEIVER_SYMB_OUT + 0x3c000) #define SM3_PHY_TASKS_MGR_ADDR (SM3_PHY_MSG_BUFFER_ADDR + SM3_PHY_MSG_BUFFER_LEN)
// #define CHANNELEQU_DATA_DDR_PTR (RECEIVER_SYMB_OUT + 0x3c000 + 0x8000) //equ output #define RECEIVER_OUT3 (SM3_BASE + 0x4000)
// #define TRANSFORMER_DATA_DDR_PTR (RECEIVER_SYMB_OUT) /************************************SM4--1.5M***********************************************/
#define RECEIVER_BASE (SM4_BASE) //4k对齐
/************************************SM5--1.5M***********************************************/
#define RECEIVER_BASE (SM5_BASE) //4k对齐
#define RECEIVER_SYNC2SYMB_BUFFER0_ADDR (RECEIVER_BASE) #define RECEIVER_SYNC2SYMB_BUFFER0_ADDR (RECEIVER_BASE)
#define RECEIVER_SYNC2SYMB_BUFFER1_ADDR (RECEIVER_SYNC2SYMB_BUFFER0_ADDR + TIME_DATA_SLOT_LEN) #define RECEIVER_SYNC2SYMB_BUFFER1_ADDR (RECEIVER_SYNC2SYMB_BUFFER0_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYMB_BUFFER2_ADDR (RECEIVER_SYNC2SYMB_BUFFER1_ADDR + TIME_DATA_SLOT_LEN) #define RECEIVER_SYNC2SYMB_BUFFER2_ADDR (RECEIVER_SYNC2SYMB_BUFFER1_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYMB_BUFFER3_ADDR (RECEIVER_SYNC2SYMB_BUFFER2_ADDR + TIME_DATA_SLOT_LEN) #define RECEIVER_SYNC2SYMB_BUFFER3_ADDR (RECEIVER_SYNC2SYMB_BUFFER2_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYMB_BUFFER_REV_ADDR (RECEIVER_SYNC2SYMB_BUFFER3_ADDR + TIME_DATA_SLOT_LEN) #define RECEIVER_SYNC2SYMB_BUFFER4_ADDR (RECEIVER_SYNC2SYMB_BUFFER3_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYMB_BUFFER5_ADDR (RECEIVER_SYNC2SYMB_BUFFER4_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYMB_BUFFER_REV_ADDR (RECEIVER_SYNC2SYMB_BUFFER5_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYNC_FIRST_INF_ADDR (RECEIVER_SYNC2SYMB_BUFFER_REV_ADDR + TIME_DATA_SLOT_LEN) //LEN: sizeof(receiver_sync_status_t) #define RECEIVER_SYNC2SYNC_FIRST_INF_ADDR (RECEIVER_SYNC2SYMB_BUFFER_REV_ADDR + TIME_DATA_SLOT_LEN) //LEN: sizeof(receiver_sync_status_t)
/************************************SM5--1.5M***********************************************/
/**************************************DDR***************************************************/ /**************************************DDR***************************************************/
#define DDR_PHY_BASE (0x6BC00000) //共579M可用0x6BC00000-0x8FFFFFFF #define DDR_PHY_BASE (0x6BC00000) //共579M可用0x6BC00000-0x8FFFFFFF
#define DDR_ERROR_RECORD_CNT_ADDR (0x79FF8000) #define DDR_ERROR_RECORD_CNT_ADDR (0x79FF8000)