sync_first修改合入
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@ -1,26 +1,26 @@
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/******************************************************************
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/******************************************************************
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* @file receiver_sync_macro.h
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* @file receiver_sync_macro.h
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* @brief: [file description]
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* @brief: [file description]
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* @author: HUOHUO
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* @author: HUOHUO
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* @Date 2024年10月30日
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* @Date 2024年10月30日
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* COPYRIGHT NOTICE: ITTC
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* COPYRIGHT NOTICE: ITTC
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* Change_date Owner Change_content
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* Change_date Owner Change_content
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* 2024年10月30日 HUOHUO create file
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* 2024年10月30日 HUOHUO create file
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*****************************************************************/
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*****************************************************************/
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#ifndef RECEIVER_SYNC_FIRST_MACRO_H
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#ifndef RECEIVER_SYNC_FIRST_MACRO_H
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#define RECEIVER_SYNC_FIRST_MACRO_H
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#define RECEIVER_SYNC_FIRST_MACRO_H
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//GENERATE with Generate_receiver_sync_macro_h.m
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//GENERATE with Generate_receiver_sync_macro_h.m
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//DO NOT MODIFY
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//DO NOT MODIFY
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//=======================================================================
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//=======================================================================
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//微码配置空间长度定义,单位为word(4Byte)
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//微码配置空间长度定义,单位为word(4Byte)
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#define RECEIVER_SYNC_FIRST_ConfigByteCopy_CFG1_LENGTH (0x0030)
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#define RECEIVER_SYNC_FIRST_ConfigByteCopy_CFG1_LENGTH (0x0030)
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#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelation_CFG2_LENGTH (0x00a0)
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#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelation_CFG2_LENGTH (0x0070)
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#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelationSecond_CFG3_LENGTH (0x0080)
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#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelationSecond_CFG3_LENGTH (0x0070)
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#define RECEIVER_SYNC_FIRST_ConfigSyncVer_CFG4_LENGTH (0x00a0)
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#define RECEIVER_SYNC_FIRST_ConfigSyncVer_CFG4_LENGTH (0x00a0)
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//SPU查找表各字段长度定义,单位为word(4Byte)
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//SPU查找表各字段长度定义,单位为word(4Byte)
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//=======================================================================
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//=======================================================================
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#endif
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#endif
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@ -1,5 +1,5 @@
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#ifndef RECEIVER_SYNC_FIRST_VARS_H
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#ifndef RECEIVER_SYNC_FIRST_VARS_H
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#define RECEIVER_SYNC_FIRST_VARS_H
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#define RECEIVER_SYNC_FIRST_VARS_H
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#define RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER (6)
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#define RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER (6)
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#endif
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#endif
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@ -1,404 +1,402 @@
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/******************************************************************
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/******************************************************************
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* @file receiver_Proc.s.c
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* @file receiver_Proc.s.c
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* @brief: [file description]
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* @brief: [file description]
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* @author: HUOHUO
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* @author: HUOHUO
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* @Date 2024年4月20日
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* @Date 2024年4月20日
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* COPYRIGHT NOTICE: ITTC
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* COPYRIGHT NOTICE: ITTC
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* Change_date Owner Change_content
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* Change_date Owner Change_content
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* 2024年4月20日 HUOHUO create file
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* 2024年4月20日 HUOHUO create file
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*****************************************************************/
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*****************************************************************/
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#include "receiver_sync_first_func.h"
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#include "receiver_sync_first_func.h"
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#define ADDR_ALIGN(addr, val) ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val))
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#define ADDR_ALIGN(addr, val) ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val))
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void dm_check(uint32_t mark)
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void dm_check(uint32_t mark)
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{
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{
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uint32_t idx;
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uint32_t idx;
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uint32_t flag = 0;
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uint32_t flag = 0;
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for( idx = 0 ;idx < 8; idx++)
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for( idx = 0 ;idx < 8; idx++)
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{
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{
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if(0xa5a55a5a != *last_mem_dm[idx])
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if(0xa5a55a5a != *last_mem_dm[idx])
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{
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{
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flag |= (1<<idx);
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flag |= (1<<idx);
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LOG_ERROR_S("lk 0x%08x\n", last_mem_dm[idx]);
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LOG_ERROR_S("lk 0x%08x\n", last_mem_dm[idx]);
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}
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}
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}
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}
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if(0 != flag)
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if(0 != flag)
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{
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{
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LOG_ERROR_S("dm leadking detect!!%d 0x%08x\n", mark, flag);
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LOG_ERROR_S("dm leadking detect!!%d 0x%08x\n", mark, flag);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_synch(0);
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__ucps2_dbgbreak();
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__ucps2_dbgbreak();
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}
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}
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}
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}
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void Receiver_Sync_First_Memory_Alloc( )
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void Receiver_Sync_First_Memory_Alloc( )
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{
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{
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uint32_t dm0_space;
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uint32_t dm0_space;
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uint32_t dm1_space;
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uint32_t dm1_space;
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uint32_t dm2_space;
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uint32_t dm2_space;
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uint32_t dm3_space;
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uint32_t dm3_space;
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//0 空间回收
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//0 空间回收
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dmalloc_trim(0, APE_DM0);
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dmalloc_trim(0, APE_DM0);
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dmalloc_trim(0, APE_DM1);
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dmalloc_trim(0, APE_DM1);
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dmalloc_trim(0, APE_DM2);
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dmalloc_trim(0, APE_DM2);
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dmalloc_trim(0, APE_DM3);
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dmalloc_trim(0, APE_DM3);
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//1. DM0空间申请
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//1. DM0空间申请
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dm0_space = getFreeSpace(APE_DM0);
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dm0_space = getFreeSpace(APE_DM0);
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// LOG_ERROR_S("dm0 space:%d\n",dm0_space);
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// LOG_ERROR_S("dm0 space:%d\n",dm0_space);
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receiver_sync_first_malloc_dm0_ptr = dmalloc_unit(dm0_space - 1024, APE_DM0); //尽量申请空间
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receiver_sync_first_malloc_dm0_ptr = dmalloc_unit(dm0_space - 1024, APE_DM0); //尽量申请空间
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if (NULLPTR == receiver_sync_first_malloc_dm0_ptr)
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if (NULLPTR == receiver_sync_first_malloc_dm0_ptr)
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{
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{
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LOG_ERROR_S("rec sync DM0 fail\n");
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LOG_ERROR_S("rec sync DM0 fail\n");
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return;
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return;
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}
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}
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//2. DM0空间分配
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//2. DM0空间分配
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//DM0第一段,微码相关空间
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//DM0第一段,微码相关空间
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receiver_sync_first_config_dm0_ptr = (uint32_t*)receiver_sync_first_malloc_dm0_ptr;
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receiver_sync_first_config_dm0_ptr = (uint32_t*)receiver_sync_first_malloc_dm0_ptr;
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ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_sync_first_table_param.receiver_sync_first_config0_ddr_ptr,
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ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_sync_first_table_param.receiver_sync_first_config0_ddr_ptr,
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(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_config_dm0_ptr),
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(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_config_dm0_ptr),
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g_receiver_sync_first_table_param.receiver_sync_first_config0_length,
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g_receiver_sync_first_table_param.receiver_sync_first_config0_length,
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DMA_TAG_G2L,
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DMA_TAG_G2L,
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0);
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0);
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//DM0第二段,堆空间
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//DM0第二段,堆空间
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receiver_sync_first_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_config_dm0_ptr + \
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receiver_sync_first_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_config_dm0_ptr + \
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(g_receiver_sync_first_table_param.receiver_sync_first_config0_length>>2), 12); //起始地址4kbyte对齐
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(g_receiver_sync_first_table_param.receiver_sync_first_config0_length>>2), 12); //起始地址4kbyte对齐
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//3. DM3空间申请
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//3. DM3空间申请
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dm3_space = getFreeSpace(APE_DM3);
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dm3_space = getFreeSpace(APE_DM3);
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receiver_sync_first_malloc_dm3_ptr = dmalloc_unit(dm3_space - 1024, APE_DM3);//尽量申请
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receiver_sync_first_malloc_dm3_ptr = dmalloc_unit(dm3_space - 1024, APE_DM3);//尽量申请
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//若空间申请失败,则释放已申请的空间,再退出任务
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//若空间申请失败,则释放已申请的空间,再退出任务
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if (NULLPTR == receiver_sync_first_malloc_dm3_ptr)
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if (NULLPTR == receiver_sync_first_malloc_dm3_ptr)
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{
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{
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LOG_ERROR_S("rec sync DM3 fail\n");
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LOG_ERROR_S("rec sync DM3 fail\n");
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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return;
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return;
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}
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}
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//DM3第一段,堆空间
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//DM3第一段,堆空间
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receiver_sync_first_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm3_ptr, 12); //起始地址4k对齐
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receiver_sync_first_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm3_ptr, 12); //起始地址4k对齐
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//4. DM1空间申请
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//4. DM1空间申请
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dm1_space = getFreeSpace(APE_DM1);
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dm1_space = getFreeSpace(APE_DM1);
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receiver_sync_first_malloc_dm1_ptr = dmalloc_unit(dm1_space - 1024, APE_DM1);//尽量申请
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receiver_sync_first_malloc_dm1_ptr = dmalloc_unit(dm1_space - 1024, APE_DM1);//尽量申请
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//若空间申请失败,则释放已申请的空间,再退出任务
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//若空间申请失败,则释放已申请的空间,再退出任务
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if (NULLPTR == receiver_sync_first_malloc_dm1_ptr)
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if (NULLPTR == receiver_sync_first_malloc_dm1_ptr)
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{
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{
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LOG_ERROR_S("rec sync DM1 fail\n");
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LOG_ERROR_S("rec sync DM1 fail\n");
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dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
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dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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return;
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return;
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}
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}
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//DM1第一段,堆空间
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//DM1第一段,堆空间
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receiver_sync_first_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm1_ptr + \
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receiver_sync_first_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm1_ptr + \
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(g_receiver_sync_first_table_param.receiver_sync_first_config1_length>>2), 12); //起始地址4k对齐
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(g_receiver_sync_first_table_param.receiver_sync_first_config1_length>>2), 12); //起始地址4k对齐
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//5. DM2空间申请
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//5. DM2空间申请
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dm2_space = getFreeSpace(APE_DM2);
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dm2_space = getFreeSpace(APE_DM2);
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receiver_sync_first_malloc_dm2_ptr = dmalloc_unit(dm2_space - 1024, APE_DM2);//尽量申请
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receiver_sync_first_malloc_dm2_ptr = dmalloc_unit(dm2_space - 1024, APE_DM2);//尽量申请
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//若空间申请失败,释放已申请的空间,再退出任务
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//若空间申请失败,释放已申请的空间,再退出任务
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if (NULLPTR == receiver_sync_first_malloc_dm2_ptr)
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if (NULLPTR == receiver_sync_first_malloc_dm2_ptr)
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{
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{
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LOG_ERROR_S("rec sync DM2 fail\n");
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LOG_ERROR_S("rec sync DM2 fail\n");
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dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
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dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1);
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dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1);
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return;
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return;
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}
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}
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//DM2第一段,堆空间
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//DM2第一段,堆空间
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receiver_sync_first_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm2_ptr + \
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receiver_sync_first_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm2_ptr + \
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(g_receiver_sync_first_table_param.receiver_sync_first_config2_length>>2), 12); //起始地址4byte对齐
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(g_receiver_sync_first_table_param.receiver_sync_first_config2_length>>2), 12); //起始地址4byte对齐
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ape_csu_task_lookup(DMA_TAG_G2L, 1);
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ape_csu_task_lookup(DMA_TAG_G2L, 1);
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//debug
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//debug
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last_mem_dm[0] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -1;
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last_mem_dm[0] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -1;
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last_mem_dm[1] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -2;
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last_mem_dm[1] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -2;
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last_mem_dm[2] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -1;
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last_mem_dm[2] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -1;
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last_mem_dm[3] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -2;
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last_mem_dm[3] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -2;
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last_mem_dm[4] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -1;
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last_mem_dm[4] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -1;
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last_mem_dm[5] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -2;
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last_mem_dm[5] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -2;
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last_mem_dm[6] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -1;
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last_mem_dm[6] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -1;
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last_mem_dm[7] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -2;
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last_mem_dm[7] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -2;
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*last_mem_dm[0] = 0xa5a55a5a;
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*last_mem_dm[0] = 0xa5a55a5a;
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*last_mem_dm[1] = 0xa5a55a5a;
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*last_mem_dm[1] = 0xa5a55a5a;
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*last_mem_dm[2] = 0xa5a55a5a;
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*last_mem_dm[2] = 0xa5a55a5a;
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*last_mem_dm[3] = 0xa5a55a5a;
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*last_mem_dm[3] = 0xa5a55a5a;
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*last_mem_dm[4] = 0xa5a55a5a;
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*last_mem_dm[4] = 0xa5a55a5a;
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*last_mem_dm[5] = 0xa5a55a5a;
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*last_mem_dm[5] = 0xa5a55a5a;
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*last_mem_dm[6] = 0xa5a55a5a;
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*last_mem_dm[6] = 0xa5a55a5a;
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*last_mem_dm[7] = 0xa5a55a5a;
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*last_mem_dm[7] = 0xa5a55a5a;
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}
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}
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void Receiver_Sync_First_Memory_Free( )
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void Receiver_Sync_First_Memory_Free( )
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{
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{
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//8. 内存释放
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//8. 内存释放
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dfree_unit(receiver_sync_first_malloc_dm2_ptr, APE_DM2);
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dfree_unit(receiver_sync_first_malloc_dm2_ptr, APE_DM2);
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dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1);
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dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1);
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dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
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dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
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}
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}
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//耗时长,用于第一次同步
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//耗时长,用于第一次同步
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void Receiver_First_Sync_Proc(receiver_sync2first_sync_t* msg_ptr, uint32_t msg_len)
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void Receiver_First_Sync_Proc(receiver_sync2first_sync_t* msg_ptr, uint32_t msg_len)
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{
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{
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g_time_start[0] = TIME_NS();
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g_time_start[0] = TIME_NS();
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RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 0);
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RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 0);
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const uint32_t loop_num = 1;
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const uint32_t loop_num = 1;
|
||||||
uint32_t ret;
|
uint32_t ret;
|
||||||
uint16_t sfn = LOAD_EX_S(&msg_ptr->sfn);
|
uint16_t sfn = LOAD_EX_S(&msg_ptr->sfn);
|
||||||
uint16_t slot = LOAD_EX_S(&msg_ptr->slot);
|
uint16_t slot = LOAD_EX_S(&msg_ptr->slot);
|
||||||
uint32_t section_idx;
|
uint32_t section_idx;
|
||||||
const uint32_t sample_per_tti = 61440;//每个500us采样点数
|
const uint32_t sample_per_tti = 61440;//每个500us采样点数
|
||||||
const uint32_t addition_sample = 1024;//额外样点
|
const uint32_t addition_sample = 1024;//额外样点
|
||||||
uint32_t total_nsample = sample_per_tti + addition_sample;
|
uint32_t total_nsample = sample_per_tti + addition_sample;
|
||||||
uint32_t sample_per_csu = (total_nsample >> 1);//分两次处理
|
uint32_t sample_per_csu = (total_nsample >> 1);//分两次处理
|
||||||
int32_t *cfg_addr;// 配置地址指针
|
int32_t *cfg_addr;// 配置地址指针
|
||||||
uint32_t maxPosition = 0;
|
uint32_t maxPosition = 0;
|
||||||
uint32_t maxsum;
|
uint32_t maxsum;
|
||||||
volatile uint16_t dbg_time0, dbg_time1;
|
volatile uint16_t dbg_time0, dbg_time1;
|
||||||
|
volatile uint32_t time1 = Time_offset(0);
|
||||||
//Proc的DM空间申请
|
//Proc的DM空间申请
|
||||||
Receiver_Sync_First_Memory_Alloc();
|
Receiver_Sync_First_Memory_Alloc();
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 1);
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 1);
|
||||||
//寻找帧同步头,更新同步信息结构体
|
//寻找帧同步头,更新同步信息结构体
|
||||||
|
|
||||||
//搬移500us+数据供定时同步,奇数slot处理偶buffer数据,反之
|
//搬移500us+数据供定时同步,奇数slot处理偶buffer数据,反之
|
||||||
dbg_time0 = Time_offset(0);
|
dbg_time0 = Time_offset(0);
|
||||||
uint32_t src_addr0;
|
uint32_t src_addr0;
|
||||||
uint32_t src_addr1;
|
uint32_t src_addr1;
|
||||||
#ifndef RECV_DBG_DATA_TEST
|
#ifndef RECV_DBG_DATA_TEST
|
||||||
if( 1 == (slot & 0x01) )
|
if( 1 == (slot & 0x01) )
|
||||||
{
|
{
|
||||||
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_DOWN_SAMP_ADDR;
|
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_DOWN_SAMP_ADDR;
|
||||||
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_DOWN_SAMP_ADDR;
|
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_DOWN_SAMP_ADDR;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_DOWN_SAMP_ADDR;
|
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_DOWN_SAMP_ADDR;
|
||||||
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_DOWN_SAMP_ADDR;
|
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_DOWN_SAMP_ADDR;
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_DOWN_SAMP_ADDR;
|
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_DOWN_SAMP_ADDR;
|
||||||
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_DOWN_SAMP_ADDR;
|
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_DOWN_SAMP_ADDR;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
|
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
|
||||||
(uint64_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR,//第一次固定搬移到dm0
|
(uint64_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR,//第一次固定搬移到dm0
|
||||||
(61440)<<2,
|
(61440)<<2,
|
||||||
DMA_TAG_G2G,
|
DMA_TAG_G2G,
|
||||||
1);
|
1);
|
||||||
volatile uint32_t time1 = Time_offset(0);
|
ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1),
|
||||||
while(time1 < 500000)
|
(uint64_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR,//第一次固定搬移到dm0
|
||||||
{
|
(2048)<<2,
|
||||||
time1 = Time_offset(0);
|
DMA_TAG_G2G,
|
||||||
}
|
1);
|
||||||
|
|
||||||
ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1),
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 2);
|
||||||
(uint64_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR,//第一次固定搬移到dm0
|
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR;
|
||||||
(2048)<<2,
|
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR;
|
||||||
DMA_TAG_G2G,
|
|
||||||
1);
|
|
||||||
|
//搬移数据
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 2);
|
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
|
||||||
src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR;
|
(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),//第一次固定搬移到dm0
|
||||||
src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR;
|
(sample_per_csu + 1024)<<2,
|
||||||
|
DMA_TAG_G2L,
|
||||||
|
0);
|
||||||
//搬移数据
|
|
||||||
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
|
|
||||||
(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),//第一次固定搬移到dm0
|
|
||||||
(sample_per_csu + 1024)<<2,
|
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset;
|
||||||
DMA_TAG_G2L,
|
|
||||||
0);
|
|
||||||
|
//Debug:
|
||||||
|
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x %d\n", cfg_addr, receiver_sync_first_temp_dm0_ptr + 1024, receiver_sync_first_temp_dm1_ptr, (total_nsample - 1024)<<2);
|
||||||
|
// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
|
||||||
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset;
|
// (uint64_t)0x88a00000,
|
||||||
|
// 48<<2,
|
||||||
|
// DMA_TAG_L2G,
|
||||||
//Debug:
|
// 1);
|
||||||
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x %d\n", cfg_addr, receiver_sync_first_temp_dm0_ptr + 1024, receiver_sync_first_temp_dm1_ptr, (total_nsample - 1024)<<2);
|
|
||||||
// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
|
ByteCopy((int)cfg_addr,
|
||||||
// (uint64_t)0x88a00000,
|
MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024
|
||||||
// 48<<2,
|
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
||||||
// DMA_TAG_L2G,
|
((sample_per_csu)<<2));
|
||||||
// 1);
|
|
||||||
|
WAIT_MPU_STOP;
|
||||||
ByteCopy((int)cfg_addr,
|
ape_csu_task_lookup(DMA_TAG_G2L, 1);
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 3);
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
SVRReg[0] = MPU_ADDR(cfg_addr);
|
||||||
((sample_per_csu)<<2));
|
ByteCopyAsm(SVRReg);
|
||||||
|
|
||||||
WAIT_MPU_STOP;
|
//Debug:
|
||||||
ape_csu_task_lookup(DMA_TAG_G2L, 1);
|
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 3);
|
// receiver_sync_first_temp_dm3_ptr);
|
||||||
SVRReg[0] = MPU_ADDR(cfg_addr);
|
|
||||||
ByteCopyAsm(SVRReg);
|
|
||||||
|
// dm_check(0);
|
||||||
//Debug:
|
|
||||||
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
|
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset;
|
||||||
// receiver_sync_first_temp_dm3_ptr);
|
|
||||||
|
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
|
||||||
|
// receiver_sync_first_temp_dm3_ptr);
|
||||||
// dm_check(0);
|
// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
|
||||||
|
// (uint64_t)0x88b00000,
|
||||||
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset;
|
// 512,
|
||||||
|
// DMA_TAG_L2G,
|
||||||
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
|
// 1);
|
||||||
// receiver_sync_first_temp_dm3_ptr);
|
|
||||||
// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
|
SlidingCorrelation((int)cfg_addr,
|
||||||
// (uint64_t)0x88b00000,
|
MPU_ADDR(receiver_sync_first_temp_dm0_ptr),
|
||||||
// 512,
|
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
||||||
// DMA_TAG_L2G,
|
//MPU_ADDR(receiver_sync_first_temp_dm2_ptr),
|
||||||
// 1);
|
MPU_ADDR(receiver_sync_first_temp_dm3_ptr));
|
||||||
|
|
||||||
SlidingCorrelation((int)cfg_addr,
|
WAIT_MPU_STOP;
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm0_ptr),
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 4);
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
SVRReg[0] = MPU_ADDR(cfg_addr);
|
||||||
//MPU_ADDR(receiver_sync_first_temp_dm2_ptr),
|
SlidingCorrelationAsm(SVRReg);
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm3_ptr));
|
|
||||||
|
|
||||||
WAIT_MPU_STOP;
|
WAIT_MPU_STOP;
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 4);
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 5);
|
||||||
SVRReg[0] = MPU_ADDR(cfg_addr);
|
//dm_check(1);
|
||||||
SlidingCorrelationAsm(SVRReg);
|
maxPosition = 0xffff & receiver_sync_first_temp_dm3_ptr[0];
|
||||||
|
maxsum = receiver_sync_first_temp_dm3_ptr[1];
|
||||||
|
LOG_ERROR_S("1 maxPosition:%d maxsum:%d\n",maxPosition, maxsum);
|
||||||
WAIT_MPU_STOP;
|
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 5);
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 12, maxPosition);
|
||||||
//dm_check(1);
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 13, maxsum);
|
||||||
maxPosition = 0xffff & receiver_sync_first_temp_dm3_ptr[0];
|
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 + ((sample_per_csu-1024)<<2)),
|
||||||
maxsum = receiver_sync_first_temp_dm3_ptr[1];
|
(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),//
|
||||||
LOG_ERROR_S("1 maxPosition:%d maxsum:%d\n",maxPosition, maxsum);
|
(61440 - sample_per_csu+1024)<<2,
|
||||||
|
DMA_TAG_G2L,
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 12, maxPosition);
|
0);
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 13, maxsum);
|
while(time1 < 500000)
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 14, receiver_sync_first_temp_dm3_ptr[2]);
|
{
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 15, receiver_sync_first_temp_dm3_ptr[3]);
|
time1 = Time_offset(0);
|
||||||
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 + (sample_per_csu<<2)),
|
}
|
||||||
(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),//
|
ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1),
|
||||||
(61440 - sample_per_csu)<<2,
|
(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr + (61440 - sample_per_csu+1024)),//
|
||||||
DMA_TAG_G2L,
|
(2048)<<2,
|
||||||
0);
|
DMA_TAG_G2L,
|
||||||
ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1),
|
0);
|
||||||
(uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr + (61440 - sample_per_csu)),//
|
|
||||||
(2048)<<2,
|
|
||||||
DMA_TAG_G2L,
|
|
||||||
0);
|
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset;
|
||||||
|
|
||||||
|
|
||||||
|
ByteCopy((int)cfg_addr,
|
||||||
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset;
|
MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024
|
||||||
|
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
||||||
|
((sample_per_csu+1024)<<2));
|
||||||
ByteCopy((int)cfg_addr,
|
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024
|
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
WAIT_MPU_STOP;
|
||||||
((sample_per_csu)<<2));
|
ape_csu_task_lookup(DMA_TAG_G2L, 1);
|
||||||
|
|
||||||
|
SVRReg[0] = MPU_ADDR(cfg_addr);
|
||||||
WAIT_MPU_STOP;
|
ByteCopyAsm(SVRReg);
|
||||||
ape_csu_task_lookup(DMA_TAG_G2L, 1);
|
|
||||||
|
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset;
|
||||||
SVRReg[0] = MPU_ADDR(cfg_addr);
|
//Debug:
|
||||||
ByteCopyAsm(SVRReg);
|
|
||||||
|
|
||||||
cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset;
|
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
|
||||||
//Debug:
|
// receiver_sync_first_temp_dm3_ptr);
|
||||||
|
|
||||||
|
// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
|
||||||
// LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
|
// (uint64_t)0x88a00000,
|
||||||
// receiver_sync_first_temp_dm3_ptr);
|
// 512,
|
||||||
|
// DMA_TAG_L2G,
|
||||||
// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
|
// 1);
|
||||||
// (uint64_t)0x88a00000,
|
|
||||||
// 512,
|
SlidingCorrelationSecond((int)cfg_addr,
|
||||||
// DMA_TAG_L2G,
|
MPU_ADDR(receiver_sync_first_temp_dm0_ptr),
|
||||||
// 1);
|
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
||||||
|
// MPU_ADDR(receiver_sync_first_temp_dm2_ptr),
|
||||||
SlidingCorrelationSecond((int)cfg_addr,
|
MPU_ADDR(receiver_sync_first_temp_dm3_ptr));
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm0_ptr),
|
WAIT_MPU_STOP;
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
|
|
||||||
// MPU_ADDR(receiver_sync_first_temp_dm2_ptr),
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 6);
|
||||||
MPU_ADDR(receiver_sync_first_temp_dm3_ptr));
|
//dm_check(2);
|
||||||
WAIT_MPU_STOP;
|
SVRReg[0] = MPU_ADDR(cfg_addr);
|
||||||
|
SlidingCorrelationSecondAsm(SVRReg);
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 6);
|
WAIT_MPU_STOP;
|
||||||
//dm_check(2);
|
|
||||||
SVRReg[0] = MPU_ADDR(cfg_addr);
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 7);
|
||||||
SlidingCorrelationSecondAsm(SVRReg);
|
LOG_ERROR_S("2 maxPosition:%d maxsum:%d\n",0xffff & receiver_sync_first_temp_dm3_ptr[0], receiver_sync_first_temp_dm3_ptr[1]);
|
||||||
WAIT_MPU_STOP;
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 14, maxPosition);
|
||||||
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 15, maxsum);
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 7);
|
if(maxsum < receiver_sync_first_temp_dm3_ptr[1])
|
||||||
LOG_ERROR_S("2 maxPosition:%d maxsum:%d\n",0xffff & receiver_sync_first_temp_dm3_ptr[0], receiver_sync_first_temp_dm3_ptr[1]);
|
{
|
||||||
if(maxsum < receiver_sync_first_temp_dm3_ptr[1])
|
maxPosition = 0xffff & receiver_sync_first_temp_dm3_ptr[0]+30208;
|
||||||
{
|
maxsum = receiver_sync_first_temp_dm3_ptr[1];
|
||||||
maxPosition = 0xffff & receiver_sync_first_temp_dm3_ptr[0];
|
}
|
||||||
maxsum = receiver_sync_first_temp_dm3_ptr[1];
|
LOG_ERROR_S("3 maxPosition:%d maxsum:%d\n",maxPosition, maxsum);
|
||||||
}
|
//dm_check(3);
|
||||||
LOG_ERROR_S("3 maxPosition:%d maxsum:%d\n",maxPosition, maxsum);
|
//TODO:后续需要添加门限判断条件
|
||||||
//dm_check(3);
|
uint32_t threshold = 1;
|
||||||
//TODO:后续需要添加门限判断条件
|
if(threshold)
|
||||||
uint32_t threshold = 1;
|
{
|
||||||
if(threshold)
|
STORE_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset , maxPosition % 61440);
|
||||||
{
|
LOG_INFO_S("rec sync first offset: %d %d\n", maxPosition, maxsum );
|
||||||
STORE_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset , maxPosition % 61440);
|
ret = SYNC_OK;
|
||||||
LOG_INFO_S("rec sync first offset: %d %d\n", maxPosition, maxsum );
|
}
|
||||||
ret = SYNC_OK;
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 16,maxPosition);
|
||||||
}
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 17, maxsum);
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 16,maxPosition);
|
//执行完成,更新状态机
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 17, maxsum);
|
if(SYNC_OK == ret)
|
||||||
//执行完成,更新状态机
|
{
|
||||||
if(SYNC_OK == ret)
|
#ifndef CLOSE_AI_PROCECING
|
||||||
{
|
STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_AI_PROCECING);
|
||||||
#ifndef CLOSE_AI_PROCECING
|
#else
|
||||||
STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_AI_PROCECING);
|
STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_TRACKING);
|
||||||
#else
|
#endif
|
||||||
STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_TRACKING);
|
__ucps2_synch(0);
|
||||||
#endif
|
}
|
||||||
__ucps2_synch(0);
|
else
|
||||||
}
|
{
|
||||||
else
|
STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_IDLE);
|
||||||
{
|
__ucps2_synch(0);
|
||||||
STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_IDLE);
|
}
|
||||||
__ucps2_synch(0);
|
Receiver_Sync_First_Memory_Free();
|
||||||
}
|
|
||||||
Receiver_Sync_First_Memory_Free();
|
|
||||||
|
// LOG_ERROR_S("dgb break\n");
|
||||||
|
// __ucps2_synch(0);
|
||||||
// LOG_ERROR_S("dgb break\n");
|
// __ucps2_synch(0);
|
||||||
// __ucps2_synch(0);
|
// __ucps2_synch(0);
|
||||||
// __ucps2_synch(0);
|
// __ucps2_synch(0);
|
||||||
// __ucps2_synch(0);
|
// __ucps2_synch(0);
|
||||||
// __ucps2_synch(0);
|
// __ucps2_dbgbreak();
|
||||||
// __ucps2_synch(0);
|
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 8);
|
||||||
// __ucps2_dbgbreak();
|
|
||||||
TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 8);
|
|
||||||
|
RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 1);
|
||||||
|
TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 2, Time_offset(0));
|
||||||
RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 1);
|
return;
|
||||||
TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 2, Time_offset(0));
|
}
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
@ -130,22 +130,6 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00001000,
|
|
||||||
0x00000004,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00020002,
|
|
||||||
0xf000f000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x003fffff,
|
|
||||||
0x0000000e,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000004,
|
0x00000004,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
@ -174,38 +158,6 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x02434241,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x02424140,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000200,
|
0x00000200,
|
||||||
0x00000207,
|
0x00000207,
|
||||||
0x00000207,
|
0x00000207,
|
||||||
@ -226,6 +178,38 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
|
0x00000004,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0xffffffff,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x003fffff,
|
||||||
|
0x0000000e,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000004,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0xffffffff,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x003fffff,
|
||||||
|
0x0000000e,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
0x00001000,
|
0x00001000,
|
||||||
0x00000004,
|
0x00000004,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
@ -270,23 +254,7 @@
|
|||||||
0x0000000e,
|
0x0000000e,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000400,
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000004,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0xffffffff,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x003fffff,
|
|
||||||
0x0000000e,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000295,
|
|
||||||
0x00000400,
|
0x00000400,
|
||||||
0x00007a00,
|
0x00007a00,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
@ -302,38 +270,6 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x02434241,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x02424140,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000200,
|
0x00000200,
|
||||||
0x00000207,
|
0x00000207,
|
||||||
0x00000207,
|
0x00000207,
|
||||||
|
@ -59,7 +59,7 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00020002,
|
0x00020002,
|
||||||
0xf000f000,
|
0xffffffff,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x003fffff,
|
0x003fffff,
|
||||||
@ -76,25 +76,7 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00020002,
|
0x00020002,
|
||||||
0xf000f000,
|
0xffffffff,
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x003fffff,
|
|
||||||
0x0000000e,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
|
|
||||||
//Output2 useless
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00001000,
|
|
||||||
0x00000004,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00020002,
|
|
||||||
0xf000f000,
|
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x003fffff,
|
0x003fffff,
|
||||||
@ -136,40 +118,4 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
|
||||||
|
|
||||||
//index1
|
|
||||||
0x02434241,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
|
|
||||||
//index2
|
|
||||||
0x02424140,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
0x00000000,
|
@ -15,44 +15,7 @@
|
|||||||
0x00000207,
|
0x00000207,
|
||||||
0x00000207,
|
0x00000207,
|
||||||
0x00000207,
|
0x00000207,
|
||||||
|
//InputA
|
||||||
//InputA2
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00001000,
|
|
||||||
0x00000004,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00020002,
|
|
||||||
0xf000f000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x003fffff,
|
|
||||||
0x0000000e,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
|
|
||||||
//InputB2
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00001000,
|
|
||||||
0x00000004,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00020002,
|
|
||||||
0xf000f000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x003fffff,
|
|
||||||
0x0000000e,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
|
|
||||||
//Maxdata read
|
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
@ -69,8 +32,59 @@
|
|||||||
0x0000000e,
|
0x0000000e,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
|
//InputB
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000004,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0xffffffff,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x003fffff,
|
||||||
|
0x0000000e,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
//InputA2
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00001000,
|
||||||
|
0x00000004,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00020002,
|
||||||
|
0xffffffff,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x003fffff,
|
||||||
|
0x0000000e,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
//InputB2
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00001000,
|
||||||
|
0x00000004,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x00020002,
|
||||||
|
0xffffffff,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
0x003fffff,
|
||||||
|
0x0000000e,
|
||||||
|
0x00000000,
|
||||||
|
0x00000000,
|
||||||
|
|
||||||
//Maxdata write
|
//Maxdata
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
@ -89,7 +103,7 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
|
|
||||||
//KI0
|
//KI0
|
||||||
0x00000295,
|
0x00000400,
|
||||||
0x00000400,
|
0x00000400,
|
||||||
0x00007600,
|
0x00007600,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
@ -105,39 +119,3 @@
|
|||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
0x00000000,
|
0x00000000,
|
||||||
|
|
||||||
//index1
|
|
||||||
0x02434241,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
|
|
||||||
//index2
|
|
||||||
0x02424140,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
||||||
0x00000000,
|
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -14,11 +14,11 @@
|
|||||||
BIU1:Load(T0)(A++) -> M[2](Mode0);//InputB
|
BIU1:Load(T0)(A++) -> M[2](Mode0);//InputB
|
||||||
BIU1:Load(T0)(A++) -> M[3](Mode0);//InputA2
|
BIU1:Load(T0)(A++) -> M[3](Mode0);//InputA2
|
||||||
BIU1:Load(T0)(A++) -> M[4](Mode0);//InputB2
|
BIU1:Load(T0)(A++) -> M[4](Mode0);//InputB2
|
||||||
BIU1:Load(T0)(A++) -> M[5](Mode0);//useless
|
//BIU1:Load(T0)(A++) -> M[5](Mode0);//useless
|
||||||
BIU1:Load(T0)(A++) -> M[6](Mode0);//Maxdata
|
BIU1:Load(T0)(A++) -> M[6](Mode0);//Maxdata
|
||||||
BIU1:Load(T0)(A++) -> M[63](Mode0);//KI0
|
BIU1:Load(T0)(A++) -> M[63](Mode0);//KI0
|
||||||
BIU1:Load(T0)(A++) -> SHU0.T0(Mode0);//index1
|
//BIU1:Load(T0)(A++) -> SHU0.T0(Mode0);//index1
|
||||||
BIU1:Load(T0)(A++) -> SHU0.T4(Mode0);//index2
|
//BIU1:Load(T0)(A++) -> SHU0.T4(Mode0);//index2
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
@ -75,24 +75,6 @@ Sum_1024:
|
|||||||
IMA3:V(1) -> IMA3.T1;
|
IMA3:V(1) -> IMA3.T1;
|
||||||
IMA3:V(0) -> IMA3.T0;
|
IMA3:V(0) -> IMA3.T0;
|
||||||
IMA1:V(0) -> IMA1.T0;
|
IMA1:V(0) -> IMA1.T0;
|
||||||
/*IMA0:ReadMR(L)-> SHU0.T1(Mode0);
|
|
||||||
IMA0:ReadMR(O1)-> SHU0.T2(Mode0);
|
|
||||||
IMA0:ReadMR(O1)-> IMA2.T2(Mode0);
|
|
||||||
R0:M[3] -> BIU0.T0(Mode0);
|
|
||||||
R3:M[4] -> BIU3.T0(Mode0);
|
|
||||||
IMA1:0+0*0(ShiftMode0)(C)(B)(SSS)(T) -> IMA1.MR(Mode0);
|
|
||||||
IMA3:V(1) -> IMA3.T1;
|
|
||||||
IMA3:V(0) -> IMA3.T0;
|
|
||||||
IMA1:V(0) -> IMA1.T0;
|
|
||||||
SHU0:Index(T1,T0)(Mode0);
|
|
||||||
SHU0:Index(T2,T0)->IMA2.T1(Mode0);
|
|
||||||
IMA2:T2 >> 2 (W) (U) -> SHU0.T2;
|
|
||||||
NOP;
|
|
||||||
IMA2:T1 >> 2 (W) (U) -> SHU0.T1;
|
|
||||||
NOP;
|
|
||||||
NOP;
|
|
||||||
SHU0:Index(T1,T4)(Mode0);
|
|
||||||
SHU0:Index(T2,T4)->IMA1.T3(Mode0);*/
|
|
||||||
MFetch:LPTO %Slide_Win @(KI2 - 0);
|
MFetch:LPTO %Slide_Win @(KI2 - 0);
|
||||||
BIU0:Load(T0)(A++) -> IMA0.T0(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T1(Mode0);
|
BIU0:Load(T0)(A++) -> IMA0.T0(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T1(Mode0);
|
||||||
BIU0:Load(T0)(A++) -> IMA0.T2(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T3(Mode0);
|
BIU0:Load(T0)(A++) -> IMA0.T2(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T3(Mode0);
|
||||||
@ -145,21 +127,11 @@ Slide_Win:
|
|||||||
NOP;
|
NOP;
|
||||||
BIU2:Store(T1,T0)(Mode0)(A++);
|
BIU2:Store(T1,T0)(Mode0)(A++);
|
||||||
BIU2:Store(T2,T0)(Mode0)(A++);
|
BIU2:Store(T2,T0)(Mode0)(A++);
|
||||||
BIU2:Store(T3,T0)(Mode0)(A++);
|
//BIU2:Store(T3,T0)(Mode0)(A++);
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
IMA0:ReadMR(L)-> BIU2.T1(Mode0);
|
|
||||||
IMA0:ReadMR(O1)-> BIU2.T2(Mode0);
|
|
||||||
NOP;
|
|
||||||
NOP;
|
|
||||||
NOP;
|
|
||||||
NOP;
|
|
||||||
NOP;
|
|
||||||
BIU2:Store(T1,T0)(Mode0)(A++);
|
|
||||||
BIU2:Store(T2,T0)(Mode0)(A++);
|
|
||||||
NOP;
|
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
|
@ -10,13 +10,13 @@
|
|||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
BIU1:Load(T0)(A++) -> M[0](Mode0);
|
BIU1:Load(T0)(A++) -> M[0](Mode0);
|
||||||
BIU1:Load(T0)(A++) -> M[1](Mode0);//InputA2
|
BIU1:Load(T0)(A++) -> M[1](Mode0);//InputA
|
||||||
BIU1:Load(T0)(A++) -> M[2](Mode0);//InputB2
|
BIU1:Load(T0)(A++) -> M[2](Mode0);//InputB
|
||||||
BIU1:Load(T0)(A++) -> M[3](Mode0);//Maxdata read
|
BIU1:Load(T0)(A++) -> M[3](Mode0);//InputA2
|
||||||
BIU1:Load(T0)(A++) -> M[4](Mode0);//Maxdata write
|
BIU1:Load(T0)(A++) -> M[4](Mode0);//InputB2
|
||||||
|
//BIU1:Load(T0)(A++) -> M[5](Mode0);//useless
|
||||||
|
BIU1:Load(T0)(A++) -> M[6](Mode0);//Maxdata
|
||||||
BIU1:Load(T0)(A++) -> M[63](Mode0);//KI0
|
BIU1:Load(T0)(A++) -> M[63](Mode0);//KI0
|
||||||
BIU1:Load(T0)(A++) -> SHU0.T0(Mode0);//index1
|
|
||||||
BIU1:Load(T0)(A++) -> SHU0.T4(Mode0);//index2
|
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
@ -25,17 +25,20 @@
|
|||||||
R0:M[0] -> IMA0.T0(Mode0);
|
R0:M[0] -> IMA0.T0(Mode0);
|
||||||
R0:M[1] -> BIU0.T0(Mode0) || R1:M[0] -> IMA1.T0(Mode0);
|
R0:M[1] -> BIU0.T0(Mode0) || R1:M[0] -> IMA1.T0(Mode0);
|
||||||
R3:M[2] -> BIU3.T0(Mode0) || R2:M[0] -> IMA2.T0(Mode0);
|
R3:M[2] -> BIU3.T0(Mode0) || R2:M[0] -> IMA2.T0(Mode0);
|
||||||
R2:M[3] -> BIU2.T0(Mode0) || R3:M[0] -> IMA3.T0(Mode0);
|
R3:M[0] -> IMA3.T0(Mode0);
|
||||||
R2:M[4] -> BIU2.T1(Mode0);
|
|
||||||
R5:PreConfig(M[63])(Mode0);
|
R5:PreConfig(M[63])(Mode0);
|
||||||
R5:WriteConf(Mfetch)->KI[0-3](Mode0)||IMA0:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
|
R5:WriteConf(Mfetch)->KI[0-3](Mode0)||IMA0:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
|
||||||
R5:WriteConf(Mfetch)->KI[4-7](Mode0)||IMA1:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
|
R5:WriteConf(Mfetch)->KI[4-7](Mode0)||IMA1:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
|
||||||
IMA2:SetShiftMode(T0) -> SHIFTMODE0(Mode0)||R2:M[6]->BIU2.T0(Mode0);
|
IMA2:SetShiftMode(T0) -> SHIFTMODE0(Mode0)||R2:M[6]->BIU2.T0(Mode0);
|
||||||
IMA0:0+0*0(ShiftMode0)(C)(B)(SSS)(T) -> IMA0.MR(Mode0);
|
IMA0:0+0*0(ShiftMode0)(C)(B)(SSS)(T) -> IMA0.MR(Mode0);
|
||||||
BIU2:Load(T0)(A++) -> IMA1.T0(Mode0);
|
NOP;
|
||||||
BIU2:Load(T0)(A++) -> IMA1.T3(Mode0);
|
NOP;
|
||||||
BIU2:Load(T0)(A++) -> IMA0.T1(Mode0);
|
NOP;
|
||||||
BIU2:Load(T0)(A++) -> IMA0.T2(Mode0);
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
MFetch:LPTO %Sum_1024 @(KI0 - 0);
|
||||||
|
BIU0:Load(T0)(A++) -> IMA0.T1(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T2(Mode0);
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
@ -46,11 +49,31 @@
|
|||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
IMA0:SetMR(T1)(O1) (Mode0);
|
IMA0: MR+T1*T2(ShiftMode0)(C)(S)(SSS)(T) -> IMA0.MR(Mode0);
|
||||||
IMA0:SetMR(T2)(L) (Mode0);
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
//IMA0:SetMR(0)(H)(Mode0);
|
||||||
|
Sum_1024:
|
||||||
|
//IMA0: MR + 0*0(ShiftMode0)(C)(S)(SSS)(T) -> IMA0.T3(Mode0);
|
||||||
|
R0:M[3] -> BIU0.T0(Mode0);
|
||||||
|
R3:M[4] -> BIU3.T0(Mode0);
|
||||||
|
IMA0:ReadMR(L)->IMA2.T0;//real
|
||||||
|
IMA0:ReadMR(O1)->IMA2.T2;//overflow real
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
IMA2:T0>>10(W)(U)->T0;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
IMA2:T2>>16(W)(U)->T2;
|
||||||
|
IMA2:Ttmp<<22(W)(T)->IMA2.T2;
|
||||||
|
IMA2:T0+Ttmp(W)(U)->IMA1.T3;
|
||||||
IMA3:V(1) -> IMA3.T1;
|
IMA3:V(1) -> IMA3.T1;
|
||||||
IMA3:V(0) -> IMA3.T0;
|
IMA3:V(0) -> IMA3.T0;
|
||||||
IMA1:V(0) -> IMA1.T0;
|
IMA1:V(0) -> IMA1.T0;
|
||||||
|
|
||||||
MFetch:LPTO %Slide_Win @(KI2 - 0);
|
MFetch:LPTO %Slide_Win @(KI2 - 0);
|
||||||
BIU0:Load(T0)(A++) -> IMA0.T0(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T1(Mode0);
|
BIU0:Load(T0)(A++) -> IMA0.T0(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T1(Mode0);
|
||||||
BIU0:Load(T0)(A++) -> IMA0.T2(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T3(Mode0);
|
BIU0:Load(T0)(A++) -> IMA0.T2(Mode0)||BIU3:Load(T0)(A++) -> IMA0.T3(Mode0);
|
||||||
@ -94,13 +117,19 @@ Slide_Win:
|
|||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
IMA1:T0 -> BIU2.T2;
|
IMA1:T0 -> BIU2.T1;
|
||||||
IMA1:T3 -> BIU2.T3;
|
IMA1:T3 -> BIU2.T2;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
BIU2:Store(T1,T0)(Mode0)(A++);
|
||||||
|
BIU2:Store(T2,T0)(Mode0)(A++);
|
||||||
|
//BIU2:Store(T3,T0)(Mode0)(A++);
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
BIU2:Store(T2,T1)(Mode0)(A++);
|
|
||||||
BIU2:Store(T3,T1)(Mode0)(A++);
|
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
NOP;
|
NOP;
|
||||||
@ -109,4 +138,3 @@ Slide_Win:
|
|||||||
NOP;
|
NOP;
|
||||||
MFetch:REPEAT @(10);
|
MFetch:REPEAT @(10);
|
||||||
MFetch:MPU.STOP;
|
MFetch:MPU.STOP;
|
||||||
|
|
||||||
|
@ -3,11 +3,11 @@
|
|||||||
void SlidingCorrelation(int ConfigAddr, int InAddr1, int InAddr2, int MaxAddr) {
|
void SlidingCorrelation(int ConfigAddr, int InAddr1, int InAddr2, int MaxAddr) {
|
||||||
volatile unsigned int *Para = (volatile unsigned int *)ConfigAddr;
|
volatile unsigned int *Para = (volatile unsigned int *)ConfigAddr;
|
||||||
|
|
||||||
Para[16*1+0] = InAddr1;
|
Para[16*1+0] = InAddr1;
|
||||||
Para[16*2+0] = InAddr2;
|
Para[16*2+0] = InAddr2;
|
||||||
Para[16*3+0] = InAddr1;
|
Para[16*3+0] = InAddr1;
|
||||||
Para[16*3+1] = InAddr1;
|
Para[16*3+1] = InAddr1;
|
||||||
Para[16*4+0] = InAddr2;
|
Para[16*4+0] = InAddr2;
|
||||||
Para[16*4+1] = InAddr2;
|
Para[16*4+1] = InAddr2;
|
||||||
Para[16*6+0] = MaxAddr;
|
Para[16*5+0] = MaxAddr;
|
||||||
}
|
}
|
||||||
|
@ -3,11 +3,12 @@
|
|||||||
void SlidingCorrelationSecond(int ConfigAddr, int InAddr1, int InAddr2, int MaxAddr) {
|
void SlidingCorrelationSecond(int ConfigAddr, int InAddr1, int InAddr2, int MaxAddr) {
|
||||||
volatile unsigned int *Para = (volatile unsigned int *)ConfigAddr;
|
volatile unsigned int *Para = (volatile unsigned int *)ConfigAddr;
|
||||||
|
|
||||||
Para[16*1+0] = InAddr1;
|
Para[16*1+0] = InAddr1;
|
||||||
Para[16*1+1] = InAddr1;
|
Para[16*2+0] = InAddr2;
|
||||||
Para[16*2+0] = InAddr2;
|
Para[16*3+0] = InAddr1;
|
||||||
Para[16*2+1] = InAddr2;
|
Para[16*3+1] = InAddr1;
|
||||||
Para[16*3+0] = MaxAddr;
|
Para[16*4+0] = InAddr2;
|
||||||
Para[16*4+0] = MaxAddr;
|
Para[16*4+1] = InAddr2;
|
||||||
|
Para[16*5+0] = MaxAddr;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
@ -39,8 +39,8 @@ __DM3 int ConfigMatrix2[] = {
|
|||||||
|
|
||||||
__DM1 int slice1[1055]; // 用于存储Input1切片数据
|
__DM1 int slice1[1055]; // 用于存储Input1切片数据
|
||||||
__DM2 int slice2[1055]; // 用于存储Input2切片数据
|
__DM2 int slice2[1055]; // 用于存储Input2切片数据
|
||||||
__DM5 int MaxData[4];//bestposition maxsum lastsum
|
__DM5 int MaxData[2];//bestposition maxsum lastsum
|
||||||
__DM5 int MaxData2[4];//bestposition maxsum
|
__DM5 int MaxData2[2];//bestposition maxsum
|
||||||
__DM0 int result[2]; // 存储SyncVer微码模块的计算结果
|
__DM0 int result[2]; // 存储SyncVer微码模块的计算结果
|
||||||
|
|
||||||
__DM4 int OutputData2[1055];
|
__DM4 int OutputData2[1055];
|
||||||
@ -78,10 +78,10 @@ int main(void) {
|
|||||||
SlidingCorrelationAsm(SVRReg);
|
SlidingCorrelationAsm(SVRReg);
|
||||||
a = __ucps2_getStatB();
|
a = __ucps2_getStatB();
|
||||||
__ucps2_delay();
|
__ucps2_delay();
|
||||||
MaxData2[0] = MaxData[0];
|
maxPosition = MaxData[0]&0x0000ffff;
|
||||||
MaxData2[1] = MaxData[1];
|
maxsum = MaxData[1];
|
||||||
MaxData2[2] = MaxData[2];
|
printf("初步同步位置:%d\n", maxPosition);
|
||||||
MaxData2[3] = MaxData[3];
|
printf("maxsum:%d\n", maxsum);
|
||||||
//second part
|
//second part
|
||||||
SlidingCorrelationSecond((int)ConfigMatrix2, MPU_ADDR(Input1_part2), MPU_ADDR(Input2_part2), MPU_ADDR(MaxData2));
|
SlidingCorrelationSecond((int)ConfigMatrix2, MPU_ADDR(Input1_part2), MPU_ADDR(Input2_part2), MPU_ADDR(MaxData2));
|
||||||
SVRReg[0] = MPU_ADDR(ConfigMatrix2);
|
SVRReg[0] = MPU_ADDR(ConfigMatrix2);
|
||||||
@ -89,7 +89,8 @@ int main(void) {
|
|||||||
a = __ucps2_getStatB();
|
a = __ucps2_getStatB();
|
||||||
__ucps2_delay();
|
__ucps2_delay();
|
||||||
uint32_t time1 = tick();
|
uint32_t time1 = tick();
|
||||||
if(0==MaxData2[0])
|
|
||||||
|
/*if(0==MaxData2[0])
|
||||||
{
|
{
|
||||||
if(MaxData[1]==MaxData2[1])
|
if(MaxData[1]==MaxData2[1])
|
||||||
{
|
{
|
||||||
@ -104,13 +105,14 @@ int main(void) {
|
|||||||
{
|
{
|
||||||
maxPosition = MaxData2[0]&0x0000ffff+DATA_SIZE/2-1;
|
maxPosition = MaxData2[0]&0x0000ffff+DATA_SIZE/2-1;
|
||||||
maxsum = MaxData2[1];
|
maxsum = MaxData2[1];
|
||||||
};
|
};*/
|
||||||
// 设置同步标志
|
// 设置同步标志
|
||||||
is_synced = 1;
|
is_synced = 1;
|
||||||
|
|
||||||
printf("初步同步位置:%d\n", maxPosition);
|
maxPosition = MaxData2[0]&0x0000ffff;
|
||||||
printf("maxsum:%d\n", maxsum);
|
maxsum = MaxData2[1];
|
||||||
printf("time:%d\n", time1-time0);
|
printf("初步同步位置:%d\n", maxPosition);
|
||||||
|
printf("maxsum:%d\n", maxsum);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*// 同步后,执行精确同步位置计算
|
/*// 同步后,执行精确同步位置计算
|
||||||
|
Loading…
x
Reference in New Issue
Block a user