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删除重复的common头文件

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HUOHUO 2025-03-23 09:59:49 -07:00
parent 2ab786a894
commit 73177755b0
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123
APE4/ApeTask/inc/common.h
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/******************************************************************
* @file nr_common.h
* @brief: [file description]
* @author: xuekun.zhang
* @Date 2022年1月10日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2022年1月10日 xuekun.zhang create file
*****************************************************************/
#ifndef COMMON_VARS_H
#define COMMON_VARS_H
/**************************include******************************/
#include "type_define.h"
#include "mem_def.h"
#include "ucps2.h"
#include "ucps2-intrin.h"
#include "interface_fapi_tasks.h"
#include "phy_msg_func.h"
#define APE0_CORE_ID 0
#define APE1_CORE_ID 1
#define APE2_CORE_ID 2
#define APE3_CORE_ID 3
#define APE4_CORE_ID 4
#define APE5_CORE_ID 5
#define APE6_CORE_ID 6
#define APE7_CORE_ID 7
#define PT_RFM0_CORE_ID 8
#define PT_RFM1_CORE_ID 9
#define ECS_RFM0_CORE_ID 10
#define ECS_RFM1_CORE_ID 11
#define ARM_CORE_ID 12
#define MAX_CORE_ID 13
#define MAX_APE_CORE_ID 8
#define DMA_DIR_L2G 0
#define DMA_DIR_G2L 1
#define DMA_DIR_G2G 1
#define DMA_REG_GROUP0 0
#define DMA_REG_GROUP1 1
#define DMA_REG_GROUP2 2
#define DMA_REG_GROUP3 3
//PUCCH & PUSCH公用PUCCH SM查找表内部结构偏移宏定义
/**************************define******************************/
#define LOAD_EX_W(ptr) __ucps2_load_ext_mem((char*)ptr, f_W)
#define LOAD_EX_S(ptr) __ucps2_load_ext_mem((char*)ptr, f_S)
#define LOAD_EX_B(ptr) __ucps2_load_ext_mem((char*)ptr, f_B)
#define STORE_EX_W(ptr, value) __ucps2_store_ext_mem((char*)ptr, value, f_W)
#define STORE_EX_S(ptr, value) __ucps2_store_ext_mem((char*)ptr, value, f_S)
#define STORE_EX_B(ptr, value) __ucps2_store_ext_mem((char*)ptr, value, f_B)
#define LOAD_EX_V_W(ptr) __ucps2_load_ext_mem_v((char*)ptr, f_W)
#define LOAD_EX_V_S(ptr) __ucps2_load_ext_mem_v((char*)ptr, f_S)
#define LOAD_EX_V_B(ptr) __ucps2_load_ext_mem_v((char*)ptr, f_B)
#define WAIT_MPU_STOP __ucps2_getStatB(); __ucps2_delay()
//38.214 Table 5.1.3.1-2: MCS index table 1 for PDSCH/PUSCH
extern uint16_t g_mcs_table_1[32][3];
//38.214 Table 5.1.3.1-2: MCS index table 2 for PDSCH/PUSCH
extern uint16_t g_mcs_table_2[32][3];
//38.214 Table 5.1.3.1-3: MCS index table 3 for PDSCH/PUSCH
extern uint16_t g_mcs_table_3[32][3];
// extern uint16_t g_zc_table[8][8];
extern uint16_t g_zc_table[50];
extern uint8_t g_ils_table[51];
extern uint16_t g_nprb_lbrm_table[7];
extern uint32_t g_tbsize_lbrm_256qam_table[7];
extern uint32_t g_tbsize_lbrm_64qam_table[7];
extern uint8_t g_dmrstype1_delta_table[8];//{1000,1001,...,1007}
extern uint8_t g_dmrstype2_delta_table[12];//{1000,1001,...,1011}
extern int8_t g_dmrstype1_wf_pk_table[8][2];
extern int8_t g_dmrstype2_wf_pk_table[12][2];
extern int8_t g_dmrstype1_wt_pl_table[8][2];
extern int8_t g_dmrstype2_wt_pl_table[12][2];
extern uint16_t g_zc_lift_sizearray[51];
extern uint8_t g_zc_iLs[51];
extern uint32_t g_dm_malloc_count[4];
extern uint32_t g_dm_malloc_err_count[4];
extern uint32_t g_dm_free_count[4] ;
extern phy_com_param_t* g_phy_com_param;
extern phy_tasks_mgr_reg_t* g_phy_tasks_mgr_ptr;
extern msg_ring_buffer_t* g_phy_msg_buffer;
//求10log10查找表静态变量声明，上行信道公用
extern const int16_t c_tb_dB[32][3];
extern const int16_t c_dBcal_value_comp_table[70];
/**************************function******************************/
//extern void wait_mpu_stop();
extern uint64_t ceil_long_fix(uint64_t a_numerator, uint64_t a_denominator);
extern int64_t floor_long_fix(int64_t a_numerator, int64_t a_denominator);
extern int ceil_fix(int a_numerator, int a_denominator);
extern int floor_fix(int a_numerator, int a_denominator);
extern int round_fix(int a_numerator, int a_denominator);
extern int * dmalloc_unit(uint32_t len, uint8_t dm_index);
extern int * dmemalign_unit(uint32_t align_addr, uint32_t len, uint8_t dm_index);
extern void dfree_unit(int *val_ptr, uint8_t dm_index);
int phase_compensation(uint32_t a_f0, uint32_t *phase, uint32_t dl);
//求10log10函数声明，上行信道公用
int16_t Calc_10Log10(int32_t real_value, uint8_t Q_in, uint8_t Q_out);
extern char *osp_heap_malloc(uint32_t size);
extern uint8_t CRC6Check(uint32_t *dataIn, uint8_t *crc6Lut, uint8_t bitLen, uint32_t **dataOut);
#endif

10
APE4/ApeTask/inc/debug_addr.h
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#ifndef DEBUG_ADDR_H
#define DEBUG_ADDR_H
#include <type_define.h>
#define DEBUG_TASK_MSG_ADDR (0x88000000)
#define DEBUG_MSG_TRAN_SEND_ADDR (0x88001000)
#endif

52
APE4/ApeTask/inc/error_record.h
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/******************************************************************
* @file error_record.h
* @brief: [file description]
* @author: guicheng.liu
* @Date 2022年9月29日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2022年9月29日 guicheng.liu create file
*****************************************************************/
#ifndef ERROR_RECORD_H
#define ERROR_RECORD_H
#include <type_define.h>
#define ERROR_RECORD_DEFINE_BASE (0)
#define ERROR_RECORD_STEP (40) // max 40 errors for each task
#define ERROR_CONFIG (ERROR_RECORD_DEFINE_BASE + 0*ERROR_RECORD_STEP)
#define ERROR_FAPI (ERROR_RECORD_DEFINE_BASE + 1*ERROR_RECORD_STEP)
#define ERROR_SSB (ERROR_RECORD_DEFINE_BASE + 2*ERROR_RECORD_STEP)
#define ERROR_PDCCH (ERROR_RECORD_DEFINE_BASE + 3*ERROR_RECORD_STEP)
#define ERROR_PDSCH (ERROR_RECORD_DEFINE_BASE + 4*ERROR_RECORD_STEP)
#define ERROR_CSIRS (ERROR_RECORD_DEFINE_BASE + 5*ERROR_RECORD_STEP)
#define ERROR_DEOFDM (ERROR_RECORD_DEFINE_BASE + 6*ERROR_RECORD_STEP)
#define ERROR_PUSCH_SYM (ERROR_RECORD_DEFINE_BASE + 7*ERROR_RECORD_STEP)
#define ERROR_PUSCH_CB (ERROR_RECORD_DEFINE_BASE + 7*ERROR_RECORD_STEP + (ERROR_RECORD_STEP >> 1))
//#define ERROR_PUSCH_CB (ERROR_RECORD_DEFINE_BASE + 9*ERROR_RECORD_STEP)
#define ERROR_PUCCH (ERROR_RECORD_DEFINE_BASE + 8*ERROR_RECORD_STEP)
#define ERROR_PRACH (ERROR_RECORD_DEFINE_BASE + 9*ERROR_RECORD_STEP)
#define ERROR_SRS (ERROR_RECORD_DEFINE_BASE + 10*ERROR_RECORD_STEP)
//6*4*40*11=10560byte,最大不能超过SM1_ERROR_RECORD_CNT_LEN
//只记录第一个error,共记录6(24byte)个参数:共5个入参+coreid
#define ERROR_RECORD(err_no, val0, val1, val2, val3) \
{\
uint32_t offset = (err_no)*24;\
uint32_t core_id = get_core_id();\
if (0 == LOAD_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset)))\
{\
STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset), (int)err_no);\
STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+4), (int)core_id);\
STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+8), (int)val0);\
STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+12), (int)val1);\
STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+16), (int)val2);\
STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+20), (int)val3);\
}\
}
#endif

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APE4/ApeTask/inc/log_interface.h
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/******************************************************************
* @file log_interface.h
* @brief: [file description]
* @author: guicheng.liu
* @Date 2021年3月9日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2021年3月9日 guicheng.liu create file
*****************************************************************/
#ifndef LOG_INTERFACE_H
#define LOG_INTERFACE_H
#include <type_define.h>
#include "osp_interface.h"
#include "common.h"
//log 相关宏定义
//LOG_DD_HEADER_SIZE 由平台提供接口, 目前为12
#define OSP_MSG_HEAD_LEN (12)
#define LOG_DD_HEADER_SIZE (OSP_MSG_HEAD_LEN)
#define LOG_HEADER_SIZE sizeof(log_msg_header_t)
#define LOG_TOTAL_HDR_SIZE (LOG_DD_HEADER_SIZE + LOG_HEADER_SIZE)
#define LOG_MAX_LEN_BYTE (512)
#define LOG_MAX_LEN_WORD (LOG_MAX_LEN_BYTE >> 2)
#define LOG_MAX_CONTENT_SIZE (LOG_MAX_LEN_BYTE - LOG_TOTAL_HDR_SIZE)
#define LOG_DM_BUF_NUM (8)
#define LOG_DEFINE_BASE (0)
#define LOG_DEFINE_STEP (100)
//msg_type 各模块分配号码段
#define STRING_LOG (LOG_DEFINE_BASE + 0*LOG_DEFINE_STEP)
#define MAIN_LOG (LOG_DEFINE_BASE + 0*LOG_DEFINE_STEP + 1)
#define FAPI_LOG (LOG_DEFINE_BASE + 1*LOG_DEFINE_STEP)
#define SSB_LOG (LOG_DEFINE_BASE + 2*LOG_DEFINE_STEP)
#define PDCCH_LOG (LOG_DEFINE_BASE + 3*LOG_DEFINE_STEP)
#define PDSCH_LOG (LOG_DEFINE_BASE + 4*LOG_DEFINE_STEP)
#define DEOFDM_LOG (LOG_DEFINE_BASE + 5*LOG_DEFINE_STEP)
#define PUSCH_LOG (LOG_DEFINE_BASE + 6*LOG_DEFINE_STEP)
#define PUCCH_LOG (LOG_DEFINE_BASE + 7*LOG_DEFINE_STEP)
#define PRACH_LOG (LOG_DEFINE_BASE + 8*LOG_DEFINE_STEP)
/*buf_type: 0：用户申请的静态DM空间，1:用户自定义的DM空间
msgAddr：当bufType为0时，给出申请的静态空间首地址，当bufType为1时，给出用户自定义的DM空间地址 */
//void log_output(uint8_t level, uint8_t task_id, uint16_t msg_type,
// uint16_t sfn, uint16_t slot, uint16_t slot_offset, uint8_t msg_len, uint8_t buf_type, char* msg_addr);
//void set_log_level(log_level_e level);
//
//void log_sprintf(log_level_e level, const char *fmt, ...);
//#define LOG_INFO_S(level, fmt, ...) LOG_INFO_S(level, fmt, ## __VA_ARGS__)
//字符串log输出方式宏定义
#define LOG_CMD_S(fmt, ...) log_sprintf(CMD, "[CMD]"fmt, ## __VA_ARGS__)
#define LOG_ERROR_S(fmt, ...) log_sprintf(ERROR, "[ERR]"fmt, ## __VA_ARGS__)
#define LOG_WARN_S(fmt, ...) log_sprintf(WARN, "[WARN]"fmt, ## __VA_ARGS__)
#define LOG_INFO_S(fmt, ...) log_sprintf(INFO, "[INFO]"fmt, ## __VA_ARGS__)
#define LOG_DEBUG_S(fmt, ...) log_sprintf(DEBUG, "[DBG]"fmt, ## __VA_ARGS__)
//字节流log输出方式宏定义
#define LOG_CMD(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr) \
log_output(CMD, task_id, msg_type, sfn, slot,slot_offset, buf_type, msg_len, msg_addr)
#define LOG_ERROR(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr) \
log_output(ERROR, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)
#define LOG_WARN(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr) \
log_output(WARN, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)
#define LOG_INFO(task_id, msg_type, sfn, slot, slot_offset,buf_type, msg_len, msg_addr) \
log_output(INFO, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)
#define LOG_DEBUG(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr) \
log_output(DEBUG, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)
//串口log输出宏定义
#define LOG_PRINTF(fmt, ...) //osp_printf(fmt"\n\r", ## __VA_ARGS__)
//log 相关结构体定义
typedef enum
{
CMD,
ERROR,
WARN,
INFO,
DEBUG
} log_level_e;
typedef struct log_msg_header
{
uint32_t sync_flag : 9;// 0x13C
uint32_t msg_level : 3;
uint32_t msg_type : 12;//log msg type
uint32_t slot : 8;
uint32_t sfn : 10;//sfn + slot * 1024
uint32_t slot_offset : 10;
uint32_t msg_len : 9;//不包含log_header的长度
uint32_t msgNo : 3;//消息号
char buffer[];
}log_msg_header_t;
void set_log_level(log_level_e level);
void log_pool_init();
char *log_buf_alloc_static();
void log_output(uint8_t level, uint8_t task_id, uint16_t msg_type,
uint16_t sfn, uint16_t slot, uint16_t slot_offset, uint8_t buf_type, uint16_t msg_len, char* msg_addr);
void log_sprintf(log_level_e level, const char *fmt, ...);
#endif

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APE4/ApeTask/inc/mem_def.h
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/******************************************************************
* @file ucp_mem_def.h
* @brief: 两片UCP的内存分布头文件
* @author: xuekun.zhang
* @Date 2021年1月5日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2021年1月5日 xuekun.zhang create file
*****************************************************************/
#ifndef UCP_MEM_DEF_H
#define UCP_MEM_DEF_H
//！命名宏定义时需要注意UCP使用的地址
/*********************************UCP************************************************/
#define SM0_BASE (0x09D00000)//1M
#define SM1_BASE (0x09E00000)//1M
#define SM2_BASE (0x09F00000)//1.5M
#define SM3_BASE (0x0A080000)//1.5M
#define SM4_BASE (0x0A200000)//1.5M
#define SM5_BASE (0x0A380000)//1.5M
//len define
//SM0
#define SM0_RECEIVER_CFG_LEN 0x00000400 //1K
#define SM0_TRACE_LEN 0x00000400 //1K
//SM1
#define TIME_DATA_SLOT_LEN 0x0003c000 //61440*4byte = 240k
//SM3
#define SM3_NR_PUCCH_LUT_LEN 0x00040000 //256K
#define SM3_PHY_MSG_BUFFER_LEN 0x00000400 //1K
//DDR
#define TRACE_GRP_LEN 0x00000200 //128Word
/************************************SM0--1M*************************************************/
#define RECEIVER_SYNC_CFG_BASE (SM0_BASE)
#define RECEIVER_SYMB_CFG_BASE (RECEIVER_SYNC_CFG_BASE + 0x100)
#define RECEIVER_BIT_CFG_BASE (RECEIVER_SYMB_CFG_BASE + 0x100)
/************************************SM1---1M ***********************************************/
#define RECEIVER_SYNC2SYMB_BUFFER0_ADDR (SM1_BASE)
#define RECEIVER_SYNC2SYMB_BUFFER1_ADDR (RECEIVER_SYNC2SYMB_BUFFER0_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYMB_BUFFER2_ADDR (RECEIVER_SYNC2SYMB_BUFFER1_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYMB_BUFFER3_ADDR (RECEIVER_SYNC2SYMB_BUFFER2_ADDR + TIME_DATA_SLOT_LEN)
#define RECEIVER_SYNC2SYNC_FIRST_INF_ADDR (RECEIVER_SYNC2SYMB_BUFFER3_ADDR + TIME_DATA_SLOT_LEN) //LEN: sizeof(receiver_sync_status_t)
/************************************SM2--1.5M***********************************************/
/************************************SM3--1.5M***********************************************/
#define SM3_NR_PUCCH_LUT_ADDR (SM3_BASE)
#define SM3_PHY_MSG_BUFFER_ADDR (SM3_NR_PUCCH_LUT_ADDR + SM3_NR_PUCCH_LUT_LEN)
#define SM3_PHY_TASKS_MGR_ADDR (SM3_PHY_MSG_BUFFER_ADDR + SM3_PHY_MSG_BUFFER_LEN)
/************************************SM4--1.5M***********************************************/
//TODO:地址规划（暂时没用）
#define RECEIVER_OUT1 (SM4_BASE)
#define RECEIVER_OUT2 (SM4_BASE + 0x4000)
#define RECEIVER_OUT3 (SM4_BASE + 0x8000)
/************************************SM5--1.5M***********************************************/
#define RECEIVER_BASE (SM5_BASE) //4k对齐
/**************************************DDR***************************************************/
#define DDR_PHY_BASE (0x6BC00000) //共579M可用0x6BC00000-0x8FFFFFFF
#define DDR_ERROR_RECORD_CNT_ADDR (0x79FF8000)
#define DDR_STATE_RECORD_CNT_ADDR (0x79FFc000)
//
#define JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR (0x6BC00000) //!!!DDR_PHY_BASE 0x1E0000
#define JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR (0x6BDE0000) // 0x1E0000
#define JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR (0x6BFC0000) // 0x1E0000 用于暂存数据供first_sync处理
#define JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR (0x6C1A0000) // 0x1E0000 用于暂存数据供first_sync处理
#define TRACE_RECEIVER_ADDR (0x88700000)
#define TRACE_INIT_ADDR (TRACE_RECEIVER_ADDR) //0x88700000
#define TRACE_SLOTIND_ADDR (TRACE_INIT_ADDR + TRACE_GRP_LEN) //0x88700200
#define TRACE_RECEIVER_SYNC_ADDR (TRACE_SLOTIND_ADDR + TRACE_GRP_LEN) // 0x88700400
#define TRACE_RECEIVER_SYMB_ADDR (TRACE_RECEIVER_SYNC_ADDR + TRACE_GRP_LEN)// 0x88700600
#define TRACE_RECEIVER_BIT_ADDR (TRACE_RECEIVER_SYMB_ADDR + TRACE_GRP_LEN)// 0x88700800
#define TRACE_TESTTASK_ADDR (TRACE_RECEIVER_BIT_ADDR + TRACE_GRP_LEN) // 0x88700a00
#define TRACE_RECEIVER_SYNC_FIRST_ADDR (TRACE_TESTTASK_ADDR + TRACE_GRP_LEN) // 0x88700c00
#define TRACE_RECEIVER_SYNC_FINE_ADDR (TRACE_RECEIVER_SYNC_FIRST_ADDR + TRACE_GRP_LEN) // 0x88700e00
#endif

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APE4/ApeTask/inc/msg_interface.h
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/******************************************************************
* @file msg_interface.h
* @brief: [file description]
* @author: guicheng.liu
* @Date 2022年7月2日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2022年7月2日 guicheng.liu create file
*****************************************************************/
#ifndef MSG_INTERFACE_H
#define MSG_INTERFACE_H
#include <type_define.h>
#include "msg_transfer_layer.h"
#include "debug_addr.h"
uint32_t osp_phy_msg_send( char* msg_ptr,
uint32_t msg_len);
uint32_t osp_phy_multi_msgs_send(uint32_t queue_num,
char** msg_ptr,
uint32_t* msg_len,
uint32_t msg_num);
//uint32_t osp_phy_msg_recv(uint32_t queue_num);
uint32_t osp_phy_msg_free(uint32_t queue_num,
uint32_t el_ind,
char* buf);
//uint32_t osp_phy_msg_open(uint32_t num_tx_queues, queue_info_s *tx_queue_info,
// uint32_t num_rx_queues, queue_info_s *rx_queue_info);
typedef enum
{
TASK_MSG_SEND=0,
TASK_MSG_SEND_OK,
TASK_MSG_SEND_ERR,
TASK_MSG_MAX //3
}task_msg_info_e;
#define TASK_MSG_RECORD(core_id, task_id, state) \
{\
uint32_t offset = ((core_id)*PHY_TASK_MAX + (task_id)*TASK_MSG_MAX + (state))*4;\
STORE_EX_W((char*)(DEBUG_TASK_MSG_ADDR+offset), LOAD_EX_W((char*)(DEBUG_TASK_MSG_ADDR+offset))+1);\
}
#define MSG_TRANSFER_RECORD(core_id, state) \
{\
uint32_t offset = ((core_id)*TASK_MSG_MAX + (state))*4;\
STORE_EX_W((char*)(DEBUG_MSG_TRAN_SEND_ADDR+offset), LOAD_EX_W((char*)(DEBUG_MSG_TRAN_SEND_ADDR+offset))+1);\
}
int32_t phy_et_msg_send(uint32_t msg_addr,
uint32_t msg_len,
uint8_t msg_type,
uint8_t src_core_id,
uint8_t dst_core_id,
uint8_t src_task_id,
uint8_t dst_task_id);
#endif

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APE4/ApeTask/inc/phy_macro.h
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/******************************************************************
* @file nr_phy_macro.h
* @brief: [file description]
* @author: xuekun.zhang
* @Date 2022年1月10日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2022年1月10日 xuekun.zhang create file
*****************************************************************/
#ifndef PHY_MACRO_H
#define PHY_MACRO_H
//PHY LOG SWITCH
#define PHY_LOG_SINGLE_UE_SWITCH
//#define PHY_LOG_MULTIPLE_UE_SWITCH
#define PHY_LOG_ERROR_STR_SWITCH
#define PHY_LOG_INFO_STR_SWITCH
#define PHY_LOG_TIME_REC_SWITCH
#define NR_SLOT_SYMBOL_NUM 14
#define NR_SUBSFN_SLOT_NUM 2
#define NR_SFN_SUBFRAME_NUM 10
#define NR_SFN_SLOT_NUM 20
#define NR_SFN_NUM 1024
#define NR_PERIOD_SLOT_NUM 10
#define NR_PERIOD_SLOT_NUM_1D3U 5
#define NR_CP_LENGTH_SYMBOL0 352
#define NR_CP_LENGTH_NON_SYMBOL0 288
#define NR_SMAPLE_POINT_PER_SYMBOL 4096
#define NR_SAMPLE_POINT_PER_SLOT 61440
#define NR_SAMPLE_RATE 122880
#define NR_RB_SUBCARRIER_NUM 12
#define NR_MAX_NUM_PRBS (273)
// slot 所占的字节数
#define NR_SLOT_DATA_LENGTH (NR_SAMPLE_POINT_PER_SLOT * sizeof(uint32_t))
#define NR_INTEGRATION 0
#define NR_DISTRIBUTED 1
//UL信道类型定义, PUCCH & PUSCH公用
#define NR_UL_CHANNEL_TYPE (CH_AWGN)
#define SCS_15KHZ 0
#define SCS_30KHZ 1
#define SCS_60KHZ 2
#define SCS_120KHZ 3
#define SCS_240KHZ 4
#define NR_FRAME_TYPE_TDD 1
#define NR_FRAME_TYPE_FDD 0
#define NR_CP_TYPE_NORMAL 0
#define NR_CP_TYPE_EXTENDED 1
#define MAX_TASKS_PER_APE 8
#define MAX_APES_PER_CELL 8
#define MAX_CELL_NUM (8)
#define MAX_NR_CELL (4)
#define MAX_UE_NUM (16)
#define MAX_PDSCH_UE_NUM (14)
#define MAX_DCI_NUM (28)
#define TX_MAX_ANTENNA_NUM MAX_NUM_TX_ANTENNAS //TX max antenna num
#define RX_MAX_ANTENNA_NUM MAX_NUM_RX_ANTENNAS //RX max antenna num
#define SI_RNTI 0xFFFF
#define ABS(a) (((a)>0) ? (a) : (-a))
#define MAX(a,b) (((a)>(b)) ? (a) : (b))
#define MIN(a,b) (((a)<(b)) ? (a) : (b))
#endif

45
APE4/ApeTask/inc/phy_msg_func.h
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@ -1,45 +0,0 @@
/******************************************************************
* @file phy_msg_func.h
* @brief: [file description]
* @author: guicheng.liu
* @Date 2022年6月29日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2022年6月29日 guicheng.liu create file
*****************************************************************/
#ifndef FPHY_MSG_FUNC_H
#define FPHY_MSG_FUNC_H
#include <type_define.h>
#define MAX_RING_BUFFER_NUM 8
typedef struct
{
uint32_t el_ind;
uint32_t len;
char* buff;
}buffer_info_t;
typedef struct {
int num;
int head;
int tail;
buffer_info_t buffer[MAX_RING_BUFFER_NUM];
}msg_ring_buffer_t;
void msg_buffer_init();
bool msg_buffer_empty(uint32_t queue_num);
bool msg_buffer_full(msg_ring_buffer_t *ring_buffer);
void enque_msg_buffer(uint32_t queue_num,
uint32_t el_ind,
char* buf,
uint32_t len);
int deque_msg_buffer(uint32_t queue_num,
uint32_t* el_ind,
char** buf,
uint32_t* len);
#endif

37
APE4/ApeTask/inc/phy_struct.h
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#ifndef PHY_STRUCT_H
#define PHY_STRUCT_H
#include <type_define.h>
typedef enum
{
FAPI_SLOT_INDICATION = 0x82,
L1FAPIMSGID_E_CNT
}L1FAPIMsgId_e;
typedef struct
{
uint8_t msgNum;
uint8_t cellIndex;
uint16_t rev;
}L1MsgHdr_t;
/**@brief L1 General Msg Head*/
typedef struct
{
L1FAPIMsgId_e msgId;
uint32_t msgSize;
}L1GeneralMsgHdr_t;
/**@brief Slot indication*/
typedef struct
{
uint16_t SFN;
uint16_t Slot;
}L1SlotIndication_t;
#endif

62
APE4/ApeTask/inc/task_define.h
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/******************************************************************
* @file task_define.h
* @brief: task common define
* @author: guicheng.liu
* @Date 2021年1月21日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2021年1月21日 guicheng.liu create file
*****************************************************************/
#ifndef TASK_DEFINE_H
#define TASK_DEFINE_H
#include <type_define.h>
#include "osp_interface.h"
#include "osp_ape.h"
typedef enum
{
//1-31
PHY_TASK_PRI_BASE=1,
PHY_TASK_PRI_CONFIG,
PHY_TASK_PRI_SLOT_IND,
PHY_TASK_PRI_RECEIVER_SYNC,
PHY_TASK_PRI_RECEIVER_SYMB,
PHY_TASK_PRI_RECEIVER_BIT,
PHY_TASK_PRI_TEST,
PHY_TASK_PRI_RECEIVER_FIRST_SYNC,
PHY_TASK_PRI_EQUAL_PRI, //不需要优先级抢占的任务，设置为该优先级
}task_pri_e;
typedef enum
{
//1-31
PHY_TASK_BASE=1,
PHY_TASK_CONFIG,
PHY_TASK_SLOT_IND,
PHY_TASK_RECIEVER_SYNC,
PHY_TASK_RECIEVER_SYMB,
PHY_TASK_RECIEVER_BIT,
PHY_TASK_TEST,
PHY_TASK_RECIEVER_FIRST_SYNC,
PHY_TASK_PHY_MGR,
PHY_TASK_MAX=32
}task_id_e;
typedef struct
{
task_id_e task_id;
char* task_name;
OSP_TASKINIT_FUNC task_init; /* 任务初始化 */
OSP_TASKENTRY_FUNC task_entry; /* 任务循环体 */
}task_fun_t;
typedef struct
{
uint32_t num_task;
task_fun_t fun[PHY_TASK_MAX];
}task_table_t;
#endif

46
APE4/ApeTask/inc/type_define.h
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/******************************************************************
* @file type_define.h
* @brief: ucp common type define
* @author: guicheng.liu
* @Date 2022年1月10日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2022年1月10日 guicheng.liu create file
*****************************************************************/
#ifndef UCP_DEFINE_H
#define UCP_DEFINE_H
#include <ucps2.h>
#include <stdlib.h>
#include <math.h>
#include <string.h>
#include <ucps2-intrin.h>
#include <malloc.h>
#include <stdio.h>
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef signed short int16_t;
typedef unsigned short uint16_t;
typedef signed int int32_t;
typedef unsigned int uint32_t;
typedef unsigned long long uint64_t;
typedef signed long long int64_t;
typedef unsigned int bool;
#define false 0
#define true 1
#define INVALID_VALUE_U32 0xFFFFFFFF
#define INVALID_VALUE_U16 0xFFFF
#define INVALID_VALUE_U8 0xFF
#define NULLPTR (void *)(0) //!NULL pointer
//#define NULL 0
#define BIT(x) (1 << x)
#endif