tx_rx_version rx part first commit

.gitignore

@@ -0,0 +1,18 @@
+*.o
+*.d
+*.cproject
+*.project
+.settings/
+Debug/
+*.out
+*.a
+!*.config
+!Platform/build/**
+/.metadata/
+/APE0/Receiver_sync/**
+/APE0/TestTask/**
+/APE1/Receiver_symb/**
+/APE2/Receiver_bit/**
+/APE3/Receiver_sync_first/**
+!/APELib/MicroLib/**
+!/Lib/OspLib/**

.vscode/c_cpp_properties.json

@@ -0,0 +1,20 @@
+{
+    "configurations": [
+        {
+            "name": "Linux",
+            "includePath": [
+                "${default}",
+                "${workspaceFolder}/**",
+                "${workspaceFolder}/APELib/Receiver_sync_first/**",
+                "/home/ittc/Software/mcstudio/toolchain/include/ucp2/llvm",
+                "/home/ittc/Software/mcstudio/toolchain/include/ucp2/newlib"
+            ],
+            "defines": [],
+            "compilerPath": "/usr/bin/clang",
+            "cStandard": "c11",
+            "cppStandard": "c++11",
+            "intelliSenseMode": "linux-clang-x64"
+        }
+    ],
+    "version": 4
+}

.vscode/settings.json

@@ -0,0 +1,22 @@
+{
+    "files.associations": {
+        "receiver_func.h": "c",
+        "common.h": "c",
+        "receiver_struct.h": "c",
+        "receiver_sync_func.h": "c",
+        "receiver_sync_struct.h": "c",
+        "ape_common.h": "c",
+        "frame_test.h": "c",
+        "trace.h": "c",
+        "*.dat": "c",
+        "type_define.h": "c",
+        "bytecopy.h": "c",
+        "slidingcorrelation.h": "c",
+        "interface_rec_sync2_rec_sync_first.h": "c",
+        "receiver_symb_func.h": "c",
+        "ape_interface.h": "c",
+        "receiver_sync_first_func.h": "c",
+        "receiver_sync_first_struct.h": "c",
+        "msg_interface.h": "c"
+    }
+}

APE4/ApeCommon/inc/ape_common.h

@@ -0,0 +1,37 @@
+/******************************************************************
+ * @file  ape_common.h
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+#ifndef     APE_COMMON_H
+#define     APE_COMMON_H
+
+/**************************include******************************/
+#include "type_define.h"
+
+#define  APE_DM0      DM0 
+#define  APE_DM1      DM1 
+#define  APE_DM2      DM2 
+#define  APE_DM3      DM3 
+#define  __APE_DM0   __DM0
+#define  __APE_DM1   __DM1
+#define  __APE_DM2   __DM2
+#define  __APE_DM3   __DM3
+
+#define DM_TO_CSU_ADDR(addr)	(((uint32_t)(addr)) - 0x100000)
+#define IM_TO_CSU_ADDR(addr)	((uint32_t)(addr))
+
+#define DMA_TAG_G2L		0
+#define DMA_TAG_L2G 	1
+#define DMA_TAG_G2G 	2
+#define DMA_TAG_CHAIN	3
+
+extern __APE_DM3 v16s32 SVRReg;
+
+#endif

APE4/ApeCommon/src/ape_common.s.c

@@ -0,0 +1,37 @@
+/******************************************************************
+ * @file  ape_common.c
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <ape_common.h>
+#include "log_interface.h"
+/**************************function******************************/
+
+
+//微码配置寄存器
+__APE_DM3 v16s32 SVRReg  = {
+		0, 0, 0, 0,
+		0x40, 0, 0, 0,
+		0xff00ff, 0, 0, 0x0000,
+		0xffff, 0x6, 0, 0
+};
+
+//__APE_DM3 v16s32 SVRReg  = {
+//  0, 0, 0, 0,
+//  0x40, 0, 0, 0,
+//  0xff00ff, 0, 0, 0,
+//  0x003fffff, 0x6, 0, 0
+//};
+//uint32_t g_dma_tag_g2l = DMA_TAG_G2L;
+uint32_t g_dma_tag_l2g = DMA_TAG_L2G;
+//自定义空间的log头定义
+__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2];
+//静态申请log空间
+__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确

APE4/ApeTask/inc/Fucp_Ape0_slot_ind.h

@@ -0,0 +1,17 @@
+#ifndef FUCP_APE0_SLOT_IND_H
+#define FUCP_APE0_SLOT_IND_H
+
+#include "ape_interface.h"
+
+#include "ape_common.h"
+#include "task_define.h"
+#include "log_interface.h"
+#include "msg_interface.h"
+#include "msg_transfer_layer.h"
+#include "drv_ape.h"
+#include "trace.h"
+
+void Slot_ind_Task();
+
+#endif
+

APE4/ApeTask/src/Fucp_Ape0_Init.s.c

@@ -0,0 +1,132 @@
+#ifndef IDE_TEST
+/******************************************************************
+ * @file  Ucp_Ape0_Init.s.c
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2022年1月25日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年1月25日        guicheng.liu       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <type_define.h>
+#include "ape_interface.h"
+
+#include "ape_common.h"
+#include "Fucp_Ape0_slot_ind.h"
+#include "task_define.h"
+#include "log_interface.h"
+#include "Frame_test.h"
+#include "receiver_sync_func.h"
+#include "trace.h"
+
+
+
+/**************************function******************************/
+/*************************************************************************/
+/* 收到消息后创建任务 */
+void ape0_event_task(uint32_t addr, uint32_t size)
+{
+    uint32_t ape_id = get_core_id();
+
+
+    osp_task_info_ex mgr_task1 =
+       {PHY_TASK_SLOT_IND, "Slot_ind", PHY_TASK_PRI_SLOT_IND, 2048, OSP_TIMER_TYPE, 0x000, 0x3FF, 0, NULLPTR, (OSP_TASKENTRY_FUNC)Slot_ind_Task};
+    osp_task_info_ex mgr_task2 =
+      {PHY_TASK_RECIEVER_SYNC, "Receiver_Sync", PHY_TASK_PRI_RECEIVER_SYNC, 2048, OSP_TIMER_TYPE, 0x000, 0x3FF, 50, (OSP_TASKINIT_FUNC)Receiver_Sync_Init, (OSP_TASKENTRY_FUNC)Receiver_Sync_Task};
+    osp_task_info_ex mgr_task3 =
+          {PHY_TASK_TEST, "Test_Task", PHY_TASK_PRI_TEST, 4096, OSP_TIMER_TYPE, 0x000, 0x3FF, 50, NULL, (OSP_TASKENTRY_FUNC)Test_Task};
+   //  osp_task_info_ex mgr_task4 =
+   //    {PHY_TASK_RECIEVER_FIRST_SYNC, "Receiver_Sync_First_Sync", PHY_TASK_PRI_RECEIVER_FIRST_SYNC, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, NULLPTR, (OSP_TASKENTRY_FUNC)Receiver_First_Sync_Proc};      
+
+   TRACE(TRACE_INIT_ADDR, 2, 1);
+
+
+   osp_task_create(&mgr_task1);
+   osp_task_create(&mgr_task2);
+   // osp_task_create(&mgr_task4);
+//    osp_task_create(&mgr_task3);
+
+   TRACE(TRACE_INIT_ADDR, 3, 1);
+    LOG_INFO_S("APE0 finish task create!\n");
+
+   osp_timer_sync(1);
+   TRACE(TRACE_INIT_ADDR, 4, 1);
+   return;
+}
+
+/* 收到消息后删除任务 */
+void ape0_event_task_del(uint32_t addr, uint32_t size)
+{
+    uint32_t ape_id = get_core_id();
+    //osp_del_task_all(NR_SCS_30K);
+
+
+    return;
+}
+
+
+/*!   
+* @brief:  在Phy init的时候注册物理层管理任务
+* @author:  guicheng.liu
+* @Date:  2022年2月28日
+*/
+void Phy_Task_Ape0_Reg()
+{
+    osp_task_info_ex ape0_event_task_info = {50, "ape0_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event_task};
+    osp_task_info_ex ape0_event_task_info_del = {51, "ape0_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event_task_del};
+
+    osp_task_create(&ape0_event_task_info);
+    osp_task_create(&ape0_event_task_info_del);
+
+    return ;
+
+
+
+}
+
+
+/*!   
+* @brief:  Phy初始化函数, 每个APE上都需要有一个名字相同的函数
+* @author:  guicheng.liu
+* @Date:  2022年1月25日
+*/
+void phy_init()
+{
+   TRACE(TRACE_INIT_ADDR, 1, 1);
+   // //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成
+   log_level_e log_level = INFO;
+   log_pool_init();
+   set_log_level(log_level);
+
+	//memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t));
+
+   Phy_Task_Ape0_Reg();
+   TRACE(TRACE_INIT_ADDR, 5, 1);
+}
+
+/*!   
+* @brief:  初始化时钟
+* @author:  guicheng.liu
+* @Date:  2022年11月3日
+*/
+// void soc_drv_init()
+// {
+//    SET_CLK_CFG_EMU();//八个核中的一个核调用
+//    phy_para_init(0, 0);//八个核中的一个核调用
+//    ecs_sram_init();//八个核中的一个核调用
+//    ape_stc_init();//八个核中的一个核调用
+// }
+
+// /*!   
+// * @brief:  初始化stc timer等
+// * @author:  guicheng.liu
+// * @Date:  2022年11月3日
+// */
+// void tod_int_init()
+// {
+//    stc_timer_todint_init();//八个核中的一个核调用
+// }
+#endif

APE4/ApeTask/src/Fucp_Ape0_slot_ind.s.c

@@ -0,0 +1,41 @@
+#include <type_define.h>
+#include "Fucp_Ape0_slot_ind.h"
+#include "phy_struct.h"
+
+__APE_DM0 uint32_t g_slot_ind_dm0[8] = {0}; //32byte
+
+void Slot_ind_Task()
+{
+    uint16_t start_slot = TIME_SLOT();
+    uint16_t start_us = TIME_US();
+    uint16_t end_slot;
+    uint16_t end_us;
+    RUN_CNT(TRACE_SLOTIND_ADDR, 0);
+
+
+    uint32_t cur_sfn = get_rx_nr_sfn();
+    uint32_t cur_slot = get_rx_nr_slot();
+
+    uint32_t msg_general_len = sizeof(L1GeneralMsgHdr_t);
+    uint32_t payload_len = sizeof(L1SlotIndication_t);
+    uint32_t msg_len = sizeof(L1MsgHdr_t) + msg_general_len + payload_len;
+
+    L1MsgHdr_t *msg_header = (L1MsgHdr_t *)g_slot_ind_dm0;
+    L1GeneralMsgHdr_t* msg_general_hdr = (L1GeneralMsgHdr_t*)(msg_header + 1);
+    L1SlotIndication_t *slot_ind = (L1SlotIndication_t *)(msg_general_hdr + 1);
+
+
+    msg_header->msgNum = 1;
+    msg_header->rev = 0;
+
+    msg_general_hdr->msgId = FAPI_SLOT_INDICATION;
+    msg_general_hdr->msgSize = payload_len;
+
+    osp_phy_msg_send((char*)msg_header, msg_len);
+
+    RUN_CNT(TRACE_SLOTIND_ADDR, 1);
+    end_slot = TIME_SLOT();
+    end_us =  TIME_US();
+    
+    TRACE_MAX(TRACE_SLOTIND_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) );
+}

APE4/Makefile

@@ -0,0 +1,144 @@
+############################
+# mpu libs need to link to this APE, could be specified by user
+ MICRO_CODE_LIBS:=ByteCopy SyncVer
+############################
+# tool path, could be specified by user
+#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin
+#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb
+#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0
+#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd
+#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib
+#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2
+
+UCP_HOME=${MaPU_TC_HOME}/bin/ucp2
+GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb
+SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator
+OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb
+LPATH1=${MaPU_TC_HOME}/lib/ucp2/release
+LPATH2=${MaPU_TC_HOME}/lib/ucp2/release
+#############################
+export UCP_HOME
+############################
+# varaibles for project construction using new ucp toolchain
+# DO NOT MODIFY
+SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c")
+SPU_C_FILES:=$(shell find . -name "*.s.c")
+SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES})
+SPU_ASM_FILES:=$(shell find . -name "*.s.asm")
+SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES})
+MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm")
+MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES})
+##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d)
+INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d)
+INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d)
+INC_DIRS+= ../Interface
+INC_DIRS+= ../Inc
+INC_DIRS+=$(shell find ./ -name inc -type d)
+override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS})
+override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST)))
+override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR))))
+ifeq (${mpu}, dyn)
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape0-Cache128-noMPUC-dynamic.ld)
+else
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape0-Cache128-noMPUC.ld)
+endif
+EXE_FILE_NAME=${PROJECT_NAME}.out
+#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS})
+LINK_L_OPTION=-L../Lib
+LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS})
+APE_LINK_L_OPTION=-L../Lib
+APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME})
+ifneq (${MICRO_CODE_LIBS}, )
+  LINK_MPU_L_OPTION=-L../Lib/MicroLib
+  LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS})
+else
+  LINK_MPU_L_OPTION:=
+  LINK_MPU_l_OPTION:=
+endif
+LINK_PLATFORM_L_OPTION=-L../Lib/OspLib
+#LINK_PLATFORM_l_OPTION:=-lape
+ifeq (${tb}, PDSCH)
+	LINK_PLATFORM_l_OPTION:=
+else ifeq (${tb}, DL)
+	LINK_PLATFORM_l_OPTION:=
+else
+	LINK_PLATFORM_l_OPTION:=-lape_spu
+endif
+
+# this flag could be specified by user, default to build debug info
+debug:=0
+export debug
+ifeq (${debug},1)
+	ASM_DEBUG_FLAGS:=-g
+	C_DEBUG_FLAGS:=-O0 -g
+else ifeq (${debug},3)
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O3
+else
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O2
+endif
+############################
+
+all:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		make LIB -C $${dir} ; \
+	done
+
+%.s.c.o: %.s.c
+	@${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION}
+
+%.s.asmb.o: %.s.asm
+	@${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS}
+
+${EXE_FILE_NAME}: 
+	${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \
+	$(LPATH1)/crtend.o \
+	${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \
+	${LINK_L_OPTION} ${LINK_l_OPTION} \
+    ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \
+	${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \
+		-L$(LPATH2) \
+		-L$(LPATH1) -lm -lc -lgloss \
+		-lclang_rt.builtins-ucps2 -T ${LD_SCRIPT}
+
+APP: ${EXE_FILE_NAME}
+
+lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES}
+	ar rcs -o $@ ${SPU_C_OBJECT_FILES}	${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@
+
+LIB: lib${PROJECT_NAME}.a
+
+Dis: APP
+	${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; 
+	#${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; 
+
+# direct simulaton without gui
+DSim: APP
+	@${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \
+		echo "software simulation finished"
+
+DSimGDB: APP
+	@${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \
+		echo "software simulation finished"
+GDB: APP
+	@${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \
+		echo "software GDB finished"
+
+clean:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		if [ -e $${dir} ]; then \
+		  make clean -C $${dir} ; \
+		fi;\
+	done
+	@rm -rf *.lof  *.out  *.map  *.mmap  *.sct  *.tab  *.s  *.dis  *~  *.def *.xml 
+	@rm -rf *.daidir work  *.lib++ *~ *.rc csrc *.key filelist.f simv*
+	@rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log
+	@rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif
+	@rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt Receiver_sync TestTask
+	@rm -rf Executed_Pipeline.csv
+	@find . -name "*.o" -exec rm -f {} \;
+	@find . -name "*.a" -exec rm -f {} \;
+
+.PRECIOUS: %.s.c.o
+.PHONY: APP clean all

APE5/ApeCommon/inc/ape_common.h

@@ -0,0 +1,37 @@
+/******************************************************************
+ * @file  ape_common.h
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+#ifndef     APE_COMMON_H
+#define     APE_COMMON_H
+
+/**************************include******************************/
+#include "type_define.h"
+
+#define  APE_DM0      DM7 
+#define  APE_DM1      DM6
+#define  APE_DM2      DM5 
+#define  APE_DM3      DM4
+#define  __APE_DM0   __DM7
+#define  __APE_DM1   __DM6
+#define  __APE_DM2   __DM5
+#define  __APE_DM3   __DM4
+
+#define DM_TO_CSU_ADDR(addr)	((uint32_t)(addr))
+#define IM_TO_CSU_ADDR(addr)	(((uint32_t)(addr)) + 0x200000)
+
+#define DMA_TAG_G2L		16
+#define DMA_TAG_L2G 	17
+#define DMA_TAG_G2G 	18
+#define DMA_TAG_CHAIN	19
+
+extern __APE_DM3 v16s32 SVRReg;
+
+#endif

APE5/ApeCommon/src/ape_common.s.c

@@ -0,0 +1,32 @@
+/******************************************************************
+ * @file  ape_common.c
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <ape_common.h>
+#include "log_interface.h"
+/**************************function******************************/
+
+//微码配置寄存器
+__APE_DM3 v16s32 SVRReg  = {
+		0, 0, 0, 0,
+		0x40, 0, 0, 0,
+		0xff00ff, 0, 0, 0x0000,
+		0xffff, 0x6, 0, 0
+};
+
+//uint32_t g_dma_tag_g2l = DMA_TAG_G2L;
+uint32_t g_dma_tag_l2g = DMA_TAG_L2G;
+////自定义空间的log头定义
+__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2];
+//静态申请log空间
+__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确
+
+

APE5/ApeTask/src/Fucp_Ape1_Init.s.c

@@ -0,0 +1,107 @@
+#ifndef IDE_TEST
+/******************************************************************
+ * @file  Ucp_Ape1_Init.s.c
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2022年1月25日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年1月25日        guicheng.liu       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <type_define.h>
+#include "ape_interface.h"
+#include "receiver_symb_func.h"
+#include "ape_common.h"
+#include "task_define.h"
+#include "log_interface.h"
+#include "trace.h"
+
+/**************************function******************************/
+/*!   
+* @brief:  在Phy init的时候注册物理层管理任务
+* @author:  guicheng.liu
+* @Date:  2022年2月28日
+*/
+/* 收到消息后创建任务 */
+void ape1_event_task(uint32_t addr, uint32_t size)
+{
+     osp_task_info_ex mgr_task =
+       {PHY_TASK_RECIEVER_SYMB, "Receiver_Symb", PHY_TASK_PRI_RECEIVER_SYMB, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, (OSP_TASKINIT_FUNC)Receiver_Symb_Init, (OSP_TASKENTRY_FUNC)Receiver_Symb_Task};
+
+      osp_task_create(&mgr_task);
+      osp_timer_sync(1);
+      LOG_INFO_S("APE1 finish task create!\n");
+      return;
+}
+
+
+
+/* 收到消息后删除任务 */
+void ape1_event_task_del(uint32_t addr, uint32_t size)
+{
+    uint32_t ape_id = get_core_id();
+    //osp_del_task_all(NR_SCS_30K);
+
+
+    return;
+}
+
+
+/*!   
+* @brief:  在Phy init的时候注册物理层管理任务
+* @author:  guicheng.liu
+* @Date:  2022年2月28日
+*/
+void Phy_Task_Ape1_Reg()
+{
+    osp_task_info_ex ape1_event_task_info = {50, "ape1_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task};
+    osp_task_info_ex ape1_event_task_info_del = {51, "ape1_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task_del};
+
+    osp_task_create(&ape1_event_task_info);
+    osp_task_create(&ape1_event_task_info_del);
+
+    return ;
+
+
+
+}
+
+
+///*!
+//* @brief:  Phy初始化函数, 每个APE上都需要有一个名字相同的函数
+//* @author:  guicheng.liu
+//* @Date:  2022年1月25日
+//*/
+void phy_init()
+{
+   //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成
+   log_level_e log_level = INFO;
+   log_pool_init();
+   set_log_level(log_level);
+
+   //memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t));
+   Phy_Task_Ape1_Reg();
+}
+
+///*!
+//* @brief:  给osp调用，勿删
+//* @author:  guicheng.liu
+//* @Date:  2022年11月3日
+//*/
+//void soc_drv_init()
+//{
+//}
+//
+///*!
+//* @brief:  给osp调用，勿删
+//* @author:  guicheng.liu
+//* @Date:  2022年11月3日
+//*/
+//void tod_int_init()
+//{
+//}
+
+#endif

APE5/Makefile

@@ -0,0 +1,144 @@
+############################
+# mpu libs need to link to this APE, could be specified by user
+ MICRO_CODE_LIBS:=
+ ############################
+# tool path, could be specified by user
+#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin
+#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb
+#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0
+#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd
+#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib
+#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2
+
+UCP_HOME=${MaPU_TC_HOME}/bin/ucp2
+GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb
+SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator
+OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb
+LPATH1=${MaPU_TC_HOME}/lib/ucp2/release
+LPATH2=${MaPU_TC_HOME}/lib/ucp2/release
+#############################
+export UCP_HOME
+############################
+# varaibles for project construction using new ucp toolchain
+# DO NOT MODIFY
+SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c")
+SPU_C_FILES:=$(shell find . -name "*.s.c")
+SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES})
+SPU_ASM_FILES:=$(shell find . -name "*.s.asm")
+SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES})
+MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm")
+MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES})
+##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d)
+INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d)
+INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d)
+INC_DIRS+= ../Interface
+INC_DIRS+= ../Inc
+INC_DIRS+=$(shell find ./ -name inc -type d)
+override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS})
+override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST)))
+override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR))))
+ifeq (${mpu}, dyn)
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape1-Cache128-noMPUC-dynamic.ld)
+else
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape1-Cache128-noMPUC.ld)
+endif
+EXE_FILE_NAME=${PROJECT_NAME}.out
+#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS})
+LINK_L_OPTION=-L../Lib
+LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS})
+APE_LINK_L_OPTION=-L../Lib
+APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME})
+ifneq (${MICRO_CODE_LIBS}, )
+  LINK_MPU_L_OPTION=-L../Lib/MicroLib
+  LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS})
+else
+  LINK_MPU_L_OPTION:=
+  LINK_MPU_l_OPTION:=
+endif
+LINK_PLATFORM_L_OPTION=-L../Lib/OspLib
+#LINK_PLATFORM_l_OPTION:=-lape
+ifeq (${tb}, PDSCH)
+	LINK_PLATFORM_l_OPTION:=
+else ifeq (${tb}, DL)
+	LINK_PLATFORM_l_OPTION:=
+else
+	LINK_PLATFORM_l_OPTION:=-lape_spu
+endif
+
+# this flag could be specified by user, default to build debug info
+debug:=0
+export debug
+ifeq (${debug},1)
+	ASM_DEBUG_FLAGS:=-g
+	C_DEBUG_FLAGS:=-O0 -g
+else ifeq (${debug},3)
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O3
+else
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O2
+endif
+############################
+
+all:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		make LIB -C $${dir} ; \
+	done
+
+%.s.c.o: %.s.c
+	@${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION}
+
+%.s.asmb.o: %.s.asm
+	@${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS}
+
+${EXE_FILE_NAME}: 
+	${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \
+	$(LPATH1)/crtend.o \
+	${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \
+	${LINK_L_OPTION} ${LINK_l_OPTION} \
+    ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \
+	${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \
+		-L$(LPATH2) \
+		-L$(LPATH1) -lm -lc -lgloss \
+		-lclang_rt.builtins-ucps2 -T ${LD_SCRIPT}
+
+APP: ${EXE_FILE_NAME}
+
+lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES}
+	ar rcs -o $@ ${SPU_C_OBJECT_FILES}	${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@
+
+LIB: lib${PROJECT_NAME}.a
+
+Dis: APP
+	${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; 
+	#${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; 
+
+# direct simulaton without gui
+DSim: APP
+	@${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \
+		echo "software simulation finished"
+
+DSimGDB: APP
+	@${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \
+		echo "software simulation finished"
+GDB: APP
+	@${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \
+		echo "software GDB finished"
+
+clean:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		if [ -e $${dir} ]; then \
+		  make clean -C $${dir} ; \
+		fi;\
+	done
+	@rm -rf *.lof  *.out  *.map  *.mmap  *.sct  *.tab  *.s  *.dis  *~  *.def *.xml 
+	@rm -rf *.daidir work  *.lib++ *~ *.rc csrc *.key filelist.f simv*
+	@rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log
+	@rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif
+	@rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt Receiver_symb
+	@rm -rf Executed_Pipeline.csv
+	@find . -name "*.o" -exec rm -f {} \;
+	@find . -name "*.a" -exec rm -f {} \;
+
+.PRECIOUS: %.s.c.o
+.PHONY: APP clean all

APE6/ApeCommon/inc/ape_common.h

@@ -0,0 +1,37 @@
+/******************************************************************
+ * @file  ape_common.h
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+#ifndef     APE_COMMON_H
+#define     APE_COMMON_H
+
+/**************************include******************************/
+#include "type_define.h"
+
+#define  APE_DM0      DM0 
+#define  APE_DM1      DM1 
+#define  APE_DM2      DM2 
+#define  APE_DM3      DM3 
+#define  __APE_DM0   __DM0
+#define  __APE_DM1   __DM1
+#define  __APE_DM2   __DM2
+#define  __APE_DM3   __DM3
+
+#define DM_TO_CSU_ADDR(addr)	(((uint32_t)(addr)) - 0x100000)
+#define IM_TO_CSU_ADDR(addr)	((uint32_t)(addr))
+
+#define DMA_TAG_G2L		0
+#define DMA_TAG_L2G 	1
+#define DMA_TAG_G2G 	2
+#define DMA_TAG_CHAIN	3
+
+extern __APE_DM3 v16s32 SVRReg;
+
+#endif

APE6/ApeCommon/src/ape_common.s.c

@@ -0,0 +1,32 @@
+/******************************************************************
+ * @file  ape_common.c
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <ape_common.h>
+#include "log_interface.h"
+/**************************function******************************/
+
+
+
+//微码配置寄存器
+__APE_DM3 v16s32 SVRReg  = {
+		0, 0, 0, 0,
+		0x40, 0, 0, 0,
+		0xff00ff, 0, 0, 0x0000,
+		0xffff, 0x6, 0, 0
+};
+
+//uint32_t g_dma_tag_g2l = DMA_TAG_G2L;
+uint32_t g_dma_tag_l2g = DMA_TAG_L2G;
+//自定义空间的log头定义
+__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2];
+//静态申请log空间
+__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确

APE6/ApeTask/src/Fucp_Ape2_Init.s.c

@@ -0,0 +1,107 @@
+#ifndef IDE_TEST
+/******************************************************************
+ * @file  Ucp_Ape1_Init.s.c
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2022年1月25日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年1月25日        guicheng.liu       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <type_define.h>
+#include "ape_interface.h"
+#include "receiver_bit_func.h"
+#include "ape_common.h"
+#include "task_define.h"
+#include "log_interface.h"
+#include "trace.h"
+
+/**************************function******************************/
+/*!   
+* @brief:  在Phy init的时候注册物理层管理任务
+* @author:  guicheng.liu
+* @Date:  2022年2月28日
+*/
+/* 收到消息后创建任务 */
+void ape2_event_task(uint32_t addr, uint32_t size)
+{
+     osp_task_info_ex mgr_task =
+       {PHY_TASK_RECIEVER_BIT, "Receiver_Bit", PHY_TASK_PRI_RECEIVER_BIT, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, (OSP_TASKINIT_FUNC)Receiver_Bit_Init, (OSP_TASKENTRY_FUNC)Receiver_Bit_Task};
+
+      osp_task_create(&mgr_task);
+      osp_timer_sync(1);
+      LOG_INFO_S("APE2 finish task create!\n");
+      return;
+}
+
+
+
+/* 收到消息后删除任务 */
+void ape2_event_task_del(uint32_t addr, uint32_t size)
+{
+    uint32_t ape_id = get_core_id();
+    //osp_del_task_all(NR_SCS_30K);
+
+
+    return;
+}
+
+
+/*!   
+* @brief:  在Phy init的时候注册物理层管理任务
+* @author:  guicheng.liu
+* @Date:  2022年2月28日
+*/
+void Phy_Task_Ape2_Reg()
+{
+    osp_task_info_ex ape2_event_task_info = {50, "ape2_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event_task};
+    osp_task_info_ex ape2_event_task_info_del = {51, "ape2_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event_task_del};
+
+    osp_task_create(&ape2_event_task_info);
+    osp_task_create(&ape2_event_task_info_del);
+
+    return ;
+
+
+
+}
+
+
+///*!
+//* @brief:  Phy初始化函数, 每个APE上都需要有一个名字相同的函数
+//* @author:  guicheng.liu
+//* @Date:  2022年1月25日
+//*/
+void phy_init()
+{
+   //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成
+   log_level_e log_level = INFO;
+   log_pool_init();
+   set_log_level(log_level);
+
+   //memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t));
+   Phy_Task_Ape2_Reg();
+}
+
+///*!
+//* @brief:  给osp调用，勿删
+//* @author:  guicheng.liu
+//* @Date:  2022年11月3日
+//*/
+//void soc_drv_init()
+//{
+//}
+//
+///*!
+//* @brief:  给osp调用，勿删
+//* @author:  guicheng.liu
+//* @Date:  2022年11月3日
+//*/
+//void tod_int_init()
+//{
+//}
+
+#endif

APE6/Makefile

@@ -0,0 +1,144 @@
+############################
+# mpu libs need to link to this APE, could be specified by user
+ MICRO_CODE_LIBS:=
+############################
+# tool path, could be specified by user
+#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin
+#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb
+#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0
+#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd
+#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib
+#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2
+
+UCP_HOME=${MaPU_TC_HOME}/bin/ucp2
+GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb
+SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator
+OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb
+LPATH1=${MaPU_TC_HOME}/lib/ucp2/release
+LPATH2=${MaPU_TC_HOME}/lib/ucp2/release
+#############################
+export UCP_HOME
+############################
+# varaibles for project construction using new ucp toolchain
+# DO NOT MODIFY
+SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c")
+SPU_C_FILES:=$(shell find . -name "*.s.c")
+SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES})
+SPU_ASM_FILES:=$(shell find . -name "*.s.asm")
+SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES})
+MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm")
+MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES})
+##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d)
+INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d)
+INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d)
+INC_DIRS+= ../Interface
+INC_DIRS+= ../Inc
+INC_DIRS+=$(shell find ./ -name inc -type d)
+override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS})
+override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST)))
+override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR))))
+ifeq (${mpu}, dyn)
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape2-Cache128-noMPUC-dynamic.ld)
+else
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape2-Cache128-noMPUC.ld)
+endif
+EXE_FILE_NAME=${PROJECT_NAME}.out
+#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS})
+LINK_L_OPTION=-L../Lib
+LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS})
+APE_LINK_L_OPTION=-L../Lib
+APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME})
+ifneq (${MICRO_CODE_LIBS}, )
+  LINK_MPU_L_OPTION=-L../Lib/MicroLib
+  LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS})
+else
+  LINK_MPU_L_OPTION:=
+  LINK_MPU_l_OPTION:=
+endif
+LINK_PLATFORM_L_OPTION=-L../Lib/OspLib
+#LINK_PLATFORM_l_OPTION:=-lape
+ifeq (${tb}, PDSCH)
+	LINK_PLATFORM_l_OPTION:=
+else ifeq (${tb}, DL)
+	LINK_PLATFORM_l_OPTION:=
+else
+	LINK_PLATFORM_l_OPTION:=-lape_spu
+endif
+
+# this flag could be specified by user, default to build debug info
+debug:=0
+export debug
+ifeq (${debug},1)
+	ASM_DEBUG_FLAGS:=-g
+	C_DEBUG_FLAGS:=-O0 -g
+else ifeq (${debug},3)
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O3
+else
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O2
+endif
+############################
+
+all:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		make LIB -C $${dir} ; \
+	done
+
+%.s.c.o: %.s.c
+	@${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION}
+
+%.s.asmb.o: %.s.asm
+	@${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS}
+
+${EXE_FILE_NAME}: 
+	${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \
+	$(LPATH1)/crtend.o \
+	${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \
+	${LINK_L_OPTION} ${LINK_l_OPTION} \
+    ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \
+	${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \
+		-L$(LPATH2) \
+		-L$(LPATH1) -lm -lc -lgloss \
+		-lclang_rt.builtins-ucps2 -T ${LD_SCRIPT}
+
+APP: ${EXE_FILE_NAME}
+
+lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES}
+	ar rcs -o $@ ${SPU_C_OBJECT_FILES}	${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@
+
+LIB: lib${PROJECT_NAME}.a
+
+Dis: APP
+	${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; 
+	#${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; 
+
+# direct simulaton without gui
+DSim: APP
+	@${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \
+		echo "software simulation finished"
+
+DSimGDB: APP
+	@${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \
+		echo "software simulation finished"
+GDB: APP
+	@${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \
+		echo "software GDB finished"
+
+clean:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		if [ -e $${dir} ]; then \
+		  make clean -C $${dir} ; \
+		fi;\
+	done
+	@rm -rf *.lof  *.out  *.map  *.mmap  *.sct  *.tab  *.s  *.dis  *~  *.def *.xml 
+	@rm -rf *.daidir work  *.lib++ *~ *.rc csrc *.key filelist.f simv*
+	@rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log
+	@rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif
+	@rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt Receiver_bit
+	@rm -rf Executed_Pipeline.csv
+	@find . -name "*.o" -exec rm -f {} \;
+	@find . -name "*.a" -exec rm -f {} \;
+
+.PRECIOUS: %.s.c.o
+.PHONY: APP clean all

APE7/ApeCommon/inc/ape_common.h

@@ -0,0 +1,37 @@
+/******************************************************************
+ * @file  ape_common.h
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+#ifndef     APE_COMMON_H
+#define     APE_COMMON_H
+
+/**************************include******************************/
+#include "type_define.h"
+
+#define  APE_DM0      DM7 
+#define  APE_DM1      DM6
+#define  APE_DM2      DM5 
+#define  APE_DM3      DM4
+#define  __APE_DM0   __DM7
+#define  __APE_DM1   __DM6
+#define  __APE_DM2   __DM5
+#define  __APE_DM3   __DM4
+
+#define DM_TO_CSU_ADDR(addr)	((uint32_t)(addr))
+#define IM_TO_CSU_ADDR(addr)	(((uint32_t)(addr)) + 0x200000)
+
+#define DMA_TAG_G2L		16
+#define DMA_TAG_L2G 	17
+#define DMA_TAG_G2G 	18
+#define DMA_TAG_CHAIN	19
+
+extern __APE_DM3 v16s32 SVRReg;
+
+#endif

APE7/ApeCommon/src/ape_common.s.c

@@ -0,0 +1,32 @@
+/******************************************************************
+ * @file  ape_common.c
+ * @brief:    [file description]
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2022年1月11日        xuekun.zhang       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <ape_common.h>
+#include "log_interface.h"
+/**************************function******************************/
+
+//微码配置寄存器
+__APE_DM3 v16s32 SVRReg  = {
+		0, 0, 0, 0,
+		0x40, 0, 0, 0,
+		0xff00ff, 0, 0, 0x0000,
+		0xffff, 0x6, 0, 0
+};
+
+//uint32_t g_dma_tag_g2l = DMA_TAG_G2L;
+uint32_t g_dma_tag_l2g = DMA_TAG_L2G;
+////自定义空间的log头定义
+__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2];
+//静态申请log空间
+__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确
+
+

APE7/ApeTask/src/Fucp_Ape3_Init.s.c

@@ -0,0 +1,107 @@
+#ifndef IDE_TEST
+/******************************************************************
+ * @file  Ucp_Ape1_Init.s.c
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2022年1月25日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年1月25日        guicheng.liu       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <type_define.h>
+#include "ape_interface.h"
+#include "ape_common.h"
+#include "task_define.h"
+#include "log_interface.h"
+#include "trace.h"
+#include "receiver_sync_first_func.h"
+
+/**************************function******************************/
+/*!   
+* @brief:  在Phy init的时候注册物理层管理任务
+* @author:  guicheng.liu
+* @Date:  2022年2月28日
+*/
+/* 收到消息后创建任务 */
+void ape1_event_task(uint32_t addr, uint32_t size)
+{
+      osp_task_info_ex mgr_task =
+      {PHY_TASK_RECIEVER_FIRST_SYNC, "Receiver_Sync_First_Sync", PHY_TASK_PRI_RECEIVER_FIRST_SYNC, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, (OSP_TASKINIT_FUNC)Receiver_Sync_First_Init, (OSP_TASKENTRY_FUNC)Receiver_First_Sync_Proc};      
+
+      osp_task_create(&mgr_task);
+      osp_timer_sync(1);
+      LOG_INFO_S("APE3 finish task create!\n");
+      return;
+}
+
+
+
+/* 收到消息后删除任务 */
+void ape1_event_task_del(uint32_t addr, uint32_t size)
+{
+    uint32_t ape_id = get_core_id();
+    //osp_del_task_all(NR_SCS_30K);
+
+
+    return;
+}
+
+
+/*!   
+* @brief:  在Phy init的时候注册物理层管理任务
+* @author:  guicheng.liu
+* @Date:  2022年2月28日
+*/
+void Phy_Task_Ape1_Reg()
+{
+    osp_task_info_ex ape1_event_task_info = {50, "ape1_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task};
+    osp_task_info_ex ape1_event_task_info_del = {51, "ape1_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task_del};
+
+    osp_task_create(&ape1_event_task_info);
+    osp_task_create(&ape1_event_task_info_del);
+
+    return ;
+
+
+
+}
+
+
+///*!
+//* @brief:  Phy初始化函数, 每个APE上都需要有一个名字相同的函数
+//* @author:  guicheng.liu
+//* @Date:  2022年1月25日
+//*/
+void phy_init()
+{
+   //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成
+   log_level_e log_level = INFO;
+   log_pool_init();
+   set_log_level(log_level);
+
+   //memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t));
+   Phy_Task_Ape1_Reg();
+}
+
+///*!
+//* @brief:  给osp调用，勿删
+//* @author:  guicheng.liu
+//* @Date:  2022年11月3日
+//*/
+//void soc_drv_init()
+//{
+//}
+//
+///*!
+//* @brief:  给osp调用，勿删
+//* @author:  guicheng.liu
+//* @Date:  2022年11月3日
+//*/
+//void tod_int_init()
+//{
+//}
+
+#endif

APE7/Makefile

@@ -0,0 +1,145 @@
+############################
+# mpu libs need to link to this APE, could be specified by user
+ MICRO_CODE_LIBS:=ByteCopy SlidingCorrelation
+ ############################
+# tool path, could be specified by user
+#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin
+#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb
+#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0
+#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd
+#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib
+#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2
+
+UCP_HOME=${MaPU_TC_HOME}/bin/ucp2
+GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb
+SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator
+OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb
+LPATH1=${MaPU_TC_HOME}/lib/ucp2/release
+LPATH2=${MaPU_TC_HOME}/lib/ucp2/release
+#############################
+export UCP_HOME
+############################
+# varaibles for project construction using new ucp toolchain
+# DO NOT MODIFY
+SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c")
+SPU_C_FILES:=$(shell find . -name "*.s.c")
+SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES})
+SPU_ASM_FILES:=$(shell find . -name "*.s.asm")
+SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES})
+MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm")
+MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES})
+##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d)
+INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d)
+INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d)
+INC_DIRS+= ../Interface
+INC_DIRS+= ../Inc
+INC_DIRS+=$(shell find ./ -name inc -type d)
+override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS})
+override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST)))
+override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR))))
+ifeq (${mpu}, dyn)
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape3-Cache128-noMPUC-dynamic.ld)
+else
+	LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape3-Cache128-noMPUC.ld)
+endif
+EXE_FILE_NAME=${PROJECT_NAME}.out
+#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS})
+LINK_L_OPTION=-L../Lib
+LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS})
+APE_LINK_L_OPTION=-L../Lib
+APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME})
+ifneq (${MICRO_CODE_LIBS}, )
+  LINK_MPU_L_OPTION=-L../Lib/MicroLib
+  LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS})
+else
+  LINK_MPU_L_OPTION:=
+  LINK_MPU_l_OPTION:=
+endif
+LINK_PLATFORM_L_OPTION=-L../Lib/OspLib
+#LINK_PLATFORM_l_OPTION:=-lape
+ifeq (${tb}, PDSCH)
+	LINK_PLATFORM_l_OPTION:=
+else ifeq (${tb}, DL)
+	LINK_PLATFORM_l_OPTION:=
+else
+	LINK_PLATFORM_l_OPTION:=-lape_spu
+endif
+
+# this flag could be specified by user, default to build debug info
+debug:=0
+export debug
+ifeq (${debug},1)
+	ASM_DEBUG_FLAGS:=-g
+	C_DEBUG_FLAGS:=-O0 -g
+else ifeq (${debug},3)
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O3
+else
+	ASM_DEBUG_FLAGS:=
+	C_DEBUG_FLAGS:=-O2
+endif
+############################
+
+all:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		make LIB -C $${dir} ; \
+	done
+
+%.s.c.o: %.s.c
+	@${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION}
+
+%.s.asmb.o: %.s.asm
+	@${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS}
+
+${EXE_FILE_NAME}: 
+	${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \
+	$(LPATH1)/crtend.o \
+	${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \
+	${LINK_L_OPTION} ${LINK_l_OPTION} \
+    ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \
+	${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \
+		-L$(LPATH2) \
+		-L$(LPATH1) -lm -lc -lgloss \
+		-lclang_rt.builtins-ucps2 -T ${LD_SCRIPT}
+
+APP: ${EXE_FILE_NAME}
+
+lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES}
+	ar rcs -o $@ ${SPU_C_OBJECT_FILES}	${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@
+
+LIB: lib${PROJECT_NAME}.a
+
+Dis: APP
+	${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; 
+	#${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; 
+
+# direct simulaton without gui
+DSim: APP
+	@${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \
+		echo "software simulation finished"
+
+DSimGDB: APP
+	@${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \
+		echo "software simulation finished"
+GDB: APP
+	@${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \
+		echo "software GDB finished"
+
+clean:
+	@for dir in ${COMMON_LIB_DIRS}; do \
+		if [ -e $${dir} ]; then \
+		  make clean -C $${dir} ; \
+		fi;\
+	done
+	@rm -rf *.lof  *.out  *.map  *.mmap  *.sct  *.tab  *.s  *.dis  *~  *.def *.xml 
+	@rm -rf *.daidir work  *.lib++ *~ *.rc csrc *.key filelist.f simv*
+	@rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log
+	@rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif
+	@rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt
+	@rm -rf Executed_Pipeline.csv
+	@rm -rf Receiver_sync_first
+	@find . -name "*.o" -exec rm -f {} \;
+	@find . -name "*.a" -exec rm -f {} \;
+
+.PRECIOUS: %.s.c.o
+.PHONY: APP clean all

APELib/Receiver_bit/inc/receiver_bit_func.h

@@ -0,0 +1,47 @@
+/******************************************************************
+ * @file  receiver_bit_func.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_BIT_FUNC_H
+#define RECEIVER_BIT_FUNC_H
+/****************************include*****************************/
+#include "common.h"
+#include "mem_def.h"
+#include "phy_macro.h"
+#include "ape_interface.h"
+#include "receiver_bit_macro.h"
+#include "receiver_bit_struct.h"
+#include "ape_common.h"
+#include "drv_ape.h"
+#include "log_interface.h"
+#include "msg_interface.h"
+#include "osp_ape.h"
+#include "task_define.h"
+#include "trace.h"
+//include mpu header files
+
+
+
+//微码配置空间偏移结构体
+extern receiver_bit_table_param_t  g_receiver_bit_table_param;
+extern uint32_t *receiver_bit_config_dm0_ptr;
+extern uint32_t *receiver_bit_config_dm1_ptr;
+extern uint32_t *receiver_bit_config_dm2_ptr;
+extern uint32_t *receiver_bit_config_dm3_ptr;
+
+void Receiver_Bit_Init();
+void Receiver_Bit_Task(void* msg_ptr, uint32_t msg_len);
+void Receiver_Bit_Proc(
+    uint32_t* param_ptr,
+    int32_t* temp_dm0_ptr,
+    int32_t* temp_dm1_ptr,
+    int32_t* temp_dm2_ptr,
+    int32_t* temp_dm3_ptr
+);
+
+#endif

APELib/Receiver_bit/inc/receiver_bit_macro.h

@@ -0,0 +1,22 @@
+/******************************************************************
+ * @file  receiver_bit_macro.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_BIT_MACRO_H
+#define RECEIVER_BIT_MACRO_H
+
+//GENERATE with Generate_receiver_bit_macro_h.m
+//DO NOT MODIFY
+//=======================================================================
+//微码配置空间长度定义，单位为word(4Byte)
+
+
+//SPU查找表各字段长度定义,单位为word(4Byte)
+
+//=======================================================================
+#endif

APELib/Receiver_bit/inc/receiver_bit_struct.h

@@ -0,0 +1,44 @@
+/******************************************************************
+ * @file  receiver_bit_struct.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#ifndef RECEIVER_BIT_STRUCT_H
+#define RECEIVER_BIT_STRUCT_H
+#include "type_define.h"
+
+//GENERATE with Generate_receiver_bit_struct_h.m
+//DO NOT MODIFY
+//=======================================================================
+//各微码或查找表偏移及指针定义
+typedef struct receiver_bit_table_param_s
+{
+    //MPU CONFIG OFFSET
+
+    // 存储微码参数表的ddr基地址和长度
+    uint32_t    receiver_bit_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址
+    uint32_t    receiver_bit_config0_length;//receiver DM0微码配置文件ddr长度    
+    uint32_t    receiver_bit_config1_ddr_ptr;//receiver DM1微码配置文件ddr地址
+    uint32_t    receiver_bit_config1_length;//receiver DM1微码配置文件ddr长度
+    uint32_t    receiver_bit_config2_ddr_ptr;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_bit_config2_length;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_bit_config3_ddr_ptr;//receiver DM3微码配置文件ddr地址
+    uint32_t    receiver_bit_config3_length;//receiver DM3微码配置文件ddr地址
+
+    //SPU查找表在SM中的偏移地址
+
+
+
+    // SPU LUT SM基地址和长度
+
+
+}receiver_bit_table_param_t;
+
+
+//=======================================================================
+#endif

APELib/Receiver_bit/src/receiver_Bit_Init.s.c

@@ -0,0 +1,67 @@
+/******************************************************************
+ * @file  Receiver_Bit_Init.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_bit_func.h"
+
+
+ /*!   
+ * @brief:  Receiver任务启动前的初始化工作
+ *          初始化全局参数，ddr查找表搬入SM
+ * @author:  HUOHUO
+ * @Date:  2024年10月30日
+ */
+void Receiver_Bit_Init()
+{
+    int32_t  ret;
+    uint32_t lutDdrAddr,idx;
+
+    //DM0
+    
+    //DM1
+
+    //DM2
+
+    //DM3
+
+    //SM
+
+
+    // //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括：
+    // //   1). 置信度表uint16_t Q_W_Lut[2016] (n-5)
+    // //   2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5)
+    // //   3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1)
+    // //   4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check())
+    // //   5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v)
+    // //获取地址
+    //     ret = osp_get_cfgfile("nr_puxch_lut_sm.dat",
+    //                       (uint32_t *)&lutDdrAddr, 
+    //                       (int32_t *)&(g_receiver_bit_table_param.pucch_lut_length));
+    // g_receiver_bit_table_param.pucch_lut_sm_ptr = SM0_BASE;
+    // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr, 
+    //                                    (uint64_t)g_receiver_bit_table_param.pucch_lut_sm_ptr, 
+    //                                    g_receiver_bit_table_param.pucch_lut_length, 
+    //                                    DMA_TAG_G2G, 
+    //                                    1);
+
+    //9. 微码配置文件ddr地址初始化
+    ret = osp_get_cfgfile("Receiver_Bit_cfg_dm0.dat",
+                          (uint32_t *)&(g_receiver_bit_table_param.receiver_bit_config0_ddr_ptr),
+                          (int32_t *)&(g_receiver_bit_table_param.receiver_bit_config0_length));
+    ret = osp_get_cfgfile("Receiver_Bit_cfg_dm1.dat",
+                          (uint32_t *)&(g_receiver_bit_table_param.receiver_bit_config1_ddr_ptr),
+                          (int32_t *)&(g_receiver_bit_table_param.receiver_bit_config1_length));
+
+    ret = osp_get_cfgfile("Receiver_Bit_cfg_dm2.dat",
+                          (uint32_t *)&(g_receiver_bit_table_param.receiver_bit_config2_ddr_ptr),
+                          (int32_t *)&(g_receiver_bit_table_param.receiver_bit_config2_length));
+    ret = osp_get_cfgfile("Receiver_Bit_cfg_dm3.dat",
+                          (uint32_t *)&(g_receiver_bit_table_param.receiver_bit_config3_ddr_ptr),
+                          (int32_t *)&(g_receiver_bit_table_param.receiver_bit_config3_length));
+}

APELib/Receiver_bit/src/receiver_Bit_Proc.s.c

@@ -0,0 +1,64 @@
+/******************************************************************
+ * @file  receiver_Proc.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_bit_func.h"
+
+ /*!   
+ * @brief:  Receiver_sync链路处理
+ * @author:  HUOHUO
+ * @Date:  2024年10月30日
+ */
+void Receiver_Bit_Proc(
+    uint32_t *param_ptr,
+    int32_t  *temp_dm0_ptr,
+    int32_t  *temp_dm1_ptr,
+    int32_t  *temp_dm2_ptr,
+    int32_t  *temp_dm3_ptr
+)
+{
+    //局部变量定义
+    int32_t  *cfg_addr;
+    uint32_t time_data_ddr_ptr;
+    uint32_t time_data_length;
+    uint32_t mpu_temp_dm0_ptr;
+    uint32_t mpu_temp_dm1_ptr;
+    uint32_t mpu_temp_dm2_ptr;
+    uint32_t mpu_temp_dm3_ptr;
+    uint32_t temp_u32;
+    uint32_t time_data_dm0_ptr = ((((uint32_t)&temp_dm0_ptr[0] + 4095)>>12)<<12);
+    uint32_t res_ptr = RECEIVER_OUT3;
+
+    //data读入
+    //获取源数据地址
+    time_data_ddr_ptr = (uint32_t)*param_ptr;
+    time_data_length = (uint32_t)((*(param_ptr + 1) +7)>>3);//计算byte数
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+
+    // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)time_data_ddr_ptr,
+    //                          (uint64_t)DM_TO_CSU_ADDR(time_data_dm0_ptr),
+    //                          time_data_length,
+    //                          DMA_TAG_G2L,
+    //                          0);
+
+
+
+    // //计算结果搬移到外存
+    // temp_u32 = 1000;//计算byte数
+    // WAIT_MPU_STOP;
+    // ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    
+    // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(time_data_dm0_ptr),
+    //                         (uint64_t)res_ptr,
+    //                         temp_u32,
+    //                         DMA_TAG_L2G,
+    //                         1);
+
+    return;
+}

APELib/Receiver_bit/src/receiver_Bit_Task.s.c

@@ -0,0 +1,184 @@
+/******************************************************************
+ * @file  Receiver_Bit_Task.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_bit_func.h"
+
+
+#define ADDR_ALIGN(addr, val)   ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) 
+
+
+ /*!   
+ * @brief:  Receiver任务处理流程
+ * @author:  HUOHUO
+ * @Date:  2024年4月20日
+ */
+void Receiver_Bit_Task(void* msg_ptr, uint32_t msg_len)
+{
+    uint16_t start_slot = TIME_SLOT();
+    uint16_t start_us = TIME_US();
+    uint16_t end_slot;
+    uint16_t end_us;
+    RUN_CNT(TRACE_RECEIVER_BIT_ADDR, 0);
+    
+
+    int32_t  *receiver_bit_malloc_dm0_ptr;
+    int32_t  *receiver_bit_malloc_dm1_ptr;
+    int32_t  *receiver_bit_malloc_dm2_ptr;
+    int32_t  *receiver_bit_malloc_dm3_ptr;
+    uint32_t receiver_bit_param_ptr;
+
+    int32_t *receiver_bit_temp_dm0_ptr;
+    int32_t *receiver_bit_temp_dm1_ptr;
+    int32_t *receiver_bit_temp_dm2_ptr;
+    int32_t *receiver_bit_temp_dm3_ptr;
+     //0 空间回收
+    dmalloc_trim(0, APE_DM0);
+    dmalloc_trim(0, APE_DM1);
+    dmalloc_trim(0, APE_DM2);
+    dmalloc_trim(0, APE_DM3);   
+
+    //1. DM0空间申请
+    receiver_bit_malloc_dm0_ptr = dmemalign_unit(0x4000, 131072, APE_DM0); //申请了128KiB 首地址16k对齐
+    if (NULLPTR == receiver_bit_malloc_dm0_ptr)
+    {
+        LOG_ERROR_S("rec sync DM0 fail\n");
+        return;
+    }
+
+    //2. DM0空间分配
+    //DM0第一段，调度信息
+    receiver_bit_param_ptr = (uint32_t)receiver_bit_malloc_dm0_ptr;
+    const uint32_t receiver_param_len = 50; //还没设计，随便设置的值50word
+    if(0 < receiver_param_len)
+    {
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)RECEIVER_BIT_CFG_BASE,
+                                (uint64_t)DM_TO_CSU_ADDR(receiver_bit_param_ptr),
+                                receiver_param_len * 4,
+                                DMA_TAG_G2L,
+                                0);  
+    }
+    //DM0第二段，微码相关空间
+    receiver_bit_config_dm0_ptr = (uint32_t *)(ADDR_ALIGN(receiver_bit_param_ptr + receiver_param_len * 4, 12)); //起始地址4k对齐
+    if(0 < g_receiver_bit_table_param.receiver_bit_config0_length)
+    {
+    ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_bit_table_param.receiver_bit_config0_ddr_ptr,
+                                 (uint64_t)DM_TO_CSU_ADDR(receiver_bit_config_dm0_ptr),
+                                 g_receiver_bit_table_param.receiver_bit_config0_length,
+                                 DMA_TAG_G2L,
+                                 0);    
+    }
+    //DM0第三段，堆空间
+    receiver_bit_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm0_ptr +  \
+        g_receiver_bit_table_param.receiver_bit_config0_length, 12);//起始地址4k对齐
+    
+    //3. DM3空间申请
+    receiver_bit_malloc_dm3_ptr = dmemalign_unit(0x4000, 196608, APE_DM3);//申请了192KiB 首地址16k对齐
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_bit_malloc_dm3_ptr)
+    {
+        LOG_ERROR_S("rec sync DM3 fail\n");
+        dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM3第一段，微码相关空间
+    receiver_bit_config_dm3_ptr = (uint32_t*)receiver_bit_malloc_dm3_ptr;
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    if(0 < g_receiver_bit_table_param.receiver_bit_config3_length)
+    {
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)g_receiver_bit_table_param.receiver_bit_config3_ddr_ptr,
+                                (uint64_t)DM_TO_CSU_ADDR(receiver_bit_config_dm3_ptr),
+                                g_receiver_bit_table_param.receiver_bit_config3_length,
+                                DMA_TAG_G2L,
+                                0);
+    }
+    //DM3第二段，堆空间
+    receiver_bit_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm3_ptr + \
+        g_receiver_bit_table_param.receiver_bit_config3_length, 14); //起始地址16k对齐
+    //4. DM1空间申请
+    receiver_bit_malloc_dm1_ptr = dmemalign_unit(0x4000, 131072, APE_DM1);//申请了128KiB 首地址16k对齐
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_bit_malloc_dm1_ptr)
+    {
+        LOG_ERROR_S("rec sync DM1 fail\n");
+        dfree_unit(receiver_bit_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM1第一段，微码配置文件
+    receiver_bit_config_dm1_ptr = (uint32_t *)receiver_bit_malloc_dm1_ptr;
+    //调用DMA函数，将微码配置文件搬入DM1，DDR->DM1
+    if(0 < g_receiver_bit_table_param.receiver_bit_config1_length)
+    {
+    ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_bit_table_param.receiver_bit_config1_ddr_ptr,
+                             (uint64_t)DM_TO_CSU_ADDR(receiver_bit_config_dm1_ptr),
+                             g_receiver_bit_table_param.receiver_bit_config1_length,
+                             DMA_TAG_G2L,
+                             0);
+    }
+    //DM1第二段，堆空间
+    receiver_bit_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm1_ptr + \
+        g_receiver_bit_table_param.receiver_bit_config1_length, 12); //起始地址4k对齐
+    //5. DM2空间申请
+    receiver_bit_malloc_dm2_ptr = dmemalign_unit(0x4000, 196608, APE_DM2);//申请了192KiB 首地址16k对齐
+    //若空间申请失败，释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_bit_malloc_dm2_ptr)
+    {
+        LOG_ERROR_S("rec sync DM2 fail\n");
+        dfree_unit(receiver_bit_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0);
+        dfree_unit(receiver_bit_malloc_dm1_ptr, APE_DM1);
+        return;
+    }
+    //DM2第一段，微码配置文件
+    receiver_bit_config_dm2_ptr = (uint32_t *)receiver_bit_malloc_dm2_ptr;
+    
+    //调用DMA函数，微码配置文件搬移，DDR->DM2
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    if(0 < g_receiver_bit_table_param.receiver_bit_config2_length)
+    {
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint32_t)g_receiver_bit_table_param.receiver_bit_config2_ddr_ptr,
+                             DM_TO_CSU_ADDR(receiver_bit_config_dm2_ptr),
+                             g_receiver_bit_table_param.receiver_bit_config2_length,
+                             DMA_TAG_G2L,
+                            1);
+    }
+    //DM2第二段，堆空间
+    receiver_bit_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm2_ptr + \
+        g_receiver_bit_table_param.receiver_bit_config2_length, 14); //起始地址16k对齐
+
+    TRACE(TRACE_RECEIVER_BIT_ADDR, 3, 1); 
+
+    //6. 计算流程
+    Receiver_Bit_Proc(
+        (uint32_t*)receiver_bit_param_ptr,
+        receiver_bit_temp_dm0_ptr,
+        receiver_bit_temp_dm1_ptr,
+        receiver_bit_temp_dm2_ptr,
+        receiver_bit_temp_dm3_ptr
+    );
+    TRACE(TRACE_RECEIVER_BIT_ADDR, 3, 99); 
+
+
+
+    //8. 内存释放
+    dfree_unit(receiver_bit_malloc_dm2_ptr, APE_DM2);
+    dfree_unit(receiver_bit_malloc_dm1_ptr, APE_DM1);
+    dfree_unit(receiver_bit_malloc_dm3_ptr, APE_DM3);
+    dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0);
+
+
+    TRACE(TRACE_RECEIVER_BIT_ADDR, 3, 100);
+    RUN_CNT(TRACE_RECEIVER_BIT_ADDR, 1);
+    end_slot = TIME_SLOT();
+    end_us =  TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_BIT_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) );
+
+    return;
+}

APELib/Receiver_bit/src/receiver_Bit_Var.s.c

@@ -0,0 +1,17 @@
+/******************************************************************
+ * @file  receiver_var.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#include "receiver_bit_struct.h"
+
+//Receiver微码配置空间offset结构体
+receiver_bit_table_param_t  g_receiver_bit_table_param;
+uint32_t *receiver_bit_config_dm0_ptr = NULLPTR;
+uint32_t *receiver_bit_config_dm1_ptr = NULLPTR;
+uint32_t *receiver_bit_config_dm2_ptr = NULLPTR;
+uint32_t *receiver_bit_config_dm3_ptr = NULLPTR;

APELib/Receiver_symb/inc/receiver_symb_func.h

@@ -0,0 +1,47 @@
+/******************************************************************
+ * @file  receiver_symb_func.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_SYMB_FUNC_H
+#define RECEIVER_SYMB_FUNC_H
+/****************************include*****************************/
+#include "common.h"
+#include "mem_def.h"
+#include "phy_macro.h"
+#include "ape_interface.h"
+#include "receiver_symb_macro.h"
+#include "receiver_symb_struct.h"
+#include "ape_common.h"
+#include "drv_ape.h"
+#include "log_interface.h"
+#include "msg_interface.h"
+#include "osp_ape.h"
+#include "task_define.h"
+#include "trace.h"
+//include mpu header files
+
+
+
+//微码配置空间偏移结构体
+extern receiver_symb_table_param_t  g_receiver_symb_table_param;
+extern uint32_t *receiver_symb_config_dm0_ptr;
+extern uint32_t *receiver_symb_config_dm1_ptr;
+extern uint32_t *receiver_symb_config_dm2_ptr;
+extern uint32_t *receiver_symb_config_dm3_ptr;
+
+void Receiver_Symb_Init();
+void Receiver_Symb_Task(receiver_sync2symb_t* msg_ptr, uint32_t msg_len);
+void Receiver_Symb_Proc(
+    uint32_t* param_ptr,
+    int32_t* temp_dm0_ptr,
+    int32_t* temp_dm1_ptr,
+    int32_t* temp_dm2_ptr,
+    int32_t* temp_dm3_ptr
+);
+
+#endif

APELib/Receiver_symb/inc/receiver_symb_macro.h

@@ -0,0 +1,22 @@
+/******************************************************************
+ * @file  receiver_symb_macro.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_SYMB_MACRO_H
+#define RECEIVER_SYMB_MACRO_H
+
+//GENERATE with Generate_receiver_symb_macro_h.m
+//DO NOT MODIFY
+//=======================================================================
+//微码配置空间长度定义，单位为word(4Byte)
+
+
+//SPU查找表各字段长度定义,单位为word(4Byte)
+
+//=======================================================================
+#endif

APELib/Receiver_symb/inc/receiver_symb_struct.h

@@ -0,0 +1,50 @@
+/******************************************************************
+ * @file  receiver_symb_struct.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#ifndef RECEIVER_SYMB_STRUCT_H
+#define RECEIVER_SYMB_STRUCT_H
+#include "type_define.h"
+#include "interface_rec_sync2_rec_symb.h"
+
+//GENERATE with Generate_receiver_symb_struct_h.m
+//DO NOT MODIFY
+//=======================================================================
+//各微码或查找表偏移及指针定义
+typedef struct receiver_symb_table_param_s
+{
+    //MPU CONFIG OFFSET
+
+    // 存储微码参数表的ddr基地址和长度
+    uint32_t    receiver_symb_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址
+    uint32_t    receiver_symb_config0_length;//receiver DM0微码配置文件ddr长度    
+    uint32_t    receiver_symb_config1_ddr_ptr;//receiver DM1微码配置文件ddr地址
+    uint32_t    receiver_symb_config1_length;//receiver DM1微码配置文件ddr长度
+    uint32_t    receiver_symb_config2_ddr_ptr;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_symb_config2_length;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_symb_config3_ddr_ptr;//receiver DM3微码配置文件ddr地址
+    uint32_t    receiver_symb_config3_length;//receiver DM3微码配置文件ddr地址
+
+    //SPU查找表在SM中的偏移地址
+
+
+
+    // SPU LUT SM基地址和长度
+
+
+}receiver_symb_table_param_t;
+
+//TODO:需要接口设计
+typedef struct receiver_symb2bit_s
+{
+    uint8_t rev[4];
+}receiver_symb2bit_t;
+
+//=======================================================================
+#endif

APELib/Receiver_symb/src/receiver_Symb_Init.s.c

@@ -0,0 +1,67 @@
+/******************************************************************
+ * @file  Receiver_Symb_Init.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_symb_func.h"
+
+
+ /*!   
+ * @brief:  Receiver任务启动前的初始化工作
+ *          初始化全局参数，ddr查找表搬入SM
+ * @author:  HUOHUO
+ * @Date:  2024年10月30日
+ */
+void Receiver_Symb_Init()
+{
+    int32_t  ret;
+    uint32_t lutDdrAddr,idx;
+
+    //DM0
+    
+    //DM1
+
+    //DM2
+
+    //DM3
+
+    //SM
+
+
+    // //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括：
+    // //   1). 置信度表uint16_t Q_W_Lut[2016] (n-5)
+    // //   2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5)
+    // //   3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1)
+    // //   4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check())
+    // //   5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v)
+    // //获取地址
+    //     ret = osp_get_cfgfile("nr_puxch_lut_sm.dat",
+    //                       (uint32_t *)&lutDdrAddr, 
+    //                       (int32_t *)&(g_receiver_symb_table_param.pucch_lut_length));
+    // g_receiver_symb_table_param.pucch_lut_sm_ptr = SM0_BASE;
+    // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr, 
+    //                                    (uint64_t)g_receiver_symb_table_param.pucch_lut_sm_ptr, 
+    //                                    g_receiver_symb_table_param.pucch_lut_length, 
+    //                                    DMA_TAG_G2G, 
+    //                                    1);
+
+    //9. 微码配置文件ddr地址初始化
+    ret = osp_get_cfgfile("Receiver_Symb_cfg_dm0.dat",
+                          (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config0_ddr_ptr),
+                          (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config0_length));
+    ret = osp_get_cfgfile("Receiver_Symb_cfg_dm1.dat",
+                          (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config1_ddr_ptr),
+                          (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config1_length));
+
+    ret = osp_get_cfgfile("Receiver_Symb_cfg_dm2.dat",
+                          (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config2_ddr_ptr),
+                          (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config2_length));
+    ret = osp_get_cfgfile("Receiver_Symb_cfg_dm3.dat",
+                          (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config3_ddr_ptr),
+                          (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config3_length));
+}

APELib/Receiver_symb/src/receiver_Symb_Proc.s.c

@@ -0,0 +1,75 @@
+/******************************************************************
+ * @file  receiver_Proc.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_symb_func.h"
+
+ /*!   
+ * @brief:  Receiver_sync链路处理
+ * @author:  HUOHUO
+ * @Date:  2024年10月30日
+ */
+void Receiver_Symb_Proc(
+    uint32_t *param_ptr,
+    int32_t  *temp_dm0_ptr,
+    int32_t  *temp_dm1_ptr,
+    int32_t  *temp_dm2_ptr,
+    int32_t  *temp_dm3_ptr
+)
+{
+    //局部变量定义
+    int32_t  *cfg_addr;
+    uint32_t time_data_length;
+    uint32_t mpu_temp_dm0_ptr;
+    uint32_t mpu_temp_dm1_ptr;
+    uint32_t mpu_temp_dm2_ptr;
+    uint32_t mpu_temp_dm3_ptr;
+    uint32_t temp_u32;
+    uint32_t time_data_dm0_ptr = ((((uint32_t)&temp_dm0_ptr[0] + 4095)>>12)<<12);
+    uint32_t res_ptr = RECEIVER_OUT2;
+
+    //data读入
+    //获取源数据地址
+    receiver_sync2symb_t* para_dm_ptr = (receiver_sync2symb_t*)param_ptr;
+
+    uint32_t cur_sfn = get_rx_nr_sfn();
+    uint32_t cur_slot = get_rx_nr_slot();
+    uint32_t cur_time = TIME_US();
+    // LOG_ERROR_S("%d %d %d %d %d %d %d 0x%08x 0x%08x %d %d\n", cur_sfn, cur_slot, cur_time, para_dm_ptr->sfn, para_dm_ptr->slot, para_dm_ptr->num_data_section,
+    //   para_dm_ptr->proc_id, para_dm_ptr->data_section0_ptr, para_dm_ptr->data_section1_ptr, para_dm_ptr->data_section0_length, para_dm_ptr->data_section1_length);
+
+
+
+
+
+    // //计算结果搬移到外存
+    // temp_u32 = 1000;//计算byte数
+    // WAIT_MPU_STOP;
+    // ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    
+    // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(time_data_dm0_ptr),
+    //                         (uint64_t)res_ptr,
+    //                         temp_u32,
+    //                         DMA_TAG_L2G,
+    //                         1);
+
+
+    //7.核间消息to APE2
+    //需要定义结构体
+    receiver_symb2bit_t data_send2bit_task;
+    phy_et_msg_send((uint32_t)(&data_send2bit_task),
+					     sizeof(receiver_symb2bit_t),
+					     UCP4008_KERNEL_INTER,
+					     APE1_CORE_ID,
+					     APE2_CORE_ID,
+					     PHY_TASK_RECIEVER_SYMB,
+					     PHY_TASK_RECIEVER_BIT);
+
+    return;
+}

APELib/Receiver_symb/src/receiver_Symb_Task.s.c

@@ -0,0 +1,185 @@
+/******************************************************************
+ * @file  Receiver_Symb_Task.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_symb_func.h"
+
+
+#define ADDR_ALIGN(addr, val)   ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) 
+
+
+ /*!   
+ * @brief:  Receiver任务处理流程
+ * @author:  HUOHUO
+ * @Date:  2024年4月20日
+ */
+void Receiver_Symb_Task(receiver_sync2symb_t* msg_ptr, uint32_t msg_len)
+{
+    uint16_t start_slot = TIME_SLOT();
+    uint16_t start_us = TIME_US();
+    uint16_t end_slot;
+    uint16_t end_us;
+    RUN_CNT(TRACE_RECEIVER_SYMB_ADDR, 0);
+    
+
+    int32_t  *receiver_symb_malloc_dm0_ptr;
+    int32_t  *receiver_symb_malloc_dm1_ptr;
+    int32_t  *receiver_symb_malloc_dm2_ptr;
+    int32_t  *receiver_symb_malloc_dm3_ptr;
+    uint32_t receiver_symb_param_ptr;
+
+    int32_t *receiver_symb_temp_dm0_ptr;
+    int32_t *receiver_symb_temp_dm1_ptr;
+    int32_t *receiver_symb_temp_dm2_ptr;
+    int32_t *receiver_symb_temp_dm3_ptr;
+     //0 空间回收
+    dmalloc_trim(0, APE_DM0);
+    dmalloc_trim(0, APE_DM1);
+    dmalloc_trim(0, APE_DM2);
+    dmalloc_trim(0, APE_DM3);   
+
+    //1. DM0空间申请
+    receiver_symb_malloc_dm0_ptr = dmemalign_unit(0x4000, 131072, APE_DM0); //申请了128KiB 首地址16k对齐
+    if (NULLPTR == receiver_symb_malloc_dm0_ptr)
+    {
+        LOG_ERROR_S("rec sync DM0 fail\n");
+        return;
+    }
+
+    //2. DM0空间分配
+    //DM0第一段，调度信息
+    receiver_symb_param_ptr = (uint32_t)receiver_symb_malloc_dm0_ptr;
+    const uint32_t receiver_param_len = sizeof(receiver_sync2symb_t); //
+    if(0 < receiver_param_len)
+    {
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)msg_ptr,
+                                (uint64_t)DM_TO_CSU_ADDR(receiver_symb_param_ptr),
+                                receiver_param_len,
+                                DMA_TAG_G2L,
+                                0);  
+    }
+    //DM0第二段，微码相关空间
+    receiver_symb_config_dm0_ptr = (uint32_t *)(ADDR_ALIGN(receiver_symb_param_ptr + receiver_param_len * 4, 12)); //起始地址4k对齐
+    if(0 < g_receiver_symb_table_param.receiver_symb_config0_length)
+    {
+    ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_symb_table_param.receiver_symb_config0_ddr_ptr,
+                                 (uint64_t)DM_TO_CSU_ADDR(receiver_symb_config_dm0_ptr),
+                                 g_receiver_symb_table_param.receiver_symb_config0_length,
+                                 DMA_TAG_G2L,
+                                 0);    
+    }
+    //DM0第三段，堆空间
+    receiver_symb_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm0_ptr +  \
+        g_receiver_symb_table_param.receiver_symb_config0_length, 12);//起始地址4k对齐
+    
+    //3. DM3空间申请
+    receiver_symb_malloc_dm3_ptr = dmemalign_unit(0x4000, 196608, APE_DM3);//申请了192KiB 首地址16k对齐
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_symb_malloc_dm3_ptr)
+    {
+        LOG_ERROR_S("rec sync DM3 fail\n");
+        dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM3第一段，微码相关空间
+    receiver_symb_config_dm3_ptr = (uint32_t*)receiver_symb_malloc_dm3_ptr;
+    
+    if(0 < g_receiver_symb_table_param.receiver_symb_config3_length)
+    {
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)g_receiver_symb_table_param.receiver_symb_config3_ddr_ptr,
+                                (uint64_t)DM_TO_CSU_ADDR(receiver_symb_config_dm3_ptr),
+                                g_receiver_symb_table_param.receiver_symb_config3_length,
+                                DMA_TAG_G2L,
+                                0);
+    }
+    //DM3第二段，堆空间
+    receiver_symb_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm3_ptr + \
+        g_receiver_symb_table_param.receiver_symb_config3_length, 14); //起始地址16k对齐
+    //4. DM1空间申请
+    receiver_symb_malloc_dm1_ptr = dmemalign_unit(0x4000, 131072, APE_DM1);//申请了128KiB 首地址16k对齐
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_symb_malloc_dm1_ptr)
+    {
+        LOG_ERROR_S("rec sync DM1 fail\n");
+        dfree_unit(receiver_symb_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM1第一段，微码配置文件
+    receiver_symb_config_dm1_ptr = (uint32_t *)receiver_symb_malloc_dm1_ptr;
+    //调用DMA函数，将微码配置文件搬入DM1，DDR->DM1
+    if(0 < g_receiver_symb_table_param.receiver_symb_config1_length)
+    {
+    ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_symb_table_param.receiver_symb_config1_ddr_ptr,
+                             (uint64_t)DM_TO_CSU_ADDR(receiver_symb_config_dm1_ptr),
+                             g_receiver_symb_table_param.receiver_symb_config1_length,
+                             DMA_TAG_G2L,
+                             0);
+    }
+    //DM1第二段，堆空间
+    receiver_symb_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm1_ptr + \
+        g_receiver_symb_table_param.receiver_symb_config1_length, 12); //起始地址4k对齐
+    //5. DM2空间申请
+    receiver_symb_malloc_dm2_ptr = dmemalign_unit(0x4000, 196608, APE_DM2);//申请了192KiB 首地址16k对齐
+    //若空间申请失败，释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_symb_malloc_dm2_ptr)
+    {
+        LOG_ERROR_S("rec sync DM2 fail\n");
+        dfree_unit(receiver_symb_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0);
+        dfree_unit(receiver_symb_malloc_dm1_ptr, APE_DM1);
+        return;
+    }
+    //DM2第一段，微码配置文件
+    receiver_symb_config_dm2_ptr = (uint32_t *)receiver_symb_malloc_dm2_ptr;
+    
+    //调用DMA函数，微码配置文件搬移，DDR->DM2
+    if(0 < g_receiver_symb_table_param.receiver_symb_config2_length)
+    {
+        ape_csu_task_lookup(DMA_TAG_G2L, 1);
+        ape_csu_dma_1D_G2L_ch0ch1_transfer((uint32_t)g_receiver_symb_table_param.receiver_symb_config2_ddr_ptr,
+                                DM_TO_CSU_ADDR(receiver_symb_config_dm2_ptr),
+                                g_receiver_symb_table_param.receiver_symb_config2_length,
+                                DMA_TAG_G2L,
+                                1);
+    }
+    //DM2第二段，堆空间
+    receiver_symb_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm2_ptr + \
+        g_receiver_symb_table_param.receiver_symb_config2_length, 14); //起始地址16k对齐
+
+    TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 1); 
+
+    //6. 计算流程
+    Receiver_Symb_Proc(
+        (uint32_t*)receiver_symb_param_ptr,
+        receiver_symb_temp_dm0_ptr,
+        receiver_symb_temp_dm1_ptr,
+        receiver_symb_temp_dm2_ptr,
+        receiver_symb_temp_dm3_ptr
+    );
+    TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 99); 
+
+
+
+    //8. 内存释放
+    dfree_unit(receiver_symb_malloc_dm2_ptr, APE_DM2);
+    dfree_unit(receiver_symb_malloc_dm1_ptr, APE_DM1);
+    dfree_unit(receiver_symb_malloc_dm3_ptr, APE_DM3);
+    dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0);
+
+
+    TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 100);
+    RUN_CNT(TRACE_RECEIVER_SYMB_ADDR, 1);
+    end_slot = TIME_SLOT();
+    end_us =  TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) );
+
+    return;
+}

APELib/Receiver_symb/src/receiver_Symb_Var.s.c

@@ -0,0 +1,17 @@
+/******************************************************************
+ * @file  receiver_var.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#include "receiver_symb_struct.h"
+
+//Receiver微码配置空间offset结构体
+receiver_symb_table_param_t  g_receiver_symb_table_param;
+uint32_t *receiver_symb_config_dm0_ptr = NULLPTR;
+uint32_t *receiver_symb_config_dm1_ptr = NULLPTR;
+uint32_t *receiver_symb_config_dm2_ptr = NULLPTR;
+uint32_t *receiver_symb_config_dm3_ptr = NULLPTR;

APELib/Receiver_sync/inc/receiver_sync_func.h

@@ -0,0 +1,63 @@
+/******************************************************************
+ * @file  receiver_sync_func.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_SYNC_FUNC_H
+#define RECEIVER_SYNC_FUNC_H
+/****************************include*****************************/
+#include "common.h"
+#include "mem_def.h"
+#include "phy_macro.h"
+#include "ape_interface.h"
+#include "receiver_sync_macro.h"
+#include "receiver_sync_struct.h"
+#include "ape_common.h"
+#include "drv_ape.h"
+#include "log_interface.h"
+#include "msg_interface.h"
+#include "osp_ape.h"
+#include "task_define.h"
+#include "trace.h"
+#include "interface_rec_sync2_rec_sync_first.h"
+
+
+//include mpu header files
+#include "ByteCopy.h"
+#include "SyncVer.h"
+
+
+//微码配置空间偏移结构体
+extern receiver_sync_table_param_t  g_receiver_sync_table_param;
+extern uint32_t *receiver_sync_config_dm0_ptr;
+extern uint32_t *receiver_sync_config_dm1_ptr;
+extern uint32_t *receiver_sync_config_dm2_ptr;
+extern uint32_t *receiver_sync_config_dm3_ptr;
+
+extern int32_t  *receiver_sync_malloc_dm0_ptr;
+extern int32_t  *receiver_sync_malloc_dm1_ptr;
+extern int32_t  *receiver_sync_malloc_dm2_ptr;
+extern int32_t  *receiver_sync_malloc_dm3_ptr;
+extern int32_t  *receiver_sync_temp_dm0_ptr;
+extern int32_t  *receiver_sync_temp_dm1_ptr;
+extern int32_t  *receiver_sync_temp_dm2_ptr;
+extern int32_t  *receiver_sync_temp_dm3_ptr;
+
+extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr;
+extern uint32_t sync2symb_data_buffer[4];
+extern receiver_sync2symb_t data_send2symb_task[3];
+extern uint16_t g_proc_id;
+
+void Receiver_Sync_Init();
+void Receiver_Sync_Task();
+void Receiver_Sync_Proc();
+void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot);
+
+//debug
+extern uint32_t* last_mem_dm[8];
+
+#endif

APELib/Receiver_sync/inc/receiver_sync_macro.h

@@ -0,0 +1,26 @@
+/******************************************************************
+ * @file  receiver_sync_macro.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_SYNC_MACRO_H
+#define RECEIVER_SYNC_MACRO_H
+
+//GENERATE with Generate_receiver_sync_macro_h.m
+//DO NOT MODIFY
+//=======================================================================
+//微码配置空间长度定义，单位为word(4Byte)
+#define RECEIVER_SYNC_ConfigByteCopy_CFG1_LENGTH                    (0x0030)
+#define RECEIVER_SYNC_ConfigSlidingCorrelation_CFG2_LENGTH          (0x0080)
+#define RECEIVER_SYNC_ConfigSlidingCorrelationSecond_CFG3_LENGTH    (0x0080)
+#define RECEIVER_SYNC_ConfigSyncVer_CFG4_LENGTH                     (0x0080)
+
+//SPU查找表各字段长度定义,单位为word(4Byte)
+
+
+//=======================================================================
+#endif

APELib/Receiver_sync/inc/receiver_sync_struct.h

@@ -0,0 +1,75 @@
+/******************************************************************
+ * @file  receiver_sync_struct.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#ifndef RECEIVER_SYNC_STRUCT_H
+#define RECEIVER_SYNC_STRUCT_H
+#include "type_define.h"
+#include "receiver_sync_vars.h"
+#include "interface_rec_sync2_rec_symb.h"
+
+//GENERATE with Generate_receiver_sync_struct_h.m
+//DO NOT MODIFY
+//=======================================================================
+//各微码或查找表偏移及指针定义
+typedef struct receiver_sync_table_param_s
+{
+    //MPU CONFIG OFFSET
+    uint32_t    ConfigByteCopy_CFG1_Offset;
+    uint32_t    ConfigSlidingCorrelation_CFG2_Offset;
+    uint32_t    ConfigSlidingCorrelationSecond_CFG3_Offset;
+    uint32_t    ConfigSyncVer_CFG4_Offset;
+    // 存储微码参数表的ddr基地址和长度
+    uint32_t    receiver_sync_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址
+    uint32_t    receiver_sync_config0_length;//receiver DM0微码配置文件ddr长度    
+    uint32_t    receiver_sync_config1_ddr_ptr;//receiver DM1微码配置文件ddr地址
+    uint32_t    receiver_sync_config1_length;//receiver DM1微码配置文件ddr长度
+    uint32_t    receiver_sync_config2_ddr_ptr;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_sync_config2_length;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_sync_config3_ddr_ptr;//receiver DM3微码配置文件ddr地址
+    uint32_t    receiver_sync_config3_length;//receiver DM3微码配置文件ddr地址
+
+    //SPU查找表在SM中的偏移地址
+
+
+    // SPU LUT SM基地址和长度
+
+
+}receiver_sync_table_param_t;
+
+
+
+typedef struct receiver_sync2first_sync_s
+{
+    uint16_t sfn;
+    uint16_t slot;
+    
+}receiver_sync2first_sync_t;
+
+
+
+
+
+
+typedef enum
+{
+    SYNC_IDLE=0,
+    SYNC_FIRST_RUNING,
+    SYNC_TRACKING
+}receiver_sync_status_e;
+
+
+typedef enum
+{
+    SYNC_OK=0,
+    SYNC_FAIL
+}receiver_sync_ret_e;
+
+//=======================================================================
+#endif

APELib/Receiver_sync/inc/receiver_sync_vars.h

@@ -0,0 +1,6 @@
+#ifndef RECEIVER_SYNC_VARS_H
+#define RECEIVER_SYNC_VARS_H
+
+#define RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER  (4)
+
+#endif

APELib/Receiver_sync/src/receiver_Sync_Init.s.c

@@ -0,0 +1,86 @@
+/******************************************************************
+ * @file  Receiver_Sync_Init.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_sync_func.h"
+
+
+ /*!   
+ * @brief:  Receiver任务启动前的初始化工作
+ *          初始化全局参数，ddr查找表搬入SM
+ * @author:  HUOHUO
+ * @Date:  2024年10月30日
+ */
+void Receiver_Sync_Init()
+{
+    int32_t  ret;
+
+    //DM0
+    g_receiver_sync_table_param.ConfigByteCopy_CFG1_Offset = 0;
+    g_receiver_sync_table_param.ConfigSlidingCorrelation_CFG2_Offset = g_receiver_sync_table_param.ConfigByteCopy_CFG1_Offset + RECEIVER_SYNC_ConfigByteCopy_CFG1_LENGTH;
+    g_receiver_sync_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset = g_receiver_sync_table_param.ConfigSlidingCorrelation_CFG2_Offset + RECEIVER_SYNC_ConfigSlidingCorrelation_CFG2_LENGTH;
+    g_receiver_sync_table_param.ConfigSyncVer_CFG4_Offset = g_receiver_sync_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset + RECEIVER_SYNC_ConfigSlidingCorrelationSecond_CFG3_LENGTH;
+    //DM1
+
+    //DM2
+
+    //DM3
+
+    //SM
+
+
+    // //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括：
+    // //   1). 置信度表uint16_t Q_W_Lut[2016] (n-5)
+    // //   2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5)
+    // //   3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1)
+    // //   4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check())
+    // //   5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v)
+    // //获取地址
+    //     ret = osp_get_cfgfile("nr_puxch_lut_sm.dat",
+    //                       (uint32_t *)&lutDdrAddr, 
+    //                       (int32_t *)&(g_receiver_sync_table_param.pucch_lut_length));
+    // g_receiver_sync_table_param.pucch_lut_sm_ptr = SM0_BASE;
+    // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr, 
+    //                                    (uint64_t)g_receiver_sync_table_param.pucch_lut_sm_ptr, 
+    //                                    g_receiver_sync_table_param.pucch_lut_length, 
+    //                                    DMA_TAG_G2G, 
+    //                                    1);
+    // LOG_ERROR_S("test init\n");
+    //9. 微码配置文件ddr地址初始化
+    ret = osp_get_cfgfile("Receiver_Sync_cfg_dm0.dat",
+                          (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config0_ddr_ptr),
+                          (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config0_length));
+    // ret = osp_get_cfgfile("Receiver_Sync_cfg_dm1.dat",
+    //                       (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config1_ddr_ptr),
+    //                       (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config1_length));
+
+    // ret = osp_get_cfgfile("Receiver_Sync_cfg_dm2.dat",
+    //                       (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config2_ddr_ptr),
+    //                       (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config2_length));
+    // ret = osp_get_cfgfile("Receiver_Sync_cfg_dm3.dat",
+    //                       (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config3_ddr_ptr),
+    //                       (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config3_length));
+
+    // LOG_ERROR_S("init %d 0x%08x %d\n", ret, g_receiver_sync_table_param.receiver_sync_config0_ddr_ptr, g_receiver_sync_table_param.receiver_sync_config0_length);
+    //状态机初始化
+    g_receiver_sync_status_SM_ptr = (uint32_t)RECEIVER_SYNC2SYNC_FIRST_INF_ADDR;
+    STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status, SYNC_IDLE);
+    STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset, -1);
+    STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, 0);
+
+    //sync2symb buffer地址初始化
+    sync2symb_data_buffer[0] = RECEIVER_SYNC2SYMB_BUFFER0_ADDR;
+    sync2symb_data_buffer[1] = RECEIVER_SYNC2SYMB_BUFFER1_ADDR;
+    sync2symb_data_buffer[2] = RECEIVER_SYNC2SYMB_BUFFER2_ADDR;
+    sync2symb_data_buffer[3] = RECEIVER_SYNC2SYMB_BUFFER3_ADDR;
+
+    g_proc_id = 0;
+
+    
+}

APELib/Receiver_sync/src/receiver_Sync_Proc.s.c

@@ -0,0 +1,495 @@
+/******************************************************************
+ * @file  receiver_Proc.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_sync_func.h"
+#define ADDR_ALIGN(addr, val)   ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) 
+
+void dm_check(uint32_t mark)
+{
+    uint32_t idx;
+    uint32_t flag = 0;
+    for( idx = 0 ;idx < 8; idx++)
+    {
+        if(0xa5a55a5a != *last_mem_dm[idx])
+        {
+            flag |= (1<<idx);
+            LOG_ERROR_S("lk 0x%08x\n", last_mem_dm[idx]);
+        }
+    }
+
+    if(0 != flag)
+    {
+    LOG_ERROR_S("dm leadking detect!!%d 0x%08x\n", mark, flag);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_dbgbreak();
+    }
+}
+
+void Receiver_Sync_Memory_Alloc( )
+{
+    uint32_t receiver_sync_param_ptr;//not use
+    uint32_t dm0_space;
+    uint32_t dm1_space;
+    uint32_t dm2_space;
+    uint32_t dm3_space;
+
+     //0 空间回收
+    dmalloc_trim(0, APE_DM0);
+    dmalloc_trim(0, APE_DM1);
+    dmalloc_trim(0, APE_DM2);
+    dmalloc_trim(0, APE_DM3);   
+
+    //1. DM0空间申请
+    dm0_space = getFreeSpace(APE_DM0);
+    // LOG_ERROR_S("dm0 space:%d\n",dm0_space);
+    receiver_sync_malloc_dm0_ptr = dmalloc_unit(dm0_space - 1024, APE_DM0); //尽量申请空间
+    if (NULLPTR == receiver_sync_malloc_dm0_ptr)
+    {
+        LOG_ERROR_S("rec sync DM0 fail\n");
+        return;
+    }
+
+    //2. DM0空间分配
+    //DM0第一段，微码相关空间
+    receiver_sync_config_dm0_ptr = (uint32_t)receiver_sync_malloc_dm0_ptr;
+
+    // LOG_ERROR_S("sync_track dm0 0x%08x 0x%08x %d\n", g_receiver_sync_table_param.receiver_sync_config0_ddr_ptr, receiver_sync_config_dm0_ptr,
+    //     g_receiver_sync_table_param.receiver_sync_config0_length);
+        
+    ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_sync_table_param.receiver_sync_config0_ddr_ptr,
+                                 (uint64_t)DM_TO_CSU_ADDR(receiver_sync_config_dm0_ptr),
+                                 g_receiver_sync_table_param.receiver_sync_config0_length,
+                                 DMA_TAG_G2L,
+                                 0);    
+
+    //DM0第二段，堆空间
+    receiver_sync_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_config_dm0_ptr + \
+        (g_receiver_sync_table_param.receiver_sync_config0_length>>2), 2); //起始地址4byte对齐
+    
+    //3. DM3空间申请
+    dm3_space = getFreeSpace(APE_DM3);
+    receiver_sync_malloc_dm3_ptr = dmalloc_unit(dm3_space - 1024, APE_DM3);//尽量申请
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_sync_malloc_dm3_ptr)
+    {
+        LOG_ERROR_S("rec sync DM3 fail\n");
+        dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM3第一段，堆空间
+    receiver_sync_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_malloc_dm3_ptr, 12); //起始地址4k对齐
+
+
+    //4. DM1空间申请
+    dm1_space = getFreeSpace(APE_DM1);
+    receiver_sync_malloc_dm1_ptr = dmalloc_unit(dm1_space - 1024, APE_DM1);//尽量申请
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_sync_malloc_dm1_ptr)
+    {
+        LOG_ERROR_S("rec sync DM1 fail\n");
+        dfree_unit(receiver_sync_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM1第一段,堆空间
+    receiver_sync_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_malloc_dm1_ptr + \
+        (g_receiver_sync_table_param.receiver_sync_config1_length>>2), 12); //起始地址4k对齐
+
+    //5. DM2空间申请
+    dm2_space = getFreeSpace(APE_DM2);
+    receiver_sync_malloc_dm2_ptr = dmalloc_unit(dm2_space - 1024, APE_DM2);//尽量申请
+    //若空间申请失败，释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_sync_malloc_dm2_ptr)
+    {
+        LOG_ERROR_S("rec sync DM2 fail\n");
+        dfree_unit(receiver_sync_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0);
+        dfree_unit(receiver_sync_malloc_dm1_ptr, APE_DM1);
+        return;
+    }
+    //DM2第一段,堆空间
+    receiver_sync_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_malloc_dm2_ptr + \
+        (g_receiver_sync_table_param.receiver_sync_config2_length>>2), 2); //起始地址4byte对齐
+
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    
+
+    //debug
+    last_mem_dm[0] = receiver_sync_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -1;
+    last_mem_dm[1] = receiver_sync_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -2;
+    last_mem_dm[2] = receiver_sync_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -1;
+    last_mem_dm[3] = receiver_sync_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -2;
+    last_mem_dm[4] = receiver_sync_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -1;
+    last_mem_dm[5] = receiver_sync_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -2;
+    last_mem_dm[6] = receiver_sync_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -1;
+    last_mem_dm[7] = receiver_sync_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -2;
+
+    *last_mem_dm[0] = 0xa5a55a5a;
+    *last_mem_dm[1] = 0xa5a55a5a;
+    *last_mem_dm[2] = 0xa5a55a5a;
+    *last_mem_dm[3] = 0xa5a55a5a;
+    *last_mem_dm[4] = 0xa5a55a5a;
+    *last_mem_dm[5] = 0xa5a55a5a;
+    *last_mem_dm[6] = 0xa5a55a5a;
+    *last_mem_dm[7] = 0xa5a55a5a;
+
+    
+
+}
+
+
+
+void Receiver_Sync_Memory_Free( )
+{
+    //8. 内存释放
+    dfree_unit(receiver_sync_malloc_dm2_ptr, APE_DM2);
+    dfree_unit(receiver_sync_malloc_dm1_ptr, APE_DM1);
+    dfree_unit(receiver_sync_malloc_dm3_ptr, APE_DM3);
+    dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0);
+}
+
+
+
+ /*!   
+ * @brief:  Receiver_sync链路处理
+ * @author:  HUOHUO
+ * @Date:  2024年10月30日
+ */
+void Receiver_Sync_Proc(
+)
+{
+    //局部变量定义
+    int32_t  *cfg_addr;
+    uint32_t time_data_ddr_ptr;
+    uint32_t time_data_length;
+
+    uint32_t cur_sfn = get_rx_nr_sfn();
+    uint32_t cur_slot = get_rx_nr_slot();
+    uint32_t sync_status = LOAD_EX_W(&(g_receiver_sync_status_SM_ptr->sync_status));
+
+    if(SYNC_FIRST_RUNING ==  sync_status)
+    {
+        TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 2);
+        return ;
+    }
+    else if(SYNC_IDLE == sync_status)
+    {
+        TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 3);
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status ,SYNC_FIRST_RUNING);
+        receiver_sync2first_sync_t temp_msg;
+        temp_msg.sfn = cur_sfn;
+        temp_msg.slot = cur_slot;
+        phy_et_msg_send((uint32_t)(&temp_msg),
+                            sizeof(receiver_sync2first_sync_t),
+                            UCP4008_KERNEL_INNER,
+                            APE0_CORE_ID,
+                            APE3_CORE_ID,
+                            PHY_TASK_RECIEVER_SYNC,
+                            PHY_TASK_RECIEVER_FIRST_SYNC);
+
+        //第一次同步目前不存储数据做处理，注释
+        // receiver_sync2first_sync_t data_send2first_sync_task;
+        // phy_et_msg_send((uint32_t)(&data_send2first_sync_task),
+        //                     sizeof(receiver_sync2first_sync_t),
+        //                     UCP4008_KERNEL_INNER,
+        //                     get_core_id(),
+        //                     get_core_id(),
+        //                     PHY_TASK_PRI_RECEIVER_SYNC,
+        //                     PHY_TASK_PRI_RECEIVER_FIRST_SYNC);
+        TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 4);
+    }
+    else if(SYNC_TRACKING == sync_status)
+    {
+        TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 5);
+        Receiver_Fine_Sync_Proc(cur_sfn, cur_slot);
+
+        //根据当前状态机状态，buffer存储的数据长度，sync同步帧头，发送核间消息触发任务
+        TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 6);
+
+    }
+    else
+    {
+        TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 7);
+        return;
+    }
+
+    TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 8);
+    return;
+}
+
+
+
+//用于跟踪同步
+void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot)
+{
+
+    uint16_t start_slot = TIME_SLOT();
+    uint16_t start_us = TIME_US();
+    uint16_t end_slot;
+    uint16_t end_us;
+    uint16_t dbg_time0, dbg_time1;
+    uint16_t dbg_slot0, dbg_slot1;
+    RUN_CNT(TRACE_RECEIVER_SYNC_FINE_ADDR, 0);
+
+    uint32_t ret;
+    int32_t  *cfg_addr;// 配置地址指针
+    uint32_t time0 = TIME_US();
+    volatile uint32_t time1 = time0;
+    uint32_t task_idx = 0;
+    uint32_t frame_head_offset;
+    uint32_t src_addr0;
+    uint32_t src_addr1;
+    
+    //用于指示循环buffer空口数据的存储头
+    uint32_t buffer_sel = (slot + RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER -1) & 0x3; 
+    uint32_t buffer_sel2 = (buffer_sel + 1) & 0x3; 
+    
+    TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 1); 
+    //Proc的DM空间申请
+    
+    Receiver_Sync_Memory_Alloc();
+    TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 2);
+
+    dbg_slot0 = TIME_SLOT();
+    dbg_time0 = TIME_US(); 
+    //搬移1055sample数据供定时同步,奇数slot处理偶buffer数据，反之
+
+    if( 1 == (slot & 0x01) )
+    {
+        src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR;
+        src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR;
+    }
+    else
+    {
+        src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR; 
+        src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR;       
+    }
+
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    //取数方式，同步点为中心，前16，后15，相关长度1024
+    frame_head_offset = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset);
+    if(16 > frame_head_offset)
+    {
+        //上个buffer尾
+        memcpy_ext(receiver_sync_temp_dm0_ptr, src_addr1 + ((61440 - (16 - frame_head_offset) ) <<2), (16 - frame_head_offset)<<2 );
+        //当前buffer头
+        ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
+                                    (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr + (16 - frame_head_offset) ),
+                                    (1055 - (16 - frame_head_offset) )<<2,
+                                    DMA_TAG_G2L,
+                                    0);    
+        
+        // LOG_ERROR_S("csu1:%d %d\n", (16 - frame_head_offset)<<2 , (1055 - (16 - frame_head_offset) )<<2 );
+    }
+    else if(61440 - (15 + 1024) < frame_head_offset)
+    {
+        //当前buffer尾
+        ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 +  ((frame_head_offset -16) <<2) ),
+                                    (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr),
+                                    ((61440 - (frame_head_offset -16)) )<<2,
+                                    DMA_TAG_G2L,
+                                    0);  
+        //下个buffer头  等待保证数据被jesd_csu存入    
+        while(time1 - time0 < 10)
+        {
+            time1 = TIME_US();
+        }
+        ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1),
+                            (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr + (61440 - (frame_head_offset -16) ) ),
+                            (1055 - (61440 - (frame_head_offset -16)) )<<2,
+                            DMA_TAG_G2L,
+                            0); 
+        
+        // LOG_ERROR_S("csu2:%d %d\n", ((61440 - (frame_head_offset -16)) )<<2 , (1055 - (61440 - (frame_head_offset -16)) )<<2 );
+    }
+    else
+    {
+        //当前buffer
+        ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 +  ((frame_head_offset -16) <<2) ),
+                                    (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr),
+                                    (1055)<<2,
+                                    DMA_TAG_G2L,
+                                    0); 
+        
+        //  LOG_ERROR_S("csu3:0x%08x 0x%08x\n", (src_addr0 +  ((frame_head_offset -16) <<2) ) , receiver_sync_temp_dm0_ptr );
+    }
+
+    //复制数据DM0 -> DM1
+    cfg_addr = (int32_t *)receiver_sync_config_dm0_ptr + g_receiver_sync_table_param.ConfigByteCopy_CFG1_Offset;
+    ByteCopy((int)cfg_addr, 
+            MPU_ADDR(receiver_sync_temp_dm0_ptr),
+            MPU_ADDR(receiver_sync_temp_dm1_ptr),
+            (1055) << 2);
+
+
+    TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 3); 
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    
+    uint32_t dbg_cur_time = TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1);
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 5, dbg_cur_time );
+    // LOG_ERROR_S("%d %d %d\n", sfn, slot , dbg_cur_time);
+    // if(100 < dbg_cur_time )
+    // {
+    // LOG_ERROR_S("time overload !!\n");
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_dbgbreak();
+    // }
+
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_time1;
+
+    //插空拷贝数据到SM，提供给sync_symb数据输入来源
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
+                                (uint64_t)(sync2symb_data_buffer[buffer_sel]),
+                                (61440)<<2,
+                                DMA_TAG_G2G,
+                                0);
+
+    SVRReg[0] = MPU_ADDR(cfg_addr);
+    ByteCopyAsm(SVRReg);
+
+
+    cfg_addr = (int32_t *)receiver_sync_config_dm0_ptr + g_receiver_sync_table_param.ConfigSyncVer_CFG4_Offset;
+    SyncVer((int)cfg_addr, 
+             MPU_ADDR(receiver_sync_temp_dm0_ptr), 
+             MPU_ADDR(receiver_sync_temp_dm1_ptr),
+             MPU_ADDR(receiver_sync_temp_dm2_ptr), 
+             MPU_ADDR(receiver_sync_temp_dm3_ptr));
+
+    WAIT_MPU_STOP;
+    TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 4);
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 6, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_time1;
+    SVRReg[0] = MPU_ADDR(cfg_addr);
+    SyncVerAsm(SVRReg);
+
+
+
+    // 得到验证后的同步位置
+    WAIT_MPU_STOP;
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 7, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_time1;
+    TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 5);
+    uint32_t maxWindowSum = receiver_sync_temp_dm3_ptr[1];
+    //更新最佳位置
+    uint32_t bestPosition =receiver_sync_temp_dm3_ptr[0]-16 + frame_head_offset;
+
+    //更新sync2symb的buffer状态记录
+    STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len,  LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len) + 61440);
+    STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_offset , 61440 * buffer_sel2);
+
+
+    if(-1 == LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset) )  //初始态，初始化数据处理偏移
+    {
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset , 61440 * buffer_sel);
+        
+    }
+    __ucps2_synch(0);
+
+    uint32_t cylic_buffer_data_offset = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_offset);
+    uint32_t cylic_buffer_proc_data_offset = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset);
+    uint32_t cylic_buffer_data_offset_temp = (cylic_buffer_data_offset >= cylic_buffer_proc_data_offset) ?
+                                                cylic_buffer_data_offset   :
+                                                (cylic_buffer_data_offset + 61440 * RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER); 
+
+    uint32_t offset_temp = 0 + frame_head_offset;
+
+    uint32_t cylic_buffer_data_len = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len);
+    while(offset_temp <= cylic_buffer_data_offset_temp)
+    {
+        if( (cylic_buffer_proc_data_offset + 61440 <= offset_temp) )
+        {
+        TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 6);
+        //填写给symb任务的调度信息
+        data_send2symb_task[task_idx].sfn = sfn;
+        data_send2symb_task[task_idx].slot = slot;
+        data_send2symb_task[task_idx].num_data_section = (offset_temp > (61440 * 4) && (offset_temp < (61440 * 5)) ) ? 2 : 1;
+        data_send2symb_task[task_idx].proc_id = g_proc_id;
+        data_send2symb_task[task_idx].data_section0_ptr =  sync2symb_data_buffer[0] + (((offset_temp - 61440) % (61440*4))<<2);
+        data_send2symb_task[task_idx].data_section0_length = (offset_temp > (61440 * 4)) ? ((61440 * 4) - (offset_temp - 61440)) : 61440;
+        data_send2symb_task[task_idx].data_section1_ptr =  (2 == data_send2symb_task[task_idx].num_data_section) ? (sync2symb_data_buffer[0]) : 0;
+        data_send2symb_task[task_idx].data_section1_length = (2 == data_send2symb_task[task_idx].num_data_section) ? (61440 - data_send2symb_task[task_idx].data_section0_length) : 0; 
+
+        //维护状态信息
+        cylic_buffer_data_len =  cylic_buffer_data_offset_temp - offset_temp;
+        cylic_buffer_proc_data_offset = offset_temp % (61440*4);
+
+        //发核间消息给SYMB_TASK
+        phy_et_msg_send((uint32_t)(&data_send2symb_task[task_idx]),
+                            sizeof(receiver_sync2symb_t),
+                            UCP4008_KERNEL_INTER,
+                            get_core_id(),
+                            APE1_CORE_ID,
+                            PHY_TASK_PRI_RECEIVER_SYNC,
+                            PHY_TASK_PRI_RECEIVER_SYMB);
+        g_proc_id++;
+        task_idx++;
+        }
+
+        offset_temp += 61440;
+    }
+    STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len , cylic_buffer_data_len);
+    STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset, cylic_buffer_proc_data_offset);
+
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 8, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_time1;
+
+    //TODO:后续需要添加门限判断条件
+    uint32_t threshold = 1;
+    if(threshold)
+    {
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset , bestPosition % 61440);
+        //LOG_INFO_S("rec sync track offset: %d\n", bestPosition % 61440);
+        ret = SYNC_OK;
+    } 
+
+
+    //执行完成，更新状态机
+    if(SYNC_OK == ret)
+    {
+        //此分支本身就是SYNC_TRACKING
+        //g_receiver_sync_status_SM_ptr.sync_status = SYNC_TRACKING;
+
+    }
+    else
+    {
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_IDLE);
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset , -1);
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, 0);
+    }
+    TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 7);
+    ape_csu_task_lookup(DMA_TAG_G2G, 1);
+    Receiver_Sync_Memory_Free();
+
+    RUN_CNT(TRACE_RECEIVER_SYNC_FINE_ADDR, 1);
+    end_slot = TIME_SLOT();
+    end_us =  TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) );
+    return;
+}

APELib/Receiver_sync/src/receiver_Sync_Task.s.c

@@ -0,0 +1,44 @@
+/******************************************************************
+ * @file  Receiver_Sync_Task.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_sync_func.h"
+
+
+#define ADDR_ALIGN(addr, val)   ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) 
+
+
+ /*!   
+ * @brief:  Receiver任务处理流程
+ * @author:  HUOHUO
+ * @Date:  2024年4月20日
+ */
+void Receiver_Sync_Task()
+{
+    uint16_t start_slot = TIME_SLOT();
+    uint16_t start_us = TIME_US();
+    uint16_t end_slot;
+    uint16_t end_us;
+    RUN_CNT(TRACE_RECEIVER_SYNC_ADDR, 0);
+    
+
+    //6. 计算流程
+    Receiver_Sync_Proc();
+
+
+    TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 100);
+    RUN_CNT(TRACE_RECEIVER_SYNC_ADDR, 1);
+    end_slot = TIME_SLOT();
+    end_us =  TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) );
+
+    return;
+}
+
+

APELib/Receiver_sync/src/receiver_Sync_Var.s.c

@@ -0,0 +1,39 @@
+/******************************************************************
+ * @file  receiver_var.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#include "receiver_sync_struct.h"
+#include "interface_rec_sync2_rec_sync_first.h"
+
+//Receiver微码配置空间offset结构体
+receiver_sync_table_param_t  g_receiver_sync_table_param;
+uint32_t *receiver_sync_config_dm0_ptr = NULLPTR;
+uint32_t *receiver_sync_config_dm1_ptr = NULLPTR;
+uint32_t *receiver_sync_config_dm2_ptr = NULLPTR;
+uint32_t *receiver_sync_config_dm3_ptr = NULLPTR;
+
+int32_t  *receiver_sync_malloc_dm0_ptr;
+int32_t  *receiver_sync_malloc_dm1_ptr;
+int32_t  *receiver_sync_malloc_dm2_ptr;
+int32_t  *receiver_sync_malloc_dm3_ptr;
+int32_t  *receiver_sync_temp_dm0_ptr;
+int32_t  *receiver_sync_temp_dm1_ptr;
+int32_t  *receiver_sync_temp_dm2_ptr;
+int32_t  *receiver_sync_temp_dm3_ptr;
+
+receiver_sync_status_t* g_receiver_sync_status_SM_ptr;
+receiver_sync2symb_t data_send2symb_task[3];
+uint16_t g_proc_id;
+
+
+
+uint32_t sync2symb_data_buffer[RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER];
+
+//debug 
+uint32_t* last_mem_dm[8];
+

APELib/Receiver_sync_first/inc/receiver_sync_first_func.h

@@ -0,0 +1,63 @@
+/******************************************************************
+ * @file  receiver_sync_first_func.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_SYNC_FIRST_FUNC_H
+#define RECEIVER_SYNC_FIRST_FUNC_H
+/****************************include*****************************/
+#include "common.h"
+#include "mem_def.h"
+#include "phy_macro.h"
+#include "ape_interface.h"
+#include "receiver_sync_first_macro.h"
+#include "receiver_sync_first_struct.h"
+#include "ape_common.h"
+#include "drv_ape.h"
+#include "log_interface.h"
+#include "msg_interface.h"
+#include "osp_ape.h"
+#include "task_define.h"
+#include "trace.h"
+#include "interface_rec_sync2_rec_sync_first.h"
+
+
+//include mpu header files
+#include "ByteCopy.h"
+#include "SlidingCorrelation.h"
+#include "SlidingCorrelationSecond.h"
+
+
+
+//微码配置空间偏移结构体
+extern receiver_sync_first_table_param_t  g_receiver_sync_first_table_param;
+extern uint32_t *receiver_sync_first_config_dm0_ptr;
+extern uint32_t *receiver_sync_first_config_dm1_ptr;
+extern uint32_t *receiver_sync_first_config_dm2_ptr;
+extern uint32_t *receiver_sync_first_config_dm3_ptr;
+
+extern int32_t  *receiver_sync_first_malloc_dm0_ptr;
+extern int32_t  *receiver_sync_first_malloc_dm1_ptr;
+extern int32_t  *receiver_sync_first_malloc_dm2_ptr;
+extern int32_t  *receiver_sync_first_malloc_dm3_ptr;
+extern int32_t  *receiver_sync_first_temp_dm0_ptr;
+extern int32_t  *receiver_sync_first_temp_dm1_ptr;
+extern int32_t  *receiver_sync_first_temp_dm2_ptr;
+extern int32_t  *receiver_sync_first_temp_dm3_ptr;
+
+extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr;
+extern uint32_t sync2symb_data_buffer[4];
+extern receiver_sync2symb_t data_send2symb_task[3];
+extern uint16_t g_proc_id;
+
+void Receiver_Sync_First_Init();
+void Receiver_First_Sync_Proc(receiver_sync2first_sync_t* msg_ptr, uint32_t msg_len);
+
+//debug
+extern uint32_t* last_mem_dm[8];
+
+#endif

APELib/Receiver_sync_first/inc/receiver_sync_first_macro.h

@@ -0,0 +1,26 @@
+/******************************************************************
+ * @file  receiver_sync_macro.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+*****************************************************************/
+#ifndef RECEIVER_SYNC_FIRST_MACRO_H
+#define RECEIVER_SYNC_FIRST_MACRO_H
+
+//GENERATE with Generate_receiver_sync_macro_h.m
+//DO NOT MODIFY
+//=======================================================================
+//微码配置空间长度定义，单位为word(4Byte)
+#define RECEIVER_SYNC_FIRST_ConfigByteCopy_CFG1_LENGTH                    (0x0030)
+#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelation_CFG2_LENGTH          (0x0080)
+#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelationSecond_CFG3_LENGTH    (0x0080)
+#define RECEIVER_SYNC_FIRST_ConfigSyncVer_CFG4_LENGTH                     (0x0080)
+
+//SPU查找表各字段长度定义,单位为word(4Byte)
+
+
+//=======================================================================
+#endif

APELib/Receiver_sync_first/inc/receiver_sync_first_struct.h

@@ -0,0 +1,71 @@
+/******************************************************************
+ * @file  receiver_sync_first_struct.h
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#ifndef RECEIVER_SYNC_FIRST_STRUCT_H
+#define RECEIVER_SYNC_FIRST_STRUCT_H
+#include "type_define.h"
+#include "receiver_sync_first_vars.h"
+#include "interface_rec_sync2_rec_symb.h"
+
+//GENERATE with Generate_receiver_sync_first_struct_h.m
+//DO NOT MODIFY
+//=======================================================================
+//各微码或查找表偏移及指针定义
+typedef struct receiver_sync_first_table_param_s
+{
+    //MPU CONFIG OFFSET
+    uint32_t    ConfigByteCopy_CFG1_Offset;
+    uint32_t    ConfigSlidingCorrelation_CFG2_Offset;
+    uint32_t    ConfigSlidingCorrelationSecond_CFG3_Offset;
+    uint32_t    ConfigSyncVer_CFG4_Offset;
+    // 存储微码参数表的ddr基地址和长度
+    uint32_t    receiver_sync_first_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址
+    uint32_t    receiver_sync_first_config0_length;//receiver DM0微码配置文件ddr长度    
+    uint32_t    receiver_sync_first_config1_ddr_ptr;//receiver DM1微码配置文件ddr地址
+    uint32_t    receiver_sync_first_config1_length;//receiver DM1微码配置文件ddr长度
+    uint32_t    receiver_sync_first_config2_ddr_ptr;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_sync_first_config2_length;//receiver DM2微码配置文件ddr地址
+    uint32_t    receiver_sync_first_config3_ddr_ptr;//receiver DM3微码配置文件ddr地址
+    uint32_t    receiver_sync_first_config3_length;//receiver DM3微码配置文件ddr地址
+
+    //SPU查找表在SM中的偏移地址
+
+
+    // SPU LUT SM基地址和长度
+
+
+}receiver_sync_first_table_param_t;
+
+
+
+typedef struct receiver_sync2first_sync_s
+{
+    uint16_t sfn;
+    uint16_t slot;
+    
+}receiver_sync2first_sync_t;
+
+
+typedef enum
+{
+    SYNC_IDLE=0,
+    SYNC_FIRST_RUNING,
+    SYNC_TRACKING
+}receiver_sync_first_status_e;
+
+
+typedef enum
+{
+    SYNC_OK=0,
+    SYNC_FAIL
+}receiver_sync_first_ret_e;
+
+//=======================================================================
+#endif

APELib/Receiver_sync_first/inc/receiver_sync_first_vars.h

@@ -0,0 +1,5 @@
+#ifndef RECEIVER_SYNC_FIRST_VARS_H
+#define RECEIVER_SYNC_FIRST_VARS_H
+
+
+#endif

APELib/Receiver_sync_first/src/receiver_Sync_First_Init.s.c

@@ -0,0 +1,76 @@
+/******************************************************************
+ * @file  Receiver_Sync_First_Init.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年10月30日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年10月30日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_sync_first_func.h"
+
+
+ /*!   
+ * @brief:  Receiver任务启动前的初始化工作
+ *          初始化全局参数，ddr查找表搬入SM
+ * @author:  HUOHUO
+ * @Date:  2024年10月30日
+ */
+void Receiver_Sync_First_Init()
+{
+    int32_t  ret;
+
+    //DM0
+    g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset = 0;
+    g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset = g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset + RECEIVER_SYNC_FIRST_ConfigByteCopy_CFG1_LENGTH;
+    g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset = g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset + RECEIVER_SYNC_FIRST_ConfigSlidingCorrelation_CFG2_LENGTH;
+    g_receiver_sync_first_table_param.ConfigSyncVer_CFG4_Offset = g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset + RECEIVER_SYNC_FIRST_ConfigSlidingCorrelationSecond_CFG3_LENGTH;
+    //DM1
+
+    //DM2
+
+    //DM3
+
+    //SM
+
+
+    // //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括：
+    // //   1). 置信度表uint16_t Q_W_Lut[2016] (n-5)
+    // //   2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5)
+    // //   3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1)
+    // //   4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check())
+    // //   5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v)
+    // //获取地址
+    //     ret = osp_get_cfgfile("nr_puxch_lut_sm.dat",
+    //                       (uint32_t *)&lutDdrAddr, 
+    //                       (int32_t *)&(g_receiver_sync_first_table_param.pucch_lut_length));
+    // g_receiver_sync_first_table_param.pucch_lut_sm_ptr = SM0_BASE;
+    // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr, 
+    //                                    (uint64_t)g_receiver_sync_first_table_param.pucch_lut_sm_ptr, 
+    //                                    g_receiver_sync_first_table_param.pucch_lut_length, 
+    //                                    DMA_TAG_G2G, 
+    //                                    1);
+    // LOG_ERROR_S("test init\n");
+    //9. 微码配置文件ddr地址初始化
+
+    //!!!配置文件是同一个!!!
+    ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm0.dat",
+                          (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_first_config0_ddr_ptr),
+                          (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_first_config0_length));
+    // ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm1.dat",
+    //                       (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config1_ddr_ptr),
+    //                       (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config1_length));
+
+    // ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm2.dat",
+    //                       (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config2_ddr_ptr),
+    //                       (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config2_length));
+    // ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm3.dat",
+    //                       (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config3_ddr_ptr),
+    //                       (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config3_length));
+
+    // LOG_ERROR_S("init %d 0x%08x %d\n", ret, g_receiver_sync_first_table_param.receiver_sync_config0_ddr_ptr, g_receiver_sync_first_table_param.receiver_sync_config0_length);
+    g_receiver_sync_status_SM_ptr = (uint32_t)RECEIVER_SYNC2SYNC_FIRST_INF_ADDR;
+
+    
+}

APELib/Receiver_sync_first/src/receiver_Sync_First_Proc.s.c

@@ -0,0 +1,432 @@
+/******************************************************************
+ * @file  receiver_Proc.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+
+*****************************************************************/
+#include "receiver_sync_first_func.h"
+#define ADDR_ALIGN(addr, val)   ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) 
+
+void dm_check(uint32_t mark)
+{
+    uint32_t idx;
+    uint32_t flag = 0;
+    for( idx = 0 ;idx < 8; idx++)
+    {
+        if(0xa5a55a5a != *last_mem_dm[idx])
+        {
+            flag |= (1<<idx);
+            LOG_ERROR_S("lk 0x%08x\n", last_mem_dm[idx]);
+        }
+    }
+
+    if(0 != flag)
+    {
+    LOG_ERROR_S("dm leadking detect!!%d 0x%08x\n", mark, flag);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_synch(0);
+    __ucps2_dbgbreak();
+    }
+}
+
+void Receiver_Sync_First_Memory_Alloc( )
+{
+    uint32_t dm0_space;
+    uint32_t dm1_space;
+    uint32_t dm2_space;
+    uint32_t dm3_space;
+
+     //0 空间回收
+    dmalloc_trim(0, APE_DM0);
+    dmalloc_trim(0, APE_DM1);
+    dmalloc_trim(0, APE_DM2);
+    dmalloc_trim(0, APE_DM3);   
+
+    //1. DM0空间申请
+    dm0_space = getFreeSpace(APE_DM0);
+    // LOG_ERROR_S("dm0 space:%d\n",dm0_space);
+    receiver_sync_first_malloc_dm0_ptr = dmalloc_unit(dm0_space - 1024, APE_DM0); //尽量申请空间
+    if (NULLPTR == receiver_sync_first_malloc_dm0_ptr)
+    {
+        LOG_ERROR_S("rec sync DM0 fail\n");
+        return;
+    }
+
+    //2. DM0空间分配
+    //DM0第一段，微码相关空间
+    receiver_sync_first_config_dm0_ptr = (uint32_t*)receiver_sync_first_malloc_dm0_ptr;
+        
+    ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_sync_first_table_param.receiver_sync_first_config0_ddr_ptr,
+                                 (uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_config_dm0_ptr),
+                                 g_receiver_sync_first_table_param.receiver_sync_first_config0_length,
+                                 DMA_TAG_G2L,
+                                 0);    
+
+    //DM0第二段，堆空间
+    receiver_sync_first_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_config_dm0_ptr + \
+        (g_receiver_sync_first_table_param.receiver_sync_first_config0_length>>2), 12); //起始地址4kbyte对齐
+    
+    //3. DM3空间申请
+    dm3_space = getFreeSpace(APE_DM3);
+    receiver_sync_first_malloc_dm3_ptr = dmalloc_unit(dm3_space - 1024, APE_DM3);//尽量申请
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_sync_first_malloc_dm3_ptr)
+    {
+        LOG_ERROR_S("rec sync DM3 fail\n");
+        dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM3第一段，堆空间
+    receiver_sync_first_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm3_ptr, 12); //起始地址4k对齐
+
+
+    //4. DM1空间申请
+    dm1_space = getFreeSpace(APE_DM1);
+    receiver_sync_first_malloc_dm1_ptr = dmalloc_unit(dm1_space - 1024, APE_DM1);//尽量申请
+    //若空间申请失败，则释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_sync_first_malloc_dm1_ptr)
+    {
+        LOG_ERROR_S("rec sync DM1 fail\n");
+        dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
+        return;
+    }
+    //DM1第一段,堆空间
+    receiver_sync_first_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm1_ptr + \
+        (g_receiver_sync_first_table_param.receiver_sync_first_config1_length>>2), 12); //起始地址4k对齐
+
+    //5. DM2空间申请
+    dm2_space = getFreeSpace(APE_DM2);
+    receiver_sync_first_malloc_dm2_ptr = dmalloc_unit(dm2_space - 1024, APE_DM2);//尽量申请
+    //若空间申请失败，释放已申请的空间，再退出任务
+    if (NULLPTR == receiver_sync_first_malloc_dm2_ptr)
+    {
+        LOG_ERROR_S("rec sync DM2 fail\n");
+        dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
+        dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
+        dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1);
+        return;
+    }
+    //DM2第一段,堆空间
+    receiver_sync_first_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm2_ptr + \
+        (g_receiver_sync_first_table_param.receiver_sync_first_config2_length>>2), 12); //起始地址4byte对齐
+
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+    
+
+    //debug
+    last_mem_dm[0] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -1;
+    last_mem_dm[1] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -2;
+    last_mem_dm[2] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -1;
+    last_mem_dm[3] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -2;
+    last_mem_dm[4] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -1;
+    last_mem_dm[5] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -2;
+    last_mem_dm[6] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -1;
+    last_mem_dm[7] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -2;
+
+    *last_mem_dm[0] = 0xa5a55a5a;
+    *last_mem_dm[1] = 0xa5a55a5a;
+    *last_mem_dm[2] = 0xa5a55a5a;
+    *last_mem_dm[3] = 0xa5a55a5a;
+    *last_mem_dm[4] = 0xa5a55a5a;
+    *last_mem_dm[5] = 0xa5a55a5a;
+    *last_mem_dm[6] = 0xa5a55a5a;
+    *last_mem_dm[7] = 0xa5a55a5a;
+
+    
+
+}
+
+
+
+void Receiver_Sync_First_Memory_Free( )
+{
+    //8. 内存释放
+    dfree_unit(receiver_sync_first_malloc_dm2_ptr, APE_DM2);
+    dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1);
+    dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3);
+    dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0);
+}
+
+
+
+
+//耗时长，用于第一次同步
+void Receiver_First_Sync_Proc(receiver_sync2first_sync_t* msg_ptr, uint32_t msg_len)
+{
+
+    uint16_t start_slot = TIME_SLOT();
+    uint16_t start_us = TIME_US();
+    uint16_t end_slot;
+    uint16_t end_us;
+    RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 0);
+    
+
+
+
+
+    const uint32_t loop_num = 1;
+    uint32_t ret;
+    uint16_t sfn = LOAD_EX_S(&msg_ptr->sfn);
+    uint16_t slot = LOAD_EX_S(&msg_ptr->slot);
+    uint32_t section_idx;
+    const uint32_t sample_per_tti = 61440;//每个500us采样点数
+    const uint32_t addition_sample = 1024;//额外样点
+    uint32_t total_nsample = sample_per_tti + addition_sample;
+    uint32_t sample_per_csu = (total_nsample >> 1);
+    uint32_t nsample_per_section = total_nsample / loop_num;
+    uint32_t corr_dm_ptr;
+    int32_t  *cfg_addr;// 配置地址指针
+    uint32_t maxPosition = 0;
+    uint32_t maxsum;
+    volatile uint16_t dbg_time0, dbg_time1;
+    volatile uint16_t dbg_slot0, dbg_slot1;
+
+    //Proc的DM空间申请
+    Receiver_Sync_First_Memory_Alloc();
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 1); 
+    //寻找帧同步头，更新同步信息结构体
+
+    //搬移500us+数据供定时同步,奇数slot处理偶buffer数据，反之
+    dbg_slot0 = TIME_SLOT();
+    dbg_time0 = TIME_US(); 
+    uint32_t src_addr0;
+    uint32_t src_addr1;
+    if( 1 == (slot & 0x01) )
+    {
+        src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR;
+        src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR;
+    }
+    else
+    {
+        src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR; 
+        src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR;       
+    }
+
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
+                                        (uint64_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR,//第一次固定搬移到dm0
+                                        (61440)<<2,
+                                        DMA_TAG_G2G,
+                                        1);    
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr1),
+                                        (uint64_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR,//第一次固定搬移到dm0
+                                        (2048)<<2,
+                                        DMA_TAG_G2G,
+                                        1);    
+
+    src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR; 
+    src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR;                                         
+
+
+    //搬移PART1数据
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0),
+                                        (uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),//第一次固定搬移到dm0
+                                        (sample_per_csu + 1024)<<2,
+                                        DMA_TAG_G2L,
+                                        1);       
+
+
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 2); 
+    
+
+    cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset;
+
+
+    //Debug:
+    //  LOG_ERROR_S("0x%08x 0x%08x 0x%08x %d\n", cfg_addr, receiver_sync_first_temp_dm0_ptr + 1024, receiver_sync_first_temp_dm1_ptr, (total_nsample - 1024)<<2);
+        // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
+        //                                 (uint64_t)0x88a00000,
+        //                                 48<<2,
+        //                                 DMA_TAG_L2G,
+        //                                 1); 
+
+    ByteCopy((int)cfg_addr, 
+            MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024
+            MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
+            ((sample_per_csu)<<2));
+
+
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 4, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_time1;
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 3); 
+    SVRReg[0] = MPU_ADDR(cfg_addr);
+    ByteCopyAsm(SVRReg);
+    
+    
+   
+    //Debug:
+    //  LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
+    //     receiver_sync_first_temp_dm3_ptr);
+
+    WAIT_MPU_STOP;
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 5, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_slot1;
+    dm_check(0); 
+
+    cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset;
+
+    // LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
+    //     receiver_sync_first_temp_dm3_ptr);
+    // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
+    //                                 (uint64_t)0x88b00000,
+    //                                 512,
+    //                                 DMA_TAG_L2G,
+    //                                 1);     
+
+    SlidingCorrelation((int)cfg_addr, 
+                        MPU_ADDR(receiver_sync_first_temp_dm0_ptr), 
+                        MPU_ADDR(receiver_sync_first_temp_dm1_ptr), 
+                        MPU_ADDR(receiver_sync_first_temp_dm2_ptr),
+                        MPU_ADDR(receiver_sync_first_temp_dm3_ptr));
+
+    
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 4); 
+    SVRReg[0] = MPU_ADDR(cfg_addr);
+    SlidingCorrelationAsm(SVRReg);
+
+    WAIT_MPU_STOP;
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 6, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_slot1;
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 5); 
+    dm_check(1);
+    maxPosition = receiver_sync_first_temp_dm3_ptr[0];
+    maxsum = receiver_sync_first_temp_dm3_ptr[1];
+
+    ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 + (sample_per_csu<<2)),
+                                        (uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),//
+                                        (61440 - sample_per_csu)<<2,
+                                        DMA_TAG_G2L,
+                                        0);    
+    ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1),
+                                        (uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr + (61440 - sample_per_csu)),//
+                                        (2048)<<2,
+                                        DMA_TAG_G2L,
+                                        0);  
+    ape_csu_task_lookup(DMA_TAG_G2L, 1);
+
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 7, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_slot1;
+
+
+
+                                    
+
+    cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset;
+
+      
+    ByteCopy((int)cfg_addr, 
+            MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024
+            MPU_ADDR(receiver_sync_first_temp_dm1_ptr),
+            ((sample_per_csu)<<2));
+
+
+
+
+    SVRReg[0] = MPU_ADDR(cfg_addr);
+    ByteCopyAsm(SVRReg);
+
+    cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset;
+        //Debug:
+    
+
+    // LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr,
+    //     receiver_sync_first_temp_dm3_ptr);
+
+        // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr),
+        //                                 (uint64_t)0x88a00000,
+        //                                 512,
+        //                                 DMA_TAG_L2G,
+        //                                 1);     
+
+    SlidingCorrelationSecond((int)cfg_addr, 
+                            MPU_ADDR(receiver_sync_first_temp_dm0_ptr), 
+                            MPU_ADDR(receiver_sync_first_temp_dm1_ptr), 
+                            MPU_ADDR(receiver_sync_first_temp_dm2_ptr),
+                            MPU_ADDR(receiver_sync_first_temp_dm3_ptr));
+    WAIT_MPU_STOP;
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 8, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_slot1;
+
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 6); 
+    dm_check(2);
+    SVRReg[0] = MPU_ADDR(cfg_addr);
+    SlidingCorrelationSecondAsm(SVRReg);
+    WAIT_MPU_STOP;
+    dbg_slot1 = TIME_SLOT();
+    dbg_time1 = TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 9, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) );
+    dbg_time0 = dbg_time1;
+    dbg_slot0 = dbg_slot1;
+
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 7); 
+
+    if(maxsum < receiver_sync_first_temp_dm3_ptr[1])
+    {
+        maxPosition = receiver_sync_first_temp_dm3_ptr[0];
+        maxsum = receiver_sync_first_temp_dm3_ptr[1];
+    }
+
+    dm_check(3);
+    //TODO:后续需要添加门限判断条件
+    uint32_t threshold = 1;
+    if(threshold)
+    {
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset , maxPosition % 61440);
+        LOG_INFO_S("rec sync first offset: %d %d\n", maxPosition, maxsum );
+        ret = SYNC_OK;
+    } 
+
+    //执行完成，更新状态机
+    if(SYNC_OK == ret)
+    {
+         STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_TRACKING);
+    }
+    else
+    {
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_IDLE);
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset , -1);
+        STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, 0);
+    }
+    Receiver_Sync_First_Memory_Free();
+
+
+    // LOG_ERROR_S("dgb break\n");
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_synch(0);
+    // __ucps2_dbgbreak();
+    TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 8); 
+
+
+    RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 1);
+    end_slot = TIME_SLOT();
+    end_us =  TIME_US();
+    TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) );
+    return;
+}

APELib/Receiver_sync_first/src/receiver_Sync_First_Var.s.c

@@ -0,0 +1,36 @@
+/******************************************************************
+ * @file  receiver_var.s.c
+ * @brief:    [file description] 
+ * @author: HUOHUO
+ * @Date 2024年4月20日
+ * COPYRIGHT NOTICE: ITTC
+ * Change_date         Owner         Change_content
+ * 2024年4月20日        HUOHUO       create file
+*****************************************************************/
+#include "receiver_sync_first_struct.h"
+#include "interface_rec_sync2_rec_sync_first.h"
+
+//Receiver微码配置空间offset结构体
+receiver_sync_first_table_param_t  g_receiver_sync_first_table_param;
+uint32_t *receiver_sync_first_config_dm0_ptr = NULLPTR;
+uint32_t *receiver_sync_first_config_dm1_ptr = NULLPTR;
+uint32_t *receiver_sync_first_config_dm2_ptr = NULLPTR;
+uint32_t *receiver_sync_first_config_dm3_ptr = NULLPTR;
+
+int32_t  *receiver_sync_first_malloc_dm0_ptr;
+int32_t  *receiver_sync_first_malloc_dm1_ptr;
+int32_t  *receiver_sync_first_malloc_dm2_ptr;
+int32_t  *receiver_sync_first_malloc_dm3_ptr;
+int32_t  *receiver_sync_first_temp_dm0_ptr;
+int32_t  *receiver_sync_first_temp_dm1_ptr;
+int32_t  *receiver_sync_first_temp_dm2_ptr;
+int32_t  *receiver_sync_first_temp_dm3_ptr;
+
+receiver_sync_status_t* g_receiver_sync_status_SM_ptr;
+receiver_sync2symb_t data_send2symb_task[3];
+uint16_t g_proc_id;
+
+
+//debug 
+uint32_t* last_mem_dm[8];
+

APELib/TestTask/inc/Frame_test.h

@@ -0,0 +1,15 @@
+#ifndef FRAME_TEST_H
+#define FRAME_TEST_H
+
+#include "ape_interface.h"
+
+#include "ape_common.h"
+#include "task_define.h"
+#include "log_interface.h"
+#include "msg_interface.h"
+#include "msg_transfer_layer.h"
+#include "drv_ape.h"
+#include "trace.h"
+
+void Test_Task();
+#endif

APELib/TestTask/src/Frame_test.s.c

@@ -0,0 +1,81 @@
+#include "Frame_test.h"
+
+void Test_Task()
+{
+
+    uint16_t start_slot = TIME_SLOT();
+    uint16_t start_us = TIME_US();
+    uint16_t end_slot;
+    uint16_t end_us;
+    RUN_CNT(TRACE_TESTTASK_ADDR, 0);
+    
+    uint32_t cur_sfn = get_rx_nr_sfn();
+    uint32_t cur_slot = get_rx_nr_slot();
+    int32_t  *transmitter_malloc_dm0_ptr;
+
+    LOG_ERROR_S("cur_sfn:%d, cur_slot:%d\n", cur_sfn, cur_slot);
+
+    TRACE(TRACE_TESTTASK_ADDR, 3, 1); 
+
+
+   //0 空间回收
+    dmalloc_trim(0, APE_DM0);
+    dmalloc_trim(0, APE_DM1);
+    dmalloc_trim(0, APE_DM2);
+    dmalloc_trim(0, APE_DM3);
+
+  //1. DM0空间申请
+  transmitter_malloc_dm0_ptr = dmemalign_unit(0x4000, 131072, APE_DM0); //申请了128KiB 首地址16k对齐
+  if (NULLPTR == transmitter_malloc_dm0_ptr)
+  {
+	   //LOG_ERROR_S("alloc DM0 err\n", cur_sfn, cur_slot);
+      return;
+  }
+
+
+  int32_t  *output_data_ptr;// 最终输出数据地址(dm)
+
+  output_data_ptr = transmitter_malloc_dm0_ptr;
+
+  TRACE(TRACE_TESTTASK_ADDR, 3, 2); 
+  uint32_t idx = 0;
+  for(idx =0; idx < 100; idx++)
+  {
+	   *(output_data_ptr + idx) = cur_sfn * 100000 + cur_slot * 100 + idx;
+  }
+
+  uint32_t output_data_ptr_ddr_even = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR;// 最终输出数据地址(ddr)
+  uint32_t output_data_ptr_ddr_odd = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR ;// 最终输出数据地址(ddr)
+//        ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)output_data_ptr),
+//                            output_data_ptr_ddr_even,
+//                            temp_len_32,
+//                            DMA_TAG_L2G,
+//                            1);
+
+  //LOG_ERROR_S("ddr_even:%08x, ddr_odd:%08x\n", output_data_ptr_ddr_even, output_data_ptr_ddr_odd);
+  TRACE(TRACE_TESTTASK_ADDR, 3, 3); 
+
+  uint32_t temp_len_32 = 7168;
+
+  if(cur_slot % 2 == 1){
+      ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(output_data_ptr),
+                          output_data_ptr_ddr_even,
+                          temp_len_32,
+                          DMA_TAG_L2G,
+                          1);
+  }else{
+      ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(output_data_ptr),
+                          output_data_ptr_ddr_odd,
+                          temp_len_32,
+                          DMA_TAG_L2G,
+                          1);
+  }
+
+    dfree_unit(transmitter_malloc_dm0_ptr, APE_DM0);
+
+    TRACE(TRACE_TESTTASK_ADDR, 3, 4);
+    RUN_CNT(TRACE_TESTTASK_ADDR, 1);
+    end_slot = TIME_SLOT();
+    end_us =  TIME_US();
+    TRACE_MAX(TRACE_TESTTASK_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) );
+}

Common/Makefile

@@ -0,0 +1,9 @@
+#INC_DIRS:=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d)
+INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d)
+INC_DIRS+= ../Interface
+INC_DIRS+= ../Inc
+override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS})
+override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST)))
+override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR))))
+
+include ../Makefile

Common/Scripts/ECS_RFM-spu0-noCache.ld

@@ -0,0 +1,97 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x220000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x220000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x260000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x400000) ;
+
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+PHDRS {
+  TEXT PT_LOAD;
+  DATA PT_LOAD;
+  RODATA PT_LOAD;
+  DM0 PT_LOAD;
+  DM1 PT_LOAD;
+}
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .text & .data & .bss are located in IM */
+  . = 0x000000;
+  .text 	  :	 {   *(.text.start)
+                  ASSERT((. <= 0x40000), "Error: No room for SPU start .text");
+               } : TEXT
+
+  .text 	  :	{   *(.text*)
+                  ASSERT((. <= 0x40000), "Error: No room for SPU's .text");
+              } : TEXT
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  } : DATA
+  .sbss     :  {   *(.sbss.2*)  } : DATA
+  .sbss     :  {   *(.sbss.4*)  } : DATA
+  .sbss     :  {   *(.sbss.8*)  } : DATA
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               } : DATA
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               } : DATA
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  } : DATA
+  .sdata	  :  {   *(.sdata.2*)  } : DATA
+  .sdata	  :  {   *(.sdata.4*)  } : DATA
+  .sdata	  :  {   *(.sdata.8*)  } : DATA
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               } : DATA
+  .rodata 	:	 {   *(.rodata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .rodata");
+               } : RODATA
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  { *( .DM0 )
+           ASSERT((. <= 0x220000), "Error: No room for .DM0");
+         } : DM0
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  { *( .DM1 )
+           ASSERT((. <= 0x260000), "Error: No room for .DM1");
+         } : DM1
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  __ucps2_d2heap_start = 0x2c0000;
+  __ucps2_d3heap_start = 0x300000;
+  __ucps2_d4heap_start = 0x340000;
+  __ucps2_d5heap_start = 0x380000;
+  __ucps2_d6heap_start = 0x3c0000;
+  __ucps2_d7heap_start = 0x400000;
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ECS_RFM-spu1-noCache.ld

@@ -0,0 +1,96 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x260000 - 0x40)) ;/* DM1 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x220000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x260000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x400000) ;
+
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+PHDRS {
+  TEXT PT_LOAD;
+  DATA PT_LOAD;
+  RODATA PT_LOAD;
+  DM0 PT_LOAD;
+  DM1 PT_LOAD;
+}
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .text & .data & .bss are located in IM */
+  . = 0x000000;
+  .text 	  :	 {   *(.text.start)
+                  ASSERT((. <= 0x40000), "Error: No room for SPU start .text");
+               } : TEXT
+  .text 	  :	{   *(.text*)
+                  ASSERT((. <= 0x40000), "Error: No room for SPU's .text");
+              } : TEXT
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  } : DATA
+  .sbss     :  {   *(.sbss.2*)  } : DATA
+  .sbss     :  {   *(.sbss.4*)  } : DATA
+  .sbss     :  {   *(.sbss.8*)  } : DATA
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               } : DATA
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               } : DATA
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  } : DATA
+  .sdata	  :  {   *(.sdata.2*)  } : DATA
+  .sdata	  :  {   *(.sdata.4*)  } : DATA
+  .sdata	  :  {   *(.sdata.8*)  } : DATA
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               } : DATA
+  .rodata 	:	 {   *(.rodata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .rodata");
+               } : RODATA
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  { *( .DM0 )
+           ASSERT((. <= 0x220000), "Error: No room for .DM0");
+         } : DM0
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  { *( .DM1 )
+           ASSERT((. <= 0x260000), "Error: No room for .DM1");
+         } : DM1
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+
+  __ucps2_d2heap_start = 0x2c0000;
+  __ucps2_d3heap_start = 0x300000;
+  __ucps2_d4heap_start = 0x340000;
+  __ucps2_d5heap_start = 0x380000;
+  __ucps2_d6heap_start = 0x3c0000;
+  __ucps2_d7heap_start = 0x400000;
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape0-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,239 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+PROVIDE(__ucps2_mim_dyn_start = 0x70000);
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x70000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23C000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x90000000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x91c00000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e000000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9e040000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e040000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9e080000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e080000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9e0c0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e0c0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9e100000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e100000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9e140000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e140000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9e180000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e180000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9e1c0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e1c0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9e200000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape0-Cache128-noMPUC.ld

@@ -0,0 +1,160 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23C000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x90000000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x91c00000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape1-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,238 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_mim_dyn_start = 0x70000);
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x70000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FC000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x91c00000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x93800000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x93800000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x93800000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x93800000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e200000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9e240000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e240000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9e280000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e280000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9e2c0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e2c0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9e300000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e300000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9e340000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e340000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9e380000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e380000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9e3c0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e3c0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9e400000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape1-Cache128-noMPUC.ld

@@ -0,0 +1,166 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FC000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /* Place .LOG section in DDR */
+  . = 0xB7300000;
+  HIDDEN(__section_start = .);
+  .log  :  AT(__section_end) { *( .LOG )
+                 ASSERT((. <= 0xB7400000), "Error: No room for log");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  . = 0x9c400000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x9c800000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x9c800000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape2-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,239 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23F000) ;/* SPU Vector Stack = 4KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+PROVIDE(__ucps2_mim_dyn_start = 0x6FF00);
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x6FF00), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23F000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23F000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x93800000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x95400000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x95400000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x95400000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x95400000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e400000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9e440000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e440000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9e480000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e480000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9e4c0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e4c0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9e500000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e500000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9e540000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e540000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9e580000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e580000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9e5c0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e5c0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9e600000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape2-Cache128-noMPUC.ld

@@ -0,0 +1,159 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23F000) ;/* SPU Vector Stack = 4KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23F000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23F000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x93800000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x95400000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x95400000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}

Common/Scripts/ape3-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,238 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FF000) ;/* SPU Vector Stack = 4KB, no MPU Stack */
+PROVIDE(__ucps2_mim_dyn_start = 0x580C0);
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x580C0), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FF000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FF000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x95400000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x97000000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x97000000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x97000000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x97000000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e600000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9e640000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e640000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9e680000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e680000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9e6c0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e6c0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9e700000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e700000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9e740000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e740000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9e780000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e780000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9e7c0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e7c0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9e800000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape3-Cache128-noMPUC.ld

@@ -0,0 +1,159 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FF000) ;/* SPU Vector Stack = 4KB, no MPU Stack */
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FF000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FF000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x95400000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x97000000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x97000000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape4-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,239 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+PROVIDE(__ucps2_mim_dyn_start = 0x70000);
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x70000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23C000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x97000000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x98c00000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e800000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9e840000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e840000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9e880000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e880000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9e8c0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e8c0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9e900000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e900000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9e940000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e940000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9e980000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e980000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9e9c0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9e9c0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9ea00000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape4-Cache128-noMPUC.ld

@@ -0,0 +1,160 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23C000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x97000000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x98c00000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape5-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,238 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_mim_dyn_start = 0x70000);
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x70000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FC000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x98c00000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x9a800000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ea00000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9ea40000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ea40000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9ea80000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ea80000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9eac0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9eac0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9eb00000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9eb00000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9eb40000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9eb40000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9eb80000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9eb80000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9ebc0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ebc0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9ec00000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape5-Cache128-noMPUC.ld

@@ -0,0 +1,159 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FC000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x98c00000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x9a800000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape6-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,239 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 4KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+PROVIDE(__ucps2_mim_dyn_start = 0x70000);
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x70000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23C000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9a800000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x9c400000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ec00000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9ec40000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ec40000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9ec80000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ec80000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9ecc0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ecc0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9ed00000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ed00000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9ed40000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ed40000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9ed80000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ed80000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9edc0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9edc0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9ee00000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape6-Cache128-noMPUC.ld

@@ -0,0 +1,159 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;
+
+CORE(ape0);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  .rodata : { *(.rodata*)
+                  ASSERT((. <= 0x23C000), "Error: No room for .rodata");
+  		}	 
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9a800000;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x9c400000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}

Common/Scripts/ape7-Cache128-noMPUC-dynamic.ld

@@ -0,0 +1,238 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+PROVIDE(__ucps2_mim_dyn_start = 0x70000);
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x70000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FC000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9c400000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x9e000000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text)
+                  ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.[^m]*)
+                  ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text");
+              }
+  .text 	  :	 {   *(.text.m[^0]*)
+                  ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ee00000;
+  __ucps2_mim_ddr0_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr0)
+                  ASSERT((. <= 0x9ee40000), "Error: No room for MIM DDR0 .text");
+              }
+  __ucps2_mim_ddr0_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ee40000;
+  __ucps2_mim_ddr1_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr1)
+                  ASSERT((. <= 0x9ee80000), "Error: No room for MIM DDR1 .text");
+              }
+  __ucps2_mim_ddr1_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ee80000;
+  __ucps2_mim_ddr2_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr2)
+                  ASSERT((. <= 0x9eec0000), "Error: No room for MIM DDR2 .text");
+              }
+  __ucps2_mim_ddr2_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9eec0000;
+  __ucps2_mim_ddr3_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr3)
+                  ASSERT((. <= 0x9ef00000), "Error: No room for MIM DDR3 .text");
+              }
+  __ucps2_mim_ddr3_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ef00000;
+  __ucps2_mim_ddr4_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr4)
+                  ASSERT((. <= 0x9ef40000), "Error: No room for MIM DDR4 .text");
+              }
+  __ucps2_mim_ddr4_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ef40000;
+  __ucps2_mim_ddr5_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr5)
+                  ASSERT((. <= 0x9ef80000), "Error: No room for MIM DDR5 .text");
+              }
+  __ucps2_mim_ddr5_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9ef80000;
+  __ucps2_mim_ddr6_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr6)
+                  ASSERT((. <= 0x9efc0000), "Error: No room for MIM DDR6 .text");
+              }
+  __ucps2_mim_ddr6_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9efc0000;
+  __ucps2_mim_ddr7_start = .;
+  HIDDEN(__section_start = .);
+  .text 	  :	AT(__section_end) {   *(.text.m0.ddr7)
+                  ASSERT((. <= 0x9f000000), "Error: No room for MIM DDR7 .text");
+              }
+  __ucps2_mim_ddr7_end = .;
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/ape7-Cache128-noMPUC.ld

@@ -0,0 +1,159 @@
+ENTRY( __ucps2_init ) ;
+PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */
+PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ;
+PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;
+PROVIDE(__ucps2_d1heap_bottom = 0x280000) ;
+PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ;
+PROVIDE(__ucps2_d3heap_bottom = 0x300000) ;
+PROVIDE(__ucps2_d4heap_bottom = 0x340000) ;
+PROVIDE(__ucps2_d5heap_bottom = 0x380000) ;
+PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ;
+PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */
+
+CORE(ape1);
+CACHE_SIZE(128);
+
+/****************************************************************
+ * The segments definition, which affect the load address of the
+ * elf.
+ */
+
+/* All text code & data are in IM */
+SECTIONS {
+  /* All .data & .bss are located in IM */
+  . = 0x20000; /* icache size: 128KB */
+
+  /* tag start point for bss */
+	__ucps2_bss_start = ALIGN(0x4);
+  .sbss     :  {   *(.sbss.1*)  }
+  .sbss     :  {   *(.sbss.2*)  }
+  .sbss     :  {   *(.sbss.4*)  }
+  .sbss     :  {   *(.sbss.8*)  }
+  .sbss     :  {   *(.sbss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sbss");
+               }
+  .bss     	:  {   *(.bss*)
+                  ASSERT((. <= 0x40000), "Error: No room for .bss");
+               }
+	__ucps2_bss_end = ALIGN(0x4);
+  .sdata	  :  {   *(.sdata.1*)  }
+  .sdata	  :  {   *(.sdata.2*)  }
+  .sdata	  :  {   *(.sdata.4*)  }
+  .sdata	  :  {   *(.sdata.8*)  }
+  .sdata	  :  {   *(.sdata*)
+                  ASSERT((. <= 0x40000), "Error: No room for .sdata");
+               }
+  HIDDEN(__section_end = ALIGN(4));
+
+  /* tag start point for heap */
+	__ucps2_heap_start = ALIGN(0x8);
+
+  . = 0x40000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.m0)
+                  ASSERT((. <= 0x80000), "Error: No room for MPU's .text");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  /********************************************/
+  . = 0x200000;
+  HIDDEN(__section_start = .);
+  .DM0 :  AT(__section_end) { *( .DM0 )
+           ASSERT((. <= 0x23C000), "Error: No room for .DM0");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM0 */
+	__ucps2_d0heap_start = ALIGN(0x8);
+
+  . = 0x240000;
+  HIDDEN(__section_start = .);
+  .DM1 :  AT(__section_end) { *( .DM1 )
+           ASSERT((. <= 0x280000), "Error: No room for .DM1");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM1 */
+	__ucps2_d1heap_start = ALIGN(0x8);
+
+  . = 0x280000;
+  HIDDEN(__section_start = .);
+  .DM2 :  AT(__section_end) { *( .DM2 )
+           ASSERT((. <= 0x2c0000), "Error: No room for .DM2");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM2 */
+	__ucps2_d2heap_start = ALIGN(0x8);
+
+  . = 0x2c0000;
+  HIDDEN(__section_start = .);
+  .DM3 :  AT(__section_end) { *( .DM3 )
+           ASSERT((. <= 0x300000), "Error: No room for .DM3");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM3*/
+	__ucps2_d3heap_start = ALIGN(0x8);
+
+  . = 0x300000;
+  HIDDEN(__section_start = .);
+  .DM4 :  AT(__section_end) { *( .DM4 )
+           ASSERT((. <= 0x340000), "Error: No room for .DM4");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM4*/
+	__ucps2_d4heap_start = ALIGN(0x8);
+
+  . = 0x340000;
+  HIDDEN(__section_start = .);
+  .DM5 :  AT(__section_end) { *( .DM5 )
+           ASSERT((. <= 0x380000), "Error: No room for .DM5");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM5*/
+	__ucps2_d5heap_start = ALIGN(0x8);
+
+  . = 0x380000;
+  HIDDEN(__section_start = .);
+  .DM6 :  AT(__section_end) { *( .DM6 )
+           ASSERT((. <= 0x3c0000), "Error: No room for .DM6");
+         }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM6*/
+	__ucps2_d6heap_start = ALIGN(0x8);
+  
+  . = 0x3C0000;
+  HIDDEN(__section_start = .);
+  .DM7 :  AT(__section_end) { *( .DM7 )
+           ASSERT((. <= 0x3FC000), "Error: No room for .DM7");
+         }
+  .rodata :{   *(.rodata*)
+                  ASSERT((. <= 0x3FC000), "Error: No room for .rodata");
+               }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+  /* tag start point for heap in DM7*/
+  __ucps2_d7heap_start = ALIGN(0x8);
+
+  . = 0x04000000;
+  HIDDEN(__section_start = .);
+  .virt.sm  :  AT(__section_end) { *(.virt.sm)
+                 ASSERT((. <= 0x04200000), "Error: No room for virtual share memory");
+              }
+  .noinit.MREG :
+  {
+    *(noinit.MREG)
+  }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  . = 0x9c400000;
+  HIDDEN(__section_start = .);
+  .text 	  :	 AT(__section_end) {   *(.text.start)
+                  ASSERT((. <= 0x9e000000), "Error: No room for SPU start .text");
+               }
+  .text 	  :	 {   *(.text*)
+                  ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text");
+              }
+  HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end);
+
+  HIDDEN(__section_start = 0xffffffff);
+  HIDDEN(__section_end = 0xffffffff);
+}
+

Common/Scripts/utils.em

@@ -0,0 +1,684 @@
+/******************************************************************
+ * @file  utils.em
+ * @brief 
+ * @author: bo.liu
+ * @Date 2019年8月10日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2019年8月10日        bo.liu       create file
+
+*****************************************************************
+/*-----------------------------------------------
+	I N S E R T   H E A D E R
+
+	Inserts a comment header block at the top of the current function. 
+	This actually works on any type of symbol, not just functions.
+
+	To use this, define an environment variable "MYNAME" and set it
+	to your email name.  eg. set MYNAME=raygr
+-------------------------------------------------------------------------*/
+macro InsertHeader()
+{
+	// Get the owner's name from the environment variable: MYNAME.
+	// If the variable doesn't exist, then the owner field is skipped.
+	szMyName = getenv(MYNAME)
+	
+	// Get a handle to the current file buffer and the name
+	// and location of the current symbol where the cursor is.
+	hbuf = GetCurrentBuf()
+	szFunc = GetCurSymbol()
+	ln = GetSymbolLine(szFunc)
+
+	// begin assembling the title string
+	sz = "/*   "
+	
+	/* convert symbol name to T E X T   L I K E   T H I S */
+	cch = strlen(szFunc)
+	ich = 0
+	while (ich < cch)
+		{
+		ch = szFunc[ich]
+		if (ich > 0)
+			if (isupper(ch))
+				sz = cat(sz, "   ")
+			else
+				sz = cat(sz, " ")
+		sz = Cat(sz, toupper(ch))
+		ich = ich + 1
+		}
+	
+	sz = Cat(sz, "   */")
+	InsBufLine(hbuf, ln, sz)
+	InsBufLine(hbuf, ln+1, "/*-------------------------------------------------------------------------")
+	
+	/* if owner variable exists, insert Owner: name */
+	if (strlen(szMyName) > 0)
+		{
+		InsBufLine(hbuf, ln+2, "    Owner: @szMyName@")
+		InsBufLine(hbuf, ln+3, " ")
+		ln = ln + 4
+		}
+	else
+		ln = ln + 2
+	
+	InsBufLine(hbuf, ln,   "    ") // provide an indent already
+	InsBufLine(hbuf, ln+1, "-------------------------------------------------------------------------*/")
+	
+	// put the insertion point inside the header comment
+	SetBufIns(hbuf, ln, 4)
+}
+
+
+
+
+
+
+/* InsertFileHeader:
+
+   Inserts a comment header block at the top of the current function. 
+   This actually works on any type of symbol, not just functions.
+
+   To use this, define an environment variable "MYNAME" and set it
+   to your email name.  eg. set MYNAME=raygr
+*/
+macro InsertFileHeader()
+{
+	szMyName = getenv(USERNAME)
+	
+	hbuf = GetCurrentBuf()  
+    sfile = GetBufName(hbuf)
+    
+    line_num = 0
+
+    len = strlen(sfile)
+    i=len-1
+    while ( i>0)
+    {
+		if (sfile[i] == "\\")
+		{
+			break
+		}
+		i = i -1
+    }
+    if (i != 0)
+    {
+    	sfile_name = strmid(sfile,i+1,len)
+    }
+    else 
+    {
+       sfile_name = strmid(sfile,0,len)
+    }
+    InsBufLine(hbuf,line_num++ , "/******************************************************************")
+	InsBufLine(hbuf,line_num++ , " * @@file  @sfile_name@")
+	
+	/* if owner variable exists, insert Owner: name */
+	InsBufLine(hbuf, line_num++, " * @@brief:    [file description] ")
+	if (strlen(szMyName) > 0)
+	{
+		sz = " * @@author: @szMyName@"
+		InsBufLine(hbuf, line_num++, sz)
+		create_time = GetSysTime(1)
+		/*
+		time_y = create_time.Year
+		time_m = create_time.Month
+		time_d = create_time.Day
+		create_date = "@time_y@" # "/" # "@time_m@" # "/" # "@time_d@"
+		*/
+		create_date = create_time.date
+		//InsBufLine(hbuf, line_num++, " * @@Date " # " " # time_y # "/" # time_m # "/" #time_d)
+		InsBufLine(hbuf, line_num++, " * @@Date " # "@create_date@")
+		InsBufLine(hbuf, line_num++, " * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. ")
+		InsBufLine(hbuf, line_num++, " * Change_date" # "      " # "   Owner   " # "      " # "Change_content")
+        InsBufLine(hbuf, line_num++, " * @create_date@" # "      " # "  @szMyName@ " # "      " # "create file")
+        InsBufLine(hbuf,line_num++,"")
+      
+		
+		InsBufLine(hbuf, line_num++, "*****************************************************************/")
+	}
+	else
+	{
+		msg("no environment variable:USERNAME,please set it for your PC ")
+	}
+	
+}
+
+
+// Inserts "Returns True .. or False..." at the current line
+macro ReturnTrueOrFalse()
+{
+	hbuf = GetCurrentBuf()
+	ln = GetBufLineCur(hbuf)
+
+	InsBufLine(hbuf, ln, "    Returns True if successful or False if errors.")
+}
+
+
+
+/* Inserts ifdef REVIEW around the selection */
+macro IfdefReview()
+{
+	IfdefSz("REVIEW");
+}
+
+
+/* Inserts ifdef BOGUS around the selection */
+macro IfdefBogus()
+{
+	IfdefSz("BOGUS");
+}
+
+
+/* Inserts ifdef NEVER around the selection */
+macro IfdefNever()
+{
+	IfdefSz("NEVER");
+}
+
+
+// Ask user for ifdef condition and wrap it around current
+// selection.
+macro InsertIfdef()
+{
+	sz = Ask("Enter ifdef condition:")
+	if (sz != "")
+		IfdefSz(sz);
+}
+
+macro InsertCPlusPlus()
+{
+	IfdefSz("__cplusplus");
+}
+
+
+// Wrap ifdef <sz> .. endif around the current selection
+macro IfdefSz(sz)
+{
+	hwnd = GetCurrentWnd()
+	lnFirst = GetWndSelLnFirst(hwnd)
+	lnLast = GetWndSelLnLast(hwnd)
+	 
+	hbuf = GetCurrentBuf()
+	InsBufLine(hbuf, lnFirst, "#ifdef @sz@")
+	InsBufLine(hbuf, lnLast+2, "#endif /* @sz@ */")
+}
+
+
+// Delete the current line and appends it to the clipboard buffer
+macro KillLine()
+{
+	hbufCur = GetCurrentBuf();
+	lnCur = GetBufLnCur(hbufCur)
+	hbufClip = GetBufHandle("Clipboard")
+	AppendBufLine(hbufClip, GetBufLine(hbufCur, lnCur))
+	DelBufLine(hbufCur, lnCur)
+}
+
+
+// Paste lines killed with KillLine (clipboard is emptied)
+macro PasteKillLine()
+{
+	Paste
+	EmptyBuf(GetBufHandle("Clipboard"))
+}
+
+
+
+// delete all lines in the buffer
+macro EmptyBuf(hbuf)
+{
+	lnMax = GetBufLineCount(hbuf)
+	while (lnMax > 0)
+		{
+		DelBufLine(hbuf, 0)
+		lnMax = lnMax - 1
+		}
+}
+
+
+// Ask the user for a symbol name, then jump to its declaration
+macro JumpAnywhere()
+{
+	symbol = Ask("What declaration would you like to see?")
+	JumpToSymbolDef(symbol)
+}
+
+	
+// list all siblings of a user specified symbol
+// A sibling is any other symbol declared in the same file.
+macro OutputSiblingSymbols()
+{
+	symbol = Ask("What symbol would you like to list siblings for?")
+	hbuf = ListAllSiblings(symbol)
+	SetCurrentBuf(hbuf)
+}
+
+
+// Given a symbol name, open the file its declared in and 
+// create a new output buffer listing all of the symbols declared
+// in that file.  Returns the new buffer handle.
+macro ListAllSiblings(symbol)
+{
+	loc = GetSymbolLocation(symbol)
+	if (loc == "")
+		{
+		msg ("@symbol@ not found.")
+		stop
+		}
+	
+	hbufOutput = NewBuf("Results")
+	
+	hbuf = OpenBuf(loc.file)
+	if (hbuf == 0)
+		{
+		msg ("Can't open file.")
+		stop
+		}
+		
+	isymMax = GetBufSymCount(hbuf)
+	isym = 0;
+	while (isym < isymMax)
+		{
+		AppendBufLine(hbufOutput, GetBufSymName(hbuf, isym))
+		isym = isym + 1
+		}
+
+	CloseBuf(hbuf)
+	
+	return hbufOutput
+
+}
+
+//!create new document 
+event DocumentNew(sfile)
+{
+    InsertFileHeader()
+    len = strlen(sfile)
+    if ((sfile[len-1] == "h") || (sfile[len-1] == "H"))
+    {
+		hbuf = GetCurrentBuf()  
+        hfile_name = GetBufName(hbuf)
+
+        hfile_name_2 = toupper(hfile_name)
+        hfile_name_3= strtrunc(hfile_name_2,strlen(hfile_name_2)-2)
+
+        pre_1 = "#ifndef " # "    " # hfile_name_3 # "_H" 
+        pre_2 = "#define " # "    " # hfile_name_3 # "_H" 
+
+       
+        post = "#endif" 
+	    AppendBufLine(hbuf,pre_1)
+	    AppendBufLine(hbuf,pre_2)
+	    AppendBufLine(hbuf,"#include <type_define.h>")
+
+	    i = 0
+        while(i < 5)
+        {
+           AppendBufLine(hbuf," ")
+           i++
+        }
+	    AppendBufLine(hbuf,post)
+	}
+	else if ((sfile[len-1] == "c") || (sfile[len-1] == "C"  ))
+	{
+        hbuf = GetCurrentBuf()  
+        AppendBufLine(hbuf,"/**************************include******************************/")
+        AppendBufLine(hbuf,"#include <type_define.h>")
+         i = 0
+        while(i < 5)
+        {
+           AppendBufLine(hbuf," ")
+           i++
+        }
+        
+        AppendBufLine(hbuf,"/**************************function******************************/")
+	}
+	else
+	{
+
+	}
+}
+
+//！global 使用时必须在函数体内重新声明
+global func_name 
+global func_line 
+global func_name_para 
+global last_line_read    
+global all_str = ""
+function read_function_line(hbuf,line)
+{
+
+
+    global last_line_read
+    
+	s = GetBufLine(hbuf,line)
+	str_len = strlen(s)
+
+	if (str_len < 1)
+	{
+	  // msg("string is empty,find the next line for \")\"")
+       
+	}
+	else 
+    {
+		// find ")"
+		while(str_len > 0)  //如果找到了")"
+		{
+			if (s[--str_len] == ")")
+			{
+			    //msg("find )")
+			    last_line_read = line  //!最后找到的行
+			    return
+		 		
+			}
+		}
+	}
+    //!没有找到")"
+	if (str_len == 0)
+	{
+		//msg("there is no ) in this line" # line)
+		last_line_read = line +1
+	    read_function_line(hbuf,last_line_read)
+	}
+
+
+}
+
+macro InsertFunctionHeader( )
+{
+
+    global func_name_para
+    global last_line_read
+    global all_str
+
+    
+    szMyName = getenv(USERNAME)
+    create_time = GetSysTime(1)
+
+    time_y = create_time.Year
+	time_m = create_time.Month
+	time_d = create_time.Day
+	//create_date = "@time_y@" # "/" # "@time_m@" # "/" # "@time_d@"  //！格式为:2019/8/10
+	create_date = create_time.date   //!格式为2019年8月10日
+	hbuf = GetCurrentBuf()  
+
+	
+	
+
+
+    all_str = "" //!每次都重新初始化
+ 	func_name=GetCurSymbol()
+
+	if (func_name == "")
+	{
+		msg("there is no function founded")
+	    return
+	}
+
+
+	symbol_line = GetSymbolLine(func_name)
+    //msg(symbol_line)
+    
+	symbol_func =GetSymbolLocation(func_name) 
+	//msg(symbol_func)
+	
+
+
+	/*计算函数参数*/
+
+	//！step1:find the line space of function declaration 
+	func_name_para.first_line = symbol_line; 
+	
+	read_function_line(hbuf,symbol_line)
+	
+	func_name_para.last_line = last_line_read 
+
+   // msg("name_first_line:" # func_name_para.first_line)
+   // msg("name_last_line:" # func_name_para.last_line)
+    //!step2: read all line in the space 
+    while(func_name_para.first_line <= func_name_para.last_line)
+    {
+        s = GetBufLine(hbuf,func_name_para.first_line)
+        new_s = ""
+        i = 0
+        while(i<strlen(s))
+        {
+			if (s[i] != " ")
+			{
+                first_valid = i; 
+                break; 
+			}
+			i= i+1
+        }
+
+        s_1 = strmid(s,first_valid,strlen(s)) //!去掉字符串头部的空格
+        
+        all_str = cat(all_str,s_1)
+        func_name_para.first_line = func_name_para.first_line + 1
+    }
+	//msg(all_str)  //！打印函数声明
+
+	//!step3: truncate the content in ( )
+	param_num = 0
+    param_list = SymListNew()
+
+
+    //!step4:排除参数为空的情况
+	process_txt_len  = strlen(all_str)
+    i = process_txt_len -1 
+    j = 0
+
+    while (i > 0 )
+    {
+        if (all_str[i] == ")")
+        {
+        	break; 
+        }
+        i = i - 1; 
+    }
+
+    while (j < process_txt_len)
+    {
+		if (all_str[j] == "(")
+		{
+			break
+		}
+        j = j+1
+    }
+
+    all_str = strmid(all_str,j,i+1)
+    process_txt_len = strlen(all_str)
+ 
+
+   // msg("only include ():@all_str@")
+   
+     //!清除中间的空格,防止参数为0，只有空格的情况
+    all_str_without_space = ""
+    i = 0
+    while ( i < process_txt_len)
+    {
+		if (all_str[i] != " ")
+		{
+		    
+            all_str_without_space = cat(all_str_without_space,all_str[i])
+		}
+         i = i+1
+    }
+    without_space_len = strlen(all_str_without_space)
+   
+    
+    
+
+    //! 在参数不为空时的处理
+    process_txt_len = strlen(all_str)
+    i = 0
+    j = 0
+    if ((process_txt_len > 2) && (without_space_len > 2))
+    {
+        while(i < process_txt_len)
+        {
+          
+            if(all_str[i] == "," || all_str[i] == ")")
+            {
+                j = i-1
+               // msg("i = @i@")
+                while(j >=0) //向前一直找到0
+                {
+                    
+                    //！往前找一个,
+                    if( //all_str[j] == "*" || all_str[j] == "&" ||
+                       all_str[j] == "(" || all_str[j] == ",") 
+                    {
+                     //  msg("j = @j@")
+                        last_pos = i-1 //!从后往前找第一个不是空格的位置
+                        while(last_pos >= j)
+                        {
+                           if (all_str[last_pos] != " ")
+                           {
+                               break
+                           }
+                           last_pos = last_pos-1
+                        } 
+    
+                        valid_last = last_pos+1
+                       
+                       // msg("valid_last = @valid_last@")
+                      
+    
+                         
+                        first_pos = valid_last-1 //!从不是空格的那个字符之前往前找
+                        while(first_pos >= j)
+                        {
+                            if (all_str[first_pos] == " ")
+                            {
+                                   break
+                            }
+                            first_pos = first_pos - 1
+                        }
+    
+                        valid_first = first_pos
+                       
+                      //  msg("valid_first = @valid_first@")
+                       
+                        
+                        symbol_func.Symbol = strmid(all_str,valid_first,valid_last)
+                        //msg(symbol_func.Symbol)  //!打印参数
+                        SymListInsert(param_list,param_num,symbol_func)
+                        param_num = param_num + 1
+                        break;
+                    }
+                    j = j - 1
+                }
+            }
+            
+            i = i + 1
+        }
+    }
+    else
+    {
+        param_num = 0
+    }
+    msg("function parameter number:@param_num@")
+
+
+    //!生成header 	
+	i=0
+    while (i < param_num + 5)
+    {
+		InsBufLine(hbuf,symbol_line+i,"")
+		i++
+	}
+	func_line = symbol_line + param_num + 5
+
+	
+    PutBufLine (hbuf, func_line -5-param_num, " /*!   ")
+	PutBufLine (hbuf,  func_line -4 -param_num ," * @@brief:  ")
+	PutBufLine (hbuf,  func_line -3 -param_num ," * @@author:  @szMyName@")
+	PutBufLine (hbuf,  func_line -2 -param_num ," * @@Date:  @create_date@")
+	param_index = 0
+	while (param_index <param_num)
+	{
+	    symbol_rec=SymListItem(param_list,param_num - 1 - param_index)
+	    param_line = " * @@param:"  # symbol_rec.Symbol  # " :"
+
+	    space_num = 30- strlen(param_line)
+	    while (space_num > 0)
+	    {
+            space_num = space_num -1
+            param_line = cat(param_line, " ")
+            
+	    }
+	    param_line = cat(param_line,"[param description ]")
+		PutBufLine (hbuf,  func_line - 2 -param_index, param_line)
+		param_index = param_index + 1
+	}
+	PutBufLine  (hbuf,func_line-1 , " */")
+	
+   // msg("insert function header successfully")
+
+}
+
+
+
+macro AddModifyInfo()
+{
+    szMyName = getenv(USERNAME)
+    create_time = GetSysTime(1)
+
+    time_y = create_time.Year
+	time_m = create_time.Month
+	time_d = create_time.Day
+	create_date = "@time_y@" # "/" # "@time_m@" # "/" # "@time_d@"  //！格式为:2019/8/10
+	//create_date = create_time.date   //!格式为2019年8月10日
+	hbuf = GetCurrentBuf()  
+
+	
+    start_line = GetBufLnCur(hbuf)
+    //msg(start_line)
+    modify_info = "modify begin: " # " by @szMyName@, " # "Date: " # "@create_date@"
+
+    InsBufLine(hbuf,start_line,"     /*!" # "@modify_info@" )
+    InsBufLine(hbuf,start_line+1,"       " # "modify cause:" # "*/")
+    
+}
+
+macro AddCommentSingle()
+{
+     hbuf = GetCurrentBuf()  
+	 start_line = GetBufLnCur(hbuf)
+	 length = GetBufLineLength(hbuf,start_line)
+	 if (length == 0)
+	 {
+	 	InsBufLine(hbuf,start_line,"    //!")
+	 }
+	 else 
+	 {
+		
+		s = GetBufLine(hbuf,start_line)
+		s = cat(s,"   //!")
+		PutBufLine(hbuf,start_line,s)
+	 }
+}
+macro AddCommentMulti( )
+{
+
+
+ 	hbuf = GetCurrentBuf()  
+	 start_line = GetBufLnCur(hbuf)
+	 length = GetBufLineLength(hbuf,start_line)
+	 if (length == 0)
+	 {
+	 	InsBufLine(hbuf,start_line,"    /*!")
+	 	InsBufLine(hbuf,start_line+1,"      */")
+	 }
+	 else 
+	 {
+		
+		s = GetBufLine(hbuf,start_line)
+		s = cat(s,"   /*!")
+		PutBufLine(hbuf,start_line,s)
+		InsBufLine(hbuf,start_line+1,"   */")
+	 }
+
+
+
+}

Common/inc/common.h

@@ -0,0 +1,123 @@
+/******************************************************************
+ * @file  nr_common.h
+ * @brief:    [file description] 
+ * @author: xuekun.zhang
+ * @Date 2022年1月10日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年1月10日        xuekun.zhang       create file
+
+*****************************************************************/
+
+#ifndef     COMMON_VARS_H
+#define     COMMON_VARS_H
+
+/**************************include******************************/
+#include "type_define.h"
+#include "mem_def.h"
+#include "ucps2.h"
+#include "ucps2-intrin.h"
+#include "interface_fapi_tasks.h"
+#include "phy_msg_func.h"
+
+
+#define APE0_CORE_ID     0
+#define APE1_CORE_ID     1
+#define APE2_CORE_ID     2
+#define APE3_CORE_ID     3
+#define APE4_CORE_ID     4
+#define APE5_CORE_ID     5
+#define APE6_CORE_ID     6
+#define APE7_CORE_ID     7
+#define PT_RFM0_CORE_ID  8
+#define PT_RFM1_CORE_ID  9
+#define ECS_RFM0_CORE_ID 10
+#define ECS_RFM1_CORE_ID 11
+#define ARM_CORE_ID      12
+#define MAX_CORE_ID      13
+
+#define MAX_APE_CORE_ID 8
+
+#define DMA_DIR_L2G		0
+#define DMA_DIR_G2L 	1
+#define DMA_DIR_G2G 	1
+
+
+#define DMA_REG_GROUP0  0
+#define DMA_REG_GROUP1 	1
+#define DMA_REG_GROUP2 	2
+#define DMA_REG_GROUP3 	3
+
+
+//PUCCH & PUSCH公用PUCCH SM查找表内部结构偏移宏定义
+
+
+/**************************define******************************/
+#define LOAD_EX_W(ptr) __ucps2_load_ext_mem((char*)ptr, f_W)
+#define LOAD_EX_S(ptr) __ucps2_load_ext_mem((char*)ptr, f_S)
+#define LOAD_EX_B(ptr) __ucps2_load_ext_mem((char*)ptr, f_B)
+
+#define STORE_EX_W(ptr, value) __ucps2_store_ext_mem((char*)ptr, value, f_W)
+#define STORE_EX_S(ptr, value) __ucps2_store_ext_mem((char*)ptr, value, f_S)
+#define STORE_EX_B(ptr, value) __ucps2_store_ext_mem((char*)ptr, value, f_B)
+
+#define LOAD_EX_V_W(ptr) __ucps2_load_ext_mem_v((char*)ptr, f_W)
+#define LOAD_EX_V_S(ptr) __ucps2_load_ext_mem_v((char*)ptr, f_S)
+#define LOAD_EX_V_B(ptr) __ucps2_load_ext_mem_v((char*)ptr, f_B)
+
+#define WAIT_MPU_STOP __ucps2_getStatB(); __ucps2_delay()
+
+//38.214 Table 5.1.3.1-2: MCS index table 1 for PDSCH/PUSCH
+extern uint16_t g_mcs_table_1[32][3];
+//38.214 Table 5.1.3.1-2: MCS index table 2 for PDSCH/PUSCH
+extern uint16_t g_mcs_table_2[32][3];
+//38.214 Table 5.1.3.1-3: MCS index table 3 for PDSCH/PUSCH
+extern uint16_t g_mcs_table_3[32][3];
+
+
+// extern uint16_t g_zc_table[8][8];
+extern uint16_t g_zc_table[50];
+extern uint8_t g_ils_table[51];
+
+
+extern uint16_t g_nprb_lbrm_table[7];
+extern uint32_t g_tbsize_lbrm_256qam_table[7];
+extern uint32_t g_tbsize_lbrm_64qam_table[7];
+
+extern uint8_t g_dmrstype1_delta_table[8];//{1000,1001,...,1007}
+extern uint8_t g_dmrstype2_delta_table[12];//{1000,1001,...,1011}
+extern int8_t  g_dmrstype1_wf_pk_table[8][2];
+extern int8_t  g_dmrstype2_wf_pk_table[12][2];
+extern int8_t  g_dmrstype1_wt_pl_table[8][2];
+extern int8_t  g_dmrstype2_wt_pl_table[12][2];
+extern uint16_t g_zc_lift_sizearray[51];
+extern uint8_t g_zc_iLs[51];
+
+extern uint32_t  g_dm_malloc_count[4];
+extern uint32_t  g_dm_malloc_err_count[4];
+extern uint32_t  g_dm_free_count[4] ;
+
+extern phy_com_param_t* g_phy_com_param;
+extern phy_tasks_mgr_reg_t* g_phy_tasks_mgr_ptr;
+extern msg_ring_buffer_t* g_phy_msg_buffer;
+
+//求10log10查找表静态变量声明，上行信道公用
+extern const int16_t c_tb_dB[32][3];
+extern const int16_t c_dBcal_value_comp_table[70];
+
+/**************************function******************************/
+//extern void wait_mpu_stop();
+extern  uint64_t ceil_long_fix(uint64_t a_numerator, uint64_t a_denominator);
+extern  int64_t floor_long_fix(int64_t a_numerator, int64_t a_denominator);
+extern int ceil_fix(int a_numerator, int a_denominator);
+extern int floor_fix(int a_numerator, int a_denominator);
+extern  int round_fix(int a_numerator, int a_denominator);
+extern int * dmalloc_unit(uint32_t len, uint8_t dm_index);
+extern int * dmemalign_unit(uint32_t align_addr, uint32_t len, uint8_t dm_index); 
+extern void dfree_unit(int *val_ptr, uint8_t dm_index);
+int phase_compensation(uint32_t a_f0, uint32_t *phase, uint32_t dl);
+//求10log10函数声明，上行信道公用
+int16_t Calc_10Log10(int32_t real_value, uint8_t Q_in, uint8_t Q_out);
+extern char *osp_heap_malloc(uint32_t size);
+extern uint8_t CRC6Check(uint32_t *dataIn, uint8_t *crc6Lut, uint8_t bitLen, uint32_t **dataOut);
+#endif

Common/inc/debug_addr.h

@@ -0,0 +1,10 @@
+#ifndef DEBUG_ADDR_H
+#define DEBUG_ADDR_H
+
+#include <type_define.h>
+
+
+#define DEBUG_TASK_MSG_ADDR       (0x88000000)
+#define DEBUG_MSG_TRAN_SEND_ADDR  (0x88001000)
+
+#endif

Common/inc/error_record.h

@@ -0,0 +1,52 @@
+/******************************************************************
+ * @file  error_record.h
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2022年9月29日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年9月29日        guicheng.liu       create file
+
+*****************************************************************/
+
+#ifndef     ERROR_RECORD_H
+#define     ERROR_RECORD_H
+#include <type_define.h>
+
+#define ERROR_RECORD_DEFINE_BASE   (0)
+#define ERROR_RECORD_STEP          (40) // max 40 errors for each task 
+
+#define ERROR_CONFIG (ERROR_RECORD_DEFINE_BASE + 0*ERROR_RECORD_STEP)
+#define ERROR_FAPI   (ERROR_RECORD_DEFINE_BASE + 1*ERROR_RECORD_STEP)
+#define ERROR_SSB    (ERROR_RECORD_DEFINE_BASE + 2*ERROR_RECORD_STEP)
+#define ERROR_PDCCH  (ERROR_RECORD_DEFINE_BASE + 3*ERROR_RECORD_STEP)
+#define ERROR_PDSCH  (ERROR_RECORD_DEFINE_BASE + 4*ERROR_RECORD_STEP)
+#define ERROR_CSIRS  (ERROR_RECORD_DEFINE_BASE + 5*ERROR_RECORD_STEP)
+#define ERROR_DEOFDM (ERROR_RECORD_DEFINE_BASE + 6*ERROR_RECORD_STEP)
+#define ERROR_PUSCH_SYM  (ERROR_RECORD_DEFINE_BASE + 7*ERROR_RECORD_STEP)
+#define ERROR_PUSCH_CB   (ERROR_RECORD_DEFINE_BASE + 7*ERROR_RECORD_STEP + (ERROR_RECORD_STEP >> 1))
+//#define ERROR_PUSCH_CB   (ERROR_RECORD_DEFINE_BASE + 9*ERROR_RECORD_STEP)
+#define ERROR_PUCCH  (ERROR_RECORD_DEFINE_BASE + 8*ERROR_RECORD_STEP)
+#define ERROR_PRACH  (ERROR_RECORD_DEFINE_BASE + 9*ERROR_RECORD_STEP)
+#define ERROR_SRS    (ERROR_RECORD_DEFINE_BASE + 10*ERROR_RECORD_STEP)
+
+//6*4*40*11=10560byte,最大不能超过SM1_ERROR_RECORD_CNT_LEN
+//只记录第一个error,共记录6(24byte)个参数:共5个入参+coreid
+#define ERROR_RECORD(err_no, val0, val1, val2, val3) \
+{\
+    uint32_t offset = (err_no)*24;\
+    uint32_t core_id = get_core_id();\
+    if (0 == LOAD_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset)))\
+    {\
+        STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset), (int)err_no);\
+        STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+4), (int)core_id);\
+        STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+8), (int)val0);\
+        STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+12), (int)val1);\
+        STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+16), (int)val2);\
+        STORE_EX_W((char*)(DDR_ERROR_RECORD_CNT_ADDR+offset+20), (int)val3);\
+    }\
+}
+
+
+
+#endif

Common/inc/log_interface.h

@@ -0,0 +1,116 @@
+/******************************************************************
+ * @file  log_interface.h
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2021年3月9日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2021年3月9日        guicheng.liu       create file
+
+*****************************************************************/
+
+#ifndef     LOG_INTERFACE_H
+#define     LOG_INTERFACE_H
+#include <type_define.h>
+#include "osp_interface.h"
+#include "common.h"
+
+
+//log 相关宏定义
+//LOG_DD_HEADER_SIZE 由平台提供接口, 目前为12
+#define OSP_MSG_HEAD_LEN    (12)
+#define LOG_DD_HEADER_SIZE   (OSP_MSG_HEAD_LEN)
+#define LOG_HEADER_SIZE      sizeof(log_msg_header_t)
+#define LOG_TOTAL_HDR_SIZE   (LOG_DD_HEADER_SIZE + LOG_HEADER_SIZE)
+#define LOG_MAX_LEN_BYTE     (512)
+#define LOG_MAX_LEN_WORD     (LOG_MAX_LEN_BYTE >> 2)
+#define LOG_MAX_CONTENT_SIZE (LOG_MAX_LEN_BYTE - LOG_TOTAL_HDR_SIZE)
+
+#define LOG_DM_BUF_NUM       (8)
+
+
+
+#define LOG_DEFINE_BASE   (0)
+#define LOG_DEFINE_STEP   (100)
+
+//msg_type 各模块分配号码段
+#define STRING_LOG (LOG_DEFINE_BASE + 0*LOG_DEFINE_STEP)
+#define MAIN_LOG   (LOG_DEFINE_BASE + 0*LOG_DEFINE_STEP + 1)
+#define FAPI_LOG   (LOG_DEFINE_BASE + 1*LOG_DEFINE_STEP)
+#define SSB_LOG    (LOG_DEFINE_BASE + 2*LOG_DEFINE_STEP)
+#define PDCCH_LOG  (LOG_DEFINE_BASE + 3*LOG_DEFINE_STEP)
+#define PDSCH_LOG  (LOG_DEFINE_BASE + 4*LOG_DEFINE_STEP)
+#define DEOFDM_LOG (LOG_DEFINE_BASE + 5*LOG_DEFINE_STEP)
+#define PUSCH_LOG  (LOG_DEFINE_BASE + 6*LOG_DEFINE_STEP)
+#define PUCCH_LOG  (LOG_DEFINE_BASE + 7*LOG_DEFINE_STEP)
+#define PRACH_LOG  (LOG_DEFINE_BASE + 8*LOG_DEFINE_STEP)
+
+
+
+
+/*buf_type: 0：用户申请的静态DM空间，1:用户自定义的DM空间 
+ msgAddr：当bufType为0时，给出申请的静态空间首地址，当bufType为1时，给出用户自定义的DM空间地址 */
+//void log_output(uint8_t level, uint8_t task_id, uint16_t msg_type, 
+//				uint16_t sfn, uint16_t slot, uint16_t slot_offset, uint8_t msg_len, uint8_t buf_type, char* msg_addr);
+//void set_log_level(log_level_e level);
+//
+//void log_sprintf(log_level_e level, const char *fmt, ...);
+
+//#define  LOG_INFO_S(level, fmt, ...) LOG_INFO_S(level, fmt, ## __VA_ARGS__)
+//字符串log输出方式宏定义
+#define LOG_CMD_S(fmt, ...)       log_sprintf(CMD, "[CMD]"fmt, ## __VA_ARGS__)
+#define LOG_ERROR_S(fmt, ...)     log_sprintf(ERROR, "[ERR]"fmt, ## __VA_ARGS__)
+#define LOG_WARN_S(fmt, ...)      log_sprintf(WARN, "[WARN]"fmt, ## __VA_ARGS__)
+#define LOG_INFO_S(fmt, ...)      log_sprintf(INFO, "[INFO]"fmt, ## __VA_ARGS__)
+#define LOG_DEBUG_S(fmt, ...)     log_sprintf(DEBUG, "[DBG]"fmt, ## __VA_ARGS__)
+
+
+//字节流log输出方式宏定义
+#define LOG_CMD(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)   \
+    log_output(CMD, task_id, msg_type, sfn, slot,slot_offset, buf_type, msg_len, msg_addr)
+#define LOG_ERROR(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr) \
+    log_output(ERROR, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)
+#define LOG_WARN(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)  \
+    log_output(WARN, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len,  msg_addr)
+#define LOG_INFO(task_id, msg_type, sfn, slot, slot_offset,buf_type,  msg_len, msg_addr)  \
+    log_output(INFO, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)
+#define LOG_DEBUG(task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr) \
+    log_output(DEBUG, task_id, msg_type, sfn, slot, slot_offset, buf_type, msg_len, msg_addr)
+
+
+//串口log输出宏定义
+#define LOG_PRINTF(fmt, ...) //osp_printf(fmt"\n\r",  ## __VA_ARGS__)
+
+
+//log 相关结构体定义
+typedef enum
+{
+	CMD,
+    ERROR,
+    WARN,
+    INFO,
+    DEBUG
+} log_level_e;
+
+typedef struct log_msg_header
+{
+	uint32_t sync_flag : 9;// 0x13C
+	uint32_t msg_level : 3;
+	uint32_t msg_type : 12;//log msg type
+	uint32_t slot : 8;
+
+	uint32_t sfn : 10;//sfn + slot * 1024
+	uint32_t slot_offset : 10;
+	uint32_t msg_len : 9;//不包含log_header的长度
+	uint32_t msgNo : 3;//消息号
+	
+	char buffer[];
+}log_msg_header_t;
+
+void set_log_level(log_level_e level);
+void  log_pool_init();
+char *log_buf_alloc_static();
+void log_output(uint8_t level, uint8_t task_id, uint16_t msg_type,
+                uint16_t sfn, uint16_t slot, uint16_t slot_offset, uint8_t buf_type, uint16_t msg_len, char* msg_addr);
+void log_sprintf(log_level_e level, const char *fmt, ...);
+#endif

Common/inc/mem_def.h

@@ -0,0 +1,80 @@
+/******************************************************************
+ * @file  ucp_mem_def.h
+ * @brief:   两片UCP的内存分布头文件
+ * @author: xuekun.zhang
+ * @Date 2021年1月5日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
+ * Change_date         Owner         Change_content
+ * 2021年1月5日        xuekun.zhang       create file
+
+*****************************************************************/
+
+#ifndef     UCP_MEM_DEF_H
+#define     UCP_MEM_DEF_H
+
+//！命名宏定义时需要注意UCP使用的地址
+/*********************************UCP************************************************/
+#define SM0_BASE                    	(0x09D00000)//1M
+#define SM1_BASE                    	(0x09E00000)//1M
+#define SM2_BASE                    	(0x09F00000)//1.5M
+#define SM3_BASE                    	(0x0A080000)//1.5M
+#define SM4_BASE                    	(0x0A200000)//1.5M
+#define SM5_BASE                    	(0x0A380000)//1.5M
+
+//len define 
+//SM0
+#define SM0_RECEIVER_CFG_LEN            0x00000400  //1K      
+#define SM0_TRACE_LEN                   0x00000400  //1K 
+//SM1
+#define TIME_DATA_SLOT_LEN              0x0003c000  //61440*4byte = 240k
+//SM3
+#define SM3_NR_PUCCH_LUT_LEN		    0x00040000  //256K
+#define SM3_PHY_MSG_BUFFER_LEN          0x00000400  //1K
+//DDR
+#define TRACE_GRP_LEN                   0x00000200  //128Word    
+
+/************************************SM0--1M*************************************************/
+#define RECEIVER_SYNC_CFG_BASE             (SM0_BASE) 
+#define RECEIVER_SYMB_CFG_BASE             (RECEIVER_SYNC_CFG_BASE + 0x100) 
+#define RECEIVER_BIT_CFG_BASE              (RECEIVER_SYMB_CFG_BASE + 0x100) 
+/************************************SM1---1M ***********************************************/ 
+#define RECEIVER_SYNC2SYMB_BUFFER0_ADDR    (SM1_BASE)
+#define RECEIVER_SYNC2SYMB_BUFFER1_ADDR    (RECEIVER_SYNC2SYMB_BUFFER0_ADDR + TIME_DATA_SLOT_LEN)
+#define RECEIVER_SYNC2SYMB_BUFFER2_ADDR    (RECEIVER_SYNC2SYMB_BUFFER1_ADDR + TIME_DATA_SLOT_LEN)
+#define RECEIVER_SYNC2SYMB_BUFFER3_ADDR    (RECEIVER_SYNC2SYMB_BUFFER2_ADDR + TIME_DATA_SLOT_LEN)
+#define RECEIVER_SYNC2SYNC_FIRST_INF_ADDR  (RECEIVER_SYNC2SYMB_BUFFER3_ADDR + TIME_DATA_SLOT_LEN) //LEN: sizeof(receiver_sync_status_t)
+/************************************SM2--1.5M***********************************************/
+
+/************************************SM3--1.5M***********************************************/
+#define SM3_NR_PUCCH_LUT_ADDR                      (SM3_BASE)
+#define SM3_PHY_MSG_BUFFER_ADDR                    (SM3_NR_PUCCH_LUT_ADDR + SM3_NR_PUCCH_LUT_LEN)
+#define SM3_PHY_TASKS_MGR_ADDR                     (SM3_PHY_MSG_BUFFER_ADDR + SM3_PHY_MSG_BUFFER_LEN)
+/************************************SM4--1.5M***********************************************/
+//TODO:地址规划（暂时没用）
+#define RECEIVER_OUT1                  (SM4_BASE)
+#define RECEIVER_OUT2                  (SM4_BASE + 0x4000)
+#define RECEIVER_OUT3                  (SM4_BASE + 0x8000)
+
+/************************************SM5--1.5M***********************************************/
+#define RECEIVER_BASE                 (SM5_BASE) //4k对齐
+/**************************************DDR***************************************************/
+#define DDR_PHY_BASE                           (0x6BC00000) //共579M可用0x6BC00000-0x8FFFFFFF
+#define DDR_ERROR_RECORD_CNT_ADDR              (0x79FF8000)
+#define DDR_STATE_RECORD_CNT_ADDR              (0x79FFc000)
+
+//
+#define JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR      (0x6BC00000)  //!!!DDR_PHY_BASE 0x1E0000 
+#define JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR       (0x6BDE0000)  // 0x1E0000
+#define JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR      (0x6BFC0000)  // 0x1E0000 用于暂存数据供first_sync处理
+#define JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR      (0x6C1A0000)  // 0x1E0000 用于暂存数据供first_sync处理
+
+#define TRACE_RECEIVER_ADDR                             (0x88700000)
+#define TRACE_INIT_ADDR                                 (TRACE_RECEIVER_ADDR) //0x88700000
+#define TRACE_SLOTIND_ADDR                              (TRACE_INIT_ADDR + TRACE_GRP_LEN) //0x88700200
+#define TRACE_RECEIVER_SYNC_ADDR                        (TRACE_SLOTIND_ADDR + TRACE_GRP_LEN) // 0x88700400
+#define TRACE_RECEIVER_SYMB_ADDR                        (TRACE_RECEIVER_SYNC_ADDR + TRACE_GRP_LEN)// 0x88700600
+#define TRACE_RECEIVER_BIT_ADDR                         (TRACE_RECEIVER_SYMB_ADDR + TRACE_GRP_LEN)// 0x88700800
+#define TRACE_TESTTASK_ADDR                             (TRACE_RECEIVER_BIT_ADDR + TRACE_GRP_LEN) // 0x88700a00
+#define TRACE_RECEIVER_SYNC_FIRST_ADDR                  (TRACE_TESTTASK_ADDR + TRACE_GRP_LEN) // 0x88700c00
+#define TRACE_RECEIVER_SYNC_FINE_ADDR                   (TRACE_RECEIVER_SYNC_FIRST_ADDR + TRACE_GRP_LEN) // 0x88700e00
+#endif

Common/inc/msg_interface.h

@@ -0,0 +1,60 @@
+/******************************************************************
+ * @file  msg_interface.h
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2022年7月2日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年7月2日        guicheng.liu       create file
+
+*****************************************************************/
+
+#ifndef     MSG_INTERFACE_H
+#define     MSG_INTERFACE_H
+#include <type_define.h>
+#include "msg_transfer_layer.h"
+#include "debug_addr.h"
+
+uint32_t osp_phy_msg_send(       char* msg_ptr, 
+                                uint32_t msg_len);
+uint32_t osp_phy_multi_msgs_send(uint32_t queue_num, 
+                                char** msg_ptr, 
+                                uint32_t* msg_len,
+                                uint32_t msg_num);
+//uint32_t osp_phy_msg_recv(uint32_t queue_num);
+uint32_t osp_phy_msg_free(uint32_t queue_num, 
+                                uint32_t el_ind, 
+                                char* buf);
+//uint32_t osp_phy_msg_open(uint32_t num_tx_queues, queue_info_s *tx_queue_info, 
+//                               uint32_t num_rx_queues, queue_info_s *rx_queue_info);
+
+typedef enum
+{
+    TASK_MSG_SEND=0,
+    TASK_MSG_SEND_OK,
+    TASK_MSG_SEND_ERR,
+    TASK_MSG_MAX //3
+}task_msg_info_e;
+
+#define TASK_MSG_RECORD(core_id, task_id, state) \
+{\
+    uint32_t offset = ((core_id)*PHY_TASK_MAX + (task_id)*TASK_MSG_MAX + (state))*4;\
+    STORE_EX_W((char*)(DEBUG_TASK_MSG_ADDR+offset), LOAD_EX_W((char*)(DEBUG_TASK_MSG_ADDR+offset))+1);\
+}
+
+#define MSG_TRANSFER_RECORD(core_id, state) \
+{\
+    uint32_t offset = ((core_id)*TASK_MSG_MAX + (state))*4;\
+    STORE_EX_W((char*)(DEBUG_MSG_TRAN_SEND_ADDR+offset), LOAD_EX_W((char*)(DEBUG_MSG_TRAN_SEND_ADDR+offset))+1);\
+}
+
+
+int32_t phy_et_msg_send(uint32_t msg_addr,
+                            uint32_t msg_len,
+                            uint8_t  msg_type,
+                            uint8_t  src_core_id,
+                            uint8_t  dst_core_id,
+                            uint8_t  src_task_id,
+                            uint8_t  dst_task_id);
+
+#endif

Common/inc/phy_macro.h

@@ -0,0 +1,85 @@
+/******************************************************************
+ * @file  nr_phy_macro.h
+ * @brief:    [file description] 
+ * @author: xuekun.zhang
+ * @Date 2022年1月10日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年1月10日        xuekun.zhang       create file
+
+*****************************************************************/
+
+#ifndef     PHY_MACRO_H
+#define     PHY_MACRO_H
+
+
+//PHY LOG SWITCH
+#define PHY_LOG_SINGLE_UE_SWITCH
+//#define PHY_LOG_MULTIPLE_UE_SWITCH
+#define PHY_LOG_ERROR_STR_SWITCH
+#define PHY_LOG_INFO_STR_SWITCH
+#define PHY_LOG_TIME_REC_SWITCH
+
+
+
+#define	NR_SLOT_SYMBOL_NUM			14 
+#define NR_SUBSFN_SLOT_NUM			2 
+#define NR_SFN_SUBFRAME_NUM			10
+#define NR_SFN_SLOT_NUM				20
+#define NR_SFN_NUM				    1024
+#define NR_PERIOD_SLOT_NUM			10
+#define NR_PERIOD_SLOT_NUM_1D3U		5
+#define NR_CP_LENGTH_SYMBOL0		352 
+#define NR_CP_LENGTH_NON_SYMBOL0	288 
+#define NR_SMAPLE_POINT_PER_SYMBOL	4096 
+#define NR_SAMPLE_POINT_PER_SLOT	61440
+#define NR_SAMPLE_RATE				122880
+#define	NR_RB_SUBCARRIER_NUM		12
+#define NR_MAX_NUM_PRBS             (273)
+
+
+// slot 所占的字节数
+#define NR_SLOT_DATA_LENGTH     	(NR_SAMPLE_POINT_PER_SLOT * sizeof(uint32_t))   
+
+#define NR_INTEGRATION  0
+#define NR_DISTRIBUTED  1
+
+//UL信道类型定义, PUCCH & PUSCH公用
+#define NR_UL_CHANNEL_TYPE          (CH_AWGN)
+
+
+#define SCS_15KHZ	0
+#define SCS_30KHZ	1
+#define SCS_60KHZ	2
+#define SCS_120KHZ	3
+#define SCS_240KHZ	4 
+
+#define	NR_FRAME_TYPE_TDD        1
+#define	NR_FRAME_TYPE_FDD        0
+#define	NR_CP_TYPE_NORMAL        0
+#define	NR_CP_TYPE_EXTENDED      1 
+
+#define MAX_TASKS_PER_APE 8
+#define MAX_APES_PER_CELL 8
+
+#define MAX_CELL_NUM        (8)
+#define MAX_NR_CELL         (4)
+#define	MAX_UE_NUM			(16)
+#define	MAX_PDSCH_UE_NUM	(14)
+#define MAX_DCI_NUM         (28)
+
+
+#define TX_MAX_ANTENNA_NUM         MAX_NUM_TX_ANTENNAS   //TX max antenna num 
+#define RX_MAX_ANTENNA_NUM         MAX_NUM_RX_ANTENNAS   //RX max antenna num 
+
+
+#define SI_RNTI     0xFFFF
+
+#define ABS(a)    (((a)>0) ? (a) : (-a))
+#define MAX(a,b)  (((a)>(b)) ? (a) : (b))
+#define MIN(a,b)  (((a)<(b)) ? (a) : (b))
+
+
+
+
+#endif

Common/inc/phy_msg_func.h

@@ -0,0 +1,45 @@
+/******************************************************************
+ * @file  phy_msg_func.h
+ * @brief:    [file description] 
+ * @author: guicheng.liu
+ * @Date 2022年6月29日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年6月29日        guicheng.liu       create file
+
+*****************************************************************/
+
+#ifndef     FPHY_MSG_FUNC_H
+#define     FPHY_MSG_FUNC_H
+#include <type_define.h>
+
+#define MAX_RING_BUFFER_NUM 8
+
+typedef struct
+{
+    uint32_t el_ind;
+    uint32_t len;
+    char*    buff;
+}buffer_info_t;
+
+typedef struct {
+    int      num;
+    int      head;
+    int      tail;
+    buffer_info_t buffer[MAX_RING_BUFFER_NUM];
+}msg_ring_buffer_t;
+
+
+void msg_buffer_init();
+bool msg_buffer_empty(uint32_t queue_num);
+bool msg_buffer_full(msg_ring_buffer_t *ring_buffer);
+void enque_msg_buffer(uint32_t queue_num,
+                            uint32_t el_ind,
+                            char* buf, 
+                            uint32_t len);
+int deque_msg_buffer(uint32_t queue_num, 
+                            uint32_t* el_ind,
+                            char** buf, 
+                            uint32_t* len);
+
+#endif

Common/inc/phy_struct.h

@@ -0,0 +1,37 @@
+#ifndef PHY_STRUCT_H
+#define PHY_STRUCT_H
+
+#include <type_define.h>
+
+typedef enum
+{
+    FAPI_SLOT_INDICATION = 0x82,
+    L1FAPIMSGID_E_CNT
+}L1FAPIMsgId_e;
+
+
+
+typedef struct
+{
+    uint8_t msgNum;
+    uint8_t cellIndex;
+    uint16_t rev;
+}L1MsgHdr_t;
+
+
+/**@brief L1 General Msg Head*/
+typedef struct
+{
+    L1FAPIMsgId_e msgId;
+    uint32_t msgSize;
+}L1GeneralMsgHdr_t;
+
+
+/**@brief Slot indication*/
+typedef struct
+{
+    uint16_t SFN;
+    uint16_t Slot;
+}L1SlotIndication_t;
+
+#endif

Common/inc/task_define.h

@@ -0,0 +1,62 @@
+/******************************************************************
+ * @file  task_define.h
+ * @brief:    task common define
+ * @author: guicheng.liu
+ * @Date 2021年1月21日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2021年1月21日        guicheng.liu       create file
+
+*****************************************************************/
+
+#ifndef     TASK_DEFINE_H
+#define     TASK_DEFINE_H
+#include <type_define.h>
+#include "osp_interface.h"
+#include "osp_ape.h"
+
+typedef enum
+{
+    //1-31
+    PHY_TASK_PRI_BASE=1,
+    PHY_TASK_PRI_CONFIG,
+    PHY_TASK_PRI_SLOT_IND,
+    PHY_TASK_PRI_RECEIVER_SYNC,
+    PHY_TASK_PRI_RECEIVER_SYMB,
+    PHY_TASK_PRI_RECEIVER_BIT,    
+    PHY_TASK_PRI_TEST,
+    PHY_TASK_PRI_RECEIVER_FIRST_SYNC,
+    PHY_TASK_PRI_EQUAL_PRI, //不需要优先级抢占的任务，设置为该优先级
+}task_pri_e;
+
+
+typedef enum
+{
+    //1-31
+    PHY_TASK_BASE=1,
+    PHY_TASK_CONFIG,
+    PHY_TASK_SLOT_IND,
+    PHY_TASK_RECIEVER_SYNC,
+    PHY_TASK_RECIEVER_SYMB,
+    PHY_TASK_RECIEVER_BIT,
+    PHY_TASK_TEST,
+    PHY_TASK_RECIEVER_FIRST_SYNC,
+    PHY_TASK_PHY_MGR,
+    PHY_TASK_MAX=32
+}task_id_e;
+
+typedef struct
+{
+    task_id_e task_id;
+    char* task_name;
+    OSP_TASKINIT_FUNC  task_init;  /* 任务初始化 */
+    OSP_TASKENTRY_FUNC task_entry; /* 任务循环体 */
+}task_fun_t;
+
+typedef struct
+{
+    uint32_t num_task;
+    task_fun_t fun[PHY_TASK_MAX];
+}task_table_t;
+
+#endif

Common/inc/trace.h

@@ -0,0 +1,41 @@
+/******************************************************************
+ * @file  trace.h
+ * @brief:    record code status
+ * @author: HUOHUO
+ * @Date 2022年1月10日
+ * COPYRIGHT NOTICE: ITTC All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2024年10月23日        HUOHUO       create file
+
+*****************************************************************/
+
+#ifndef     TRACE_H
+#define     TRACE_H
+
+#include "common.h"
+#include "drv_ape.h"
+#include "mem_def.h"
+#include "phy_macro.h"
+
+
+
+#define TRACE(base, offset, val)    STORE_EX_W( (void*)((base) + 4*(offset)), (val))
+#define TRACE_MAX(base, offset, val) \
+{ \
+    if ( (val) > LOAD_EX_W( (void*)((base) + 4*(offset)) ) ) \
+        STORE_EX_W( (void*)((base) + 4*(offset)), (val) ); \
+} 
+
+#define RUN_CNT(base, offset)       STORE_EX_W( (void*)((base) + 4*(offset)), LOAD_EX_W( (void*)((base) + 4*(offset)) ) + 1 )
+#define TIME_SLOT()                 (get_tx_nr_slot() )
+#define TIME_US()                   (uint16_t)((get_tx_nr_slot_cycle() * 2097) >> 21)
+
+#define TIME_DIFF(start_slot, start_us, end_slot, end_us)   ((start_slot) <= (end_slot) )? \
+     (( (end_slot) - (start_slot) ) * 500 +  (end_us) - (start_us) ): \
+     ((NR_SFN_SLOT_NUM + (end_slot) - (start_slot) )* 500 + (end_us) - (start_us) ) \
+
+
+
+//#define TIME_RECORD(base, offset, time0) STORE_EX_W( (void*)((base) + 4*(offset)), GET_STC_CNT() - time0)
+
+#endif

Common/inc/type_define.h

@@ -0,0 +1,46 @@
+/******************************************************************
+ * @file  type_define.h
+ * @brief:    ucp common type define 
+ * @author: guicheng.liu
+ * @Date 2022年1月10日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2022年1月10日        guicheng.liu       create file
+
+*****************************************************************/
+
+#ifndef     UCP_DEFINE_H
+#define     UCP_DEFINE_H
+
+#include <ucps2.h>
+#include <stdlib.h>
+#include <math.h>
+#include <string.h>
+#include <ucps2-intrin.h>
+#include <malloc.h>
+#include <stdio.h>
+
+typedef signed char		int8_t;
+typedef unsigned char	uint8_t;
+typedef signed short	int16_t;
+typedef unsigned short	uint16_t;
+typedef signed int		int32_t;
+typedef unsigned int	uint32_t;
+typedef unsigned long long uint64_t;
+typedef signed long long   int64_t;
+
+typedef unsigned int  bool;
+
+#define false 0
+#define true 1
+
+#define INVALID_VALUE_U32 0xFFFFFFFF
+#define INVALID_VALUE_U16 0xFFFF
+#define INVALID_VALUE_U8  0xFF
+
+#define  NULLPTR   (void *)(0)    //!NULL pointer 
+//#define  NULL       0
+
+#define	BIT(x)		(1 << x)
+
+#endif

Common/src/common_func.s.c

@@ -0,0 +1,307 @@
+/******************************************************************
+ * @file  nr_common_fuc.c
+ * @brief:    [file description] 
+ * @author: xuekun.zhang
+ * @Date 2021年1月26日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2021年1月26日        xuekun.zhang       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include "common.h"
+#include <malloc.h>
+#include "mem_def.h"
+
+/**************************function******************************/
+
+ /*!   
+ * @brief:  
+ * @author:  bo.liu
+ * @Date:  2021年2月3日
+ * @param: a_numerator :      [param description ]
+ * @param: a_denominator :    [param description ]
+ */
+int ceil_fix(int a_numerator, int a_denominator)
+{
+	int quo, rem;
+	quo = a_numerator / a_denominator;
+	rem = a_numerator - quo * a_denominator;
+  if((rem != 0) && (a_numerator > 0))
+  {
+    return (quo + 1);
+  }
+  else
+  {
+  	return quo;
+  }
+}
+
+/*!   
+* @brief:  
+* @author:  yufei.wang
+* @Date:  2022年11月9日
+* @param: a_numerator :      [param description ]
+* @param: a_denominator :    [param description ]
+*/
+int64_t floor_long_fix(int64_t a_numerator, int64_t a_denominator)
+{
+    int64_t quo, rem;
+    if((0 == a_numerator) || (0 == a_denominator))
+    {
+        return 0;
+    }
+    quo = a_numerator / a_denominator;
+    rem = a_numerator - quo * a_denominator;
+    if((rem != 0) && (((a_numerator < 0) && (a_denominator > 0))|| ((a_numerator > 0) && (a_denominator < 0))))
+    {
+        return (quo - 1);
+    }
+    else
+    {
+        return quo;
+    }
+}
+
+/*!   
+ * @brief:  
+ * @author:  yufei.wang
+ * @Date:	2022年2月11日
+ * @param: a_numerator :	   [param description ]
+ * @param: a_denominator :    [param description ]
+ */
+uint64_t ceil_long_fix(uint64_t a_numerator, uint64_t a_denominator)
+{
+    uint64_t quo = 0;
+    uint64_t rem = 0;
+
+    quo = a_numerator / a_denominator;
+    rem = a_numerator - quo * a_denominator;
+
+    if(rem != 0)
+    {
+        return (quo + 1);
+    }
+    else
+    {
+        return quo;
+    }
+}
+ 
+ /*!   
+ * @brief:  
+ * @author:  bo.liu
+ * @Date:  2021年2月3日
+ * @param: a_numerator :      [param description ]
+ * @param: a_denominator :    [param description ]
+ */
+int floor_fix(int a_numerator, int a_denominator)
+{
+    int quo, rem;
+    quo = a_numerator / a_denominator;
+    rem = a_numerator - quo * a_denominator;
+    if((rem != 0) && (a_numerator < 0))
+    {
+        return (quo - 1);
+    }
+    else
+    {
+        return quo;
+    }
+} 
+
+/*!   
+  * @brief: 就近取整
+  * @author:  yufei.wang
+  * @Date:	2023年3月3日
+  * @param: a_numerator :	   [param description ]
+  * @param: a_denominator :    [param description ]
+  */
+ int round_fix(int a_numerator, int a_denominator)
+ {
+	 int abs_a = 0;
+	 int abs_a_d = 0;
+	 int quo = 0;
+	 int rem = 0;
+ 
+	 if (0 == a_denominator)
+	 {
+		 return 0;
+	 }
+ 
+	 abs_a = __ucps2_abs(a_numerator);
+	 abs_a_d = __ucps2_abs(a_denominator);
+ 
+	 //统一到正值进行处理
+	 quo = abs_a / abs_a_d; //默认向下取整
+	 rem = abs_a - (quo*abs_a_d);
+	 if ((rem<<1) > abs_a_d) //余数大于被除数的一半
+	 {
+		 //向上取整
+		 quo += 1;
+	 }
+	 else //余数小于被除数的一半,向下取整
+	 {
+	 }
+ 
+	 //确定符号位
+	 if (((a_numerator < 0) && (a_denominator < 0)) 
+		  || ((a_numerator > 0) && (a_denominator > 0)))
+	 {
+		 return quo;
+	 }
+	 else
+	 {
+		 return (-quo);
+	 }
+ }
+
+
+/*! 
+  * @brief:  CRC6Check
+  * 		 CRC6校验计算
+  * @author:  chunmeng.li
+  * @Date:	2022年1月27日
+  * @param: *dataIn :		   [input data, bit sequence form lsb to msb ]
+  * @param: *crc6Lut :		   [crc lut 256 bytes ]
+  * @param: bitLen :		   [number of valid bits in dataIn, include crc, 18~25 ]
+  * Performance:
+  * 	44 + 71 * nPath
+ */
+ uint8_t CRC6Check(uint32_t *dataIn, uint8_t *crc6Lut, uint8_t bitLen, uint32_t **dataOut)
+ {
+	 uint32_t byteIn, scCnt;
+	 uint32_t *dataInPtr = dataIn;
+	 uint32_t nbitPad = 32 - bitLen;
+	 uint8_t crcRes, divend;
+ 
+	 for (scCnt = 0; scCnt < 8; scCnt++)
+	 {
+		 byteIn = (*dataInPtr) << nbitPad;
+		 divend = byteIn;
+		 crcRes = crc6Lut[divend];
+		 divend = (byteIn >> 8) ^ crcRes;
+		 crcRes = crc6Lut[divend];
+		 divend = (byteIn >> 16) ^ crcRes;
+		 crcRes = crc6Lut[divend];
+		 divend = (byteIn >> 24) ^ crcRes;
+		 if (crc6Lut[divend] == 0)
+		 {
+			 *dataInPtr = byteIn >> nbitPad;
+			 *dataOut = dataInPtr;
+			 return 1;
+		 }
+		 dataInPtr += 48; //data length for one path is 192 Bytes
+	 }
+	 *dataOut = dataIn;
+	 return 0;
+ }
+
+ /*!   
+ * @brief: 通过泰勒拟合求10*log10(value)， 上行信道公用函数
+ * @author:  yufei.wang
+ * @Date:  2022年5月30日
+ * @param: real_value :       [带有标值的功率输入，可以是16位或者32位 ]
+ * @param: Q_in :             [输入功率的标值 ]
+ * @param: Q_out :            [输出标值]
+ */
+int16_t Calc_10Log10(int32_t real_value, uint8_t Q_in, uint8_t Q_out)
+{
+    uint32_t index;
+    int32_t log2_real_value;
+    int16_t dB_value;
+    int32_t real_value_DQ;
+    int32_t deltax;
+    int32_t mul;
+    uint8_t Q_delta;
+    int32_t dB_value_tmp;
+    int32_t Value_Comp;
+
+    //求取real_value的first1
+    log2_real_value = (31 - 14) - __builtin_clz(real_value);//-14~16
+
+    //将输入的real_value移到16位
+    real_value_DQ = (int16_t)(real_value >> log2_real_value);//16384~32767
+    //计算出x0,k0,k1在查找表的index
+    index = ((real_value_DQ - 16384)  >> 9) & 0x1F;//0~31
+    deltax = real_value_DQ - c_tb_dB[index][0];
+    mul = (deltax * c_tb_dB[index][1]) >> 13;
+    dB_value_tmp = (mul + c_tb_dB[index][2]) << (Q_out-13);
+    //Q_delta的取值范围为8~69,作为value_comp_table的索引
+    Q_delta = Q_in - log2_real_value + (38 - 14);//8~69, 0<= Q_in <= 31
+    Value_Comp = (int32_t)c_dBcal_value_comp_table[Q_delta] << (Q_out-8);
+    dB_value = dB_value_tmp - Value_Comp;
+    return real_value ? dB_value : -32768; //标值为Q(16, Q_out)
+}
+
+
+ /*!   
+ * @brief:  
+ * @author:  bo.liu
+ * @Date:  2021年2月3日
+ * @param: len :              [数据长度 ]
+ * @param: dm_index :         [DM 空间]
+ */
+int * dmalloc_unit(uint32_t len, uint8_t dm_index)
+{
+	//int dmalloced,freeSpace;
+	int *val_ptr = NULLPTR;
+	int  have_allocated_byte = 0;
+
+	__ucps2_IntEn(f_Disable);
+	val_ptr = (int *)dmalloc(len, dm_index);
+	__ucps2_IntEn(f_Enable);
+	if(val_ptr)
+	{
+	}
+	else 
+	{
+        have_allocated_byte = getMemoryMalloced(dm_index);
+
+	}
+	return val_ptr;
+}
+
+
+ /*!   
+ * @brief:  
+ * @author:  bo.liu
+ * @Date:  2021年2月3日
+ * @param: align_addr :       [字节对齐数 ]
+ * @param: len :              [数据长度 ]
+ * @param: dm_index :         [DM 空间 ]
+ */
+int * dmemalign_unit(uint32_t align_addr, uint32_t len, uint8_t dm_index)
+{
+	int dmalloced,freeSpace;
+	int *val_ptr;
+	int  have_allocated_byte = getMemoryMalloced(dm_index);
+
+    __ucps2_IntEn(f_Disable);
+	val_ptr = (int *)dmemalign(align_addr, len, dm_index);
+	__ucps2_IntEn(f_Enable);
+
+
+	return val_ptr;
+}
+
+
+/*!   
+* @brief:	
+* @author:  bo.liu
+* @Date:  2021年2月3日
+* @param: *val_ptr :		  [数据指针]
+* @param: dm_index :		  [DM 空间 ]
+*/
+void dfree_unit(int *val_ptr, uint8_t dm_index)
+{
+	int dmalloced,freeSpace;
+	
+    __ucps2_IntEn(f_Disable);
+	dfree(val_ptr);
+	__ucps2_IntEn(f_Enable);
+
+}
+
+

Common/src/common_vars.s.c

@@ -0,0 +1,214 @@
+/******************************************************************
+ * @file  nr_common_vars.s.c
+ * @brief:    define common variables, shoared by multiple APEs 
+ * @author: xuekun.zhang
+ * @Date 2022年1月11日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2021年1月14日        xuekun.zhang       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include "type_define.h"
+#include "mem_def.h"
+#include "common.h"
+#include "interface_fapi_tasks.h"
+#include "phy_msg_func.h"
+
+
+/**************************function******************************/
+
+//38.214 Table 5.1.3.1-1: MCS index table 1 for PDSCH/PUSCH
+uint16_t g_mcs_table_1[32][3] = {
+	  {2,120,960},	 // 0.2344						  
+	  {2,157,1256},  // 0.3066				  
+	  {2,193,1544},  // 0.3770				  
+	  {2,251,2008},  // 0.4902				  
+	  {2,308,2464},  // 0.6016				  
+	  {2,379,3032},  // 0.7402				  
+	  {2,449,3592},  // 0.8770				  
+	  {2,526,4208},  // 1.0273				  
+	  {2,602,4816},  // 1.1758				  
+	  {2,679,5432},  // 1.3262				  
+	  {4,340,5440},  // 1.3281				  
+	  {4,378,6048},  // 1.4766				  
+	  {4,434,6944},  // 1.6953				  
+	  {4,490,7840},  // 1.9141				  
+	  {4,553,8848},  // 2.1602				  
+	  {4,616,9856},  // 2.4063				  
+	  {4,658,10528}, // 2.5703				  
+	  {6,438,10512}, // 2.5664				  
+	  {6,466,11184}, // 2.7305				  
+	  {6,517,12408}, // 3.0293				  
+	  {6,567,13608}, // 3.3223				  
+	  {6,616,14784}, // 3.6094				  
+	  {6,666,15984}, // 3.9023				  
+	  {6,719,17256}, // 4.2129				  
+	  {6,772,18528}, // 4.5234				  
+	  {6,822,19728}, // 4.8164				  
+	  {6,873,20952}, // 5.1152				  
+	  {6,910,21840}, // 5.3320				  
+	  {6,948,22752}, //5.5547					
+	  {2,0,0},		 //, 0	 						  
+	  {4,0,0},		 //, 0							  
+	  {6,0,0}   //, 0	
+};
+
+//38.214 Table 5.1.3.1-2: MCS index table 2 for PDSCH/PUSCH
+uint16_t g_mcs_table_2[32][3] ={
+		{ 2,120,960},	  //, 0.2344			
+		{ 2,193,1544},	  //, 0.3770			
+		{ 2,308,2464},	  //, 0.6016			
+		{ 2,449,3592},	  //, 0.8770			
+		{ 2,602,4816},	  //, 1.1758			
+		{ 4,378,6048},	  //, 1.4766			
+		{ 4,434,6944},	  //, 1.6953			
+		{ 4,490,7840},	  //, 1.9141			
+		{ 4,553,8848},	  //, 2.1602			
+		{ 4,616,9856},	  //, 2.4063			
+		{ 4,658,10528},   //, 2.5703			
+		{ 6,466,11184},   //, 2.7305			
+		{ 6,517,12408},   //, 3.0293			
+		{ 6,567,13608},   //, 3.3223			
+		{ 6,616,14784},   //, 3.6094			
+		{ 6,666,15984},   //, 3.9023			
+		{ 6,719,17256},   //, 4.2129			
+		{ 6,772,18528},   //, 4.5234			
+		{ 6,822,19728},   //, 4.8164			
+		{ 6,873,20952},   //, 5.1152			
+		{ 8,682,21840},   //, 5.3320  //682.5	  
+		{ 8,711,22752},   //, 5.5547			  
+		{ 8,754,24128},   //, 5.8906			  
+		{ 8,797,25504},   //, 6.2266			  
+		{ 8,841,26912},   //, 6.5703			  
+		{ 8,885,28320},   //, 6.9141			  
+		{ 8,916,29328},   //, 7.1602,//916.5	 
+		{ 8,948,30336},   //, 7.4063,			 
+		{ 2,0,0},		  //, 0 				
+		{ 4,0,0},		  //, 0 				
+		{ 6,0,0},		  //, 0 				
+		{ 8,0,0}		 //, 0			 
+};
+
+
+//38.214 Table 5.1.3.1-3: MCS index table 3 for PDSCH/PUSCH
+uint16_t g_mcs_table_3[32][3] = {
+		{ 2,30,240},	 //, 0.0586 	   
+		{ 2,40,320},	 //, 0.0781 	   
+		{ 2,50,400},	 //, 0.0977 	   
+		{ 2,64,512},	 //, 0.1250 	   
+		{ 2,78,624},	 //, 0.1523 	   
+		{ 2,99,792},	 //, 0.1934 	   
+		{ 2,120,960},	 //, 0.2344 	   
+		{ 2,157,1256},	 //, 0.3066 	   
+		{ 2,193,1544},	 //, 0.3770 	   
+		{ 2,251,2008},	 //, 0.4902 	   
+		{ 2,308,2464},	 //, 0.6016 	   
+		{ 2,379,3032},	 //, 0.7402 	   
+		{ 2,449,3592},	 //, 0.8770 	   
+		{ 2,526,4208},	 //, 1.0273 	   
+		{ 2,602,4816},	 //, 1.1758 	   
+		{ 4,340,5440},	 //, 1.3281 	   
+		{ 4,378,6048},	 //, 1.4766 	   
+		{ 4,434,6944},	 //, 1.6953 	   
+		{ 4,490,7840},	 //, 1.9141 	   
+		{ 4,553,8848},	 //, 2.1602 	   
+		{ 4,616,9856},	 //, 2.4063 	   
+		{ 6,438,10512},  //, 2.5664 	   
+		{ 6,466,11184},  //, 2.7305 	   
+		{ 6,517,12408},  //, 3.0293 	   
+		{ 6,567,13608},  //, 3.3223 	   
+		{ 6,616,14784},  //, 3.6094 	   
+		{ 6,666,15984},  //, 3.9023 	   
+		{ 6,719,17256},  //, 4.2129 	   
+		{ 6,772,18528},  //, 4.5234 	   
+		{ 2,0,0},		 //, 0				   
+		{ 4,0,0},		 //, 0				   
+		{ 6,0,0}		 //, 0				   
+		};
+
+
+// uint16_t g_zc_table[8][8] = 
+// 						{{2	, 4	, 8	, 16	, 32	, 64	, 128	, 256	},	//sets of LDPC lifting sizes Z
+// 						 {3	, 6	, 12, 24	, 48	, 96	, 192	, 384	},	//reference to TS 38.212 Table 5.3.2-1
+// 						 {5	, 10, 20, 40	, 80	, 160	, 320	, 0		},	//zeros are filled to get a matrix
+// 						 {7	, 14, 28, 56	, 112	, 224	, 0		, 0		},	//that can simplify calculation
+// 						 {9	, 18, 36, 72	, 144	, 288	, 0		, 0		}, 
+// 						 {11, 22, 44, 88	, 176	, 352	, 0		, 0		}, 
+// 						 {13, 26, 52, 104	, 208	, 0		, 0		, 0		}, 
+// 						 {15, 30, 60, 120	, 240	, 0		, 0		, 0		}};
+
+uint16_t g_zc_table[50] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 18, 20, 22, 24, 26, 28, 30, 32, 36, 40, 44, 48, 52, 56, 60,
+         64, 72, 80, 88, 96, 104, 112, 120, 128, 144, 160, 176, 192, 208, 224, 240, 256, 288, 320, 352};
+
+uint8_t g_ils_table[51] = {0,1,0,2,1,3,0,4,2,5,1,6,3,7,0,4,2,5,1,6,3,7,0,4,2,5,1,6,3,7,0,4,2,5,1,6,3,7,0,4,2,5,1,6,3,7,0,4,2,5,1};
+ 
+ 
+uint16_t g_nprb_lbrm_table[7] = {273, 217, 162, 135, 106, 66, 32};
+uint32_t g_tbsize_lbrm_256qam_table[7] = {1277992, 999576, 753816, 622760, 491800, 303240, 147576};
+uint32_t g_tbsize_lbrm_64qam_table[7] = {950984, 753816, 557416, 467240, 368872, 229576, 110632};
+
+uint8_t g_dmrstype1_delta_table[8] = {0, 0, 1, 1, 0, 0, 1, 1};//{1000,1001,...,1007}
+uint8_t g_dmrstype2_delta_table[12] = {0, 0, 2, 2, 4, 4, 0, 0, 2, 2, 4, 4};//{1000,1001,...,1011}
+int8_t  g_dmrstype1_wf_pk_table[8][2] = {{1, 1}, {1, -1}, {1, 1}, {1, -1}, {1, 1}, {1, -1}, {1, 1}, {1, -1}};
+int8_t  g_dmrstype2_wf_pk_table[12][2] = {{1, 1}, {1, -1}, {1, 1}, {1, -1}, {1, 1}, {1, -1}, 
+									{1, 1}, {1, -1}, {1, 1}, {1, -1}, {1, 1}, {1, -1}};
+int8_t  g_dmrstype1_wt_pl_table[8][2] = {{1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, -1}, {1, -1}, {1, -1}, {1, -1}};
+int8_t  g_dmrstype2_wt_pl_table[12][2] = {{1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},
+										{1, -1}, {1, -1}, {1, -1}, {1, -1}, {1, -1}, {1, -1}};
+
+uint32_t  g_dm_malloc_count[4] = {0}; 
+uint32_t  g_dm_malloc_err_count[4] = {0}; 
+
+uint32_t  g_dm_free_count[4] = {0};
+
+//用于计算10log10的查找表，上行信道公用
+const int16_t c_tb_dB[32][3] =
+{
+	{16384, 17788, 0  },
+	{16896, 17249, 1094 },
+	{17408, 16742, 2156 },
+	{17920, 16263, 3188 },
+	{18432, 15812, 4190 },
+	{18944, 15384, 5165 },
+	{19456, 14979, 6113 },
+	{19968, 14595, 7038 },
+	{20480, 14230, 7938 },
+	{20992, 13883, 8817 },
+	{21504, 13553, 9674 },
+	{22016, 13238, 10511},
+	{22528, 12937, 11329},
+	{23040, 12649, 12129},
+	{23552, 12374, 12911},
+	{24064, 12111, 13676},
+	{24576, 11859, 14425},
+	{25088, 11617, 15158},
+	{25600, 11384, 15877},
+	{26112, 11161, 16582},
+	{26624, 10946, 17273},
+	{27136, 10740, 17950},
+	{27648, 10541, 18615},
+	{28160, 10349, 19268},
+	{28672, 10164, 19909},
+	{29184, 9986,  20539},
+	{29696, 9814,  21158},
+	{30208, 9648,  21766},
+	{30720, 9487,  22364},
+	{31232, 9331,  22952},
+	{31744, 9181,  23530},
+	{32256, 9035,  24100},
+};
+//用于10log10计算的补偿表，上行信道公用
+const int16_t c_dBcal_value_comp_table[70] =
+{
+	-29285, -28514, -27743, -26973, -26202, -25432, -24661, -23890, -23120, -22349, -21578, -20808, -20037, -19266,
+	-18496, -17725, -16955, -16184, -15413, -14643, -13872, -13101, -12331, -11560, -10789, -10019, -9248,  -8478,
+	-7707,	-6936,  -6166,  -5395,  -4624,  -3854,  -3083,  -2312,  -1542,  -771,   0,      770,    1541,   2311,
+	3082,   3853,   4623,   5394,   6165,   6935,   7706,   8477,   9247,   10018,  10788,  11559,  12330,  13100,
+	13871,  14642,  15412,  16183,  16954,  17724,  18495, 	19265,  20036,  20807,  21577,  22348,  23119,  23889
+};
+
+
+phy_tasks_mgr_reg_t* g_phy_tasks_mgr_ptr =     (phy_tasks_mgr_reg_t*)(SM3_PHY_TASKS_MGR_ADDR);
+msg_ring_buffer_t* g_phy_msg_buffer =          (msg_ring_buffer_t*)(SM3_PHY_MSG_BUFFER_ADDR);

Common/src/log_interface.s.c

@@ -0,0 +1,164 @@
+/******************************************************************
+ * @file  log_interface.s.c
+ * @brief:    物理层log相关函数定义
+ * @author: guicheng.liu
+ * @Date 2021年3月9日
+ * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. 
+ * Change_date         Owner         Change_content
+ * 2021年3月9日        guicheng.liu       create file
+
+*****************************************************************/
+
+/**************************include******************************/
+#include <type_define.h>
+#include "log_interface.h"
+#include "common.h"
+#include "msg_interface.h"
+#include "ape_interface.h"
+#include "osp_ape.h"
+#include "drv_ape.h"
+
+/**************************function******************************/
+log_level_e g_log_level = INFO;
+uint32_t g_log_NO = 0;
+
+uint8_t   *g_ape_log_pool = NULLPTR;   
+uint8_t   *g_ape_log_buffer[64] = {NULLPTR};
+uint32_t   g_ape_log_buf_index = 0;
+uint32_t   g_ape_log_buf_min_addr;
+uint32_t   g_ape_log_buf_max_addr;
+
+//自定义空间的log头定义
+extern uint32_t g_ape_log_header[(LOG_HEADER_SIZE + 3)>>2];
+//静态申请log空间
+extern uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];
+ /*!   
+ * @brief: 静态开16K空间，作为log buffer使用
+ * @author:  bo.liu
+ * @Date:  2021年3月12日
+ */
+void  log_pool_init()
+{
+	int32_t   buf_index = 0; 
+
+    g_ape_log_pool = (uint8_t *)g_ape_log_static_buf;//dmalloc_unit(LOG_DM_BUF_NUM*(256+16), DM2);
+
+    for(buf_index = 0; buf_index < LOG_DM_BUF_NUM; buf_index++)
+    {
+		g_ape_log_buffer[buf_index] = g_ape_log_pool + buf_index * LOG_MAX_LEN_BYTE;
+    }
+    g_ape_log_buf_min_addr = (uint32_t)g_ape_log_buffer[0] + LOG_TOTAL_HDR_SIZE;
+    g_ape_log_buf_max_addr = (uint32_t)g_ape_log_buffer[LOG_DM_BUF_NUM - 1] + LOG_TOTAL_HDR_SIZE;
+}
+
+
+void set_log_level(log_level_e level)
+{
+    if ((CMD <= level) && (DEBUG >= level))
+    {
+        g_log_level = level;
+    }
+    else
+    {
+        //osp_printf("invalid value\n");
+    }
+}
+
+char *log_buf_alloc_static()
+{
+	char *msg_ptr;
+	smart_int_disable();
+	//OSP_INTER_LOCK(); 等DD提供接口后打开注释
+	g_ape_log_buf_index = (g_ape_log_buf_index + 1)&(LOG_DM_BUF_NUM - 1); 
+	msg_ptr =  (char *)(g_ape_log_buffer[g_ape_log_buf_index] + LOG_TOTAL_HDR_SIZE);//预留4+2个int for DD Header & PHY Header
+	smart_int_enable();
+	return msg_ptr;
+}
+
+
+void log_output(uint8_t level, uint8_t taskId, uint16_t msg_type, 
+                     uint16_t sfn, uint16_t slot, uint16_t slot_offset, 
+					uint8_t buf_type,  uint16_t msg_len, char* msg_body_addr)
+{
+    char* msg_hdr = (char*)g_ape_log_header;
+	log_msg_header_t *log_hdr = (log_msg_header_t *)(&msg_hdr[LOG_DD_HEADER_SIZE]);//预留平台头
+    char* msg_tmp[2] = {NULLPTR};
+    uint32_t msg_len_tmp[2] = {0};
+
+    if ((level > g_log_level) || (msg_len > LOG_MAX_CONTENT_SIZE))
+    {
+        return;
+    }
+
+    if(0 == buf_type)
+    {
+        if((g_ape_log_buf_min_addr > (uint32_t)msg_body_addr)
+        ||(g_ape_log_buf_max_addr  < (uint32_t)msg_body_addr))
+        {
+            return;
+        }
+        msg_hdr = (msg_body_addr - LOG_TOTAL_HDR_SIZE);
+        log_hdr = (log_msg_header_t *)(msg_body_addr - LOG_HEADER_SIZE);
+    }
+	smart_int_disable();
+	
+	log_hdr->sync_flag = 0x13C;
+	log_hdr->msg_level = level;
+    log_hdr->msg_type = msg_type & 0xFFF;
+    log_hdr->msg_len = msg_len;
+    log_hdr->sfn = sfn;
+    log_hdr->slot = slot;
+    log_hdr->slot_offset = slot_offset & 0x3FF;
+    log_hdr->msgNo = (g_log_NO++) & 0x7;
+
+    //buf_type=0:表示使用log模块申请的内存
+    //buf_type=1:表示log header使用log模块申请的内存,log body使用各个链路的DM内存
+	if (0 == buf_type)
+	{
+        osp_sendLog_print(level, (char*)log_hdr, LOG_HEADER_SIZE + msg_len, 0);
+    	osp_phy_msg_send(msg_hdr, LOG_TOTAL_HDR_SIZE + msg_len);
+    }
+    else
+    {
+        msg_len_tmp[0] = LOG_TOTAL_HDR_SIZE;
+        msg_len_tmp[1] = msg_len;
+        msg_tmp[0] = (char*)msg_hdr;
+        msg_tmp[1] = (char*)msg_body_addr;
+
+        osp_sendLog_print(level, (char*)log_hdr, LOG_HEADER_SIZE + msg_len, 0);
+        osp_phy_multi_msgs_send(UCP4008_OSP_LOG, msg_tmp, msg_len_tmp, 2);
+    }
+
+	smart_int_enable();
+}
+
+void log_sprintf(log_level_e level, const char *fmt, ...)
+{
+    char *buf = NULLPTR;
+    char* msg = NULLPTR;
+    va_list args;
+    int str_len = 0;
+
+    if (level > g_log_level)
+    {
+        return;
+    }
+
+    buf = (char *)log_buf_alloc_static() - LOG_HEADER_SIZE;
+    msg = buf - LOG_DD_HEADER_SIZE;
+
+    va_start(args, fmt);
+    vsprintf(buf, fmt, args);
+    va_end(args);
+    str_len = osp_strlen(buf);
+
+    if (LOG_MAX_CONTENT_SIZE < str_len)
+    {
+        return;
+    }
+    
+	smart_int_disable();
+    osp_sendLog(level, (char*)buf, str_len, 0);
+    //osp_phy_msg_send(UCP4008_OSP_LOG, (char*)msg, str_len+LOG_DD_HEADER_SIZE);
+	smart_int_enable();
+}