From a53bd42da7467cabd67bb6232f897c2914ab59b0 Mon Sep 17 00:00:00 2001 From: jiangsgamepc Date: Sun, 2 Mar 2025 13:41:38 +0800 Subject: [PATCH] tx_rx_version rx part first commit --- .gitignore | 18 + .vscode/c_cpp_properties.json | 20 + .vscode/settings.json | 22 + APE4/ApeCommon/inc/ape_common.h | 37 + APE4/ApeCommon/src/ape_common.s.c | 37 + APE4/ApeTask/inc/Fucp_Ape0_slot_ind.h | 17 + APE4/ApeTask/src/Fucp_Ape0_Init.s.c | 132 + APE4/ApeTask/src/Fucp_Ape0_slot_ind.s.c | 41 + APE4/Makefile | 144 + APE4/MpuAsmInc/.gitkeep | 0 APE5/ApeCommon/inc/ape_common.h | 37 + APE5/ApeCommon/src/ape_common.s.c | 32 + APE5/ApeTask/src/Fucp_Ape1_Init.s.c | 107 + APE5/Makefile | 144 + APE5/MpuAsmInc/.gitkeep | 0 APE6/ApeCommon/inc/ape_common.h | 37 + APE6/ApeCommon/src/ape_common.s.c | 32 + APE6/ApeTask/src/Fucp_Ape2_Init.s.c | 107 + APE6/Makefile | 144 + APE6/MpuAsmInc/.gitkeep | 0 APE7/ApeCommon/inc/ape_common.h | 37 + APE7/ApeCommon/src/ape_common.s.c | 32 + APE7/ApeTask/src/Fucp_Ape3_Init.s.c | 107 + APE7/Makefile | 145 + APE7/MpuAsmInc/.gitkeep | 0 APELib/MicroLib/libLDPCEncoding.a | Bin 0 -> 71662 bytes APELib/MicroLib/libLdpcDecBG1AllZc.a | Bin 0 -> 50974 bytes APELib/MicroLib/libLdpcDecBG2.a | Bin 0 -> 30594 bytes APELib/MicroLib/libPolarDeBitIL.a | Bin 0 -> 6050 bytes APELib/MicroLib/libPolarDeBitSelect.a | Bin 0 -> 6206 bytes APELib/MicroLib/libPolarDeSubBlockIL.a | Bin 0 -> 2858 bytes APELib/MicroLib/libPolarDecoding.a | Bin 0 -> 46226 bytes APELib/MicroLib/libPolarEncoding.a | Bin 0 -> 15934 bytes APELib/Receiver_bit/inc/receiver_bit_func.h | 47 + APELib/Receiver_bit/inc/receiver_bit_macro.h | 22 + APELib/Receiver_bit/inc/receiver_bit_struct.h | 44 + APELib/Receiver_bit/src/receiver_Bit_Init.s.c | 67 + APELib/Receiver_bit/src/receiver_Bit_Proc.s.c | 64 + APELib/Receiver_bit/src/receiver_Bit_Task.s.c | 184 + APELib/Receiver_bit/src/receiver_Bit_Var.s.c | 17 + APELib/Receiver_symb/inc/receiver_symb_func.h | 47 + .../Receiver_symb/inc/receiver_symb_macro.h | 22 + .../Receiver_symb/inc/receiver_symb_struct.h | 50 + .../Receiver_symb/src/receiver_Symb_Init.s.c | 67 + .../Receiver_symb/src/receiver_Symb_Proc.s.c | 75 + .../Receiver_symb/src/receiver_Symb_Task.s.c | 185 + .../Receiver_symb/src/receiver_Symb_Var.s.c | 17 + APELib/Receiver_sync/inc/receiver_sync_func.h | 63 + .../Receiver_sync/inc/receiver_sync_macro.h | 26 + .../Receiver_sync/inc/receiver_sync_struct.h | 75 + APELib/Receiver_sync/inc/receiver_sync_vars.h | 6 + .../Receiver_sync/src/receiver_Sync_Init.s.c | 86 + .../Receiver_sync/src/receiver_Sync_Proc.s.c | 495 + .../Receiver_sync/src/receiver_Sync_Task.s.c | 44 + .../Receiver_sync/src/receiver_Sync_Var.s.c | 39 + .../inc/receiver_sync_first_func.h | 63 + .../inc/receiver_sync_first_macro.h | 26 + .../inc/receiver_sync_first_struct.h | 71 + .../inc/receiver_sync_first_vars.h | 5 + .../src/receiver_Sync_First_Init.s.c | 76 + .../src/receiver_Sync_First_Proc.s.c | 432 + .../src/receiver_Sync_First_Var.s.c | 36 + APELib/TestTask/inc/Frame_test.h | 15 + APELib/TestTask/src/Frame_test.s.c | 81 + Common/Makefile | 9 + Common/Scripts/ECS_RFM-spu0-noCache.ld | 97 + Common/Scripts/ECS_RFM-spu1-noCache.ld | 96 + .../Scripts/ape0-Cache128-noMPUC-dynamic.ld | 239 + Common/Scripts/ape0-Cache128-noMPUC.ld | 160 + .../Scripts/ape1-Cache128-noMPUC-dynamic.ld | 238 + Common/Scripts/ape1-Cache128-noMPUC.ld | 166 + .../Scripts/ape2-Cache128-noMPUC-dynamic.ld | 239 + Common/Scripts/ape2-Cache128-noMPUC.ld | 159 + .../Scripts/ape3-Cache128-noMPUC-dynamic.ld | 238 + Common/Scripts/ape3-Cache128-noMPUC.ld | 159 + .../Scripts/ape4-Cache128-noMPUC-dynamic.ld | 239 + Common/Scripts/ape4-Cache128-noMPUC.ld | 160 + .../Scripts/ape5-Cache128-noMPUC-dynamic.ld | 238 + Common/Scripts/ape5-Cache128-noMPUC.ld | 159 + .../Scripts/ape6-Cache128-noMPUC-dynamic.ld | 239 + Common/Scripts/ape6-Cache128-noMPUC.ld | 159 + .../Scripts/ape7-Cache128-noMPUC-dynamic.ld | 238 + Common/Scripts/ape7-Cache128-noMPUC.ld | 159 + Common/Scripts/d2d_sourceinsight_cfg.xml | 8422 +++++ Common/Scripts/utils.em | 684 + Common/inc/common.h | 123 + Common/inc/debug_addr.h | 10 + Common/inc/error_record.h | 52 + Common/inc/log_interface.h | 116 + Common/inc/mem_def.h | 80 + Common/inc/msg_interface.h | 60 + Common/inc/phy_macro.h | 85 + Common/inc/phy_msg_func.h | 45 + Common/inc/phy_struct.h | 37 + Common/inc/task_define.h | 62 + Common/inc/trace.h | 41 + Common/inc/type_define.h | 46 + Common/src/common_func.s.c | 307 + Common/src/common_vars.s.c | 214 + Common/src/log_interface.s.c | 164 + Common/src/msg_interface.s.c | 287 + Common/src/phy_msg_func.s.c | 161 + Config/Receiver_Sync_First_cfg_dm0.dat | 432 + Config/Receiver_Sync_cfg_dm0.dat | 432 + Inc/ape_interface.h | 689 + Inc/drv_ape.h | 666 + Inc/drv_cpri_csu.h | 156 + Inc/drv_jesd_csu.h | 162 + Inc/drv_rfm.h | 533 + Inc/err_num.h | 14 + Inc/msg_transfer_layer.h | 87 + Inc/osp_ape.h | 262 + Inc/osp_interface.h | 192 + Inc/osp_rfm.h | 110 + Inc/rfm_interface.h | 657 + Interface/interface_fapi_tasks.h | 140 + Interface/interface_rec_sync2_rec_symb.h | 21 + .../interface_rec_sync2_rec_sync_first.h | 16 + Lib/MicroLib/.gitkeep | 0 Lib/OspLib/libape_spu.a | Bin 0 -> 342114 bytes Lib/OspLib/libecs_rfm0.a | Bin 0 -> 109768 bytes Lib/OspLib/libecs_rfm_spu0.a | Bin 0 -> 176236 bytes Makefile | 238 + MicroCode/ByteCopy/Makefile | 7 + MicroCode/ByteCopy/inc/ByteCopy.h | 7 + MicroCode/ByteCopy/inc/ConfigByteCopy.dat | 54 + MicroCode/ByteCopy/inc/TestByteCopyInput.dat | 72 + .../ByteCopy/src/mpu0/ByteCopyAsm.m0.asm | 36 + MicroCode/ByteCopy/src/spu/ByteCopy.s.c | 13 + MicroCode/ByteCopy/src/spu/main.s.c | 41 + MicroCode/Makefile | 14 + MicroCode/MpuAsmInc/.gitkeep | 0 MicroCode/MpuAsmInc/Makefile | 7 + MicroCode/SlidingCorrelation/Makefile | 7 + .../inc/ConfigSlidingCorrelation.dat | 143 + .../inc/ConfigSlidingCorrelationSecond.dat | 143 + .../inc/Inputdata1_part1.dat | 31233 ++++++++++++++++ .../inc/Inputdata1_part2.dat | 31232 +++++++++++++++ .../inc/Inputdata2_part1.dat | 31233 ++++++++++++++++ .../inc/Inputdata2_part2.dat | 31232 +++++++++++++++ .../inc/SlidingCorrelation.h | 8 + .../inc/SlidingCorrelationSecond.h | 8 + .../src/mpu0/SlidingCorrelationAsm.m0.asm | 232 + .../mpu0/SlidingCorrelationSecondAsm.m0.asm | 251 + .../src/spu/SlidingCorrelation.s.c | 14 + .../src/spu/SlidingCorrelationSecond.s.c | 14 + MicroCode/SlidingCorrelation/src/spu/main.s.c | 117 + MicroCode/SyncVer/Makefile | 7 + MicroCode/SyncVer/inc/ConfigSyncVer.dat | 143 + MicroCode/SyncVer/inc/Inputdata1_part1.dat | 31233 ++++++++++++++++ MicroCode/SyncVer/inc/Inputdata1_part2.dat | 31232 +++++++++++++++ MicroCode/SyncVer/inc/Inputdata2_part1.dat | 31233 ++++++++++++++++ MicroCode/SyncVer/inc/Inputdata2_part2.dat | 31232 +++++++++++++++ MicroCode/SyncVer/inc/SyncVer.h | 8 + MicroCode/SyncVer/src/mpu0/SyncVerAsm.m0.asm | 234 + MicroCode/SyncVer/src/spu/SyncVer.s.c | 13 + MicroCode/SyncVer/src/spu/main.s.c | 117 + MicroCode/libmakefile.txt | 7 + Platform/build/ecs_rfm_spu1.out | Bin 0 -> 1431484 bytes Platform/build/libape_spu.a | Bin 0 -> 342114 bytes Platform/build/libecs_rfm_spu0.a | Bin 0 -> 176236 bytes Test/inc/Test_Func.h | 28 + Test/src/Test_Func.s.c | 398 + Test/src/Test_Receiver.s.c | 51 + compile.sh | 3 + template_receiver/.config | 183 + 166 files changed, 275410 insertions(+) create mode 100644 .gitignore create mode 100644 .vscode/c_cpp_properties.json create mode 100644 .vscode/settings.json create mode 100644 APE4/ApeCommon/inc/ape_common.h create mode 100644 APE4/ApeCommon/src/ape_common.s.c create mode 100644 APE4/ApeTask/inc/Fucp_Ape0_slot_ind.h create mode 100644 APE4/ApeTask/src/Fucp_Ape0_Init.s.c create mode 100644 APE4/ApeTask/src/Fucp_Ape0_slot_ind.s.c create mode 100644 APE4/Makefile create mode 100644 APE4/MpuAsmInc/.gitkeep create mode 100644 APE5/ApeCommon/inc/ape_common.h create mode 100644 APE5/ApeCommon/src/ape_common.s.c create mode 100644 APE5/ApeTask/src/Fucp_Ape1_Init.s.c create mode 100644 APE5/Makefile create mode 100644 APE5/MpuAsmInc/.gitkeep create mode 100644 APE6/ApeCommon/inc/ape_common.h create mode 100644 APE6/ApeCommon/src/ape_common.s.c create mode 100644 APE6/ApeTask/src/Fucp_Ape2_Init.s.c create mode 100644 APE6/Makefile create mode 100644 APE6/MpuAsmInc/.gitkeep create mode 100644 APE7/ApeCommon/inc/ape_common.h create mode 100644 APE7/ApeCommon/src/ape_common.s.c create mode 100644 APE7/ApeTask/src/Fucp_Ape3_Init.s.c create mode 100644 APE7/Makefile create mode 100644 APE7/MpuAsmInc/.gitkeep create mode 100644 APELib/MicroLib/libLDPCEncoding.a create mode 100644 APELib/MicroLib/libLdpcDecBG1AllZc.a create mode 100644 APELib/MicroLib/libLdpcDecBG2.a create mode 100644 APELib/MicroLib/libPolarDeBitIL.a create mode 100644 APELib/MicroLib/libPolarDeBitSelect.a create mode 100644 APELib/MicroLib/libPolarDeSubBlockIL.a create mode 100644 APELib/MicroLib/libPolarDecoding.a create mode 100644 APELib/MicroLib/libPolarEncoding.a create mode 100644 APELib/Receiver_bit/inc/receiver_bit_func.h create mode 100644 APELib/Receiver_bit/inc/receiver_bit_macro.h create mode 100644 APELib/Receiver_bit/inc/receiver_bit_struct.h create mode 100644 APELib/Receiver_bit/src/receiver_Bit_Init.s.c create mode 100644 APELib/Receiver_bit/src/receiver_Bit_Proc.s.c create mode 100644 APELib/Receiver_bit/src/receiver_Bit_Task.s.c create mode 100644 APELib/Receiver_bit/src/receiver_Bit_Var.s.c create mode 100644 APELib/Receiver_symb/inc/receiver_symb_func.h create mode 100644 APELib/Receiver_symb/inc/receiver_symb_macro.h create mode 100644 APELib/Receiver_symb/inc/receiver_symb_struct.h create mode 100644 APELib/Receiver_symb/src/receiver_Symb_Init.s.c create mode 100644 APELib/Receiver_symb/src/receiver_Symb_Proc.s.c create mode 100644 APELib/Receiver_symb/src/receiver_Symb_Task.s.c create mode 100644 APELib/Receiver_symb/src/receiver_Symb_Var.s.c create mode 100644 APELib/Receiver_sync/inc/receiver_sync_func.h create mode 100644 APELib/Receiver_sync/inc/receiver_sync_macro.h create mode 100644 APELib/Receiver_sync/inc/receiver_sync_struct.h create mode 100644 APELib/Receiver_sync/inc/receiver_sync_vars.h create mode 100644 APELib/Receiver_sync/src/receiver_Sync_Init.s.c create mode 100644 APELib/Receiver_sync/src/receiver_Sync_Proc.s.c create mode 100644 APELib/Receiver_sync/src/receiver_Sync_Task.s.c create mode 100644 APELib/Receiver_sync/src/receiver_Sync_Var.s.c create mode 100644 APELib/Receiver_sync_first/inc/receiver_sync_first_func.h create mode 100644 APELib/Receiver_sync_first/inc/receiver_sync_first_macro.h create mode 100644 APELib/Receiver_sync_first/inc/receiver_sync_first_struct.h create mode 100644 APELib/Receiver_sync_first/inc/receiver_sync_first_vars.h create mode 100644 APELib/Receiver_sync_first/src/receiver_Sync_First_Init.s.c create mode 100644 APELib/Receiver_sync_first/src/receiver_Sync_First_Proc.s.c create mode 100644 APELib/Receiver_sync_first/src/receiver_Sync_First_Var.s.c create mode 100644 APELib/TestTask/inc/Frame_test.h create mode 100644 APELib/TestTask/src/Frame_test.s.c create mode 100644 Common/Makefile create mode 100644 Common/Scripts/ECS_RFM-spu0-noCache.ld create mode 100644 Common/Scripts/ECS_RFM-spu1-noCache.ld create mode 100644 Common/Scripts/ape0-Cache128-noMPUC-dynamic.ld create mode 100644 Common/Scripts/ape0-Cache128-noMPUC.ld create mode 100644 Common/Scripts/ape1-Cache128-noMPUC-dynamic.ld create mode 100644 Common/Scripts/ape1-Cache128-noMPUC.ld create mode 100644 Common/Scripts/ape2-Cache128-noMPUC-dynamic.ld create mode 100644 Common/Scripts/ape2-Cache128-noMPUC.ld create mode 100644 Common/Scripts/ape3-Cache128-noMPUC-dynamic.ld create mode 100644 Common/Scripts/ape3-Cache128-noMPUC.ld create mode 100644 Common/Scripts/ape4-Cache128-noMPUC-dynamic.ld create mode 100644 Common/Scripts/ape4-Cache128-noMPUC.ld create mode 100644 Common/Scripts/ape5-Cache128-noMPUC-dynamic.ld create mode 100644 Common/Scripts/ape5-Cache128-noMPUC.ld create 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create mode 100644 Common/src/msg_interface.s.c create mode 100644 Common/src/phy_msg_func.s.c create mode 100644 Config/Receiver_Sync_First_cfg_dm0.dat create mode 100644 Config/Receiver_Sync_cfg_dm0.dat create mode 100644 Inc/ape_interface.h create mode 100644 Inc/drv_ape.h create mode 100644 Inc/drv_cpri_csu.h create mode 100644 Inc/drv_jesd_csu.h create mode 100644 Inc/drv_rfm.h create mode 100644 Inc/err_num.h create mode 100644 Inc/msg_transfer_layer.h create mode 100644 Inc/osp_ape.h create mode 100644 Inc/osp_interface.h create mode 100644 Inc/osp_rfm.h create mode 100644 Inc/rfm_interface.h create mode 100644 Interface/interface_fapi_tasks.h create mode 100644 Interface/interface_rec_sync2_rec_symb.h create mode 100644 Interface/interface_rec_sync2_rec_sync_first.h create mode 100644 Lib/MicroLib/.gitkeep create mode 100644 Lib/OspLib/libape_spu.a create mode 100644 Lib/OspLib/libecs_rfm0.a create mode 100644 Lib/OspLib/libecs_rfm_spu0.a create mode 100644 Makefile create mode 100644 MicroCode/ByteCopy/Makefile create mode 100644 MicroCode/ByteCopy/inc/ByteCopy.h create mode 100644 MicroCode/ByteCopy/inc/ConfigByteCopy.dat create mode 100644 MicroCode/ByteCopy/inc/TestByteCopyInput.dat create mode 100644 MicroCode/ByteCopy/src/mpu0/ByteCopyAsm.m0.asm create mode 100644 MicroCode/ByteCopy/src/spu/ByteCopy.s.c create mode 100644 MicroCode/ByteCopy/src/spu/main.s.c create mode 100644 MicroCode/Makefile create mode 100644 MicroCode/MpuAsmInc/.gitkeep create mode 100644 MicroCode/MpuAsmInc/Makefile create mode 100644 MicroCode/SlidingCorrelation/Makefile create mode 100644 MicroCode/SlidingCorrelation/inc/ConfigSlidingCorrelation.dat create mode 100644 MicroCode/SlidingCorrelation/inc/ConfigSlidingCorrelationSecond.dat create mode 100644 MicroCode/SlidingCorrelation/inc/Inputdata1_part1.dat create mode 100644 MicroCode/SlidingCorrelation/inc/Inputdata1_part2.dat create mode 100644 MicroCode/SlidingCorrelation/inc/Inputdata2_part1.dat create mode 100644 MicroCode/SlidingCorrelation/inc/Inputdata2_part2.dat create mode 100644 MicroCode/SlidingCorrelation/inc/SlidingCorrelation.h create mode 100644 MicroCode/SlidingCorrelation/inc/SlidingCorrelationSecond.h create mode 100644 MicroCode/SlidingCorrelation/src/mpu0/SlidingCorrelationAsm.m0.asm create mode 100644 MicroCode/SlidingCorrelation/src/mpu0/SlidingCorrelationSecondAsm.m0.asm create mode 100644 MicroCode/SlidingCorrelation/src/spu/SlidingCorrelation.s.c create mode 100644 MicroCode/SlidingCorrelation/src/spu/SlidingCorrelationSecond.s.c create mode 100644 MicroCode/SlidingCorrelation/src/spu/main.s.c create mode 100644 MicroCode/SyncVer/Makefile create mode 100644 MicroCode/SyncVer/inc/ConfigSyncVer.dat create mode 100644 MicroCode/SyncVer/inc/Inputdata1_part1.dat create mode 100644 MicroCode/SyncVer/inc/Inputdata1_part2.dat create mode 100644 MicroCode/SyncVer/inc/Inputdata2_part1.dat create mode 100644 MicroCode/SyncVer/inc/Inputdata2_part2.dat create mode 100644 MicroCode/SyncVer/inc/SyncVer.h create mode 100644 MicroCode/SyncVer/src/mpu0/SyncVerAsm.m0.asm create mode 100644 MicroCode/SyncVer/src/spu/SyncVer.s.c create mode 100644 MicroCode/SyncVer/src/spu/main.s.c create mode 100644 MicroCode/libmakefile.txt create mode 100644 Platform/build/ecs_rfm_spu1.out create mode 100644 Platform/build/libape_spu.a create mode 100644 Platform/build/libecs_rfm_spu0.a create mode 100644 Test/inc/Test_Func.h create mode 100644 Test/src/Test_Func.s.c create mode 100644 Test/src/Test_Receiver.s.c create mode 100644 compile.sh create mode 100644 template_receiver/.config diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..16df34a --- /dev/null +++ b/.gitignore @@ -0,0 +1,18 @@ +*.o +*.d +*.cproject +*.project +.settings/ +Debug/ +*.out +*.a +!*.config +!Platform/build/** +/.metadata/ +/APE0/Receiver_sync/** +/APE0/TestTask/** +/APE1/Receiver_symb/** +/APE2/Receiver_bit/** +/APE3/Receiver_sync_first/** +!/APELib/MicroLib/** +!/Lib/OspLib/** \ No newline at end of file diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json new file mode 100644 index 0000000..c5bc0a0 --- /dev/null +++ b/.vscode/c_cpp_properties.json @@ -0,0 +1,20 @@ +{ + "configurations": [ + { + "name": "Linux", + "includePath": [ + "${default}", + "${workspaceFolder}/**", + "${workspaceFolder}/APELib/Receiver_sync_first/**", + "/home/ittc/Software/mcstudio/toolchain/include/ucp2/llvm", + "/home/ittc/Software/mcstudio/toolchain/include/ucp2/newlib" + ], + "defines": [], + "compilerPath": "/usr/bin/clang", + "cStandard": "c11", + "cppStandard": "c++11", + "intelliSenseMode": "linux-clang-x64" + } + ], + "version": 4 +} \ No newline at end of file diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000..de61348 --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,22 @@ +{ + "files.associations": { + "receiver_func.h": "c", + "common.h": "c", + "receiver_struct.h": "c", + "receiver_sync_func.h": "c", + "receiver_sync_struct.h": "c", + "ape_common.h": "c", + "frame_test.h": "c", + "trace.h": "c", + "*.dat": "c", + "type_define.h": "c", + "bytecopy.h": "c", + "slidingcorrelation.h": "c", + "interface_rec_sync2_rec_sync_first.h": "c", + "receiver_symb_func.h": "c", + "ape_interface.h": "c", + "receiver_sync_first_func.h": "c", + "receiver_sync_first_struct.h": "c", + "msg_interface.h": "c" + } +} \ No newline at end of file diff --git a/APE4/ApeCommon/inc/ape_common.h b/APE4/ApeCommon/inc/ape_common.h new file mode 100644 index 0000000..b446b44 --- /dev/null +++ b/APE4/ApeCommon/inc/ape_common.h @@ -0,0 +1,37 @@ +/****************************************************************** + * @file ape_common.h + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +#ifndef APE_COMMON_H +#define APE_COMMON_H + +/**************************include******************************/ +#include "type_define.h" + +#define APE_DM0 DM0 +#define APE_DM1 DM1 +#define APE_DM2 DM2 +#define APE_DM3 DM3 +#define __APE_DM0 __DM0 +#define __APE_DM1 __DM1 +#define __APE_DM2 __DM2 +#define __APE_DM3 __DM3 + +#define DM_TO_CSU_ADDR(addr) (((uint32_t)(addr)) - 0x100000) +#define IM_TO_CSU_ADDR(addr) ((uint32_t)(addr)) + +#define DMA_TAG_G2L 0 +#define DMA_TAG_L2G 1 +#define DMA_TAG_G2G 2 +#define DMA_TAG_CHAIN 3 + +extern __APE_DM3 v16s32 SVRReg; + +#endif diff --git a/APE4/ApeCommon/src/ape_common.s.c b/APE4/ApeCommon/src/ape_common.s.c new file mode 100644 index 0000000..fbc0a3c --- /dev/null +++ b/APE4/ApeCommon/src/ape_common.s.c @@ -0,0 +1,37 @@ +/****************************************************************** + * @file ape_common.c + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "log_interface.h" +/**************************function******************************/ + + +//微码配置寄存器 +__APE_DM3 v16s32 SVRReg = { + 0, 0, 0, 0, + 0x40, 0, 0, 0, + 0xff00ff, 0, 0, 0x0000, + 0xffff, 0x6, 0, 0 +}; + +//__APE_DM3 v16s32 SVRReg = { +// 0, 0, 0, 0, +// 0x40, 0, 0, 0, +// 0xff00ff, 0, 0, 0, +// 0x003fffff, 0x6, 0, 0 +//}; +//uint32_t g_dma_tag_g2l = DMA_TAG_G2L; +uint32_t g_dma_tag_l2g = DMA_TAG_L2G; +//自定义空间的log头定义 +__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2]; +//静态申请log空间 +__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确 \ No newline at end of file diff --git a/APE4/ApeTask/inc/Fucp_Ape0_slot_ind.h b/APE4/ApeTask/inc/Fucp_Ape0_slot_ind.h new file mode 100644 index 0000000..5e1b99c --- /dev/null +++ b/APE4/ApeTask/inc/Fucp_Ape0_slot_ind.h @@ -0,0 +1,17 @@ +#ifndef FUCP_APE0_SLOT_IND_H +#define FUCP_APE0_SLOT_IND_H + +#include "ape_interface.h" + +#include "ape_common.h" +#include "task_define.h" +#include "log_interface.h" +#include "msg_interface.h" +#include "msg_transfer_layer.h" +#include "drv_ape.h" +#include "trace.h" + +void Slot_ind_Task(); + +#endif + diff --git a/APE4/ApeTask/src/Fucp_Ape0_Init.s.c b/APE4/ApeTask/src/Fucp_Ape0_Init.s.c new file mode 100644 index 0000000..93e2581 --- /dev/null +++ b/APE4/ApeTask/src/Fucp_Ape0_Init.s.c @@ -0,0 +1,132 @@ +#ifndef IDE_TEST +/****************************************************************** + * @file Ucp_Ape0_Init.s.c + * @brief: [file description] + * @author: guicheng.liu + * @Date 2022年1月25日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月25日 guicheng.liu create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "ape_interface.h" + +#include "ape_common.h" +#include "Fucp_Ape0_slot_ind.h" +#include "task_define.h" +#include "log_interface.h" +#include "Frame_test.h" +#include "receiver_sync_func.h" +#include "trace.h" + + + +/**************************function******************************/ +/*************************************************************************/ +/* 收到消息后创建任务 */ +void ape0_event_task(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + + + osp_task_info_ex mgr_task1 = + {PHY_TASK_SLOT_IND, "Slot_ind", PHY_TASK_PRI_SLOT_IND, 2048, OSP_TIMER_TYPE, 0x000, 0x3FF, 0, NULLPTR, (OSP_TASKENTRY_FUNC)Slot_ind_Task}; + osp_task_info_ex mgr_task2 = + {PHY_TASK_RECIEVER_SYNC, "Receiver_Sync", PHY_TASK_PRI_RECEIVER_SYNC, 2048, OSP_TIMER_TYPE, 0x000, 0x3FF, 50, (OSP_TASKINIT_FUNC)Receiver_Sync_Init, (OSP_TASKENTRY_FUNC)Receiver_Sync_Task}; + osp_task_info_ex mgr_task3 = + {PHY_TASK_TEST, "Test_Task", PHY_TASK_PRI_TEST, 4096, OSP_TIMER_TYPE, 0x000, 0x3FF, 50, NULL, (OSP_TASKENTRY_FUNC)Test_Task}; + // osp_task_info_ex mgr_task4 = + // {PHY_TASK_RECIEVER_FIRST_SYNC, "Receiver_Sync_First_Sync", PHY_TASK_PRI_RECEIVER_FIRST_SYNC, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, NULLPTR, (OSP_TASKENTRY_FUNC)Receiver_First_Sync_Proc}; + + TRACE(TRACE_INIT_ADDR, 2, 1); + + + osp_task_create(&mgr_task1); + osp_task_create(&mgr_task2); + // osp_task_create(&mgr_task4); +// osp_task_create(&mgr_task3); + + TRACE(TRACE_INIT_ADDR, 3, 1); + LOG_INFO_S("APE0 finish task create!\n"); + + osp_timer_sync(1); + TRACE(TRACE_INIT_ADDR, 4, 1); + return; +} + +/* 收到消息后删除任务 */ +void ape0_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + //osp_del_task_all(NR_SCS_30K); + + + return; +} + + +/*! +* @brief: 在Phy init的时候注册物理层管理任务 +* @author: guicheng.liu +* @Date: 2022年2月28日 +*/ +void Phy_Task_Ape0_Reg() +{ + osp_task_info_ex ape0_event_task_info = {50, "ape0_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event_task}; + osp_task_info_ex ape0_event_task_info_del = {51, "ape0_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape0_event_task_del}; + + osp_task_create(&ape0_event_task_info); + osp_task_create(&ape0_event_task_info_del); + + return ; + + + +} + + +/*! +* @brief: Phy初始化函数, 每个APE上都需要有一个名字相同的函数 +* @author: guicheng.liu +* @Date: 2022年1月25日 +*/ +void phy_init() +{ + TRACE(TRACE_INIT_ADDR, 1, 1); + // //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成 + log_level_e log_level = INFO; + log_pool_init(); + set_log_level(log_level); + + //memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t)); + + Phy_Task_Ape0_Reg(); + TRACE(TRACE_INIT_ADDR, 5, 1); +} + +/*! +* @brief: 初始化时钟 +* @author: guicheng.liu +* @Date: 2022年11月3日 +*/ +// void soc_drv_init() +// { +// SET_CLK_CFG_EMU();//八个核中的一个核调用 +// phy_para_init(0, 0);//八个核中的一个核调用 +// ecs_sram_init();//八个核中的一个核调用 +// ape_stc_init();//八个核中的一个核调用 +// } + +// /*! +// * @brief: 初始化stc timer等 +// * @author: guicheng.liu +// * @Date: 2022年11月3日 +// */ +// void tod_int_init() +// { +// stc_timer_todint_init();//八个核中的一个核调用 +// } +#endif diff --git a/APE4/ApeTask/src/Fucp_Ape0_slot_ind.s.c b/APE4/ApeTask/src/Fucp_Ape0_slot_ind.s.c new file mode 100644 index 0000000..0afe1ec --- /dev/null +++ b/APE4/ApeTask/src/Fucp_Ape0_slot_ind.s.c @@ -0,0 +1,41 @@ +#include +#include "Fucp_Ape0_slot_ind.h" +#include "phy_struct.h" + +__APE_DM0 uint32_t g_slot_ind_dm0[8] = {0}; //32byte + +void Slot_ind_Task() +{ + uint16_t start_slot = TIME_SLOT(); + uint16_t start_us = TIME_US(); + uint16_t end_slot; + uint16_t end_us; + RUN_CNT(TRACE_SLOTIND_ADDR, 0); + + + uint32_t cur_sfn = get_rx_nr_sfn(); + uint32_t cur_slot = get_rx_nr_slot(); + + uint32_t msg_general_len = sizeof(L1GeneralMsgHdr_t); + uint32_t payload_len = sizeof(L1SlotIndication_t); + uint32_t msg_len = sizeof(L1MsgHdr_t) + msg_general_len + payload_len; + + L1MsgHdr_t *msg_header = (L1MsgHdr_t *)g_slot_ind_dm0; + L1GeneralMsgHdr_t* msg_general_hdr = (L1GeneralMsgHdr_t*)(msg_header + 1); + L1SlotIndication_t *slot_ind = (L1SlotIndication_t *)(msg_general_hdr + 1); + + + msg_header->msgNum = 1; + msg_header->rev = 0; + + msg_general_hdr->msgId = FAPI_SLOT_INDICATION; + msg_general_hdr->msgSize = payload_len; + + osp_phy_msg_send((char*)msg_header, msg_len); + + RUN_CNT(TRACE_SLOTIND_ADDR, 1); + end_slot = TIME_SLOT(); + end_us = TIME_US(); + + TRACE_MAX(TRACE_SLOTIND_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) ); +} \ No newline at end of file diff --git a/APE4/Makefile b/APE4/Makefile new file mode 100644 index 0000000..2e957b5 --- /dev/null +++ b/APE4/Makefile @@ -0,0 +1,144 @@ +############################ +# mpu libs need to link to this APE, could be specified by user + MICRO_CODE_LIBS:=ByteCopy SyncVer +############################ +# tool path, could be specified by user +#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin +#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb +#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0 +#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd +#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib +#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2 + +UCP_HOME=${MaPU_TC_HOME}/bin/ucp2 +GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb +SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator +OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb +LPATH1=${MaPU_TC_HOME}/lib/ucp2/release +LPATH2=${MaPU_TC_HOME}/lib/ucp2/release +############################# +export UCP_HOME +############################ +# varaibles for project construction using new ucp toolchain +# DO NOT MODIFY +SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c") +SPU_C_FILES:=$(shell find . -name "*.s.c") +SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES}) +SPU_ASM_FILES:=$(shell find . -name "*.s.asm") +SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES}) +MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm") +MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES}) +##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d) +INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d) +INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d) +INC_DIRS+= ../Interface +INC_DIRS+= ../Inc +INC_DIRS+=$(shell find ./ -name inc -type d) +override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS}) +override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST))) +override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR)))) +ifeq (${mpu}, dyn) + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape0-Cache128-noMPUC-dynamic.ld) +else + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape0-Cache128-noMPUC.ld) +endif +EXE_FILE_NAME=${PROJECT_NAME}.out +#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS}) +LINK_L_OPTION=-L../Lib +LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS}) +APE_LINK_L_OPTION=-L../Lib +APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME}) +ifneq (${MICRO_CODE_LIBS}, ) + LINK_MPU_L_OPTION=-L../Lib/MicroLib + LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS}) +else + LINK_MPU_L_OPTION:= + LINK_MPU_l_OPTION:= +endif +LINK_PLATFORM_L_OPTION=-L../Lib/OspLib +#LINK_PLATFORM_l_OPTION:=-lape +ifeq (${tb}, PDSCH) + LINK_PLATFORM_l_OPTION:= +else ifeq (${tb}, DL) + LINK_PLATFORM_l_OPTION:= +else + LINK_PLATFORM_l_OPTION:=-lape_spu +endif + +# this flag could be specified by user, default to build debug info +debug:=0 +export debug +ifeq (${debug},1) + ASM_DEBUG_FLAGS:=-g + C_DEBUG_FLAGS:=-O0 -g +else ifeq (${debug},3) + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O3 +else + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O2 +endif +############################ + +all: + @for dir in ${COMMON_LIB_DIRS}; do \ + make LIB -C $${dir} ; \ + done + +%.s.c.o: %.s.c + @${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION} + +%.s.asmb.o: %.s.asm + @${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS} + +${EXE_FILE_NAME}: + ${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \ + $(LPATH1)/crtend.o \ + ${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \ + ${LINK_L_OPTION} ${LINK_l_OPTION} \ + ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \ + ${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \ + -L$(LPATH2) \ + -L$(LPATH1) -lm -lc -lgloss \ + -lclang_rt.builtins-ucps2 -T ${LD_SCRIPT} + +APP: ${EXE_FILE_NAME} + +lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} + ar rcs -o $@ ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@ + +LIB: lib${PROJECT_NAME}.a + +Dis: APP + ${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; + #${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; + +# direct simulaton without gui +DSim: APP + @${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \ + echo "software simulation finished" + +DSimGDB: APP + @${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \ + echo "software simulation finished" +GDB: APP + @${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \ + echo "software GDB finished" + +clean: + @for dir in ${COMMON_LIB_DIRS}; do \ + if [ -e $${dir} ]; then \ + make clean -C $${dir} ; \ + fi;\ + done + @rm -rf *.lof *.out *.map *.mmap *.sct *.tab *.s *.dis *~ *.def *.xml + @rm -rf *.daidir work *.lib++ *~ *.rc csrc *.key filelist.f simv* + @rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log + @rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif + @rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt Receiver_sync TestTask + @rm -rf Executed_Pipeline.csv + @find . -name "*.o" -exec rm -f {} \; + @find . -name "*.a" -exec rm -f {} \; + +.PRECIOUS: %.s.c.o +.PHONY: APP clean all diff --git a/APE4/MpuAsmInc/.gitkeep b/APE4/MpuAsmInc/.gitkeep new file mode 100644 index 0000000..e69de29 diff --git a/APE5/ApeCommon/inc/ape_common.h b/APE5/ApeCommon/inc/ape_common.h new file mode 100644 index 0000000..d2f451f --- /dev/null +++ b/APE5/ApeCommon/inc/ape_common.h @@ -0,0 +1,37 @@ +/****************************************************************** + * @file ape_common.h + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +#ifndef APE_COMMON_H +#define APE_COMMON_H + +/**************************include******************************/ +#include "type_define.h" + +#define APE_DM0 DM7 +#define APE_DM1 DM6 +#define APE_DM2 DM5 +#define APE_DM3 DM4 +#define __APE_DM0 __DM7 +#define __APE_DM1 __DM6 +#define __APE_DM2 __DM5 +#define __APE_DM3 __DM4 + +#define DM_TO_CSU_ADDR(addr) ((uint32_t)(addr)) +#define IM_TO_CSU_ADDR(addr) (((uint32_t)(addr)) + 0x200000) + +#define DMA_TAG_G2L 16 +#define DMA_TAG_L2G 17 +#define DMA_TAG_G2G 18 +#define DMA_TAG_CHAIN 19 + +extern __APE_DM3 v16s32 SVRReg; + +#endif diff --git a/APE5/ApeCommon/src/ape_common.s.c b/APE5/ApeCommon/src/ape_common.s.c new file mode 100644 index 0000000..2e0e42a --- /dev/null +++ b/APE5/ApeCommon/src/ape_common.s.c @@ -0,0 +1,32 @@ +/****************************************************************** + * @file ape_common.c + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "log_interface.h" +/**************************function******************************/ + +//微码配置寄存器 +__APE_DM3 v16s32 SVRReg = { + 0, 0, 0, 0, + 0x40, 0, 0, 0, + 0xff00ff, 0, 0, 0x0000, + 0xffff, 0x6, 0, 0 +}; + +//uint32_t g_dma_tag_g2l = DMA_TAG_G2L; +uint32_t g_dma_tag_l2g = DMA_TAG_L2G; +////自定义空间的log头定义 +__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2]; +//静态申请log空间 +__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确 + + diff --git a/APE5/ApeTask/src/Fucp_Ape1_Init.s.c b/APE5/ApeTask/src/Fucp_Ape1_Init.s.c new file mode 100644 index 0000000..a6d95eb --- /dev/null +++ b/APE5/ApeTask/src/Fucp_Ape1_Init.s.c @@ -0,0 +1,107 @@ +#ifndef IDE_TEST +/****************************************************************** + * @file Ucp_Ape1_Init.s.c + * @brief: [file description] + * @author: guicheng.liu + * @Date 2022年1月25日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月25日 guicheng.liu create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "ape_interface.h" +#include "receiver_symb_func.h" +#include "ape_common.h" +#include "task_define.h" +#include "log_interface.h" +#include "trace.h" + +/**************************function******************************/ +/*! +* @brief: 在Phy init的时候注册物理层管理任务 +* @author: guicheng.liu +* @Date: 2022年2月28日 +*/ +/* 收到消息后创建任务 */ +void ape1_event_task(uint32_t addr, uint32_t size) +{ + osp_task_info_ex mgr_task = + {PHY_TASK_RECIEVER_SYMB, "Receiver_Symb", PHY_TASK_PRI_RECEIVER_SYMB, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, (OSP_TASKINIT_FUNC)Receiver_Symb_Init, (OSP_TASKENTRY_FUNC)Receiver_Symb_Task}; + + osp_task_create(&mgr_task); + osp_timer_sync(1); + LOG_INFO_S("APE1 finish task create!\n"); + return; +} + + + +/* 收到消息后删除任务 */ +void ape1_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + //osp_del_task_all(NR_SCS_30K); + + + return; +} + + +/*! +* @brief: 在Phy init的时候注册物理层管理任务 +* @author: guicheng.liu +* @Date: 2022年2月28日 +*/ +void Phy_Task_Ape1_Reg() +{ + osp_task_info_ex ape1_event_task_info = {50, "ape1_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task}; + osp_task_info_ex ape1_event_task_info_del = {51, "ape1_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task_del}; + + osp_task_create(&ape1_event_task_info); + osp_task_create(&ape1_event_task_info_del); + + return ; + + + +} + + +///*! +//* @brief: Phy初始化函数, 每个APE上都需要有一个名字相同的函数 +//* @author: guicheng.liu +//* @Date: 2022年1月25日 +//*/ +void phy_init() +{ + //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成 + log_level_e log_level = INFO; + log_pool_init(); + set_log_level(log_level); + + //memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t)); + Phy_Task_Ape1_Reg(); +} + +///*! +//* @brief: 给osp调用，勿删 +//* @author: guicheng.liu +//* @Date: 2022年11月3日 +//*/ +//void soc_drv_init() +//{ +//} +// +///*! +//* @brief: 给osp调用，勿删 +//* @author: guicheng.liu +//* @Date: 2022年11月3日 +//*/ +//void tod_int_init() +//{ +//} + +#endif \ No newline at end of file diff --git a/APE5/Makefile b/APE5/Makefile new file mode 100644 index 0000000..9ea01b9 --- /dev/null +++ b/APE5/Makefile @@ -0,0 +1,144 @@ +############################ +# mpu libs need to link to this APE, could be specified by user + MICRO_CODE_LIBS:= + ############################ +# tool path, could be specified by user +#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin +#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb +#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0 +#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd +#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib +#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2 + +UCP_HOME=${MaPU_TC_HOME}/bin/ucp2 +GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb +SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator +OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb +LPATH1=${MaPU_TC_HOME}/lib/ucp2/release +LPATH2=${MaPU_TC_HOME}/lib/ucp2/release +############################# +export UCP_HOME +############################ +# varaibles for project construction using new ucp toolchain +# DO NOT MODIFY +SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c") +SPU_C_FILES:=$(shell find . -name "*.s.c") +SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES}) +SPU_ASM_FILES:=$(shell find . -name "*.s.asm") +SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES}) +MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm") +MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES}) +##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d) +INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d) +INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d) +INC_DIRS+= ../Interface +INC_DIRS+= ../Inc +INC_DIRS+=$(shell find ./ -name inc -type d) +override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS}) +override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST))) +override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR)))) +ifeq (${mpu}, dyn) + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape1-Cache128-noMPUC-dynamic.ld) +else + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape1-Cache128-noMPUC.ld) +endif +EXE_FILE_NAME=${PROJECT_NAME}.out +#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS}) +LINK_L_OPTION=-L../Lib +LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS}) +APE_LINK_L_OPTION=-L../Lib +APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME}) +ifneq (${MICRO_CODE_LIBS}, ) + LINK_MPU_L_OPTION=-L../Lib/MicroLib + LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS}) +else + LINK_MPU_L_OPTION:= + LINK_MPU_l_OPTION:= +endif +LINK_PLATFORM_L_OPTION=-L../Lib/OspLib +#LINK_PLATFORM_l_OPTION:=-lape +ifeq (${tb}, PDSCH) + LINK_PLATFORM_l_OPTION:= +else ifeq (${tb}, DL) + LINK_PLATFORM_l_OPTION:= +else + LINK_PLATFORM_l_OPTION:=-lape_spu +endif + +# this flag could be specified by user, default to build debug info +debug:=0 +export debug +ifeq (${debug},1) + ASM_DEBUG_FLAGS:=-g + C_DEBUG_FLAGS:=-O0 -g +else ifeq (${debug},3) + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O3 +else + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O2 +endif +############################ + +all: + @for dir in ${COMMON_LIB_DIRS}; do \ + make LIB -C $${dir} ; \ + done + +%.s.c.o: %.s.c + @${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION} + +%.s.asmb.o: %.s.asm + @${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS} + +${EXE_FILE_NAME}: + ${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \ + $(LPATH1)/crtend.o \ + ${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \ + ${LINK_L_OPTION} ${LINK_l_OPTION} \ + ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \ + ${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \ + -L$(LPATH2) \ + -L$(LPATH1) -lm -lc -lgloss \ + -lclang_rt.builtins-ucps2 -T ${LD_SCRIPT} + +APP: ${EXE_FILE_NAME} + +lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} + ar rcs -o $@ ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@ + +LIB: lib${PROJECT_NAME}.a + +Dis: APP + ${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; + #${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; + +# direct simulaton without gui +DSim: APP + @${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \ + echo "software simulation finished" + +DSimGDB: APP + @${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \ + echo "software simulation finished" +GDB: APP + @${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \ + echo "software GDB finished" + +clean: + @for dir in ${COMMON_LIB_DIRS}; do \ + if [ -e $${dir} ]; then \ + make clean -C $${dir} ; \ + fi;\ + done + @rm -rf *.lof *.out *.map *.mmap *.sct *.tab *.s *.dis *~ *.def *.xml + @rm -rf *.daidir work *.lib++ *~ *.rc csrc *.key filelist.f simv* + @rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log + @rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif + @rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt Receiver_symb + @rm -rf Executed_Pipeline.csv + @find . -name "*.o" -exec rm -f {} \; + @find . -name "*.a" -exec rm -f {} \; + +.PRECIOUS: %.s.c.o +.PHONY: APP clean all diff --git a/APE5/MpuAsmInc/.gitkeep b/APE5/MpuAsmInc/.gitkeep new file mode 100644 index 0000000..e69de29 diff --git a/APE6/ApeCommon/inc/ape_common.h b/APE6/ApeCommon/inc/ape_common.h new file mode 100644 index 0000000..b446b44 --- /dev/null +++ b/APE6/ApeCommon/inc/ape_common.h @@ -0,0 +1,37 @@ +/****************************************************************** + * @file ape_common.h + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +#ifndef APE_COMMON_H +#define APE_COMMON_H + +/**************************include******************************/ +#include "type_define.h" + +#define APE_DM0 DM0 +#define APE_DM1 DM1 +#define APE_DM2 DM2 +#define APE_DM3 DM3 +#define __APE_DM0 __DM0 +#define __APE_DM1 __DM1 +#define __APE_DM2 __DM2 +#define __APE_DM3 __DM3 + +#define DM_TO_CSU_ADDR(addr) (((uint32_t)(addr)) - 0x100000) +#define IM_TO_CSU_ADDR(addr) ((uint32_t)(addr)) + +#define DMA_TAG_G2L 0 +#define DMA_TAG_L2G 1 +#define DMA_TAG_G2G 2 +#define DMA_TAG_CHAIN 3 + +extern __APE_DM3 v16s32 SVRReg; + +#endif diff --git a/APE6/ApeCommon/src/ape_common.s.c b/APE6/ApeCommon/src/ape_common.s.c new file mode 100644 index 0000000..5949223 --- /dev/null +++ b/APE6/ApeCommon/src/ape_common.s.c @@ -0,0 +1,32 @@ +/****************************************************************** + * @file ape_common.c + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "log_interface.h" +/**************************function******************************/ + + + +//微码配置寄存器 +__APE_DM3 v16s32 SVRReg = { + 0, 0, 0, 0, + 0x40, 0, 0, 0, + 0xff00ff, 0, 0, 0x0000, + 0xffff, 0x6, 0, 0 +}; + +//uint32_t g_dma_tag_g2l = DMA_TAG_G2L; +uint32_t g_dma_tag_l2g = DMA_TAG_L2G; +//自定义空间的log头定义 +__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2]; +//静态申请log空间 +__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确 diff --git a/APE6/ApeTask/src/Fucp_Ape2_Init.s.c b/APE6/ApeTask/src/Fucp_Ape2_Init.s.c new file mode 100644 index 0000000..1869091 --- /dev/null +++ b/APE6/ApeTask/src/Fucp_Ape2_Init.s.c @@ -0,0 +1,107 @@ +#ifndef IDE_TEST +/****************************************************************** + * @file Ucp_Ape1_Init.s.c + * @brief: [file description] + * @author: guicheng.liu + * @Date 2022年1月25日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月25日 guicheng.liu create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "ape_interface.h" +#include "receiver_bit_func.h" +#include "ape_common.h" +#include "task_define.h" +#include "log_interface.h" +#include "trace.h" + +/**************************function******************************/ +/*! +* @brief: 在Phy init的时候注册物理层管理任务 +* @author: guicheng.liu +* @Date: 2022年2月28日 +*/ +/* 收到消息后创建任务 */ +void ape2_event_task(uint32_t addr, uint32_t size) +{ + osp_task_info_ex mgr_task = + {PHY_TASK_RECIEVER_BIT, "Receiver_Bit", PHY_TASK_PRI_RECEIVER_BIT, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, (OSP_TASKINIT_FUNC)Receiver_Bit_Init, (OSP_TASKENTRY_FUNC)Receiver_Bit_Task}; + + osp_task_create(&mgr_task); + osp_timer_sync(1); + LOG_INFO_S("APE2 finish task create!\n"); + return; +} + + + +/* 收到消息后删除任务 */ +void ape2_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + //osp_del_task_all(NR_SCS_30K); + + + return; +} + + +/*! +* @brief: 在Phy init的时候注册物理层管理任务 +* @author: guicheng.liu +* @Date: 2022年2月28日 +*/ +void Phy_Task_Ape2_Reg() +{ + osp_task_info_ex ape2_event_task_info = {50, "ape2_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event_task}; + osp_task_info_ex ape2_event_task_info_del = {51, "ape2_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape2_event_task_del}; + + osp_task_create(&ape2_event_task_info); + osp_task_create(&ape2_event_task_info_del); + + return ; + + + +} + + +///*! +//* @brief: Phy初始化函数, 每个APE上都需要有一个名字相同的函数 +//* @author: guicheng.liu +//* @Date: 2022年1月25日 +//*/ +void phy_init() +{ + //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成 + log_level_e log_level = INFO; + log_pool_init(); + set_log_level(log_level); + + //memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t)); + Phy_Task_Ape2_Reg(); +} + +///*! +//* @brief: 给osp调用，勿删 +//* @author: guicheng.liu +//* @Date: 2022年11月3日 +//*/ +//void soc_drv_init() +//{ +//} +// +///*! +//* @brief: 给osp调用，勿删 +//* @author: guicheng.liu +//* @Date: 2022年11月3日 +//*/ +//void tod_int_init() +//{ +//} + +#endif \ No newline at end of file diff --git a/APE6/Makefile b/APE6/Makefile new file mode 100644 index 0000000..27c1413 --- /dev/null +++ b/APE6/Makefile @@ -0,0 +1,144 @@ +############################ +# mpu libs need to link to this APE, could be specified by user + MICRO_CODE_LIBS:= +############################ +# tool path, could be specified by user +#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin +#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb +#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0 +#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd +#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib +#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2 + +UCP_HOME=${MaPU_TC_HOME}/bin/ucp2 +GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb +SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator +OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb +LPATH1=${MaPU_TC_HOME}/lib/ucp2/release +LPATH2=${MaPU_TC_HOME}/lib/ucp2/release +############################# +export UCP_HOME +############################ +# varaibles for project construction using new ucp toolchain +# DO NOT MODIFY +SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c") +SPU_C_FILES:=$(shell find . -name "*.s.c") +SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES}) +SPU_ASM_FILES:=$(shell find . -name "*.s.asm") +SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES}) +MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm") +MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES}) +##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d) +INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d) +INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d) +INC_DIRS+= ../Interface +INC_DIRS+= ../Inc +INC_DIRS+=$(shell find ./ -name inc -type d) +override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS}) +override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST))) +override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR)))) +ifeq (${mpu}, dyn) + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape2-Cache128-noMPUC-dynamic.ld) +else + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape2-Cache128-noMPUC.ld) +endif +EXE_FILE_NAME=${PROJECT_NAME}.out +#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS}) +LINK_L_OPTION=-L../Lib +LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS}) +APE_LINK_L_OPTION=-L../Lib +APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME}) +ifneq (${MICRO_CODE_LIBS}, ) + LINK_MPU_L_OPTION=-L../Lib/MicroLib + LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS}) +else + LINK_MPU_L_OPTION:= + LINK_MPU_l_OPTION:= +endif +LINK_PLATFORM_L_OPTION=-L../Lib/OspLib +#LINK_PLATFORM_l_OPTION:=-lape +ifeq (${tb}, PDSCH) + LINK_PLATFORM_l_OPTION:= +else ifeq (${tb}, DL) + LINK_PLATFORM_l_OPTION:= +else + LINK_PLATFORM_l_OPTION:=-lape_spu +endif + +# this flag could be specified by user, default to build debug info +debug:=0 +export debug +ifeq (${debug},1) + ASM_DEBUG_FLAGS:=-g + C_DEBUG_FLAGS:=-O0 -g +else ifeq (${debug},3) + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O3 +else + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O2 +endif +############################ + +all: + @for dir in ${COMMON_LIB_DIRS}; do \ + make LIB -C $${dir} ; \ + done + +%.s.c.o: %.s.c + @${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION} + +%.s.asmb.o: %.s.asm + @${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS} + +${EXE_FILE_NAME}: + ${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \ + $(LPATH1)/crtend.o \ + ${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \ + ${LINK_L_OPTION} ${LINK_l_OPTION} \ + ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \ + ${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \ + -L$(LPATH2) \ + -L$(LPATH1) -lm -lc -lgloss \ + -lclang_rt.builtins-ucps2 -T ${LD_SCRIPT} + +APP: ${EXE_FILE_NAME} + +lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} + ar rcs -o $@ ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@ + +LIB: lib${PROJECT_NAME}.a + +Dis: APP + ${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; + #${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; + +# direct simulaton without gui +DSim: APP + @${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \ + echo "software simulation finished" + +DSimGDB: APP + @${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \ + echo "software simulation finished" +GDB: APP + @${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \ + echo "software GDB finished" + +clean: + @for dir in ${COMMON_LIB_DIRS}; do \ + if [ -e $${dir} ]; then \ + make clean -C $${dir} ; \ + fi;\ + done + @rm -rf *.lof *.out *.map *.mmap *.sct *.tab *.s *.dis *~ *.def *.xml + @rm -rf *.daidir work *.lib++ *~ *.rc csrc *.key filelist.f simv* + @rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log + @rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif + @rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt Receiver_bit + @rm -rf Executed_Pipeline.csv + @find . -name "*.o" -exec rm -f {} \; + @find . -name "*.a" -exec rm -f {} \; + +.PRECIOUS: %.s.c.o +.PHONY: APP clean all diff --git a/APE6/MpuAsmInc/.gitkeep b/APE6/MpuAsmInc/.gitkeep new file mode 100644 index 0000000..e69de29 diff --git a/APE7/ApeCommon/inc/ape_common.h b/APE7/ApeCommon/inc/ape_common.h new file mode 100644 index 0000000..d2f451f --- /dev/null +++ b/APE7/ApeCommon/inc/ape_common.h @@ -0,0 +1,37 @@ +/****************************************************************** + * @file ape_common.h + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +#ifndef APE_COMMON_H +#define APE_COMMON_H + +/**************************include******************************/ +#include "type_define.h" + +#define APE_DM0 DM7 +#define APE_DM1 DM6 +#define APE_DM2 DM5 +#define APE_DM3 DM4 +#define __APE_DM0 __DM7 +#define __APE_DM1 __DM6 +#define __APE_DM2 __DM5 +#define __APE_DM3 __DM4 + +#define DM_TO_CSU_ADDR(addr) ((uint32_t)(addr)) +#define IM_TO_CSU_ADDR(addr) (((uint32_t)(addr)) + 0x200000) + +#define DMA_TAG_G2L 16 +#define DMA_TAG_L2G 17 +#define DMA_TAG_G2G 18 +#define DMA_TAG_CHAIN 19 + +extern __APE_DM3 v16s32 SVRReg; + +#endif diff --git a/APE7/ApeCommon/src/ape_common.s.c b/APE7/ApeCommon/src/ape_common.s.c new file mode 100644 index 0000000..2e0e42a --- /dev/null +++ b/APE7/ApeCommon/src/ape_common.s.c @@ -0,0 +1,32 @@ +/****************************************************************** + * @file ape_common.c + * @brief: [file description] + * @author: xuekun.zhang + * @Date 2022年1月11日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月11日 xuekun.zhang create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "log_interface.h" +/**************************function******************************/ + +//微码配置寄存器 +__APE_DM3 v16s32 SVRReg = { + 0, 0, 0, 0, + 0x40, 0, 0, 0, + 0xff00ff, 0, 0, 0x0000, + 0xffff, 0x6, 0, 0 +}; + +//uint32_t g_dma_tag_g2l = DMA_TAG_G2L; +uint32_t g_dma_tag_l2g = DMA_TAG_L2G; +////自定义空间的log头定义 +__APE_DM3 uint32_t g_ape_log_header[(LOG_TOTAL_HDR_SIZE + 3)>>2]; +//静态申请log空间 +__APE_DM3 uint32_t g_ape_log_static_buf[LOG_DM_BUF_NUM * LOG_MAX_LEN_WORD];//log 宏定义修改，原宏名表达不准确 + + diff --git a/APE7/ApeTask/src/Fucp_Ape3_Init.s.c b/APE7/ApeTask/src/Fucp_Ape3_Init.s.c new file mode 100644 index 0000000..5ffcb4d --- /dev/null +++ b/APE7/ApeTask/src/Fucp_Ape3_Init.s.c @@ -0,0 +1,107 @@ +#ifndef IDE_TEST +/****************************************************************** + * @file Ucp_Ape1_Init.s.c + * @brief: [file description] + * @author: guicheng.liu + * @Date 2022年1月25日 + * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. + * Change_date Owner Change_content + * 2022年1月25日 guicheng.liu create file + +*****************************************************************/ + +/**************************include******************************/ +#include +#include "ape_interface.h" +#include "ape_common.h" +#include "task_define.h" +#include "log_interface.h" +#include "trace.h" +#include "receiver_sync_first_func.h" + +/**************************function******************************/ +/*! +* @brief: 在Phy init的时候注册物理层管理任务 +* @author: guicheng.liu +* @Date: 2022年2月28日 +*/ +/* 收到消息后创建任务 */ +void ape1_event_task(uint32_t addr, uint32_t size) +{ + osp_task_info_ex mgr_task = + {PHY_TASK_RECIEVER_FIRST_SYNC, "Receiver_Sync_First_Sync", PHY_TASK_PRI_RECEIVER_FIRST_SYNC, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, (OSP_TASKINIT_FUNC)Receiver_Sync_First_Init, (OSP_TASKENTRY_FUNC)Receiver_First_Sync_Proc}; + + osp_task_create(&mgr_task); + osp_timer_sync(1); + LOG_INFO_S("APE3 finish task create!\n"); + return; +} + + + +/* 收到消息后删除任务 */ +void ape1_event_task_del(uint32_t addr, uint32_t size) +{ + uint32_t ape_id = get_core_id(); + //osp_del_task_all(NR_SCS_30K); + + + return; +} + + +/*! +* @brief: 在Phy init的时候注册物理层管理任务 +* @author: guicheng.liu +* @Date: 2022年2月28日 +*/ +void Phy_Task_Ape1_Reg() +{ + osp_task_info_ex ape1_event_task_info = {50, "ape1_event_task1", 50, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task}; + osp_task_info_ex ape1_event_task_info_del = {51, "ape1_event_task_del1", 51, 2048, OSP_EVENT_TYPE, 0, 0, 0, NULL, (OSP_TASKENTRY_FUNC)ape1_event_task_del}; + + osp_task_create(&ape1_event_task_info); + osp_task_create(&ape1_event_task_info_del); + + return ; + + + +} + + +///*! +//* @brief: Phy初始化函数, 每个APE上都需要有一个名字相同的函数 +//* @author: guicheng.liu +//* @Date: 2022年1月25日 +//*/ +void phy_init() +{ + //初始化函数里面尽量不要输出log，因为可能初始化时msg_transfer_open还未完成 + log_level_e log_level = INFO; + log_pool_init(); + set_log_level(log_level); + + //memset(&g_phy_cell_cfg, 0, sizeof(phy_cell_cfg_t)); + Phy_Task_Ape1_Reg(); +} + +///*! +//* @brief: 给osp调用，勿删 +//* @author: guicheng.liu +//* @Date: 2022年11月3日 +//*/ +//void soc_drv_init() +//{ +//} +// +///*! +//* @brief: 给osp调用，勿删 +//* @author: guicheng.liu +//* @Date: 2022年11月3日 +//*/ +//void tod_int_init() +//{ +//} + +#endif \ No newline at end of file diff --git a/APE7/Makefile b/APE7/Makefile new file mode 100644 index 0000000..1f87942 --- /dev/null +++ b/APE7/Makefile @@ -0,0 +1,145 @@ +############################ +# mpu libs need to link to this APE, could be specified by user + MICRO_CODE_LIBS:=ByteCopy SlidingCorrelation + ############################ +# tool path, could be specified by user +#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin +#GDB_PATH=/opt/sdk/ucp2.0_sdk/simulator/ucp2-gdb +#SIM_PATH=/opt/sdk/ucp2.0_sdk/simulator/UCP_Simulator_V2.0 +#OPENOCD_GDB_PATH=/opt/sdk/ucp_sdk/apc_tools_ima/bin/gdb-ucps-openocd +#LPATH1=/opt/sdk/ucp2.0_sdk/lib/ucps2/lib +#LPATH2=/opt/sdk/ucp2.0_sdk/lib/clang/12.0.0/lib/ucps2 + +UCP_HOME=${MaPU_TC_HOME}/bin/ucp2 +GDB_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-gdb +SIM_PATH=${MaPU_TC_HOME}/bin/ucp2/ucp2-simulator +OPENOCD_GDB_PATH=${MaPU_TC_HOME}/ucps-openocd/ucps-openocd-gdb +LPATH1=${MaPU_TC_HOME}/lib/ucp2/release +LPATH2=${MaPU_TC_HOME}/lib/ucp2/release +############################# +export UCP_HOME +############################ +# varaibles for project construction using new ucp toolchain +# DO NOT MODIFY +SPU_MAIN_C_FILE:=$(shell find . -name "app.s.c") +SPU_C_FILES:=$(shell find . -name "*.s.c") +SPU_C_OBJECT_FILES:=$(subst .c,.c.o,${SPU_C_FILES}) +SPU_ASM_FILES:=$(shell find . -name "*.s.asm") +SPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${SPU_ASM_FILES}) +MPU_ASM_FILES:=$(shell find . -name "*.m.asm" -or -name "*.m0.asm" -or -name "*.m1.asm") +MPU_ASM_OBJECT_FILES:=$(subst .asm,.asmb.o,${MPU_ASM_FILES}) +##INC_DIRS+=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d) +INC_DIRS+=$(shell find ../${MICRO_CODE_DIR} -name inc -type d) +INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d) +INC_DIRS+= ../Interface +INC_DIRS+= ../Inc +INC_DIRS+=$(shell find ./ -name inc -type d) +override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS}) +override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST))) +override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR)))) +ifeq (${mpu}, dyn) + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape3-Cache128-noMPUC-dynamic.ld) +else + LD_SCRIPT=$(shell realpath ${PWD}/Common/Scripts/ape3-Cache128-noMPUC.ld) +endif +EXE_FILE_NAME=${PROJECT_NAME}.out +#LINK_L_OPTION:=$(patsubst %,-L../%,${COMMON_LIB_DIRS}) +LINK_L_OPTION=-L../Lib +LINK_l_OPTION:=$(patsubst %,-l%,${COMMON_LIB_DIRS}) +APE_LINK_L_OPTION=-L../Lib +APE_LINK_l_OPTION:=$(patsubst %,-l%,${PROJECT_NAME}) +ifneq (${MICRO_CODE_LIBS}, ) + LINK_MPU_L_OPTION=-L../Lib/MicroLib + LINK_MPU_l_OPTION:=$(patsubst %,-l%,${MICRO_CODE_LIBS}) +else + LINK_MPU_L_OPTION:= + LINK_MPU_l_OPTION:= +endif +LINK_PLATFORM_L_OPTION=-L../Lib/OspLib +#LINK_PLATFORM_l_OPTION:=-lape +ifeq (${tb}, PDSCH) + LINK_PLATFORM_l_OPTION:= +else ifeq (${tb}, DL) + LINK_PLATFORM_l_OPTION:= +else + LINK_PLATFORM_l_OPTION:=-lape_spu +endif + +# this flag could be specified by user, default to build debug info +debug:=0 +export debug +ifeq (${debug},1) + ASM_DEBUG_FLAGS:=-g + C_DEBUG_FLAGS:=-O0 -g +else ifeq (${debug},3) + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O3 +else + ASM_DEBUG_FLAGS:= + C_DEBUG_FLAGS:=-O2 +endif +############################ + +all: + @for dir in ${COMMON_LIB_DIRS}; do \ + make LIB -C $${dir} ; \ + done + +%.s.c.o: %.s.c + @${UCP_HOME}/clang --target=ucps2 -c ${INC_DIRS_OPTION} $^ -o $@ ${C_DEBUG_FLAGS} ${TEST_OPTION} ${PRJ_OPTION} ${MIM_DYNAMIC_OPTION} ${DIAG_STACK_OPTION} + +%.s.asmb.o: %.s.asm + @${UCP_HOME}/llvm-mc -arch=ucps2 -filetype=obj $^ -o $@ ${ASM_DEBUG_FLAGS} + +${EXE_FILE_NAME}: + ${UCP_HOME}/ld.lld -m ucps2 -o $@ $(LPATH1)/crt0.o \ + $(LPATH1)/crtend.o \ + ${APE_LINK_L_OPTION} ${APE_LINK_l_OPTION} \ + ${LINK_L_OPTION} ${LINK_l_OPTION} \ + ${LINK_MPU_L_OPTION} ${LINK_MPU_l_OPTION} \ + ${LINK_PLATFORM_L_OPTION} ${LINK_PLATFORM_l_OPTION} \ + -L$(LPATH2) \ + -L$(LPATH1) -lm -lc -lgloss \ + -lclang_rt.builtins-ucps2 -T ${LD_SCRIPT} + +APP: ${EXE_FILE_NAME} + +lib%.a: ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} + ar rcs -o $@ ${SPU_C_OBJECT_FILES} ${SPU_ASM_OBJECT_FILES} ${MPU_ASM_OBJECT_FILES} && chmod +x $@ + +LIB: lib${PROJECT_NAME}.a + +Dis: APP + ${UCP_HOME}/llvm-objdump -d --start-address=0x40000 --line-numbers --source ${EXE_FILE_NAME} > app.s.dis; + #${UCP_HOME}/llvm-objdump -arch-name=ucpm2 -no-show-raw-insn -no-leading-addr -d ${EXE_FILE_NAME} -start-address=0x40000 -stop-address=0x60000 > app.m.dis; + +# direct simulaton without gui +DSim: APP + @${SIM_PATH} -m=printChar -elf-file=${EXE_FILE_NAME} -ores -allcf && \ + echo "software simulation finished" + +DSimGDB: APP + @${SIM_PATH} -m=gdb -elf-file=${EXE_FILE_NAME} -allcf -exec-path=./ -port=1234&& \ + echo "software simulation finished" +GDB: APP + @${OPENOCD_GDB_PATH} ./${EXE_FILE_NAME}&& \ + echo "software GDB finished" + +clean: + @for dir in ${COMMON_LIB_DIRS}; do \ + if [ -e $${dir} ]; then \ + make clean -C $${dir} ; \ + fi;\ + done + @rm -rf *.lof *.out *.map *.mmap *.sct *.tab *.s *.dis *~ *.def *.xml + @rm -rf *.daidir work *.lib++ *~ *.rc csrc *.key filelist.f simv* + @rm -rf DVEfiles vc_hdrs.h urgReport *.rc *.vpd *.log + @rm -rf *.sym *.data *.bak slot-*.txt PC_Line*.txt codes.txt UCPMDis.txt *.saif + @rm -rf Simulator_*.dat saif.cmds Run_Cycle.dat *.elf ucps_pc_code.txt + @rm -rf Executed_Pipeline.csv + @rm -rf Receiver_sync_first + @find . -name "*.o" -exec rm -f {} \; + @find . -name "*.a" -exec rm -f {} \; + +.PRECIOUS: %.s.c.o +.PHONY: APP clean all diff --git a/APE7/MpuAsmInc/.gitkeep b/APE7/MpuAsmInc/.gitkeep new file mode 100644 index 0000000..e69de29 diff --git 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+ + //data读入 + //获取源数据地址 + time_data_ddr_ptr = (uint32_t)*param_ptr; + time_data_length = (uint32_t)((*(param_ptr + 1) +7)>>3);//计算byte数 + ape_csu_task_lookup(DMA_TAG_G2L, 1); + + // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)time_data_ddr_ptr, + // (uint64_t)DM_TO_CSU_ADDR(time_data_dm0_ptr), + // time_data_length, + // DMA_TAG_G2L, + // 0); + + + + // //计算结果搬移到外存 + // temp_u32 = 1000;//计算byte数 + // WAIT_MPU_STOP; + // ape_csu_task_lookup(DMA_TAG_G2L, 1); + + // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(time_data_dm0_ptr), + // (uint64_t)res_ptr, + // temp_u32, + // DMA_TAG_L2G, + // 1); + + return; +} diff --git a/APELib/Receiver_bit/src/receiver_Bit_Task.s.c b/APELib/Receiver_bit/src/receiver_Bit_Task.s.c new file mode 100644 index 0000000..d8b6552 --- /dev/null +++ b/APELib/Receiver_bit/src/receiver_Bit_Task.s.c @@ -0,0 +1,184 @@ +/****************************************************************** + * @file Receiver_Bit_Task.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#include "receiver_bit_func.h" + + +#define ADDR_ALIGN(addr, val) ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) + + + /*! + * @brief: Receiver任务处理流程 + * @author: HUOHUO + * @Date: 2024年4月20日 + */ +void Receiver_Bit_Task(void* msg_ptr, uint32_t msg_len) +{ + uint16_t start_slot = TIME_SLOT(); + uint16_t start_us = TIME_US(); + uint16_t end_slot; + uint16_t end_us; + RUN_CNT(TRACE_RECEIVER_BIT_ADDR, 0); + + + int32_t *receiver_bit_malloc_dm0_ptr; + int32_t *receiver_bit_malloc_dm1_ptr; + int32_t *receiver_bit_malloc_dm2_ptr; + int32_t *receiver_bit_malloc_dm3_ptr; + uint32_t receiver_bit_param_ptr; + + int32_t *receiver_bit_temp_dm0_ptr; + int32_t *receiver_bit_temp_dm1_ptr; + int32_t *receiver_bit_temp_dm2_ptr; + int32_t *receiver_bit_temp_dm3_ptr; + //0 空间回收 + dmalloc_trim(0, APE_DM0); + dmalloc_trim(0, APE_DM1); + dmalloc_trim(0, APE_DM2); + dmalloc_trim(0, APE_DM3); + + //1. DM0空间申请 + receiver_bit_malloc_dm0_ptr = dmemalign_unit(0x4000, 131072, APE_DM0); //申请了128KiB 首地址16k对齐 + if (NULLPTR == receiver_bit_malloc_dm0_ptr) + { + LOG_ERROR_S("rec sync DM0 fail\n"); + return; + } + + //2. DM0空间分配 + //DM0第一段，调度信息 + receiver_bit_param_ptr = (uint32_t)receiver_bit_malloc_dm0_ptr; + const uint32_t receiver_param_len = 50; //还没设计，随便设置的值50word + if(0 < receiver_param_len) + { + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)RECEIVER_BIT_CFG_BASE, + (uint64_t)DM_TO_CSU_ADDR(receiver_bit_param_ptr), + receiver_param_len * 4, + DMA_TAG_G2L, + 0); + } + //DM0第二段，微码相关空间 + receiver_bit_config_dm0_ptr = (uint32_t *)(ADDR_ALIGN(receiver_bit_param_ptr + receiver_param_len * 4, 12)); //起始地址4k对齐 + if(0 < g_receiver_bit_table_param.receiver_bit_config0_length) + { + ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_bit_table_param.receiver_bit_config0_ddr_ptr, + (uint64_t)DM_TO_CSU_ADDR(receiver_bit_config_dm0_ptr), + g_receiver_bit_table_param.receiver_bit_config0_length, + DMA_TAG_G2L, + 0); + } + //DM0第三段，堆空间 + receiver_bit_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm0_ptr + \ + g_receiver_bit_table_param.receiver_bit_config0_length, 12);//起始地址4k对齐 + + //3. DM3空间申请 + receiver_bit_malloc_dm3_ptr = dmemalign_unit(0x4000, 196608, APE_DM3);//申请了192KiB 首地址16k对齐 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_bit_malloc_dm3_ptr) + { + LOG_ERROR_S("rec sync DM3 fail\n"); + dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0); + return; + } + //DM3第一段，微码相关空间 + receiver_bit_config_dm3_ptr = (uint32_t*)receiver_bit_malloc_dm3_ptr; + ape_csu_task_lookup(DMA_TAG_G2L, 1); + if(0 < g_receiver_bit_table_param.receiver_bit_config3_length) + { + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)g_receiver_bit_table_param.receiver_bit_config3_ddr_ptr, + (uint64_t)DM_TO_CSU_ADDR(receiver_bit_config_dm3_ptr), + g_receiver_bit_table_param.receiver_bit_config3_length, + DMA_TAG_G2L, + 0); + } + //DM3第二段，堆空间 + receiver_bit_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm3_ptr + \ + g_receiver_bit_table_param.receiver_bit_config3_length, 14); //起始地址16k对齐 + //4. DM1空间申请 + receiver_bit_malloc_dm1_ptr = dmemalign_unit(0x4000, 131072, APE_DM1);//申请了128KiB 首地址16k对齐 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_bit_malloc_dm1_ptr) + { + LOG_ERROR_S("rec sync DM1 fail\n"); + dfree_unit(receiver_bit_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0); + return; + } + //DM1第一段，微码配置文件 + receiver_bit_config_dm1_ptr = (uint32_t *)receiver_bit_malloc_dm1_ptr; + //调用DMA函数，将微码配置文件搬入DM1，DDR->DM1 + if(0 < g_receiver_bit_table_param.receiver_bit_config1_length) + { + ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_bit_table_param.receiver_bit_config1_ddr_ptr, + (uint64_t)DM_TO_CSU_ADDR(receiver_bit_config_dm1_ptr), + g_receiver_bit_table_param.receiver_bit_config1_length, + DMA_TAG_G2L, + 0); + } + //DM1第二段，堆空间 + receiver_bit_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm1_ptr + \ + g_receiver_bit_table_param.receiver_bit_config1_length, 12); //起始地址4k对齐 + //5. DM2空间申请 + receiver_bit_malloc_dm2_ptr = dmemalign_unit(0x4000, 196608, APE_DM2);//申请了192KiB 首地址16k对齐 + //若空间申请失败，释放已申请的空间，再退出任务 + if (NULLPTR == receiver_bit_malloc_dm2_ptr) + { + LOG_ERROR_S("rec sync DM2 fail\n"); + dfree_unit(receiver_bit_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0); + dfree_unit(receiver_bit_malloc_dm1_ptr, APE_DM1); + return; + } + //DM2第一段，微码配置文件 + receiver_bit_config_dm2_ptr = (uint32_t *)receiver_bit_malloc_dm2_ptr; + + //调用DMA函数，微码配置文件搬移，DDR->DM2 + ape_csu_task_lookup(DMA_TAG_G2L, 1); + if(0 < g_receiver_bit_table_param.receiver_bit_config2_length) + { + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint32_t)g_receiver_bit_table_param.receiver_bit_config2_ddr_ptr, + DM_TO_CSU_ADDR(receiver_bit_config_dm2_ptr), + g_receiver_bit_table_param.receiver_bit_config2_length, + DMA_TAG_G2L, + 1); + } + //DM2第二段，堆空间 + receiver_bit_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_bit_config_dm2_ptr + \ + g_receiver_bit_table_param.receiver_bit_config2_length, 14); //起始地址16k对齐 + + TRACE(TRACE_RECEIVER_BIT_ADDR, 3, 1); + + //6. 计算流程 + Receiver_Bit_Proc( + (uint32_t*)receiver_bit_param_ptr, + receiver_bit_temp_dm0_ptr, + receiver_bit_temp_dm1_ptr, + receiver_bit_temp_dm2_ptr, + receiver_bit_temp_dm3_ptr + ); + TRACE(TRACE_RECEIVER_BIT_ADDR, 3, 99); + + + + //8. 内存释放 + dfree_unit(receiver_bit_malloc_dm2_ptr, APE_DM2); + dfree_unit(receiver_bit_malloc_dm1_ptr, APE_DM1); + dfree_unit(receiver_bit_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_bit_malloc_dm0_ptr, APE_DM0); + + + TRACE(TRACE_RECEIVER_BIT_ADDR, 3, 100); + RUN_CNT(TRACE_RECEIVER_BIT_ADDR, 1); + end_slot = TIME_SLOT(); + end_us = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_BIT_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) ); + + return; +} diff --git a/APELib/Receiver_bit/src/receiver_Bit_Var.s.c b/APELib/Receiver_bit/src/receiver_Bit_Var.s.c new file mode 100644 index 0000000..96ebed2 --- /dev/null +++ b/APELib/Receiver_bit/src/receiver_Bit_Var.s.c @@ -0,0 +1,17 @@ +/****************************************************************** + * @file receiver_var.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file +*****************************************************************/ +#include "receiver_bit_struct.h" + +//Receiver微码配置空间offset结构体 +receiver_bit_table_param_t g_receiver_bit_table_param; +uint32_t *receiver_bit_config_dm0_ptr = NULLPTR; +uint32_t *receiver_bit_config_dm1_ptr = NULLPTR; +uint32_t *receiver_bit_config_dm2_ptr = NULLPTR; +uint32_t *receiver_bit_config_dm3_ptr = NULLPTR; \ No newline at end of file diff --git a/APELib/Receiver_symb/inc/receiver_symb_func.h b/APELib/Receiver_symb/inc/receiver_symb_func.h new file mode 100644 index 0000000..23fe3d0 --- /dev/null +++ b/APELib/Receiver_symb/inc/receiver_symb_func.h @@ -0,0 +1,47 @@ +/****************************************************************** + * @file receiver_symb_func.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file +*****************************************************************/ +#ifndef RECEIVER_SYMB_FUNC_H +#define RECEIVER_SYMB_FUNC_H +/****************************include*****************************/ +#include "common.h" +#include "mem_def.h" +#include "phy_macro.h" +#include "ape_interface.h" +#include "receiver_symb_macro.h" +#include "receiver_symb_struct.h" +#include "ape_common.h" +#include "drv_ape.h" +#include "log_interface.h" +#include "msg_interface.h" +#include "osp_ape.h" +#include "task_define.h" +#include "trace.h" +//include mpu header files + + + +//微码配置空间偏移结构体 +extern receiver_symb_table_param_t g_receiver_symb_table_param; +extern uint32_t *receiver_symb_config_dm0_ptr; +extern uint32_t *receiver_symb_config_dm1_ptr; +extern uint32_t *receiver_symb_config_dm2_ptr; +extern uint32_t *receiver_symb_config_dm3_ptr; + +void Receiver_Symb_Init(); +void Receiver_Symb_Task(receiver_sync2symb_t* msg_ptr, uint32_t msg_len); +void Receiver_Symb_Proc( + uint32_t* param_ptr, + int32_t* temp_dm0_ptr, + int32_t* temp_dm1_ptr, + int32_t* temp_dm2_ptr, + int32_t* temp_dm3_ptr +); + +#endif diff --git a/APELib/Receiver_symb/inc/receiver_symb_macro.h b/APELib/Receiver_symb/inc/receiver_symb_macro.h new file mode 100644 index 0000000..32e31d7 --- /dev/null +++ b/APELib/Receiver_symb/inc/receiver_symb_macro.h @@ -0,0 +1,22 @@ +/****************************************************************** + * @file receiver_symb_macro.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file +*****************************************************************/ +#ifndef RECEIVER_SYMB_MACRO_H +#define RECEIVER_SYMB_MACRO_H + +//GENERATE with Generate_receiver_symb_macro_h.m +//DO NOT MODIFY +//======================================================================= +//微码配置空间长度定义，单位为word(4Byte) + + +//SPU查找表各字段长度定义,单位为word(4Byte) + +//======================================================================= +#endif diff --git a/APELib/Receiver_symb/inc/receiver_symb_struct.h b/APELib/Receiver_symb/inc/receiver_symb_struct.h new file mode 100644 index 0000000..2912c5a --- /dev/null +++ b/APELib/Receiver_symb/inc/receiver_symb_struct.h @@ -0,0 +1,50 @@ +/****************************************************************** + * @file receiver_symb_struct.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#ifndef RECEIVER_SYMB_STRUCT_H +#define RECEIVER_SYMB_STRUCT_H +#include "type_define.h" +#include "interface_rec_sync2_rec_symb.h" + +//GENERATE with Generate_receiver_symb_struct_h.m +//DO NOT MODIFY +//======================================================================= +//各微码或查找表偏移及指针定义 +typedef struct receiver_symb_table_param_s +{ + //MPU CONFIG OFFSET + + // 存储微码参数表的ddr基地址和长度 + uint32_t receiver_symb_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址 + uint32_t receiver_symb_config0_length;//receiver DM0微码配置文件ddr长度 + uint32_t receiver_symb_config1_ddr_ptr;//receiver DM1微码配置文件ddr地址 + uint32_t receiver_symb_config1_length;//receiver DM1微码配置文件ddr长度 + uint32_t receiver_symb_config2_ddr_ptr;//receiver DM2微码配置文件ddr地址 + uint32_t receiver_symb_config2_length;//receiver DM2微码配置文件ddr地址 + uint32_t receiver_symb_config3_ddr_ptr;//receiver DM3微码配置文件ddr地址 + uint32_t receiver_symb_config3_length;//receiver DM3微码配置文件ddr地址 + + //SPU查找表在SM中的偏移地址 + + + + // SPU LUT SM基地址和长度 + + +}receiver_symb_table_param_t; + +//TODO:需要接口设计 +typedef struct receiver_symb2bit_s +{ + uint8_t rev[4]; +}receiver_symb2bit_t; + +//======================================================================= +#endif \ No newline at end of file diff --git a/APELib/Receiver_symb/src/receiver_Symb_Init.s.c b/APELib/Receiver_symb/src/receiver_Symb_Init.s.c new file mode 100644 index 0000000..bd1ecbb --- /dev/null +++ b/APELib/Receiver_symb/src/receiver_Symb_Init.s.c @@ -0,0 +1,67 @@ +/****************************************************************** + * @file Receiver_Symb_Init.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#include "receiver_symb_func.h" + + + /*! + * @brief: Receiver任务启动前的初始化工作 + * 初始化全局参数，ddr查找表搬入SM + * @author: HUOHUO + * @Date: 2024年10月30日 + */ +void Receiver_Symb_Init() +{ + int32_t ret; + uint32_t lutDdrAddr,idx; + + //DM0 + + //DM1 + + //DM2 + + //DM3 + + //SM + + + // //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括： + // // 1). 置信度表uint16_t Q_W_Lut[2016] (n-5) + // // 2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5) + // // 3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1) + // // 4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check()) + // // 5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v) + // //获取地址 + // ret = osp_get_cfgfile("nr_puxch_lut_sm.dat", + // (uint32_t *)&lutDdrAddr, + // (int32_t *)&(g_receiver_symb_table_param.pucch_lut_length)); + // g_receiver_symb_table_param.pucch_lut_sm_ptr = SM0_BASE; + // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr, + // (uint64_t)g_receiver_symb_table_param.pucch_lut_sm_ptr, + // g_receiver_symb_table_param.pucch_lut_length, + // DMA_TAG_G2G, + // 1); + + //9. 微码配置文件ddr地址初始化 + ret = osp_get_cfgfile("Receiver_Symb_cfg_dm0.dat", + (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config0_ddr_ptr), + (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config0_length)); + ret = osp_get_cfgfile("Receiver_Symb_cfg_dm1.dat", + (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config1_ddr_ptr), + (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config1_length)); + + ret = osp_get_cfgfile("Receiver_Symb_cfg_dm2.dat", + (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config2_ddr_ptr), + (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config2_length)); + ret = osp_get_cfgfile("Receiver_Symb_cfg_dm3.dat", + (uint32_t *)&(g_receiver_symb_table_param.receiver_symb_config3_ddr_ptr), + (int32_t *)&(g_receiver_symb_table_param.receiver_symb_config3_length)); +} diff --git a/APELib/Receiver_symb/src/receiver_Symb_Proc.s.c b/APELib/Receiver_symb/src/receiver_Symb_Proc.s.c new file mode 100644 index 0000000..bc60da5 --- /dev/null +++ b/APELib/Receiver_symb/src/receiver_Symb_Proc.s.c @@ -0,0 +1,75 @@ +/****************************************************************** + * @file receiver_Proc.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file + +*****************************************************************/ +#include "receiver_symb_func.h" + + /*! + * @brief: Receiver_sync链路处理 + * @author: HUOHUO + * @Date: 2024年10月30日 + */ +void Receiver_Symb_Proc( + uint32_t *param_ptr, + int32_t *temp_dm0_ptr, + int32_t *temp_dm1_ptr, + int32_t *temp_dm2_ptr, + int32_t *temp_dm3_ptr +) +{ + //局部变量定义 + int32_t *cfg_addr; + uint32_t time_data_length; + uint32_t mpu_temp_dm0_ptr; + uint32_t mpu_temp_dm1_ptr; + uint32_t mpu_temp_dm2_ptr; + uint32_t mpu_temp_dm3_ptr; + uint32_t temp_u32; + uint32_t time_data_dm0_ptr = ((((uint32_t)&temp_dm0_ptr[0] + 4095)>>12)<<12); + uint32_t res_ptr = RECEIVER_OUT2; + + //data读入 + //获取源数据地址 + receiver_sync2symb_t* para_dm_ptr = (receiver_sync2symb_t*)param_ptr; + + uint32_t cur_sfn = get_rx_nr_sfn(); + uint32_t cur_slot = get_rx_nr_slot(); + uint32_t cur_time = TIME_US(); + // LOG_ERROR_S("%d %d %d %d %d %d %d 0x%08x 0x%08x %d %d\n", cur_sfn, cur_slot, cur_time, para_dm_ptr->sfn, para_dm_ptr->slot, para_dm_ptr->num_data_section, + // para_dm_ptr->proc_id, para_dm_ptr->data_section0_ptr, para_dm_ptr->data_section1_ptr, para_dm_ptr->data_section0_length, para_dm_ptr->data_section1_length); + + + + + + // //计算结果搬移到外存 + // temp_u32 = 1000;//计算byte数 + // WAIT_MPU_STOP; + // ape_csu_task_lookup(DMA_TAG_G2L, 1); + + // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(time_data_dm0_ptr), + // (uint64_t)res_ptr, + // temp_u32, + // DMA_TAG_L2G, + // 1); + + + //7.核间消息to APE2 + //需要定义结构体 + receiver_symb2bit_t data_send2bit_task; + phy_et_msg_send((uint32_t)(&data_send2bit_task), + sizeof(receiver_symb2bit_t), + UCP4008_KERNEL_INTER, + APE1_CORE_ID, + APE2_CORE_ID, + PHY_TASK_RECIEVER_SYMB, + PHY_TASK_RECIEVER_BIT); + + return; +} diff --git a/APELib/Receiver_symb/src/receiver_Symb_Task.s.c b/APELib/Receiver_symb/src/receiver_Symb_Task.s.c new file mode 100644 index 0000000..be2d886 --- /dev/null +++ b/APELib/Receiver_symb/src/receiver_Symb_Task.s.c @@ -0,0 +1,185 @@ +/****************************************************************** + * @file Receiver_Symb_Task.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#include "receiver_symb_func.h" + + +#define ADDR_ALIGN(addr, val) ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) + + + /*! + * @brief: Receiver任务处理流程 + * @author: HUOHUO + * @Date: 2024年4月20日 + */ +void Receiver_Symb_Task(receiver_sync2symb_t* msg_ptr, uint32_t msg_len) +{ + uint16_t start_slot = TIME_SLOT(); + uint16_t start_us = TIME_US(); + uint16_t end_slot; + uint16_t end_us; + RUN_CNT(TRACE_RECEIVER_SYMB_ADDR, 0); + + + int32_t *receiver_symb_malloc_dm0_ptr; + int32_t *receiver_symb_malloc_dm1_ptr; + int32_t *receiver_symb_malloc_dm2_ptr; + int32_t *receiver_symb_malloc_dm3_ptr; + uint32_t receiver_symb_param_ptr; + + int32_t *receiver_symb_temp_dm0_ptr; + int32_t *receiver_symb_temp_dm1_ptr; + int32_t *receiver_symb_temp_dm2_ptr; + int32_t *receiver_symb_temp_dm3_ptr; + //0 空间回收 + dmalloc_trim(0, APE_DM0); + dmalloc_trim(0, APE_DM1); + dmalloc_trim(0, APE_DM2); + dmalloc_trim(0, APE_DM3); + + //1. DM0空间申请 + receiver_symb_malloc_dm0_ptr = dmemalign_unit(0x4000, 131072, APE_DM0); //申请了128KiB 首地址16k对齐 + if (NULLPTR == receiver_symb_malloc_dm0_ptr) + { + LOG_ERROR_S("rec sync DM0 fail\n"); + return; + } + + //2. DM0空间分配 + //DM0第一段，调度信息 + receiver_symb_param_ptr = (uint32_t)receiver_symb_malloc_dm0_ptr; + const uint32_t receiver_param_len = sizeof(receiver_sync2symb_t); // + if(0 < receiver_param_len) + { + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)msg_ptr, + (uint64_t)DM_TO_CSU_ADDR(receiver_symb_param_ptr), + receiver_param_len, + DMA_TAG_G2L, + 0); + } + //DM0第二段，微码相关空间 + receiver_symb_config_dm0_ptr = (uint32_t *)(ADDR_ALIGN(receiver_symb_param_ptr + receiver_param_len * 4, 12)); //起始地址4k对齐 + if(0 < g_receiver_symb_table_param.receiver_symb_config0_length) + { + ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_symb_table_param.receiver_symb_config0_ddr_ptr, + (uint64_t)DM_TO_CSU_ADDR(receiver_symb_config_dm0_ptr), + g_receiver_symb_table_param.receiver_symb_config0_length, + DMA_TAG_G2L, + 0); + } + //DM0第三段，堆空间 + receiver_symb_temp_dm0_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm0_ptr + \ + g_receiver_symb_table_param.receiver_symb_config0_length, 12);//起始地址4k对齐 + + //3. DM3空间申请 + receiver_symb_malloc_dm3_ptr = dmemalign_unit(0x4000, 196608, APE_DM3);//申请了192KiB 首地址16k对齐 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_symb_malloc_dm3_ptr) + { + LOG_ERROR_S("rec sync DM3 fail\n"); + dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0); + return; + } + //DM3第一段，微码相关空间 + receiver_symb_config_dm3_ptr = (uint32_t*)receiver_symb_malloc_dm3_ptr; + + if(0 < g_receiver_symb_table_param.receiver_symb_config3_length) + { + ape_csu_task_lookup(DMA_TAG_G2L, 1); + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)g_receiver_symb_table_param.receiver_symb_config3_ddr_ptr, + (uint64_t)DM_TO_CSU_ADDR(receiver_symb_config_dm3_ptr), + g_receiver_symb_table_param.receiver_symb_config3_length, + DMA_TAG_G2L, + 0); + } + //DM3第二段，堆空间 + receiver_symb_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm3_ptr + \ + g_receiver_symb_table_param.receiver_symb_config3_length, 14); //起始地址16k对齐 + //4. DM1空间申请 + receiver_symb_malloc_dm1_ptr = dmemalign_unit(0x4000, 131072, APE_DM1);//申请了128KiB 首地址16k对齐 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_symb_malloc_dm1_ptr) + { + LOG_ERROR_S("rec sync DM1 fail\n"); + dfree_unit(receiver_symb_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0); + return; + } + //DM1第一段，微码配置文件 + receiver_symb_config_dm1_ptr = (uint32_t *)receiver_symb_malloc_dm1_ptr; + //调用DMA函数，将微码配置文件搬入DM1，DDR->DM1 + if(0 < g_receiver_symb_table_param.receiver_symb_config1_length) + { + ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)g_receiver_symb_table_param.receiver_symb_config1_ddr_ptr, + (uint64_t)DM_TO_CSU_ADDR(receiver_symb_config_dm1_ptr), + g_receiver_symb_table_param.receiver_symb_config1_length, + DMA_TAG_G2L, + 0); + } + //DM1第二段，堆空间 + receiver_symb_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm1_ptr + \ + g_receiver_symb_table_param.receiver_symb_config1_length, 12); //起始地址4k对齐 + //5. DM2空间申请 + receiver_symb_malloc_dm2_ptr = dmemalign_unit(0x4000, 196608, APE_DM2);//申请了192KiB 首地址16k对齐 + //若空间申请失败，释放已申请的空间，再退出任务 + if (NULLPTR == receiver_symb_malloc_dm2_ptr) + { + LOG_ERROR_S("rec sync DM2 fail\n"); + dfree_unit(receiver_symb_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0); + dfree_unit(receiver_symb_malloc_dm1_ptr, APE_DM1); + return; + } + //DM2第一段，微码配置文件 + receiver_symb_config_dm2_ptr = (uint32_t *)receiver_symb_malloc_dm2_ptr; + + //调用DMA函数，微码配置文件搬移，DDR->DM2 + if(0 < g_receiver_symb_table_param.receiver_symb_config2_length) + { + ape_csu_task_lookup(DMA_TAG_G2L, 1); + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint32_t)g_receiver_symb_table_param.receiver_symb_config2_ddr_ptr, + DM_TO_CSU_ADDR(receiver_symb_config_dm2_ptr), + g_receiver_symb_table_param.receiver_symb_config2_length, + DMA_TAG_G2L, + 1); + } + //DM2第二段，堆空间 + receiver_symb_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_symb_config_dm2_ptr + \ + g_receiver_symb_table_param.receiver_symb_config2_length, 14); //起始地址16k对齐 + + TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 1); + + //6. 计算流程 + Receiver_Symb_Proc( + (uint32_t*)receiver_symb_param_ptr, + receiver_symb_temp_dm0_ptr, + receiver_symb_temp_dm1_ptr, + receiver_symb_temp_dm2_ptr, + receiver_symb_temp_dm3_ptr + ); + TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 99); + + + + //8. 内存释放 + dfree_unit(receiver_symb_malloc_dm2_ptr, APE_DM2); + dfree_unit(receiver_symb_malloc_dm1_ptr, APE_DM1); + dfree_unit(receiver_symb_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_symb_malloc_dm0_ptr, APE_DM0); + + + TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 100); + RUN_CNT(TRACE_RECEIVER_SYMB_ADDR, 1); + end_slot = TIME_SLOT(); + end_us = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) ); + + return; +} diff --git a/APELib/Receiver_symb/src/receiver_Symb_Var.s.c b/APELib/Receiver_symb/src/receiver_Symb_Var.s.c new file mode 100644 index 0000000..811df64 --- /dev/null +++ b/APELib/Receiver_symb/src/receiver_Symb_Var.s.c @@ -0,0 +1,17 @@ +/****************************************************************** + * @file receiver_var.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file +*****************************************************************/ +#include "receiver_symb_struct.h" + +//Receiver微码配置空间offset结构体 +receiver_symb_table_param_t g_receiver_symb_table_param; +uint32_t *receiver_symb_config_dm0_ptr = NULLPTR; +uint32_t *receiver_symb_config_dm1_ptr = NULLPTR; +uint32_t *receiver_symb_config_dm2_ptr = NULLPTR; +uint32_t *receiver_symb_config_dm3_ptr = NULLPTR; \ No newline at end of file diff --git a/APELib/Receiver_sync/inc/receiver_sync_func.h b/APELib/Receiver_sync/inc/receiver_sync_func.h new file mode 100644 index 0000000..ab4b57c --- /dev/null +++ b/APELib/Receiver_sync/inc/receiver_sync_func.h @@ -0,0 +1,63 @@ +/****************************************************************** + * @file receiver_sync_func.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file +*****************************************************************/ +#ifndef RECEIVER_SYNC_FUNC_H +#define RECEIVER_SYNC_FUNC_H +/****************************include*****************************/ +#include "common.h" +#include "mem_def.h" +#include "phy_macro.h" +#include "ape_interface.h" +#include "receiver_sync_macro.h" +#include "receiver_sync_struct.h" +#include "ape_common.h" +#include "drv_ape.h" +#include "log_interface.h" +#include "msg_interface.h" +#include "osp_ape.h" +#include "task_define.h" +#include "trace.h" +#include "interface_rec_sync2_rec_sync_first.h" + + +//include mpu header files +#include "ByteCopy.h" +#include "SyncVer.h" + + +//微码配置空间偏移结构体 +extern receiver_sync_table_param_t g_receiver_sync_table_param; +extern uint32_t *receiver_sync_config_dm0_ptr; +extern uint32_t *receiver_sync_config_dm1_ptr; +extern uint32_t *receiver_sync_config_dm2_ptr; +extern uint32_t *receiver_sync_config_dm3_ptr; + +extern int32_t *receiver_sync_malloc_dm0_ptr; +extern int32_t *receiver_sync_malloc_dm1_ptr; +extern int32_t *receiver_sync_malloc_dm2_ptr; +extern int32_t *receiver_sync_malloc_dm3_ptr; +extern int32_t *receiver_sync_temp_dm0_ptr; +extern int32_t *receiver_sync_temp_dm1_ptr; +extern int32_t *receiver_sync_temp_dm2_ptr; +extern int32_t *receiver_sync_temp_dm3_ptr; + +extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr; +extern uint32_t sync2symb_data_buffer[4]; +extern receiver_sync2symb_t data_send2symb_task[3]; +extern uint16_t g_proc_id; + +void Receiver_Sync_Init(); +void Receiver_Sync_Task(); +void Receiver_Sync_Proc(); +void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot); + +//debug +extern uint32_t* last_mem_dm[8]; + +#endif diff --git a/APELib/Receiver_sync/inc/receiver_sync_macro.h b/APELib/Receiver_sync/inc/receiver_sync_macro.h new file mode 100644 index 0000000..fc12a45 --- /dev/null +++ b/APELib/Receiver_sync/inc/receiver_sync_macro.h @@ -0,0 +1,26 @@ +/****************************************************************** + * @file receiver_sync_macro.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file +*****************************************************************/ +#ifndef RECEIVER_SYNC_MACRO_H +#define RECEIVER_SYNC_MACRO_H + +//GENERATE with Generate_receiver_sync_macro_h.m +//DO NOT MODIFY +//======================================================================= +//微码配置空间长度定义，单位为word(4Byte) +#define RECEIVER_SYNC_ConfigByteCopy_CFG1_LENGTH (0x0030) +#define RECEIVER_SYNC_ConfigSlidingCorrelation_CFG2_LENGTH (0x0080) +#define RECEIVER_SYNC_ConfigSlidingCorrelationSecond_CFG3_LENGTH (0x0080) +#define RECEIVER_SYNC_ConfigSyncVer_CFG4_LENGTH (0x0080) + +//SPU查找表各字段长度定义,单位为word(4Byte) + + +//======================================================================= +#endif diff --git a/APELib/Receiver_sync/inc/receiver_sync_struct.h b/APELib/Receiver_sync/inc/receiver_sync_struct.h new file mode 100644 index 0000000..7769d7a --- /dev/null +++ b/APELib/Receiver_sync/inc/receiver_sync_struct.h @@ -0,0 +1,75 @@ +/****************************************************************** + * @file receiver_sync_struct.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#ifndef RECEIVER_SYNC_STRUCT_H +#define RECEIVER_SYNC_STRUCT_H +#include "type_define.h" +#include "receiver_sync_vars.h" +#include "interface_rec_sync2_rec_symb.h" + +//GENERATE with Generate_receiver_sync_struct_h.m +//DO NOT MODIFY +//======================================================================= +//各微码或查找表偏移及指针定义 +typedef struct receiver_sync_table_param_s +{ + //MPU CONFIG OFFSET + uint32_t ConfigByteCopy_CFG1_Offset; + uint32_t ConfigSlidingCorrelation_CFG2_Offset; + uint32_t ConfigSlidingCorrelationSecond_CFG3_Offset; + uint32_t ConfigSyncVer_CFG4_Offset; + // 存储微码参数表的ddr基地址和长度 + uint32_t receiver_sync_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址 + uint32_t receiver_sync_config0_length;//receiver DM0微码配置文件ddr长度 + uint32_t receiver_sync_config1_ddr_ptr;//receiver DM1微码配置文件ddr地址 + uint32_t receiver_sync_config1_length;//receiver DM1微码配置文件ddr长度 + uint32_t receiver_sync_config2_ddr_ptr;//receiver DM2微码配置文件ddr地址 + uint32_t receiver_sync_config2_length;//receiver DM2微码配置文件ddr地址 + uint32_t receiver_sync_config3_ddr_ptr;//receiver DM3微码配置文件ddr地址 + uint32_t receiver_sync_config3_length;//receiver DM3微码配置文件ddr地址 + + //SPU查找表在SM中的偏移地址 + + + // SPU LUT SM基地址和长度 + + +}receiver_sync_table_param_t; + + + +typedef struct receiver_sync2first_sync_s +{ + uint16_t sfn; + uint16_t slot; + +}receiver_sync2first_sync_t; + + + + + + +typedef enum +{ + SYNC_IDLE=0, + SYNC_FIRST_RUNING, + SYNC_TRACKING +}receiver_sync_status_e; + + +typedef enum +{ + SYNC_OK=0, + SYNC_FAIL +}receiver_sync_ret_e; + +//======================================================================= +#endif \ No newline at end of file diff --git a/APELib/Receiver_sync/inc/receiver_sync_vars.h b/APELib/Receiver_sync/inc/receiver_sync_vars.h new file mode 100644 index 0000000..0fe05d4 --- /dev/null +++ b/APELib/Receiver_sync/inc/receiver_sync_vars.h @@ -0,0 +1,6 @@ +#ifndef RECEIVER_SYNC_VARS_H +#define RECEIVER_SYNC_VARS_H + +#define RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER (4) + +#endif \ No newline at end of file diff --git a/APELib/Receiver_sync/src/receiver_Sync_Init.s.c b/APELib/Receiver_sync/src/receiver_Sync_Init.s.c new file mode 100644 index 0000000..643fd8a --- /dev/null +++ b/APELib/Receiver_sync/src/receiver_Sync_Init.s.c @@ -0,0 +1,86 @@ +/****************************************************************** + * @file Receiver_Sync_Init.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#include "receiver_sync_func.h" + + + /*! + * @brief: Receiver任务启动前的初始化工作 + * 初始化全局参数，ddr查找表搬入SM + * @author: HUOHUO + * @Date: 2024年10月30日 + */ +void Receiver_Sync_Init() +{ + int32_t ret; + + //DM0 + g_receiver_sync_table_param.ConfigByteCopy_CFG1_Offset = 0; + g_receiver_sync_table_param.ConfigSlidingCorrelation_CFG2_Offset = g_receiver_sync_table_param.ConfigByteCopy_CFG1_Offset + RECEIVER_SYNC_ConfigByteCopy_CFG1_LENGTH; + g_receiver_sync_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset = g_receiver_sync_table_param.ConfigSlidingCorrelation_CFG2_Offset + RECEIVER_SYNC_ConfigSlidingCorrelation_CFG2_LENGTH; + g_receiver_sync_table_param.ConfigSyncVer_CFG4_Offset = g_receiver_sync_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset + RECEIVER_SYNC_ConfigSlidingCorrelationSecond_CFG3_LENGTH; + //DM1 + + //DM2 + + //DM3 + + //SM + + + // //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括： + // // 1). 置信度表uint16_t Q_W_Lut[2016] (n-5) + // // 2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5) + // // 3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1) + // // 4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check()) + // // 5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v) + // //获取地址 + // ret = osp_get_cfgfile("nr_puxch_lut_sm.dat", + // (uint32_t *)&lutDdrAddr, + // (int32_t *)&(g_receiver_sync_table_param.pucch_lut_length)); + // g_receiver_sync_table_param.pucch_lut_sm_ptr = SM0_BASE; + // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr, + // (uint64_t)g_receiver_sync_table_param.pucch_lut_sm_ptr, + // g_receiver_sync_table_param.pucch_lut_length, + // DMA_TAG_G2G, + // 1); + // LOG_ERROR_S("test init\n"); + //9. 微码配置文件ddr地址初始化 + ret = osp_get_cfgfile("Receiver_Sync_cfg_dm0.dat", + (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config0_ddr_ptr), + (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config0_length)); + // ret = osp_get_cfgfile("Receiver_Sync_cfg_dm1.dat", + // (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config1_ddr_ptr), + // (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config1_length)); + + // ret = osp_get_cfgfile("Receiver_Sync_cfg_dm2.dat", + // (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config2_ddr_ptr), + // (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config2_length)); + // ret = osp_get_cfgfile("Receiver_Sync_cfg_dm3.dat", + // (uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config3_ddr_ptr), + // (int32_t *)&(g_receiver_sync_table_param.receiver_sync_config3_length)); + + // LOG_ERROR_S("init %d 0x%08x %d\n", ret, g_receiver_sync_table_param.receiver_sync_config0_ddr_ptr, g_receiver_sync_table_param.receiver_sync_config0_length); + //状态机初始化 + g_receiver_sync_status_SM_ptr = (uint32_t)RECEIVER_SYNC2SYNC_FIRST_INF_ADDR; + STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status, SYNC_IDLE); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset, -1); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, 0); + + //sync2symb buffer地址初始化 + sync2symb_data_buffer[0] = RECEIVER_SYNC2SYMB_BUFFER0_ADDR; + sync2symb_data_buffer[1] = RECEIVER_SYNC2SYMB_BUFFER1_ADDR; + sync2symb_data_buffer[2] = RECEIVER_SYNC2SYMB_BUFFER2_ADDR; + sync2symb_data_buffer[3] = RECEIVER_SYNC2SYMB_BUFFER3_ADDR; + + g_proc_id = 0; + + +} diff --git a/APELib/Receiver_sync/src/receiver_Sync_Proc.s.c b/APELib/Receiver_sync/src/receiver_Sync_Proc.s.c new file mode 100644 index 0000000..54bede1 --- /dev/null +++ b/APELib/Receiver_sync/src/receiver_Sync_Proc.s.c @@ -0,0 +1,495 @@ +/****************************************************************** + * @file receiver_Proc.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file + +*****************************************************************/ +#include "receiver_sync_func.h" +#define ADDR_ALIGN(addr, val) ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) + +void dm_check(uint32_t mark) +{ + uint32_t idx; + uint32_t flag = 0; + for( idx = 0 ;idx < 8; idx++) + { + if(0xa5a55a5a != *last_mem_dm[idx]) + { + flag |= (1<>2), 2); //起始地址4byte对齐 + + //3. DM3空间申请 + dm3_space = getFreeSpace(APE_DM3); + receiver_sync_malloc_dm3_ptr = dmalloc_unit(dm3_space - 1024, APE_DM3);//尽量申请 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_sync_malloc_dm3_ptr) + { + LOG_ERROR_S("rec sync DM3 fail\n"); + dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0); + return; + } + //DM3第一段，堆空间 + receiver_sync_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_malloc_dm3_ptr, 12); //起始地址4k对齐 + + + //4. DM1空间申请 + dm1_space = getFreeSpace(APE_DM1); + receiver_sync_malloc_dm1_ptr = dmalloc_unit(dm1_space - 1024, APE_DM1);//尽量申请 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_sync_malloc_dm1_ptr) + { + LOG_ERROR_S("rec sync DM1 fail\n"); + dfree_unit(receiver_sync_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0); + return; + } + //DM1第一段,堆空间 + receiver_sync_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_malloc_dm1_ptr + \ + (g_receiver_sync_table_param.receiver_sync_config1_length>>2), 12); //起始地址4k对齐 + + //5. DM2空间申请 + dm2_space = getFreeSpace(APE_DM2); + receiver_sync_malloc_dm2_ptr = dmalloc_unit(dm2_space - 1024, APE_DM2);//尽量申请 + //若空间申请失败，释放已申请的空间，再退出任务 + if (NULLPTR == receiver_sync_malloc_dm2_ptr) + { + LOG_ERROR_S("rec sync DM2 fail\n"); + dfree_unit(receiver_sync_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0); + dfree_unit(receiver_sync_malloc_dm1_ptr, APE_DM1); + return; + } + //DM2第一段,堆空间 + receiver_sync_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_malloc_dm2_ptr + \ + (g_receiver_sync_table_param.receiver_sync_config2_length>>2), 2); //起始地址4byte对齐 + + ape_csu_task_lookup(DMA_TAG_G2L, 1); + + + //debug + last_mem_dm[0] = receiver_sync_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -1; + last_mem_dm[1] = receiver_sync_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -2; + last_mem_dm[2] = receiver_sync_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -1; + last_mem_dm[3] = receiver_sync_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -2; + last_mem_dm[4] = receiver_sync_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -1; + last_mem_dm[5] = receiver_sync_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -2; + last_mem_dm[6] = receiver_sync_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -1; + last_mem_dm[7] = receiver_sync_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -2; + + *last_mem_dm[0] = 0xa5a55a5a; + *last_mem_dm[1] = 0xa5a55a5a; + *last_mem_dm[2] = 0xa5a55a5a; + *last_mem_dm[3] = 0xa5a55a5a; + *last_mem_dm[4] = 0xa5a55a5a; + *last_mem_dm[5] = 0xa5a55a5a; + *last_mem_dm[6] = 0xa5a55a5a; + *last_mem_dm[7] = 0xa5a55a5a; + + + +} + + + +void Receiver_Sync_Memory_Free( ) +{ + //8. 内存释放 + dfree_unit(receiver_sync_malloc_dm2_ptr, APE_DM2); + dfree_unit(receiver_sync_malloc_dm1_ptr, APE_DM1); + dfree_unit(receiver_sync_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_sync_malloc_dm0_ptr, APE_DM0); +} + + + + /*! + * @brief: Receiver_sync链路处理 + * @author: HUOHUO + * @Date: 2024年10月30日 + */ +void Receiver_Sync_Proc( +) +{ + //局部变量定义 + int32_t *cfg_addr; + uint32_t time_data_ddr_ptr; + uint32_t time_data_length; + + uint32_t cur_sfn = get_rx_nr_sfn(); + uint32_t cur_slot = get_rx_nr_slot(); + uint32_t sync_status = LOAD_EX_W(&(g_receiver_sync_status_SM_ptr->sync_status)); + + if(SYNC_FIRST_RUNING == sync_status) + { + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 2); + return ; + } + else if(SYNC_IDLE == sync_status) + { + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 3); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status ,SYNC_FIRST_RUNING); + receiver_sync2first_sync_t temp_msg; + temp_msg.sfn = cur_sfn; + temp_msg.slot = cur_slot; + phy_et_msg_send((uint32_t)(&temp_msg), + sizeof(receiver_sync2first_sync_t), + UCP4008_KERNEL_INNER, + APE0_CORE_ID, + APE3_CORE_ID, + PHY_TASK_RECIEVER_SYNC, + PHY_TASK_RECIEVER_FIRST_SYNC); + + //第一次同步目前不存储数据做处理，注释 + // receiver_sync2first_sync_t data_send2first_sync_task; + // phy_et_msg_send((uint32_t)(&data_send2first_sync_task), + // sizeof(receiver_sync2first_sync_t), + // UCP4008_KERNEL_INNER, + // get_core_id(), + // get_core_id(), + // PHY_TASK_PRI_RECEIVER_SYNC, + // PHY_TASK_PRI_RECEIVER_FIRST_SYNC); + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 4); + } + else if(SYNC_TRACKING == sync_status) + { + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 5); + Receiver_Fine_Sync_Proc(cur_sfn, cur_slot); + + //根据当前状态机状态，buffer存储的数据长度，sync同步帧头，发送核间消息触发任务 + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 6); + + } + else + { + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 7); + return; + } + + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 8); + return; +} + + + +//用于跟踪同步 +void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot) +{ + + uint16_t start_slot = TIME_SLOT(); + uint16_t start_us = TIME_US(); + uint16_t end_slot; + uint16_t end_us; + uint16_t dbg_time0, dbg_time1; + uint16_t dbg_slot0, dbg_slot1; + RUN_CNT(TRACE_RECEIVER_SYNC_FINE_ADDR, 0); + + uint32_t ret; + int32_t *cfg_addr;// 配置地址指针 + uint32_t time0 = TIME_US(); + volatile uint32_t time1 = time0; + uint32_t task_idx = 0; + uint32_t frame_head_offset; + uint32_t src_addr0; + uint32_t src_addr1; + + //用于指示循环buffer空口数据的存储头 + uint32_t buffer_sel = (slot + RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER -1) & 0x3; + uint32_t buffer_sel2 = (buffer_sel + 1) & 0x3; + + TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 1); + //Proc的DM空间申请 + + Receiver_Sync_Memory_Alloc(); + TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 2); + + dbg_slot0 = TIME_SLOT(); + dbg_time0 = TIME_US(); + //搬移1055sample数据供定时同步,奇数slot处理偶buffer数据，反之 + + if( 1 == (slot & 0x01) ) + { + src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR; + src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR; + } + else + { + src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR; + src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR; + } + + ape_csu_task_lookup(DMA_TAG_G2L, 1); + //取数方式，同步点为中心，前16，后15，相关长度1024 + frame_head_offset = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset); + if(16 > frame_head_offset) + { + //上个buffer尾 + memcpy_ext(receiver_sync_temp_dm0_ptr, src_addr1 + ((61440 - (16 - frame_head_offset) ) <<2), (16 - frame_head_offset)<<2 ); + //当前buffer头 + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0), + (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr + (16 - frame_head_offset) ), + (1055 - (16 - frame_head_offset) )<<2, + DMA_TAG_G2L, + 0); + + // LOG_ERROR_S("csu1:%d %d\n", (16 - frame_head_offset)<<2 , (1055 - (16 - frame_head_offset) )<<2 ); + } + else if(61440 - (15 + 1024) < frame_head_offset) + { + //当前buffer尾 + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 + ((frame_head_offset -16) <<2) ), + (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr), + ((61440 - (frame_head_offset -16)) )<<2, + DMA_TAG_G2L, + 0); + //下个buffer头 等待保证数据被jesd_csu存入 + while(time1 - time0 < 10) + { + time1 = TIME_US(); + } + ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1), + (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr + (61440 - (frame_head_offset -16) ) ), + (1055 - (61440 - (frame_head_offset -16)) )<<2, + DMA_TAG_G2L, + 0); + + // LOG_ERROR_S("csu2:%d %d\n", ((61440 - (frame_head_offset -16)) )<<2 , (1055 - (61440 - (frame_head_offset -16)) )<<2 ); + } + else + { + //当前buffer + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 + ((frame_head_offset -16) <<2) ), + (uint64_t)DM_TO_CSU_ADDR(receiver_sync_temp_dm0_ptr), + (1055)<<2, + DMA_TAG_G2L, + 0); + + // LOG_ERROR_S("csu3:0x%08x 0x%08x\n", (src_addr0 + ((frame_head_offset -16) <<2) ) , receiver_sync_temp_dm0_ptr ); + } + + //复制数据DM0 -> DM1 + cfg_addr = (int32_t *)receiver_sync_config_dm0_ptr + g_receiver_sync_table_param.ConfigByteCopy_CFG1_Offset; + ByteCopy((int)cfg_addr, + MPU_ADDR(receiver_sync_temp_dm0_ptr), + MPU_ADDR(receiver_sync_temp_dm1_ptr), + (1055) << 2); + + + TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 3); + ape_csu_task_lookup(DMA_TAG_G2L, 1); + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + + uint32_t dbg_cur_time = TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1); + TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 5, dbg_cur_time ); + // LOG_ERROR_S("%d %d %d\n", sfn, slot , dbg_cur_time); + // if(100 < dbg_cur_time ) + // { + // LOG_ERROR_S("time overload !!\n"); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_dbgbreak(); + // } + + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_time1; + + //插空拷贝数据到SM，提供给sync_symb数据输入来源 + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0), + (uint64_t)(sync2symb_data_buffer[buffer_sel]), + (61440)<<2, + DMA_TAG_G2G, + 0); + + SVRReg[0] = MPU_ADDR(cfg_addr); + ByteCopyAsm(SVRReg); + + + cfg_addr = (int32_t *)receiver_sync_config_dm0_ptr + g_receiver_sync_table_param.ConfigSyncVer_CFG4_Offset; + SyncVer((int)cfg_addr, + MPU_ADDR(receiver_sync_temp_dm0_ptr), + MPU_ADDR(receiver_sync_temp_dm1_ptr), + MPU_ADDR(receiver_sync_temp_dm2_ptr), + MPU_ADDR(receiver_sync_temp_dm3_ptr)); + + WAIT_MPU_STOP; + TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 4); + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 6, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_time1; + SVRReg[0] = MPU_ADDR(cfg_addr); + SyncVerAsm(SVRReg); + + + + // 得到验证后的同步位置 + WAIT_MPU_STOP; + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 7, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_time1; + TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 5); + uint32_t maxWindowSum = receiver_sync_temp_dm3_ptr[1]; + //更新最佳位置 + uint32_t bestPosition =receiver_sync_temp_dm3_ptr[0]-16 + frame_head_offset; + + //更新sync2symb的buffer状态记录 + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len) + 61440); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_offset , 61440 * buffer_sel2); + + + if(-1 == LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset) ) //初始态，初始化数据处理偏移 + { + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset , 61440 * buffer_sel); + + } + __ucps2_synch(0); + + uint32_t cylic_buffer_data_offset = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_offset); + uint32_t cylic_buffer_proc_data_offset = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset); + uint32_t cylic_buffer_data_offset_temp = (cylic_buffer_data_offset >= cylic_buffer_proc_data_offset) ? + cylic_buffer_data_offset : + (cylic_buffer_data_offset + 61440 * RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER); + + uint32_t offset_temp = 0 + frame_head_offset; + + uint32_t cylic_buffer_data_len = LOAD_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len); + while(offset_temp <= cylic_buffer_data_offset_temp) + { + if( (cylic_buffer_proc_data_offset + 61440 <= offset_temp) ) + { + TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 6); + //填写给symb任务的调度信息 + data_send2symb_task[task_idx].sfn = sfn; + data_send2symb_task[task_idx].slot = slot; + data_send2symb_task[task_idx].num_data_section = (offset_temp > (61440 * 4) && (offset_temp < (61440 * 5)) ) ? 2 : 1; + data_send2symb_task[task_idx].proc_id = g_proc_id; + data_send2symb_task[task_idx].data_section0_ptr = sync2symb_data_buffer[0] + (((offset_temp - 61440) % (61440*4))<<2); + data_send2symb_task[task_idx].data_section0_length = (offset_temp > (61440 * 4)) ? ((61440 * 4) - (offset_temp - 61440)) : 61440; + data_send2symb_task[task_idx].data_section1_ptr = (2 == data_send2symb_task[task_idx].num_data_section) ? (sync2symb_data_buffer[0]) : 0; + data_send2symb_task[task_idx].data_section1_length = (2 == data_send2symb_task[task_idx].num_data_section) ? (61440 - data_send2symb_task[task_idx].data_section0_length) : 0; + + //维护状态信息 + cylic_buffer_data_len = cylic_buffer_data_offset_temp - offset_temp; + cylic_buffer_proc_data_offset = offset_temp % (61440*4); + + //发核间消息给SYMB_TASK + phy_et_msg_send((uint32_t)(&data_send2symb_task[task_idx]), + sizeof(receiver_sync2symb_t), + UCP4008_KERNEL_INTER, + get_core_id(), + APE1_CORE_ID, + PHY_TASK_PRI_RECEIVER_SYNC, + PHY_TASK_PRI_RECEIVER_SYMB); + g_proc_id++; + task_idx++; + } + + offset_temp += 61440; + } + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len , cylic_buffer_data_len); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset, cylic_buffer_proc_data_offset); + + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 8, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_time1; + + //TODO:后续需要添加门限判断条件 + uint32_t threshold = 1; + if(threshold) + { + STORE_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset , bestPosition % 61440); + //LOG_INFO_S("rec sync track offset: %d\n", bestPosition % 61440); + ret = SYNC_OK; + } + + + //执行完成，更新状态机 + if(SYNC_OK == ret) + { + //此分支本身就是SYNC_TRACKING + //g_receiver_sync_status_SM_ptr.sync_status = SYNC_TRACKING; + + } + else + { + STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_IDLE); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset , -1); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, 0); + } + TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 7); + ape_csu_task_lookup(DMA_TAG_G2G, 1); + Receiver_Sync_Memory_Free(); + + RUN_CNT(TRACE_RECEIVER_SYNC_FINE_ADDR, 1); + end_slot = TIME_SLOT(); + end_us = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FINE_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) ); + return; +} \ No newline at end of file diff --git a/APELib/Receiver_sync/src/receiver_Sync_Task.s.c b/APELib/Receiver_sync/src/receiver_Sync_Task.s.c new file mode 100644 index 0000000..ada39a2 --- /dev/null +++ b/APELib/Receiver_sync/src/receiver_Sync_Task.s.c @@ -0,0 +1,44 @@ +/****************************************************************** + * @file Receiver_Sync_Task.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#include "receiver_sync_func.h" + + +#define ADDR_ALIGN(addr, val) ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) + + + /*! + * @brief: Receiver任务处理流程 + * @author: HUOHUO + * @Date: 2024年4月20日 + */ +void Receiver_Sync_Task() +{ + uint16_t start_slot = TIME_SLOT(); + uint16_t start_us = TIME_US(); + uint16_t end_slot; + uint16_t end_us; + RUN_CNT(TRACE_RECEIVER_SYNC_ADDR, 0); + + + //6. 计算流程 + Receiver_Sync_Proc(); + + + TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 100); + RUN_CNT(TRACE_RECEIVER_SYNC_ADDR, 1); + end_slot = TIME_SLOT(); + end_us = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) ); + + return; +} + + diff --git a/APELib/Receiver_sync/src/receiver_Sync_Var.s.c b/APELib/Receiver_sync/src/receiver_Sync_Var.s.c new file mode 100644 index 0000000..50b6b0a --- /dev/null +++ b/APELib/Receiver_sync/src/receiver_Sync_Var.s.c @@ -0,0 +1,39 @@ +/****************************************************************** + * @file receiver_var.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file +*****************************************************************/ +#include "receiver_sync_struct.h" +#include "interface_rec_sync2_rec_sync_first.h" + +//Receiver微码配置空间offset结构体 +receiver_sync_table_param_t g_receiver_sync_table_param; +uint32_t *receiver_sync_config_dm0_ptr = NULLPTR; +uint32_t *receiver_sync_config_dm1_ptr = NULLPTR; +uint32_t *receiver_sync_config_dm2_ptr = NULLPTR; +uint32_t *receiver_sync_config_dm3_ptr = NULLPTR; + +int32_t *receiver_sync_malloc_dm0_ptr; +int32_t *receiver_sync_malloc_dm1_ptr; +int32_t *receiver_sync_malloc_dm2_ptr; +int32_t *receiver_sync_malloc_dm3_ptr; +int32_t *receiver_sync_temp_dm0_ptr; +int32_t *receiver_sync_temp_dm1_ptr; +int32_t *receiver_sync_temp_dm2_ptr; +int32_t *receiver_sync_temp_dm3_ptr; + +receiver_sync_status_t* g_receiver_sync_status_SM_ptr; +receiver_sync2symb_t data_send2symb_task[3]; +uint16_t g_proc_id; + + + +uint32_t sync2symb_data_buffer[RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER]; + +//debug +uint32_t* last_mem_dm[8]; + diff --git a/APELib/Receiver_sync_first/inc/receiver_sync_first_func.h b/APELib/Receiver_sync_first/inc/receiver_sync_first_func.h new file mode 100644 index 0000000..308960e --- /dev/null +++ b/APELib/Receiver_sync_first/inc/receiver_sync_first_func.h @@ -0,0 +1,63 @@ +/****************************************************************** + * @file receiver_sync_first_func.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file +*****************************************************************/ +#ifndef RECEIVER_SYNC_FIRST_FUNC_H +#define RECEIVER_SYNC_FIRST_FUNC_H +/****************************include*****************************/ +#include "common.h" +#include "mem_def.h" +#include "phy_macro.h" +#include "ape_interface.h" +#include "receiver_sync_first_macro.h" +#include "receiver_sync_first_struct.h" +#include "ape_common.h" +#include "drv_ape.h" +#include "log_interface.h" +#include "msg_interface.h" +#include "osp_ape.h" +#include "task_define.h" +#include "trace.h" +#include "interface_rec_sync2_rec_sync_first.h" + + +//include mpu header files +#include "ByteCopy.h" +#include "SlidingCorrelation.h" +#include "SlidingCorrelationSecond.h" + + + +//微码配置空间偏移结构体 +extern receiver_sync_first_table_param_t g_receiver_sync_first_table_param; +extern uint32_t *receiver_sync_first_config_dm0_ptr; +extern uint32_t *receiver_sync_first_config_dm1_ptr; +extern uint32_t *receiver_sync_first_config_dm2_ptr; +extern uint32_t *receiver_sync_first_config_dm3_ptr; + +extern int32_t *receiver_sync_first_malloc_dm0_ptr; +extern int32_t *receiver_sync_first_malloc_dm1_ptr; +extern int32_t *receiver_sync_first_malloc_dm2_ptr; +extern int32_t *receiver_sync_first_malloc_dm3_ptr; +extern int32_t *receiver_sync_first_temp_dm0_ptr; +extern int32_t *receiver_sync_first_temp_dm1_ptr; +extern int32_t *receiver_sync_first_temp_dm2_ptr; +extern int32_t *receiver_sync_first_temp_dm3_ptr; + +extern receiver_sync_status_t* g_receiver_sync_status_SM_ptr; +extern uint32_t sync2symb_data_buffer[4]; +extern receiver_sync2symb_t data_send2symb_task[3]; +extern uint16_t g_proc_id; + +void Receiver_Sync_First_Init(); +void Receiver_First_Sync_Proc(receiver_sync2first_sync_t* msg_ptr, uint32_t msg_len); + +//debug +extern uint32_t* last_mem_dm[8]; + +#endif diff --git a/APELib/Receiver_sync_first/inc/receiver_sync_first_macro.h b/APELib/Receiver_sync_first/inc/receiver_sync_first_macro.h new file mode 100644 index 0000000..9e6b3d8 --- /dev/null +++ b/APELib/Receiver_sync_first/inc/receiver_sync_first_macro.h @@ -0,0 +1,26 @@ +/****************************************************************** + * @file receiver_sync_macro.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file +*****************************************************************/ +#ifndef RECEIVER_SYNC_FIRST_MACRO_H +#define RECEIVER_SYNC_FIRST_MACRO_H + +//GENERATE with Generate_receiver_sync_macro_h.m +//DO NOT MODIFY +//======================================================================= +//微码配置空间长度定义，单位为word(4Byte) +#define RECEIVER_SYNC_FIRST_ConfigByteCopy_CFG1_LENGTH (0x0030) +#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelation_CFG2_LENGTH (0x0080) +#define RECEIVER_SYNC_FIRST_ConfigSlidingCorrelationSecond_CFG3_LENGTH (0x0080) +#define RECEIVER_SYNC_FIRST_ConfigSyncVer_CFG4_LENGTH (0x0080) + +//SPU查找表各字段长度定义,单位为word(4Byte) + + +//======================================================================= +#endif diff --git a/APELib/Receiver_sync_first/inc/receiver_sync_first_struct.h b/APELib/Receiver_sync_first/inc/receiver_sync_first_struct.h new file mode 100644 index 0000000..8e1b216 --- /dev/null +++ b/APELib/Receiver_sync_first/inc/receiver_sync_first_struct.h @@ -0,0 +1,71 @@ +/****************************************************************** + * @file receiver_sync_first_struct.h + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#ifndef RECEIVER_SYNC_FIRST_STRUCT_H +#define RECEIVER_SYNC_FIRST_STRUCT_H +#include "type_define.h" +#include "receiver_sync_first_vars.h" +#include "interface_rec_sync2_rec_symb.h" + +//GENERATE with Generate_receiver_sync_first_struct_h.m +//DO NOT MODIFY +//======================================================================= +//各微码或查找表偏移及指针定义 +typedef struct receiver_sync_first_table_param_s +{ + //MPU CONFIG OFFSET + uint32_t ConfigByteCopy_CFG1_Offset; + uint32_t ConfigSlidingCorrelation_CFG2_Offset; + uint32_t ConfigSlidingCorrelationSecond_CFG3_Offset; + uint32_t ConfigSyncVer_CFG4_Offset; + // 存储微码参数表的ddr基地址和长度 + uint32_t receiver_sync_first_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址 + uint32_t receiver_sync_first_config0_length;//receiver DM0微码配置文件ddr长度 + uint32_t receiver_sync_first_config1_ddr_ptr;//receiver DM1微码配置文件ddr地址 + uint32_t receiver_sync_first_config1_length;//receiver DM1微码配置文件ddr长度 + uint32_t receiver_sync_first_config2_ddr_ptr;//receiver DM2微码配置文件ddr地址 + uint32_t receiver_sync_first_config2_length;//receiver DM2微码配置文件ddr地址 + uint32_t receiver_sync_first_config3_ddr_ptr;//receiver DM3微码配置文件ddr地址 + uint32_t receiver_sync_first_config3_length;//receiver DM3微码配置文件ddr地址 + + //SPU查找表在SM中的偏移地址 + + + // SPU LUT SM基地址和长度 + + +}receiver_sync_first_table_param_t; + + + +typedef struct receiver_sync2first_sync_s +{ + uint16_t sfn; + uint16_t slot; + +}receiver_sync2first_sync_t; + + +typedef enum +{ + SYNC_IDLE=0, + SYNC_FIRST_RUNING, + SYNC_TRACKING +}receiver_sync_first_status_e; + + +typedef enum +{ + SYNC_OK=0, + SYNC_FAIL +}receiver_sync_first_ret_e; + +//======================================================================= +#endif \ No newline at end of file diff --git a/APELib/Receiver_sync_first/inc/receiver_sync_first_vars.h b/APELib/Receiver_sync_first/inc/receiver_sync_first_vars.h new file mode 100644 index 0000000..1c2ed88 --- /dev/null +++ b/APELib/Receiver_sync_first/inc/receiver_sync_first_vars.h @@ -0,0 +1,5 @@ +#ifndef RECEIVER_SYNC_FIRST_VARS_H +#define RECEIVER_SYNC_FIRST_VARS_H + + +#endif \ No newline at end of file diff --git a/APELib/Receiver_sync_first/src/receiver_Sync_First_Init.s.c b/APELib/Receiver_sync_first/src/receiver_Sync_First_Init.s.c new file mode 100644 index 0000000..5d107ad --- /dev/null +++ b/APELib/Receiver_sync_first/src/receiver_Sync_First_Init.s.c @@ -0,0 +1,76 @@ +/****************************************************************** + * @file Receiver_Sync_First_Init.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年10月30日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年10月30日 HUOHUO create file + +*****************************************************************/ +#include "receiver_sync_first_func.h" + + + /*! + * @brief: Receiver任务启动前的初始化工作 + * 初始化全局参数，ddr查找表搬入SM + * @author: HUOHUO + * @Date: 2024年10月30日 + */ +void Receiver_Sync_First_Init() +{ + int32_t ret; + + //DM0 + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset = 0; + g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset = g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset + RECEIVER_SYNC_FIRST_ConfigByteCopy_CFG1_LENGTH; + g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset = g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset + RECEIVER_SYNC_FIRST_ConfigSlidingCorrelation_CFG2_LENGTH; + g_receiver_sync_first_table_param.ConfigSyncVer_CFG4_Offset = g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset + RECEIVER_SYNC_FIRST_ConfigSlidingCorrelationSecond_CFG3_LENGTH; + //DM1 + + //DM2 + + //DM3 + + //SM + + + // //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括： + // // 1). 置信度表uint16_t Q_W_Lut[2016] (n-5) + // // 2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5) + // // 3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1) + // // 4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check()) + // // 5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v) + // //获取地址 + // ret = osp_get_cfgfile("nr_puxch_lut_sm.dat", + // (uint32_t *)&lutDdrAddr, + // (int32_t *)&(g_receiver_sync_first_table_param.pucch_lut_length)); + // g_receiver_sync_first_table_param.pucch_lut_sm_ptr = SM0_BASE; + // ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr, + // (uint64_t)g_receiver_sync_first_table_param.pucch_lut_sm_ptr, + // g_receiver_sync_first_table_param.pucch_lut_length, + // DMA_TAG_G2G, + // 1); + // LOG_ERROR_S("test init\n"); + //9. 微码配置文件ddr地址初始化 + + //!!!配置文件是同一个!!! + ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm0.dat", + (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_first_config0_ddr_ptr), + (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_first_config0_length)); + // ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm1.dat", + // (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config1_ddr_ptr), + // (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config1_length)); + + // ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm2.dat", + // (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config2_ddr_ptr), + // (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config2_length)); + // ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm3.dat", + // (uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config3_ddr_ptr), + // (int32_t *)&(g_receiver_sync_first_table_param.receiver_sync_config3_length)); + + // LOG_ERROR_S("init %d 0x%08x %d\n", ret, g_receiver_sync_first_table_param.receiver_sync_config0_ddr_ptr, g_receiver_sync_first_table_param.receiver_sync_config0_length); + g_receiver_sync_status_SM_ptr = (uint32_t)RECEIVER_SYNC2SYNC_FIRST_INF_ADDR; + + +} diff --git a/APELib/Receiver_sync_first/src/receiver_Sync_First_Proc.s.c b/APELib/Receiver_sync_first/src/receiver_Sync_First_Proc.s.c new file mode 100644 index 0000000..0b02797 --- /dev/null +++ b/APELib/Receiver_sync_first/src/receiver_Sync_First_Proc.s.c @@ -0,0 +1,432 @@ +/****************************************************************** + * @file receiver_Proc.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file + +*****************************************************************/ +#include "receiver_sync_first_func.h" +#define ADDR_ALIGN(addr, val) ((((uint32_t)(addr) + (2<<(val)) - 1)>>(val))<<(val)) + +void dm_check(uint32_t mark) +{ + uint32_t idx; + uint32_t flag = 0; + for( idx = 0 ;idx < 8; idx++) + { + if(0xa5a55a5a != *last_mem_dm[idx]) + { + flag |= (1<>2), 12); //起始地址4kbyte对齐 + + //3. DM3空间申请 + dm3_space = getFreeSpace(APE_DM3); + receiver_sync_first_malloc_dm3_ptr = dmalloc_unit(dm3_space - 1024, APE_DM3);//尽量申请 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_sync_first_malloc_dm3_ptr) + { + LOG_ERROR_S("rec sync DM3 fail\n"); + dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0); + return; + } + //DM3第一段，堆空间 + receiver_sync_first_temp_dm3_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm3_ptr, 12); //起始地址4k对齐 + + + //4. DM1空间申请 + dm1_space = getFreeSpace(APE_DM1); + receiver_sync_first_malloc_dm1_ptr = dmalloc_unit(dm1_space - 1024, APE_DM1);//尽量申请 + //若空间申请失败，则释放已申请的空间，再退出任务 + if (NULLPTR == receiver_sync_first_malloc_dm1_ptr) + { + LOG_ERROR_S("rec sync DM1 fail\n"); + dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0); + return; + } + //DM1第一段,堆空间 + receiver_sync_first_temp_dm1_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm1_ptr + \ + (g_receiver_sync_first_table_param.receiver_sync_first_config1_length>>2), 12); //起始地址4k对齐 + + //5. DM2空间申请 + dm2_space = getFreeSpace(APE_DM2); + receiver_sync_first_malloc_dm2_ptr = dmalloc_unit(dm2_space - 1024, APE_DM2);//尽量申请 + //若空间申请失败，释放已申请的空间，再退出任务 + if (NULLPTR == receiver_sync_first_malloc_dm2_ptr) + { + LOG_ERROR_S("rec sync DM2 fail\n"); + dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0); + dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1); + return; + } + //DM2第一段,堆空间 + receiver_sync_first_temp_dm2_ptr = (int32_t *)ADDR_ALIGN(receiver_sync_first_malloc_dm2_ptr + \ + (g_receiver_sync_first_table_param.receiver_sync_first_config2_length>>2), 12); //起始地址4byte对齐 + + ape_csu_task_lookup(DMA_TAG_G2L, 1); + + + //debug + last_mem_dm[0] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -1; + last_mem_dm[1] = receiver_sync_first_malloc_dm0_ptr + ((dm0_space - 1024)>>2) -2; + last_mem_dm[2] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -1; + last_mem_dm[3] = receiver_sync_first_malloc_dm1_ptr + ((dm1_space - 1024)>>2) -2; + last_mem_dm[4] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -1; + last_mem_dm[5] = receiver_sync_first_malloc_dm2_ptr + ((dm2_space - 1024)>>2) -2; + last_mem_dm[6] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -1; + last_mem_dm[7] = receiver_sync_first_malloc_dm3_ptr + ((dm3_space - 1024)>>2) -2; + + *last_mem_dm[0] = 0xa5a55a5a; + *last_mem_dm[1] = 0xa5a55a5a; + *last_mem_dm[2] = 0xa5a55a5a; + *last_mem_dm[3] = 0xa5a55a5a; + *last_mem_dm[4] = 0xa5a55a5a; + *last_mem_dm[5] = 0xa5a55a5a; + *last_mem_dm[6] = 0xa5a55a5a; + *last_mem_dm[7] = 0xa5a55a5a; + + + +} + + + +void Receiver_Sync_First_Memory_Free( ) +{ + //8. 内存释放 + dfree_unit(receiver_sync_first_malloc_dm2_ptr, APE_DM2); + dfree_unit(receiver_sync_first_malloc_dm1_ptr, APE_DM1); + dfree_unit(receiver_sync_first_malloc_dm3_ptr, APE_DM3); + dfree_unit(receiver_sync_first_malloc_dm0_ptr, APE_DM0); +} + + + + +//耗时长，用于第一次同步 +void Receiver_First_Sync_Proc(receiver_sync2first_sync_t* msg_ptr, uint32_t msg_len) +{ + + uint16_t start_slot = TIME_SLOT(); + uint16_t start_us = TIME_US(); + uint16_t end_slot; + uint16_t end_us; + RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 0); + + + + + + const uint32_t loop_num = 1; + uint32_t ret; + uint16_t sfn = LOAD_EX_S(&msg_ptr->sfn); + uint16_t slot = LOAD_EX_S(&msg_ptr->slot); + uint32_t section_idx; + const uint32_t sample_per_tti = 61440;//每个500us采样点数 + const uint32_t addition_sample = 1024;//额外样点 + uint32_t total_nsample = sample_per_tti + addition_sample; + uint32_t sample_per_csu = (total_nsample >> 1); + uint32_t nsample_per_section = total_nsample / loop_num; + uint32_t corr_dm_ptr; + int32_t *cfg_addr;// 配置地址指针 + uint32_t maxPosition = 0; + uint32_t maxsum; + volatile uint16_t dbg_time0, dbg_time1; + volatile uint16_t dbg_slot0, dbg_slot1; + + //Proc的DM空间申请 + Receiver_Sync_First_Memory_Alloc(); + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 1); + //寻找帧同步头，更新同步信息结构体 + + //搬移500us+数据供定时同步,奇数slot处理偶buffer数据，反之 + dbg_slot0 = TIME_SLOT(); + dbg_time0 = TIME_US(); + uint32_t src_addr0; + uint32_t src_addr1; + if( 1 == (slot & 0x01) ) + { + src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR; + src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR; + } + else + { + src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR; + src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR; + } + + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0), + (uint64_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR,//第一次固定搬移到dm0 + (61440)<<2, + DMA_TAG_G2G, + 1); + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr1), + (uint64_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR,//第一次固定搬移到dm0 + (2048)<<2, + DMA_TAG_G2G, + 1); + + src_addr0 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR; + src_addr1 = (uint32_t)JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR; + + + //搬移PART1数据 + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0), + (uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),//第一次固定搬移到dm0 + (sample_per_csu + 1024)<<2, + DMA_TAG_G2L, + 1); + + + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 2); + + + cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset; + + + //Debug: + // LOG_ERROR_S("0x%08x 0x%08x 0x%08x %d\n", cfg_addr, receiver_sync_first_temp_dm0_ptr + 1024, receiver_sync_first_temp_dm1_ptr, (total_nsample - 1024)<<2); + // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr), + // (uint64_t)0x88a00000, + // 48<<2, + // DMA_TAG_L2G, + // 1); + + ByteCopy((int)cfg_addr, + MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024 + MPU_ADDR(receiver_sync_first_temp_dm1_ptr), + ((sample_per_csu)<<2)); + + + ape_csu_task_lookup(DMA_TAG_G2L, 1); + + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 4, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_time1; + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 3); + SVRReg[0] = MPU_ADDR(cfg_addr); + ByteCopyAsm(SVRReg); + + + + //Debug: + // LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr, + // receiver_sync_first_temp_dm3_ptr); + + WAIT_MPU_STOP; + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 5, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_slot1; + dm_check(0); + + cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelation_CFG2_Offset; + + // LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr, + // receiver_sync_first_temp_dm3_ptr); + // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr), + // (uint64_t)0x88b00000, + // 512, + // DMA_TAG_L2G, + // 1); + + SlidingCorrelation((int)cfg_addr, + MPU_ADDR(receiver_sync_first_temp_dm0_ptr), + MPU_ADDR(receiver_sync_first_temp_dm1_ptr), + MPU_ADDR(receiver_sync_first_temp_dm2_ptr), + MPU_ADDR(receiver_sync_first_temp_dm3_ptr)); + + + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 4); + SVRReg[0] = MPU_ADDR(cfg_addr); + SlidingCorrelationAsm(SVRReg); + + WAIT_MPU_STOP; + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 6, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_slot1; + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 5); + dm_check(1); + maxPosition = receiver_sync_first_temp_dm3_ptr[0]; + maxsum = receiver_sync_first_temp_dm3_ptr[1]; + + ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(src_addr0 + (sample_per_csu<<2)), + (uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr),// + (61440 - sample_per_csu)<<2, + DMA_TAG_G2L, + 0); + ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(src_addr1), + (uint64_t)DM_TO_CSU_ADDR(receiver_sync_first_temp_dm0_ptr + (61440 - sample_per_csu)),// + (2048)<<2, + DMA_TAG_G2L, + 0); + ape_csu_task_lookup(DMA_TAG_G2L, 1); + + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 7, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_slot1; + + + + + + cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigByteCopy_CFG1_Offset; + + + ByteCopy((int)cfg_addr, + MPU_ADDR(receiver_sync_first_temp_dm0_ptr + 1024),//数据之间相差1024 + MPU_ADDR(receiver_sync_first_temp_dm1_ptr), + ((sample_per_csu)<<2)); + + + + + SVRReg[0] = MPU_ADDR(cfg_addr); + ByteCopyAsm(SVRReg); + + cfg_addr = (int32_t *)receiver_sync_first_config_dm0_ptr + g_receiver_sync_first_table_param.ConfigSlidingCorrelationSecond_CFG3_Offset; + //Debug: + + + // LOG_ERROR_S("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", cfg_addr, receiver_sync_first_temp_dm0_ptr, receiver_sync_first_temp_dm1_ptr, receiver_sync_first_temp_dm2_ptr, + // receiver_sync_first_temp_dm3_ptr); + + // ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(cfg_addr), + // (uint64_t)0x88a00000, + // 512, + // DMA_TAG_L2G, + // 1); + + SlidingCorrelationSecond((int)cfg_addr, + MPU_ADDR(receiver_sync_first_temp_dm0_ptr), + MPU_ADDR(receiver_sync_first_temp_dm1_ptr), + MPU_ADDR(receiver_sync_first_temp_dm2_ptr), + MPU_ADDR(receiver_sync_first_temp_dm3_ptr)); + WAIT_MPU_STOP; + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 8, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_slot1; + + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 6); + dm_check(2); + SVRReg[0] = MPU_ADDR(cfg_addr); + SlidingCorrelationSecondAsm(SVRReg); + WAIT_MPU_STOP; + dbg_slot1 = TIME_SLOT(); + dbg_time1 = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 9, TIME_DIFF(dbg_slot0, dbg_time0, dbg_slot1, dbg_time1) ); + dbg_time0 = dbg_time1; + dbg_slot0 = dbg_slot1; + + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 7); + + if(maxsum < receiver_sync_first_temp_dm3_ptr[1]) + { + maxPosition = receiver_sync_first_temp_dm3_ptr[0]; + maxsum = receiver_sync_first_temp_dm3_ptr[1]; + } + + dm_check(3); + //TODO:后续需要添加门限判断条件 + uint32_t threshold = 1; + if(threshold) + { + STORE_EX_W(&g_receiver_sync_status_SM_ptr->frame_head_offset , maxPosition % 61440); + LOG_INFO_S("rec sync first offset: %d %d\n", maxPosition, maxsum ); + ret = SYNC_OK; + } + + //执行完成，更新状态机 + if(SYNC_OK == ret) + { + STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_TRACKING); + } + else + { + STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status , SYNC_IDLE); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_proc_data_offset , -1); + STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, 0); + } + Receiver_Sync_First_Memory_Free(); + + + // LOG_ERROR_S("dgb break\n"); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_synch(0); + // __ucps2_dbgbreak(); + TRACE(TRACE_RECEIVER_SYNC_FIRST_ADDR, 3, 8); + + + RUN_CNT(TRACE_RECEIVER_SYNC_FIRST_ADDR, 1); + end_slot = TIME_SLOT(); + end_us = TIME_US(); + TRACE_MAX(TRACE_RECEIVER_SYNC_FIRST_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) ); + return; +} diff --git a/APELib/Receiver_sync_first/src/receiver_Sync_First_Var.s.c b/APELib/Receiver_sync_first/src/receiver_Sync_First_Var.s.c new file mode 100644 index 0000000..bb49cca --- /dev/null +++ b/APELib/Receiver_sync_first/src/receiver_Sync_First_Var.s.c @@ -0,0 +1,36 @@ +/****************************************************************** + * @file receiver_var.s.c + * @brief: [file description] + * @author: HUOHUO + * @Date 2024年4月20日 + * COPYRIGHT NOTICE: ITTC + * Change_date Owner Change_content + * 2024年4月20日 HUOHUO create file +*****************************************************************/ +#include "receiver_sync_first_struct.h" +#include "interface_rec_sync2_rec_sync_first.h" + +//Receiver微码配置空间offset结构体 +receiver_sync_first_table_param_t g_receiver_sync_first_table_param; +uint32_t *receiver_sync_first_config_dm0_ptr = NULLPTR; +uint32_t *receiver_sync_first_config_dm1_ptr = NULLPTR; +uint32_t *receiver_sync_first_config_dm2_ptr = NULLPTR; +uint32_t *receiver_sync_first_config_dm3_ptr = NULLPTR; + +int32_t *receiver_sync_first_malloc_dm0_ptr; +int32_t *receiver_sync_first_malloc_dm1_ptr; +int32_t *receiver_sync_first_malloc_dm2_ptr; +int32_t *receiver_sync_first_malloc_dm3_ptr; +int32_t *receiver_sync_first_temp_dm0_ptr; +int32_t *receiver_sync_first_temp_dm1_ptr; +int32_t *receiver_sync_first_temp_dm2_ptr; +int32_t *receiver_sync_first_temp_dm3_ptr; + +receiver_sync_status_t* g_receiver_sync_status_SM_ptr; +receiver_sync2symb_t data_send2symb_task[3]; +uint16_t g_proc_id; + + +//debug +uint32_t* last_mem_dm[8]; + diff --git a/APELib/TestTask/inc/Frame_test.h b/APELib/TestTask/inc/Frame_test.h new file mode 100644 index 0000000..ebd6590 --- /dev/null +++ b/APELib/TestTask/inc/Frame_test.h @@ -0,0 +1,15 @@ +#ifndef FRAME_TEST_H +#define FRAME_TEST_H + +#include "ape_interface.h" + +#include "ape_common.h" +#include "task_define.h" +#include "log_interface.h" +#include "msg_interface.h" +#include "msg_transfer_layer.h" +#include "drv_ape.h" +#include "trace.h" + +void Test_Task(); +#endif diff --git a/APELib/TestTask/src/Frame_test.s.c b/APELib/TestTask/src/Frame_test.s.c new file mode 100644 index 0000000..b3d0519 --- /dev/null +++ b/APELib/TestTask/src/Frame_test.s.c @@ -0,0 +1,81 @@ +#include "Frame_test.h" + +void Test_Task() +{ + + uint16_t start_slot = TIME_SLOT(); + uint16_t start_us = TIME_US(); + uint16_t end_slot; + uint16_t end_us; + RUN_CNT(TRACE_TESTTASK_ADDR, 0); + + uint32_t cur_sfn = get_rx_nr_sfn(); + uint32_t cur_slot = get_rx_nr_slot(); + int32_t *transmitter_malloc_dm0_ptr; + + LOG_ERROR_S("cur_sfn:%d, cur_slot:%d\n", cur_sfn, cur_slot); + + TRACE(TRACE_TESTTASK_ADDR, 3, 1); + + + //0 空间回收 + dmalloc_trim(0, APE_DM0); + dmalloc_trim(0, APE_DM1); + dmalloc_trim(0, APE_DM2); + dmalloc_trim(0, APE_DM3); + + //1. DM0空间申请 + transmitter_malloc_dm0_ptr = dmemalign_unit(0x4000, 131072, APE_DM0); //申请了128KiB 首地址16k对齐 + if (NULLPTR == transmitter_malloc_dm0_ptr) + { + //LOG_ERROR_S("alloc DM0 err\n", cur_sfn, cur_slot); + return; + } + + + int32_t *output_data_ptr;// 最终输出数据地址(dm) + + output_data_ptr = transmitter_malloc_dm0_ptr; + + TRACE(TRACE_TESTTASK_ADDR, 3, 2); + uint32_t idx = 0; + for(idx =0; idx < 100; idx++) + { + *(output_data_ptr + idx) = cur_sfn * 100000 + cur_slot * 100 + idx; + } + + uint32_t output_data_ptr_ddr_even = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR;// 最终输出数据地址(ddr) + uint32_t output_data_ptr_ddr_odd = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR ;// 最终输出数据地址(ddr) +// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)output_data_ptr), +// output_data_ptr_ddr_even, +// temp_len_32, +// DMA_TAG_L2G, +// 1); + + //LOG_ERROR_S("ddr_even:%08x, ddr_odd:%08x\n", output_data_ptr_ddr_even, output_data_ptr_ddr_odd); + TRACE(TRACE_TESTTASK_ADDR, 3, 3); + + uint32_t temp_len_32 = 7168; + + if(cur_slot % 2 == 1){ + ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(output_data_ptr), + output_data_ptr_ddr_even, + temp_len_32, + DMA_TAG_L2G, + 1); + }else{ + ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(output_data_ptr), + output_data_ptr_ddr_odd, + temp_len_32, + DMA_TAG_L2G, + 1); + } + + dfree_unit(transmitter_malloc_dm0_ptr, APE_DM0); + + TRACE(TRACE_TESTTASK_ADDR, 3, 4); + RUN_CNT(TRACE_TESTTASK_ADDR, 1); + end_slot = TIME_SLOT(); + end_us = TIME_US(); + TRACE_MAX(TRACE_TESTTASK_ADDR, 2, TIME_DIFF(start_slot, start_us, end_slot, end_us) ); +} diff --git a/Common/Makefile b/Common/Makefile new file mode 100644 index 0000000..28506c5 --- /dev/null +++ b/Common/Makefile @@ -0,0 +1,9 @@ +#INC_DIRS:=$(shell find ${MaPU_TC_HOME}/include/ucp2 -type d) +INC_DIRS+=$(shell find ../${COMMON_LIB_DIRS} -name inc -type d) +INC_DIRS+= ../Interface +INC_DIRS+= ../Inc +override INC_DIRS_OPTION:=$(patsubst %,-I%,${INC_DIRS}) +override WORK_DIR:=$(abspath $(lastword $(MAKEFILE_LIST))) +override PROJECT_NAME:=$(notdir $(patsubst %/,%,$(dir $(WORK_DIR)))) + +include ../Makefile diff --git a/Common/Scripts/ECS_RFM-spu0-noCache.ld b/Common/Scripts/ECS_RFM-spu0-noCache.ld new file mode 100644 index 0000000..9e46489 --- /dev/null +++ b/Common/Scripts/ECS_RFM-spu0-noCache.ld @@ -0,0 +1,97 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x220000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x220000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x260000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x400000) ; + + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +PHDRS { + TEXT PT_LOAD; + DATA PT_LOAD; + RODATA PT_LOAD; + DM0 PT_LOAD; + DM1 PT_LOAD; +} + +/* All text code & data are in IM */ +SECTIONS { + /* All .text & .data & .bss are located in IM */ + . = 0x000000; + .text : { *(.text.start) + ASSERT((. <= 0x40000), "Error: No room for SPU start .text"); + } : TEXT + + .text : { *(.text*) + ASSERT((. <= 0x40000), "Error: No room for SPU's .text"); + } : TEXT + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } : DATA + .sbss : { *(.sbss.2*) } : DATA + .sbss : { *(.sbss.4*) } : DATA + .sbss : { *(.sbss.8*) } : DATA + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } : DATA + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } : DATA + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } : DATA + .sdata : { *(.sdata.2*) } : DATA + .sdata : { *(.sdata.4*) } : DATA + .sdata : { *(.sdata.8*) } : DATA + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } : DATA + .rodata : { *(.rodata*) + ASSERT((. <= 0x40000), "Error: No room for .rodata"); + } : RODATA + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : { *( .DM0 ) + ASSERT((. <= 0x220000), "Error: No room for .DM0"); + } : DM0 + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : { *( .DM1 ) + ASSERT((. <= 0x260000), "Error: No room for .DM1"); + } : DM1 + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + __ucps2_d2heap_start = 0x2c0000; + __ucps2_d3heap_start = 0x300000; + __ucps2_d4heap_start = 0x340000; + __ucps2_d5heap_start = 0x380000; + __ucps2_d6heap_start = 0x3c0000; + __ucps2_d7heap_start = 0x400000; + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ECS_RFM-spu1-noCache.ld b/Common/Scripts/ECS_RFM-spu1-noCache.ld new file mode 100644 index 0000000..8c341a3 --- /dev/null +++ b/Common/Scripts/ECS_RFM-spu1-noCache.ld @@ -0,0 +1,96 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x260000 - 0x40)) ;/* DM1 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x220000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x260000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x400000) ; + + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +PHDRS { + TEXT PT_LOAD; + DATA PT_LOAD; + RODATA PT_LOAD; + DM0 PT_LOAD; + DM1 PT_LOAD; +} + +/* All text code & data are in IM */ +SECTIONS { + /* All .text & .data & .bss are located in IM */ + . = 0x000000; + .text : { *(.text.start) + ASSERT((. <= 0x40000), "Error: No room for SPU start .text"); + } : TEXT + .text : { *(.text*) + ASSERT((. <= 0x40000), "Error: No room for SPU's .text"); + } : TEXT + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } : DATA + .sbss : { *(.sbss.2*) } : DATA + .sbss : { *(.sbss.4*) } : DATA + .sbss : { *(.sbss.8*) } : DATA + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } : DATA + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } : DATA + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } : DATA + .sdata : { *(.sdata.2*) } : DATA + .sdata : { *(.sdata.4*) } : DATA + .sdata : { *(.sdata.8*) } : DATA + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } : DATA + .rodata : { *(.rodata*) + ASSERT((. <= 0x40000), "Error: No room for .rodata"); + } : RODATA + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : { *( .DM0 ) + ASSERT((. <= 0x220000), "Error: No room for .DM0"); + } : DM0 + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : { *( .DM1 ) + ASSERT((. <= 0x260000), "Error: No room for .DM1"); + } : DM1 + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + + __ucps2_d2heap_start = 0x2c0000; + __ucps2_d3heap_start = 0x300000; + __ucps2_d4heap_start = 0x340000; + __ucps2_d5heap_start = 0x380000; + __ucps2_d6heap_start = 0x3c0000; + __ucps2_d7heap_start = 0x400000; + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape0-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape0-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..f19b097 --- /dev/null +++ b/Common/Scripts/ape0-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,239 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; +PROVIDE(__ucps2_mim_dyn_start = 0x70000); + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x70000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23C000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x90000000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x91c00000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e000000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9e040000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e040000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9e080000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e080000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9e0c0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e0c0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9e100000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e100000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9e140000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e140000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9e180000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e180000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9e1c0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e1c0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9e200000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape0-Cache128-noMPUC.ld b/Common/Scripts/ape0-Cache128-noMPUC.ld new file mode 100644 index 0000000..7043b23 --- /dev/null +++ b/Common/Scripts/ape0-Cache128-noMPUC.ld @@ -0,0 +1,160 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23C000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x90000000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x91c00000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x91c00000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape1-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape1-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..f274f13 --- /dev/null +++ b/Common/Scripts/ape1-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,238 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_mim_dyn_start = 0x70000); + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x70000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FC000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x91c00000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x93800000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x93800000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x93800000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x93800000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e200000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9e240000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e240000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9e280000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e280000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9e2c0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e2c0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9e300000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e300000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9e340000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e340000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9e380000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e380000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9e3c0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e3c0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9e400000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape1-Cache128-noMPUC.ld b/Common/Scripts/ape1-Cache128-noMPUC.ld new file mode 100644 index 0000000..23ed195 --- /dev/null +++ b/Common/Scripts/ape1-Cache128-noMPUC.ld @@ -0,0 +1,166 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FC000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /* Place .LOG section in DDR */ + . = 0xB7300000; + HIDDEN(__section_start = .); + .log : AT(__section_end) { *( .LOG ) + ASSERT((. <= 0xB7400000), "Error: No room for log"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + . = 0x9c400000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x9c800000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x9c800000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape2-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape2-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..219123b --- /dev/null +++ b/Common/Scripts/ape2-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,239 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23F000) ;/* SPU Vector Stack = 4KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; +PROVIDE(__ucps2_mim_dyn_start = 0x6FF00); + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x6FF00), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23F000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23F000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x93800000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x95400000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x95400000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x95400000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x95400000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e400000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9e440000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e440000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9e480000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e480000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9e4c0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e4c0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9e500000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e500000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9e540000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e540000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9e580000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e580000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9e5c0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e5c0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9e600000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape2-Cache128-noMPUC.ld b/Common/Scripts/ape2-Cache128-noMPUC.ld new file mode 100644 index 0000000..2d8ef48 --- /dev/null +++ b/Common/Scripts/ape2-Cache128-noMPUC.ld @@ -0,0 +1,159 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23F000) ;/* SPU Vector Stack = 4KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23F000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23F000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x93800000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x95400000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x95400000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} diff --git a/Common/Scripts/ape3-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape3-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..93acfcc --- /dev/null +++ b/Common/Scripts/ape3-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,238 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FF000) ;/* SPU Vector Stack = 4KB, no MPU Stack */ +PROVIDE(__ucps2_mim_dyn_start = 0x580C0); + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x580C0), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FF000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FF000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x95400000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x97000000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x97000000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x97000000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x97000000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e600000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9e640000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e640000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9e680000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e680000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9e6c0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e6c0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9e700000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e700000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9e740000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e740000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9e780000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e780000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9e7c0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e7c0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9e800000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape3-Cache128-noMPUC.ld b/Common/Scripts/ape3-Cache128-noMPUC.ld new file mode 100644 index 0000000..9b4543d --- /dev/null +++ b/Common/Scripts/ape3-Cache128-noMPUC.ld @@ -0,0 +1,159 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FF000) ;/* SPU Vector Stack = 4KB, no MPU Stack */ + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FF000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FF000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x95400000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x97000000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x97000000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape4-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape4-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..35c194a --- /dev/null +++ b/Common/Scripts/ape4-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,239 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; +PROVIDE(__ucps2_mim_dyn_start = 0x70000); + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x70000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23C000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x97000000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x98c00000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e800000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9e840000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e840000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9e880000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e880000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9e8c0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e8c0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9e900000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e900000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9e940000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e940000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9e980000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e980000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9e9c0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9e9c0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9ea00000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape4-Cache128-noMPUC.ld b/Common/Scripts/ape4-Cache128-noMPUC.ld new file mode 100644 index 0000000..ad83480 --- /dev/null +++ b/Common/Scripts/ape4-Cache128-noMPUC.ld @@ -0,0 +1,160 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23C000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x97000000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x98c00000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x98c00000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape5-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape5-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..f7a3ad9 --- /dev/null +++ b/Common/Scripts/ape5-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,238 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_mim_dyn_start = 0x70000); + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x70000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FC000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x98c00000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x9a800000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ea00000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9ea40000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ea40000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9ea80000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ea80000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9eac0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9eac0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9eb00000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9eb00000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9eb40000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9eb40000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9eb80000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9eb80000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9ebc0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ebc0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9ec00000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape5-Cache128-noMPUC.ld b/Common/Scripts/ape5-Cache128-noMPUC.ld new file mode 100644 index 0000000..16ebd02 --- /dev/null +++ b/Common/Scripts/ape5-Cache128-noMPUC.ld @@ -0,0 +1,159 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FC000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x98c00000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x9a800000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x9a800000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape6-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape6-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..efd4acc --- /dev/null +++ b/Common/Scripts/ape6-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,239 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 4KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; +PROVIDE(__ucps2_mim_dyn_start = 0x70000); + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x70000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23C000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9a800000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x9c400000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ec00000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9ec40000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ec40000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9ec80000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ec80000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9ecc0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ecc0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9ed00000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ed00000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9ed40000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ed40000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9ed80000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ed80000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9edc0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9edc0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9ee00000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape6-Cache128-noMPUC.ld b/Common/Scripts/ape6-Cache128-noMPUC.ld new file mode 100644 index 0000000..70bc29f --- /dev/null +++ b/Common/Scripts/ape6-Cache128-noMPUC.ld @@ -0,0 +1,159 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x240000 - 0x40)) ;/* DM0 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ; + +CORE(ape0); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + .rodata : { *(.rodata*) + ASSERT((. <= 0x23C000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9a800000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x9c400000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x9c400000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} diff --git a/Common/Scripts/ape7-Cache128-noMPUC-dynamic.ld b/Common/Scripts/ape7-Cache128-noMPUC-dynamic.ld new file mode 100644 index 0000000..2fb6848 --- /dev/null +++ b/Common/Scripts/ape7-Cache128-noMPUC-dynamic.ld @@ -0,0 +1,238 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ +PROVIDE(__ucps2_mim_dyn_start = 0x70000); + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x70000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FC000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9c400000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x9e000000), "Error: No room for SPU start .text"); + } + .text : { *(.text) + ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text"); + } + .text : { *(.text.[^m]*) + ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text"); + } + .text : { *(.text.m[^0]*) + ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ee00000; + __ucps2_mim_ddr0_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr0) + ASSERT((. <= 0x9ee40000), "Error: No room for MIM DDR0 .text"); + } + __ucps2_mim_ddr0_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ee40000; + __ucps2_mim_ddr1_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr1) + ASSERT((. <= 0x9ee80000), "Error: No room for MIM DDR1 .text"); + } + __ucps2_mim_ddr1_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ee80000; + __ucps2_mim_ddr2_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr2) + ASSERT((. <= 0x9eec0000), "Error: No room for MIM DDR2 .text"); + } + __ucps2_mim_ddr2_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9eec0000; + __ucps2_mim_ddr3_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr3) + ASSERT((. <= 0x9ef00000), "Error: No room for MIM DDR3 .text"); + } + __ucps2_mim_ddr3_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ef00000; + __ucps2_mim_ddr4_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr4) + ASSERT((. <= 0x9ef40000), "Error: No room for MIM DDR4 .text"); + } + __ucps2_mim_ddr4_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ef40000; + __ucps2_mim_ddr5_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr5) + ASSERT((. <= 0x9ef80000), "Error: No room for MIM DDR5 .text"); + } + __ucps2_mim_ddr5_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9ef80000; + __ucps2_mim_ddr6_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr6) + ASSERT((. <= 0x9efc0000), "Error: No room for MIM DDR6 .text"); + } + __ucps2_mim_ddr6_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9efc0000; + __ucps2_mim_ddr7_start = .; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0.ddr7) + ASSERT((. <= 0x9f000000), "Error: No room for MIM DDR7 .text"); + } + __ucps2_mim_ddr7_end = .; + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/ape7-Cache128-noMPUC.ld b/Common/Scripts/ape7-Cache128-noMPUC.ld new file mode 100644 index 0000000..9d528e0 --- /dev/null +++ b/Common/Scripts/ape7-Cache128-noMPUC.ld @@ -0,0 +1,159 @@ +ENTRY( __ucps2_init ) ; +PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ +PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; +PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; +PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; +PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; +PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; +PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; +PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; +PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; +PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ + +CORE(ape1); +CACHE_SIZE(128); + +/**************************************************************** + * The segments definition, which affect the load address of the + * elf. + */ + +/* All text code & data are in IM */ +SECTIONS { + /* All .data & .bss are located in IM */ + . = 0x20000; /* icache size: 128KB */ + + /* tag start point for bss */ + __ucps2_bss_start = ALIGN(0x4); + .sbss : { *(.sbss.1*) } + .sbss : { *(.sbss.2*) } + .sbss : { *(.sbss.4*) } + .sbss : { *(.sbss.8*) } + .sbss : { *(.sbss*) + ASSERT((. <= 0x40000), "Error: No room for .sbss"); + } + .bss : { *(.bss*) + ASSERT((. <= 0x40000), "Error: No room for .bss"); + } + __ucps2_bss_end = ALIGN(0x4); + .sdata : { *(.sdata.1*) } + .sdata : { *(.sdata.2*) } + .sdata : { *(.sdata.4*) } + .sdata : { *(.sdata.8*) } + .sdata : { *(.sdata*) + ASSERT((. <= 0x40000), "Error: No room for .sdata"); + } + HIDDEN(__section_end = ALIGN(4)); + + /* tag start point for heap */ + __ucps2_heap_start = ALIGN(0x8); + + . = 0x40000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.m0) + ASSERT((. <= 0x80000), "Error: No room for MPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + /********************************************/ + . = 0x200000; + HIDDEN(__section_start = .); + .DM0 : AT(__section_end) { *( .DM0 ) + ASSERT((. <= 0x23C000), "Error: No room for .DM0"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM0 */ + __ucps2_d0heap_start = ALIGN(0x8); + + . = 0x240000; + HIDDEN(__section_start = .); + .DM1 : AT(__section_end) { *( .DM1 ) + ASSERT((. <= 0x280000), "Error: No room for .DM1"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM1 */ + __ucps2_d1heap_start = ALIGN(0x8); + + . = 0x280000; + HIDDEN(__section_start = .); + .DM2 : AT(__section_end) { *( .DM2 ) + ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM2 */ + __ucps2_d2heap_start = ALIGN(0x8); + + . = 0x2c0000; + HIDDEN(__section_start = .); + .DM3 : AT(__section_end) { *( .DM3 ) + ASSERT((. <= 0x300000), "Error: No room for .DM3"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM3*/ + __ucps2_d3heap_start = ALIGN(0x8); + + . = 0x300000; + HIDDEN(__section_start = .); + .DM4 : AT(__section_end) { *( .DM4 ) + ASSERT((. <= 0x340000), "Error: No room for .DM4"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM4*/ + __ucps2_d4heap_start = ALIGN(0x8); + + . = 0x340000; + HIDDEN(__section_start = .); + .DM5 : AT(__section_end) { *( .DM5 ) + ASSERT((. <= 0x380000), "Error: No room for .DM5"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM5*/ + __ucps2_d5heap_start = ALIGN(0x8); + + . = 0x380000; + HIDDEN(__section_start = .); + .DM6 : AT(__section_end) { *( .DM6 ) + ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM6*/ + __ucps2_d6heap_start = ALIGN(0x8); + + . = 0x3C0000; + HIDDEN(__section_start = .); + .DM7 : AT(__section_end) { *( .DM7 ) + ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); + } + .rodata :{ *(.rodata*) + ASSERT((. <= 0x3FC000), "Error: No room for .rodata"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + /* tag start point for heap in DM7*/ + __ucps2_d7heap_start = ALIGN(0x8); + + . = 0x04000000; + HIDDEN(__section_start = .); + .virt.sm : AT(__section_end) { *(.virt.sm) + ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); + } + .noinit.MREG : + { + *(noinit.MREG) + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + . = 0x9c400000; + HIDDEN(__section_start = .); + .text : AT(__section_end) { *(.text.start) + ASSERT((. <= 0x9e000000), "Error: No room for SPU start .text"); + } + .text : { *(.text*) + ASSERT((. <= 0x9e000000), "Error: No room for SPU's .text"); + } + HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); + + HIDDEN(__section_start = 0xffffffff); + HIDDEN(__section_end = 0xffffffff); +} + diff --git a/Common/Scripts/d2d_sourceinsight_cfg.xml b/Common/Scripts/d2d_sourceinsight_cfg.xml new file mode 100644 index 0000000..a393f20 --- /dev/null +++ b/Common/Scripts/d2d_sourceinsight_cfg.xml @@ -0,0 +1,8422 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +