jinhong/YB_TX_RX_APE_PRJ
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1. 删除微码Block_Transform，tx/rx统一使用BlockTransform 2.新增ARM相关地址规划，新增pcie2recv的ddr空间，用于rk3588解算完成后告知APE4更新变换参数 3.修改Transform函数的接口，现在通过查表得到角度R/I值 4.新增Recv开始处理接口，通过devmem 0x82000000 0xa5a55a5a 32启动 5.PCIE task新增init函数，便于使用transform_para_func相关函数

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This commit is contained in:
HUOHUO 2025-05-05 10:52:49 -07:00
parent 7fa11fe558
commit cd5c347a46
49 changed files with 40956 additions and 266094 deletions
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2
APE3/Makefile
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@ -1,6 +1,6 @@
############################
# mpu libs need to link to this APE, could be specified by user
MICRO_CODE_LIBS:=Block_Transform Channel_Est Channel_Equ Fre_est Fre_comp
MICRO_CODE_LIBS:=BlockTransform Channel_Est Channel_Equ Fre_est Fre_comp
############################
# tool path, could be specified by user
#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin

2
APE5/Makefile
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@ -1,6 +1,6 @@
############################
# mpu libs need to link to this APE, could be specified by user
MICRO_CODE_LIBS:=Block_Transform Channel_Est Channel_Equ Fre_est Fre_comp
MICRO_CODE_LIBS:=BlockTransform Channel_Est Channel_Equ Fre_est Fre_comp
############################
# tool path, could be specified by user
#UCP_HOME=/opt/sdk/ucp2.0_sdk/bin

14
APE6/TestTask/inc/Frame_test.h Normal file
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@ -0,0 +1,14 @@
#ifndef FRAME_TEST_H
#define FRAME_TEST_H
#include "ape_common.h"
#include "task_define.h"
#include "log_interface.h"
#include "msg_interface.h"
#include "msg_transfer_layer.h"
#include "drv_ape.h"
#include "trace.h"
void Test_Task();
#endif

77
APE6/TestTask/src/Frame_test.s.c Normal file
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@ -0,0 +1,77 @@
#include "Frame_test.h"
void Test_Task()
{
uint16_t start_slot = TIME_SLOT();
g_time_start[0] = TIME_NS();
RUN_CNT(TRACE_TESTTASK_ADDR, 0);
uint32_t cur_sfn = get_rx_nr_sfn();
uint32_t cur_slot = get_rx_nr_slot();
int32_t *transmitter_malloc_dm0_ptr;
LOG_ERROR_S("cur_sfn:%d, cur_slot:%d\n", cur_sfn, cur_slot);
TRACE(TRACE_TESTTASK_ADDR, 3, 1);
//0 空间回收
dmalloc_trim(0, APE_DM0);
dmalloc_trim(0, APE_DM1);
dmalloc_trim(0, APE_DM2);
dmalloc_trim(0, APE_DM3);
//1. DM0空间申请
transmitter_malloc_dm0_ptr = dmemalign_unit(0x4000, 131072, APE_DM0); //申请了128KiB 首地址16k对齐
if (NULLPTR == transmitter_malloc_dm0_ptr)
{
//LOG_ERROR_S("alloc DM0 err\n", cur_sfn, cur_slot);
return;
}
int32_t *output_data_ptr;// 最终输出数据地址(dm)
output_data_ptr = transmitter_malloc_dm0_ptr;
TRACE(TRACE_TESTTASK_ADDR, 3, 2);
uint32_t idx = 0;
for(idx =0; idx < 100; idx++)
{
*(output_data_ptr + idx) = cur_sfn * 100000 + cur_slot * 100 + idx;
}
uint32_t output_data_ptr_ddr_even = (uint32_t)JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR;// 最终输出数据地址(ddr)
uint32_t output_data_ptr_ddr_odd = (uint32_t)JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR ;// 最终输出数据地址(ddr)
// ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)output_data_ptr),
// output_data_ptr_ddr_even,
// temp_len_32,
// DMA_TAG_L2G,
// 1);
//LOG_ERROR_S("ddr_even:%08x, ddr_odd:%08x\n", output_data_ptr_ddr_even, output_data_ptr_ddr_odd);
TRACE(TRACE_TESTTASK_ADDR, 3, 3);
uint32_t temp_len_32 = 7168;
if(cur_slot % 2 == 1){
ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(output_data_ptr),
output_data_ptr_ddr_even,
temp_len_32,
DMA_TAG_L2G,
1);
}else{
ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR(output_data_ptr),
output_data_ptr_ddr_odd,
temp_len_32,
DMA_TAG_L2G,
1);
}
dfree_unit(transmitter_malloc_dm0_ptr, APE_DM0);
TRACE(TRACE_TESTTASK_ADDR, 3, 4);
RUN_CNT(TRACE_TESTTASK_ADDR, 1);
TRACE_MAX(TRACE_TESTTASK_ADDR, 2, Time_offset(0) );
}

2
APE7/ApeTask/inc/Fucp_Ape7_pcie_testcase.h
View File

@ -14,6 +14,7 @@
#ifndef __PCIE_TESTCASE_H__
#define __PCIE_TESTCASE_H__
#include "interface_rec_sync2_pcie.h"
#include "interface_pcie2_rec_sync.h"
uint32_t pcie_rx_callback_data(const char* buf,uint32_t payloadSize);
uint32_t pcie_rx_callback_ctrl(const char* buf,uint32_t payloadSize);
uint32_t pcie_rx_callback_oam(const char* buf,uint32_t payloadSize);
@ -22,6 +23,7 @@ void test_case_sendmsg_pcie();
void test_case_recv_msg_pcie();
void test_speed_sendmsg_pcie();
void test_speed_recv_msg_pcie();
void pcie_test_task_init();
void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len);
#endif

2
APE7/ApeTask/src/Fucp_Ape7_Init.s.c
View File

@ -57,7 +57,7 @@ void Phy_Task_Ape7_Reg()
osp_task_info_ex mgr_task =
{PHY_TASK_RECEIVER_FIRST_SYNC, "Receiver_Sync_First_Sync", PHY_TASK_PRI_RECEIVER_FIRST_SYNC, 4096, OSP_EVENT_TYPE, 0x000, 0x000, 0, (OSP_TASKINIT_FUNC)Receiver_Sync_First_Init, (OSP_TASKENTRY_FUNC)Receiver_First_Sync_Proc};
osp_task_info_ex pcie_normal_task_info =
{PHY_TASK_PCIE, (int8_t*)"pcie_normal_task", PHY_TASK_PRI_PCIE, 4096, OSP_EVENT_TYPE, 0x000, 0, 0, NULL, (OSP_TASKENTRY_FUNC)pcie_test_task_func};
{PHY_TASK_PCIE, (int8_t*)"pcie_normal_task", PHY_TASK_PRI_PCIE, 4096, OSP_EVENT_TYPE, 0x000, 0, 0, (OSP_TASKINIT_FUNC)pcie_test_task_init, (OSP_TASKENTRY_FUNC)pcie_test_task_func};
// osp_task_create(&ape7_event_task_info);
// osp_task_create(&ape7_event_task_info_del);

27
APE7/ApeTask/src/Fucp_Ape7_pcie_testcase.s.c
View File

@ -35,6 +35,7 @@
#include "Fucp_Ape7_pcie_testcase.h"
#include "mem_def.h"
#include "interface_rec_sync2_rec_sync_first.h"
#include "transform_para_func.h"
@ -476,6 +477,14 @@ void test_speed_recv_msg_pcie()
}
void pcie_test_task_init()
{
transform_para_init(0, 0, 0);
return;
}
void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len)
{
//获取状态机状态
@ -487,7 +496,7 @@ void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len)
SYNC_AI_PROCECING,
SYNC_TRACKING
}receiver_sync_status_e;*/
if(2 != LOAD_EX_W(status_SM_addr->sync_status))
if(2 != LOAD_EX_W(&(status_SM_addr->sync_status)))
return ;
//提供的数据地址(DDR)和本次数据的SFN SLOT号
uint32_t sfn = msg_ptr->sfn;
@ -520,9 +529,23 @@ void pcie_test_task_func(receiver_sync2pcie_t* msg_ptr, uint32_t msg_len)
//TODO:接收到RK3588的数据后，必须更新状态机后级模块才能工作
//WARNING:需要使用这个代码
#if 0
#if 1
uint32_t ref_sfn = 0, ref_slot = 0;//PCIE解算存下来的时序值
uint32_t bit9 = 0, bit11 = 0, bit13 = 0;
transform_decode_para(bit9, bit11, bit13);
//置为1以后，APE4改变状态时会重置状态值，
receiver_pcie2sync_t* pcie2sync = (receiver_pcie2sync_t*)TRANSFORM_REF_PARA_PCIE2SYNC_ADDR;//存储在DDR
STORE_EX_W(&(pcie2sync->ref_sfn) , ref_sfn);
STORE_EX_W(&(pcie2sync->ref_slot) , ref_slot);
STORE_EX_W(&(pcie2sync->thita1_val) , g_thita1_val);
STORE_EX_W(&(pcie2sync->thita2_val) , g_thita2_val);
STORE_EX_W(&(pcie2sync->thita34_val) , g_thita34_val);
STORE_EX_W(&(pcie2sync->status) , 1); // 0: not ready 1: wait APE4 read 2:APE4 read & done
STORE_EX_W(status_SM_addr->sync_status , 3);
__ucps2_synch(0);
#endif
return;

2
APELib/Receiver_symb/inc/TransformImpl.h
View File

@ -5,6 +5,6 @@
#include <Transform.h>
#include "stdio.h"
void TransformImpl(v16u32 * SVRReg,int *ConfigAddr, int InAddr, int OutAddr, int N, double* thita, int direct);
void TransformImpl(v16u32 * SVRReg,int *ConfigAddr, int InAddr, int OutAddr, int N, double* db_real, double* db_imag, int direct);
#endif //DEBUG_MC

5
APELib/Receiver_symb/src/TransformImpl.s.c
View File

@ -6,8 +6,7 @@
void TransformImpl(v16u32 * SVRReg,int *ConfigAddr, int InAddr, int OutAddr, int N, double* thita, int direct){
void TransformImpl(v16u32 * SVRReg,int *ConfigAddr, int InAddr, int OutAddr, int N, double* db_real, double* db_imag, int direct){
SVRReg[0] = (v16u32){0, 0, 0, 0,
0x40, 0, 0, 0,
@ -15,7 +14,7 @@ void TransformImpl(v16u32 * SVRReg,int *ConfigAddr, int InAddr, int OutAddr, int
0xffff, 0x6, 0, 0};
volatile int a;
Transform((int)ConfigAddr,MPU_ADDR(InAddr),MPU_ADDR(OutAddr), N, thita, direct);
Transform((int)ConfigAddr,MPU_ADDR(InAddr),MPU_ADDR(OutAddr), N, db_real, db_imag, direct);
SVRReg[0][0] = MPU_ADDR(ConfigAddr);
if(N==2){
Transform2Asm(*SVRReg);

34
APELib/Receiver_symb/src/transform_Proc.s.c
View File

@ -9,7 +9,7 @@ void Transform_Proc(
int32_t *temp_dm3_ptr
)
{
receiver_sync2symb_t *proc_info = param_ptr;
//局部变量定义
uint32_t equ_data_ddr_ptr = CHANNELEQU_DATA_DDR_PTR; // COMPENSATED_DATA_DDR_PTR; // EQU_DATA_DDR_PTR;
// uint32_t res_ptr = CHANNELEQU_DATA_DDR_PTR;
@ -28,19 +28,23 @@ void Transform_Proc(
volatile int a;
/*****************************************initial*****************************************/
double thita[6];
int current_state[9 + 11 + 13];
for (int ii = 0; ii < 9 + 11 + 13; ii++){
int tmp = rand();
if(tmp>RAND_MAX/2)
current_state[ii] = 1;
else
current_state[ii] = 0;
}
double *db_imag = proc_info->transform_para_real;
double *db_real = proc_info->transform_para_imag;
get_thita(current_state,thita);
double* thita1, * thita2, * thita3;
thita1 = thita2 = thita;
thita3 = thita + 2;
// int current_state[9 + 11 + 13];
// for (int ii = 0; ii < 9 + 11 + 13; ii++){
// int tmp = rand();
// if(tmp>RAND_MAX/2)
// current_state[ii] = 1;
// else
// current_state[ii] = 0;
// }
// get_thita(current_state,thita);
// double* thita1, * thita2, * thita3;
// thita1 = thita2 = thita;
// thita3 = thita;
for(int iBlk = 0;iBlk < 7;iBlk++){
ape_csu_dma_1D_G2L_ch2ch3_transfer(
@ -51,7 +55,7 @@ void Transform_Proc(
1 //uint8_t isWait
);
ape_csu_task_lookup(DMA_TAG_G2L, 1);
TransformImpl(SVRReg, Cfg_DeTransform4,TransTemp,OutputAddr_Trans, 4, thita3, -1);
TransformImpl(SVRReg, Cfg_DeTransform4,TransTemp,OutputAddr_Trans, 4, db_real, db_imag, -1);
ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)OutputAddr_Trans),
(uint64_t)symbol_SM_addr_in + 4096*4*2*iBlk,
@ -73,7 +77,7 @@ void Transform_Proc(
DMA_TAG_G2L, //tag
1);
ape_csu_task_lookup(DMA_TAG_G2L, 1);
TransformImpl(SVRReg, Cfg_DeTransform2,InputAddr_Trans,TransTemp, 2, thita2, -1);
TransformImpl(SVRReg, Cfg_DeTransform2,InputAddr_Trans,TransTemp, 2, db_real, db_imag, -1);
for(int i = 0; i<14;i++){
ape_csu_dma_1D_L2G_ch0ch1_transfer(

2
APELib/Receiver_sync/inc/receiver_sync_func.h
View File

@ -25,6 +25,8 @@
#include "interface_rec_sync2_rec_sync_first.h"
#include "interface_rec_sync2_pcie.h"
#include "receiver_sync_vars.h"
#include "transform_para_func.h"
#include "interface_pcie2_rec_sync.h"
//include mpu header files
#include "ByteCopy.h"

33
APELib/Receiver_sync/src/receiver_Sync_Proc.s.c
View File

@ -185,6 +185,11 @@ void Receiver_Sync_Proc(
}
else if(SYNC_IDLE == sync_status)
{
//只有指定地址标志位置位，才开始recv的处理
volatile uint32_t recv_start_first_sync_flag = LOAD_EX_W((uint32_t)RECV_FIRST_SYNC_START_FLAG);
if(0xa5a55a5a != recv_start_first_sync_flag)
return ;
TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 3);
STORE_EX_W(&g_receiver_sync_status_SM_ptr->sync_status ,SYNC_FIRST_RUNING);
__ucps2_synch(0);
@ -213,6 +218,22 @@ void Receiver_Sync_Proc(
else if((SYNC_TRACKING == sync_status) || (SYNC_AI_PROCECING == sync_status))
{
TRACE(TRACE_RECEIVER_SYNC_ADDR, 3, 5);
receiver_pcie2sync_t* pcie2sync = (receiver_pcie2sync_t*)TRANSFORM_REF_PARA_PCIE2SYNC_ADDR;//存储在DDR
volatile uint32_t transform_para_status = LOAD_EX_W(&(pcie2sync->status));
if(1 == transform_para_status)
{
g_thita1_val = LOAD_EX_W(&(pcie2sync->thita1_val));
g_thita2_val = LOAD_EX_W(&(pcie2sync->thita2_val));
g_thita34_val = LOAD_EX_W(&(pcie2sync->thita34_val));
uint32_t ref_sfn = LOAD_EX_W(&(pcie2sync->ref_sfn));
uint32_t ref_slot = LOAD_EX_W(&(pcie2sync->ref_sfn));
//根据时序递推参数
transform_update_cur_para(cur_sfn, cur_slot, ref_sfn, ref_slot);
//同步transform参数后，置位状态位2，表示APE4完成了本次同步，等待下一次被置1
STORE_EX_W(&(pcie2sync->status) , 2); // 0: not ready 1: wait APE4 read 2:APE4 read & done
__ucps2_synch(0);
}
Receiver_Fine_Sync_Proc(cur_sfn, cur_slot, sync_status);
//根据当前状态机状态，buffer存储的数据长度，sync同步帧头，发送核间消息触发任务
@ -427,6 +448,14 @@ void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot, uint32_t proc_type)
data_send2symb_task[task_idx].data_section0_length = (offset_temp > (61440 * RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER)) ? ((61440 * RECEIVER_SYNC_SYNC2SYMB_NUM_BUFFER) - (offset_temp - 61440)) : 61440;
data_send2symb_task[task_idx].data_section1_ptr = (2 == data_send2symb_task[task_idx].num_data_section) ? (sync2symb_data_buffer[0]) : 0;
data_send2symb_task[task_idx].data_section1_length = (2 == data_send2symb_task[task_idx].num_data_section) ? (61440 - data_send2symb_task[task_idx].data_section0_length) : 0;
data_send2symb_task[task_idx].transform_para_real[0] = transform_get_thita1_real();
data_send2symb_task[task_idx].transform_para_real[1] = transform_get_thita2_real();
data_send2symb_task[task_idx].transform_para_real[2] = transform_get_thita3_real();
data_send2symb_task[task_idx].transform_para_real[3] = transform_get_thita4_real();
data_send2symb_task[task_idx].transform_para_imag[0] = transform_get_thita1_imag();
data_send2symb_task[task_idx].transform_para_imag[1] = transform_get_thita2_imag();
data_send2symb_task[task_idx].transform_para_imag[2] = transform_get_thita3_imag();
data_send2symb_task[task_idx].transform_para_imag[3] = transform_get_thita4_imag();
//维护状态信息
cylic_buffer_data_len = cylic_buffer_data_offset_temp - offset_temp;
@ -455,6 +484,8 @@ void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot, uint32_t proc_type)
symb_proc_core_sel,
PHY_TASK_RECEIVER_SYNC,
PHY_TASK_RECEIVER_SYMB);
//递推1次
transform_para_update(1);
}
else
{
@ -503,6 +534,8 @@ void Receiver_Fine_Sync_Proc(uint32_t sfn, uint32_t slot, uint32_t proc_type)
STORE_EX_W(&g_receiver_sync_status_SM_ptr->cylic_buffer_data_len, 0);
}
TRACE(TRACE_RECEIVER_SYNC_FINE_ADDR, 3, 7);
ape_csu_task_lookup(DMA_TAG_G2G, 1);
Receiver_Sync_Memory_Free();

19
APELib/Transform_func/inc/transform_para_func.h
View File

@ -2,7 +2,7 @@
#define _TRANSFORM_PARA_FUNC_H
#include "typedef.h"
#include "type_define.h"
#include "log_interface.h"
#include "phy_macro.h"
#define THITA1_LEN (511)
@ -17,12 +17,27 @@ extern uint32_t g_thita1_addr;
extern uint32_t g_thita2_addr;
extern uint32_t g_thita3_addr;
extern uint32_t g_thita4_addr;
extern double thita2real[4][4];
extern double thita2imag[4][4];
#define transform_get_thita1_2bit() (LOAD_EX_W(g_thita1_addr + (g_thita1_val<<2)))
#define transform_get_thita2_2bit() (LOAD_EX_W(g_thita2_addr + (g_thita2_val<<2)))
#define transform_get_thita3_2bit() (LOAD_EX_W(g_thita3_addr + (g_thita34_val<<2)))
#define transform_get_thita4_2bit() (LOAD_EX_W(g_thita4_addr + (g_thita34_val<<2)))
#define transform_get_thita1_real() (thita2real[0][LOAD_EX_W(g_thita1_addr + (g_thita1_val<<2))])
#define transform_get_thita2_real() (thita2real[1][LOAD_EX_W(g_thita2_addr + (g_thita2_val<<2))])
#define transform_get_thita3_real() (thita2real[2][LOAD_EX_W(g_thita3_addr + (g_thita34_val<<2))])
#define transform_get_thita4_real() (thita2real[3][LOAD_EX_W(g_thita4_addr + (g_thita34_val<<2))])
#define transform_get_thita1_imag() (thita2imag[0][LOAD_EX_W(g_thita1_addr + (g_thita1_val<<2))])
#define transform_get_thita2_imag() (thita2imag[1][LOAD_EX_W(g_thita2_addr + (g_thita2_val<<2))])
#define transform_get_thita3_imag() (thita2imag[2][LOAD_EX_W(g_thita3_addr + (g_thita34_val<<2))])
#define transform_get_thita4_imag() (thita2imag[3][LOAD_EX_W(g_thita4_addr + (g_thita34_val<<2))])
//获得当前8bit随机数值
#define get_transform_8bit() (uint8_t)(transform_get_thita1_2bit() || (transform_get_thita2_2bit() << 2) || \
(transform_get_thita3_2bit()<<4) || (transform_get_thita4_2bit() << 8))
@ -59,6 +74,6 @@ int transform_decode_para(uint32_t thita1_para, uint32_t thita2_para, uint32_t t
*param: ref_sfn：rk3588解算输入使用的sfn号
*param: ref_slot：rk3588解算输入使用的slot号
*/
int transform_update_cur_para(uint32_t cur_sfn, uint32_t cur_slot, uint32_t ref_sfn, uint32_t ref_slot)
int transform_update_cur_para(uint32_t cur_sfn, uint32_t cur_slot, uint32_t ref_sfn, uint32_t ref_slot);
#endif /*_TRANSFORM_PARA_FUNC_H*/

14
APELib/Transform_func/src/transform_para_func.s.c
View File

@ -4,6 +4,18 @@ volatile uint32_t g_thita1_val;
volatile uint32_t g_thita2_val;
volatile uint32_t g_thita34_val;
double thita2imag[4][4] = {{0.382683432365090, 0.923879532511287, -0.382683432365090, -0.923879532511287},
{0.500000000000000, 0.866025403784439, -0.500000000000000, -0.866025403784439},
{0.707106781186548, 0.707106781186548, -0.707106781186548, -0.707106781186548},
{0.866025403784439, 0.500000000000000, -0.866025403784439, -0.500000000000000}};
double thita2real[4][4] = {{0.923879532511287, -0.382683432365090, -0.923879532511287, 0.382683432365090},
{0.866025403784439, -0.500000000000000, -0.866025403784439, 0.500000000000000},
{0.707106781186548, -0.707106781186548, -0.707106781186548, 0.707106781186547},
{0.500000000000000, -0.866025403784439, -0.500000000000000, 0.866025403784438}};
//查bit具体值使用的表
uint32_t g_thita1_addr;
uint32_t g_thita2_addr;
@ -148,7 +160,7 @@ int transform_update_cur_para(uint32_t cur_sfn, uint32_t cur_slot, uint32_t ref
}
else if(cur_sfn < ref_sfn)
{
interval_slot_num = (ref_sfn + NR_SFN_NUM - cur_sfn)*NR_SFN_SLOT_NUM + ref_slot - cur_slot;
interval_slot_num = (ref_sfn + NR_SFN_NUM - cur_sfn)*NR_SFN_SLOT_NUM + cur_slot - ref_slot;
}
else
{

4
APELib/Transmitter/src/transmitter_Init.s.c
View File

@ -9,7 +9,7 @@
*****************************************************************/
#include "transmitter_func.h"
#include "transform_para_func.h"
/*!
* @brief: Transmitter任务启动前的初始化工作
@ -74,4 +74,6 @@ void Transmitter_Init()
// (uint32_t *)&(g_transmitter_table_param.transmitter_config3_ddr_ptr),
// (int32_t *)&(g_transmitter_table_param.transmitter_config3_length));
LOG_ERROR_S("Transmitter_INIT finish\n");
transform_para_init(0, 0, 0);
}

27
APELib/Transmitter/src/transmitter_Proc.s.c
View File

@ -10,6 +10,7 @@
*****************************************************************/
#include "transmitter_func.h"
#include "mem_def.h"
#include "transform_para_func.h"
//#include "log_interface.h"
/*!
@ -316,19 +317,28 @@ void Transmitter_Proc(
uint32_t TRANSMOUT_symbol_SM_addr_in = TRANSMITTER_OUT;//SM
uint32_t TRANSMOUT_symbol_SM_addr_out = TRANSMITTER_OUT + 14*4096*4 + 4*1024;
uint32_t TRANSMOUT_DATA_SM_addr_out = TRANSMOUT_symbol_SM_addr_out + 14*4096*4 + 4*1024;
double thita[6] = {0.435,2.784,1.864,1.211,2.546,2.011};
double thita[4] = {0};
double i_real[4] = {0};
double i_imag[4] = {0};
i_real[0] = transform_get_thita1_real();
i_real[1] = transform_get_thita2_real();
i_real[2] = transform_get_thita3_real();
i_real[3] = transform_get_thita4_real();
i_imag[0] = transform_get_thita1_imag();
i_imag[1] = transform_get_thita2_imag();
i_imag[2] = transform_get_thita3_imag();
i_imag[3] = transform_get_thita4_imag();
double* thita1, * thita2, * thita3;
thita1 = thita2 = thita;
thita3 = thita + 2;
thita1 = thita2 = thita3 = thita;
thita3 = thita;
cfg_addr = (int32_t *)transmitter_config_dm1_ptr + g_transmitter_table_param.TransformConfig_8_CFG3_Offset;
PilotData =transmitter_config_dm1_ptr + g_transmitter_table_param.Pilot_Data_Offset;
PilotTrans = mpu_temp_dm3_ptr;
Transform((int)cfg_addr,MPU_ADDR(PilotData),MPU_ADDR(PilotTrans), 8, thita1, 1);
Transform((int)cfg_addr,MPU_ADDR(PilotData),MPU_ADDR(PilotTrans), 8, i_real, i_imag, 1);
SVRReg[0] = MPU_ADDR(cfg_addr);
Transform8Asm(SVRReg);
WAIT_MPU_STOP;
@ -392,7 +402,7 @@ void Transmitter_Proc(
//'InputData' size is 14*512 point equals to 14*512*32bit
//WAIT_MPU_STOP;
Transform((int)cfg_addr,MPU_ADDR(InputAddr_Trans),MPU_ADDR(TransTemp), 2, thita2, 1);
Transform((int)cfg_addr,MPU_ADDR(InputAddr_Trans),MPU_ADDR(TransTemp), 2, i_real, i_imag, 1);
SVRReg[0] = MPU_ADDR(cfg_addr);
Transform2Asm(SVRReg);
WAIT_MPU_STOP;
@ -432,7 +442,7 @@ void Transmitter_Proc(
);
//data block size is 2*4096 point equals to 2*4096*32bit
Transform((int)cfg_addr,MPU_ADDR(TransTemp),MPU_ADDR(OutputAddr_Trans), 4, thita3, 1);
Transform((int)cfg_addr,MPU_ADDR(TransTemp),MPU_ADDR(OutputAddr_Trans), 4, i_real, i_imag, 1);
SVRReg[0] = MPU_ADDR(cfg_addr);
Transform4Asm(SVRReg);
WAIT_MPU_STOP;
@ -551,7 +561,8 @@ void Transmitter_Proc(
//'OutData' size is 2*4096 point equals to 2*4096*32bit
}
//**********************pilot trans**********************
//发送数据后更新递推
transform_para_update(1);

27
Common/inc/mem_def.h
View File

@ -26,6 +26,7 @@
//空间规划：
/*
SM0:（）
SM1：(1M)用于recv_symb双核任务处理的数据临时存放空间
SM5:（1201/1024KB）用于存放RECV_SYNC后给RECV_SYMB的数据
SM2:（/1536KB）用于存放Transmitter的输出结果
*/
@ -82,12 +83,13 @@
/************************************SM5--1.5M***********************************************/
/**************************************DDR***************************************************/
#define DDR_PHY_BASE (0x6BC00000) //共579M可用0x6BC00000-0x8FFFFFFF
//1.93GB可用0x14400000-0x8FFFFFFF
#define DDR_PHY_BASE (0x14400000)
#define DDR_ERROR_RECORD_CNT_ADDR (0x79FF8000)
#define DDR_STATE_RECORD_CNT_ADDR (0x79FFc000)
//接收端数据来源选择
//---------------TX RX JESD地址接口---------------------------------------------------------
#define JESD_NRFDD_TX_SLOT_EVEN_DATA_ADDR (0x60F00000) //0x1E0000
#define JESD_NRFDD_TX_SLOT_ODD_DATA_ADDR (0x610E0000) //0x1E0000
@ -95,17 +97,30 @@
#define JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR (0x6BC00000) //!!!DDR_PHY_BASE 0x1E0000
#define JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR (0x6BDE0000) // 0x1E0000
#else
//---------------RECV测试用DDR空间--------------------------------------
#define JESD_NRFDD_RX_SLOT_EVEN_DATA_ADDR (0x88800000) //61440*4
#define JESD_NRFDD_RX_SLOT_ODD_DATA_ADDR (0x8883c000) //
#endif
#define JESD_NRFDD_RX_SLOT_SRC0_DATA_ADDR (0x6BFC0000) // 61440*4 用于暂存数据供first_sync处理
#define JESD_NRFDD_RX_SLOT_SRC1_DATA_ADDR (0x6BFFC000) // 2048*4 用于暂存数据供first_sync处理
//---------------APE4 RECV START FIRSTSYNC FLAG---------------------------------------------
#define RECV_FIRST_SYNC_START_FLAG (0x82000000) //通过手动输入来开始接收端第一次同步 devmem 0x82000000 0xa5a55a5a 32
//---------------APE7 PCIE TO APE4 sync_proc
#define TRANSFORM_REF_PARA_PCIE2SYNC_ADDR (0x83000000)
#define SOURCE_DATA_DDR_ADDR (0x84C01000)
#define SOURCE_DATA_FLAG_DDR_ADDR (0x84C00000) // SPU READ FLAG
//---------------ARM Transmitter比特存放地址，大小SOURCE_DATA_BYTE_LENGTH*SOURCE_DATA_BUFFER_NUM = 313KB
#define SOURCE_DATA_FLAG_DDR_ADDR (0x84000000) // SPU READ FLAG
#define SOURCE_DATA_DDR_ADDR (0x84001000)
#define SOURCE_DATA_BUFFER_NUM (20)
#define SOURCE_DATA_BYTE_LENGTH (16016)
#define SOURCE_DATA_DDR_ADDR_END (SOURCE_DATA_DDR_ADDR + SOURCE_DATA_BUFFER_NUM*SOURCE_DATA_BYTE_LENGTH + 0x100)
//--------------ARM RECV data存放地址，大小
#define RECV_BIT_OUT_DATA_FLAG_DDR_ADDR (0x85000000) // SPU READ FLAG
#define RECV_BIT_OUT_DATA_DDR_ADDR (0x85001000)
#define RECV_BIT_OUT_DATA_BUFFER_NUM (8)
#define RECV_BIT_OUT_DATA_BYTE_LENGTH (16016)
#define RECV_BIT_OUT_DATA_DDR_ADDR_END (RECV_BIT_OUT_DATA_DDR_ADDR + RECV_BIT_OUT_DATA_BUFFER_NUM*RECV_BIT_OUT_DATA_BYTE_LENGTH + 0x100)
//-----------------------------TRACE打点相关空间-----------------------------------------------------------------
#define TRACE_RECEIVER_ADDR (0x88700000)
#define TRACE_RECV_INIT_ADDR (TRACE_RECEIVER_ADDR) //0x88700000
#define TRACE_SLOTIND_ADDR (TRACE_RECV_INIT_ADDR + TRACE_GRP_LEN) //0x88700200

18
Interface/interface_pcie2_rec_sync.h Normal file
View File

@ -0,0 +1,18 @@
#ifndef INTERFACE_PCIE2_REC_SYNC_H
#define INTERFACE_PCIE2_REC_SYNC_H
#include "type_define.h"
typedef struct receiver_pcie2sync_s
{
uint32_t status;
uint32_t ref_sfn;//创建任务时刻的sfn
uint32_t ref_slot;//创建任务时刻的slot
uint32_t thita1_val;
uint32_t thita2_val;
uint32_t thita34_val;
}receiver_pcie2sync_t;
#endif /*INTERFACE_PCIE2_REC_SYNC_H*/

2
Interface/interface_rec_sync2_rec_symb.h
View File

@ -12,6 +12,8 @@ typedef struct receiver_sync2symb_s
uint32_t data_section1_ptr;
uint32_t data_section0_length;//单位Word
uint32_t data_section1_length;//单位Word
double transform_para_real[4];
double transform_para_imag[4];
}receiver_sync2symb_t;

2
MicroCode/BlockTransform/inc/Transform.h
View File

@ -3,7 +3,7 @@
#include "ucps2.h"
void Transform(int ConfigAddr, int InAddr, int OutAddr, int N, double* thita, int direct);
void Transform(int ConfigAddr, int InAddr, int OutAddr, int N, double* db_real, double* db_imag, int direct);
void get_thita(int* current_state, double* thita);
MPU_ENTRY void Transform2Asm(v16u32 src);
MPU_ENTRY void Transform4Asm(v16u32 src);

50
MicroCode/BlockTransform/src/spu/Transform.s.c
View File

@ -2,22 +2,22 @@
#include <math.h>
#include <Transform.h>
#define PI 3.1415926
#define imag(x) (x&0xffff)<<16
#define real(x) x&0xffff
#define imag(x) (((x)&0xffff)<<16)
#define real(x) ((x)&0xffff)
//factor range in [0~1]
void GenParam(double thita[], int* i_real,int* i_imag, int degree,int direct){
void GenParam(double db_real[], double db_imag[], int* i_real,int* i_imag, int degree,int direct){
switch(degree){
case(2):
{
double p_real[2] = {0};
double p_imag[2] = {0};
double G1_I[2] = { cos(thita[0]), cos(thita[0]) };
double G1_Q[2] = { sin(thita[0]), sin(thita[0]) };
double G2_I[2] = { cos(thita[1]),-cos(thita[1]) };
double G2_Q[2] = { sin(thita[1]), -sin(thita[1]) };
double G1_I[2] = { db_real[0], db_real[0] };
double G1_Q[2] = { db_imag[0], db_imag[0] };
double G2_I[2] = { db_real[1],-db_real[1] };
double G2_Q[2] = { db_imag[1], -db_imag[1] };
double I[2];
double Q[2];
I[0] = (G1_I[0] + G2_I[0]) / 2;
@ -44,17 +44,17 @@ void GenParam(double thita[], int* i_real,int* i_imag, int degree,int direct){
{
double p_real[4] = {0};
double p_imag[4] = {0};
double G1_I[4] = { cos(thita[0]), cos(thita[0]) ,cos(thita[0]), cos(thita[0])};//[1 1 1 1]
double G1_Q[4] = { sin(thita[0]), sin(thita[0]) ,sin(thita[0]), sin(thita[0])};
double G1_I[4] = { db_real[0], db_real[0] ,db_real[0], db_real[0]};//[1 1 1 1]
double G1_Q[4] = { db_imag[0], db_imag[0] ,db_imag[0], db_imag[0]};
double G2_I[4] = { cos(thita[1]),-sin(thita[1]) ,-cos(thita[1]) ,sin(thita[1]) };//[1 i -1 -i]
double G2_Q[4] = { sin(thita[1]),cos(thita[1]) ,-sin(thita[1]) ,-cos(thita[1]) };
double G2_I[4] = { db_real[1],-db_imag[1] ,-db_real[1] ,db_imag[1] };//[1 i -1 -i]
double G2_Q[4] = { db_imag[1],db_real[1] ,-db_imag[1] ,-db_real[1] };
double G3_I[4] = { cos(thita[2]), -cos(thita[2]),cos(thita[2]), -cos(thita[2]) };//[1 -1 1 -1]
double G3_Q[4] = { sin(thita[2]), -sin(thita[2]),sin(thita[2]), -sin(thita[2]) };
double G3_I[4] = { db_real[2], -db_real[2],db_real[2], -db_real[2] };//[1 -1 1 -1]
double G3_Q[4] = { db_imag[2], -db_imag[2],db_imag[2], -db_imag[2] };
double G4_I[4] = { cos(thita[3]), sin(thita[3]), -cos(thita[3]) , -sin(thita[3]) };//[1 -i -1 i]
double G4_Q[4] = { sin(thita[3]), -cos(thita[3]), -sin(thita[3]), cos(thita[3]) };
double G4_I[4] = { db_real[3], db_imag[3], -db_real[3] , -db_imag[3] };//[1 -i -1 i]
double G4_Q[4] = { db_imag[3], -db_real[3], -db_imag[3], db_real[3] };
double I[4];
double Q[4];
for(int i =0;i<4;i++){
@ -96,17 +96,17 @@ void GenParam(double thita[], int* i_real,int* i_imag, int degree,int direct){
{
double p_real[8] = {0};
double p_imag[8] = {0};
double G1_I[4] = { cos(thita[0]), cos(thita[0]) ,cos(thita[0]), cos(thita[0])};//[1 1 1 1]
double G1_Q[4] = { sin(thita[0]), sin(thita[0]) ,sin(thita[0]), sin(thita[0])};
double G1_I[4] = { db_real[0], db_real[0] ,db_real[0], db_real[0]};//[1 1 1 1]
double G1_Q[4] = { db_imag[0], db_imag[0] ,db_imag[0], db_imag[0]};
double G2_I[4] = { cos(thita[1]),-sin(thita[1]) ,-cos(thita[1]) ,sin(thita[1]) };//[1 i -1 -i]
double G2_Q[4] = { sin(thita[1]),cos(thita[1]) ,-sin(thita[1]) ,-cos(thita[1]) };
double G2_I[4] = { db_real[1],-db_imag[1] ,-db_real[1] ,db_imag[1] };//[1 i -1 -i]
double G2_Q[4] = { db_imag[1],db_real[1] ,-db_imag[1] ,-db_real[1] };
double G3_I[4] = { cos(thita[2]), -cos(thita[2]),cos(thita[2]), -cos(thita[2]) };//[1 -1 1 -1]
double G3_Q[4] = { sin(thita[2]), -sin(thita[2]),sin(thita[2]), -sin(thita[2]) };
double G3_I[4] = { db_real[2], -db_real[2],db_real[2], -db_real[2] };//[1 -1 1 -1]
double G3_Q[4] = { db_imag[2], -db_imag[2],db_imag[2], -db_imag[2] };
double G4_I[4] = { cos(thita[3]), sin(thita[3]), -cos(thita[3]) , -sin(thita[3]) };//[1 -i -1 i]
double G4_Q[4] = { sin(thita[3]), -cos(thita[3]), -sin(thita[3]), cos(thita[3]) };
double G4_I[4] = { db_real[3], db_imag[3], -db_real[3] , -db_imag[3] };//[1 -i -1 i]
double G4_Q[4] = { db_imag[3], -db_real[3], -db_imag[3], db_real[3] };
double I[8];
double Q[8];
for(int j=0; j<4; j++)
@ -228,7 +228,7 @@ int sign_extend_16_to_32(int num)
return (num<<16)>>16;
}
void Transform(int ConfigAddr, int InAddr, int OutAddr, int N, double* thita, int direct)
void Transform(int ConfigAddr, int InAddr, int OutAddr, int N, double* db_real, double* db_imag, int direct)
{
volatile int a;
int *Para = (int *)ConfigAddr;
@ -236,7 +236,7 @@ void Transform(int ConfigAddr, int InAddr, int OutAddr, int N, double* thita, in
int i_real[8] = {0};
int i_imag[8] = {0};
GenParam(thita,i_real,i_imag,N,direct);
GenParam(db_real, db_imag, i_real, i_imag,N,direct);
switch(N)
{

102
MicroCode/Block_Transform/inc/DeTransformConfig_2.dat
View File

@ -1,102 +0,0 @@
//Mfetch 0
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//ShiftMode 1
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
//input 2
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//output 3
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//Index1 4
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index2 5
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000

136
MicroCode/Block_Transform/inc/DeTransformConfig_4.dat
View File

@ -1,136 +0,0 @@
//Mfetch 0
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//ShiftMode 1 right move 2
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
//input 2
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//output 3
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//Index1 4
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index2 5
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index3 6
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index4 7
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000

204
MicroCode/Block_Transform/inc/DeTransformConfig_8.dat
View File

@ -1,204 +0,0 @@
//Mfetch 0
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//ShiftMode 1 right move 2
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
0x00000203,
//input 2
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//output 3
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//Index1 4
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index2 5
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index3 6
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index4 7
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index5 8
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index6 9
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index7 10
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index8 11
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000

53248
MicroCode/Block_Transform/inc/Input_16.dat
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53248
MicroCode/Block_Transform/inc/Input_64.dat
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57344
MicroCode/Block_Transform/inc/Input_mod.dat
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File diff suppressed because it is too large Load Diff

58907
MicroCode/Block_Transform/inc/Input_old.dat
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File diff suppressed because it is too large Load Diff

1024
MicroCode/Block_Transform/inc/Input_pilot.dat
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File diff suppressed because it is too large Load Diff

14
MicroCode/Block_Transform/inc/Transform.h
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@ -1,14 +0,0 @@
#ifndef Transform_H_
#define Transform_H_
#include "ucps2.h"
void Transform(int ConfigAddr, int InAddr, int OutAddr, int N, double* thita, int direct);
void get_thita(int* current_state, double* thita);
void RowCopy(int* Matrix,int* Block,int idx,int direct);
void ColCopy(int* Matrix,int* Block,int idx,int direct);
MPU_ENTRY void Transform2Asm(v16u32 src);
MPU_ENTRY void Transform4Asm(v16u32 src);
MPU_ENTRY void Transform8Asm(v16u32 src);
#endif /* Transform_H_ */

102
MicroCode/Block_Transform/inc/TransformConfig_2.dat
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@ -1,102 +0,0 @@
//Mfetch 0
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//ShiftMode 1
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
//input 2
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//output 3
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//Index1 4
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index2 5
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000

136
MicroCode/Block_Transform/inc/TransformConfig_4.dat
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@ -1,136 +0,0 @@
//Mfetch 0
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//ShiftMode 1
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
//input 2
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//output 3
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//Index1 4
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index2 5
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index3 6
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index4 7
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000

204
MicroCode/Block_Transform/inc/TransformConfig_8.dat
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@ -1,204 +0,0 @@
//Mfetch 0
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//ShiftMode 1
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
0x00000003,
//input 2
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//output 3
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000040,
0x00000000,
0x00000000,
0x00000000,
0xffffffff,
0x00000000,
0x00000000,
0x00000000,
0x003fffff,
0x0000000e,
0x00000000,
0x00000000,
//Index1 4
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index2 5
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index3 6
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index4 7
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index5 8
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index6 9
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index7 10
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
//Index8 11
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000

10
MicroCode/Block_Transform/inc/ucp2_utils.h
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@ -1,10 +0,0 @@
#ifndef UCP2_UTILS_H_
#define UCP2_UTILS_H_
void write_to_dm0(char* src, unsigned int size);
void print_string(char* string);
void print_char(unsigned char src);
void print_int(unsigned int src);
#endif /* UCP2_UTILS_H_ */

60
MicroCode/Block_Transform/src/mpu0/Transform2.m0.asm
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@ -1,60 +0,0 @@
.section .text.m0, "ax"
.file "Transform2Asm.m0.asm"
// DO NOT MODIFY THE CONTENT ABOVE
.global Transform2Asm
Transform2Asm:
R1: M[0] -> BIU1.T0;
NOP;
NOP;
NOP;
BIU1:Load(T0)(A++) -> M[0](Mode0); //KI
BIU1:Load(T0)(A++) -> M[1](Mode0); //ShiftMode
BIU1:Load(T0)(A++) -> M[2](Mode0); //Input
BIU1:Load(T0)(A++) -> M[3](Mode0); //Output
BIU1:Load(T0)(A++) -> M[10](Mode0); //factor1
BIU1:Load(T0)(A++) -> M[11](Mode0); //factor2
NOP;
NOP;
NOP;
NOP;
R5:PreConfig(M[0])(Mode0);
R0:M[1] -> IMA0.T0(Mode0) || R5:WriteConf(Mfetch)->KI[0-3](Mode0);
R0:M[1] -> IMA1.T0(Mode0) || R2:M[2] -> BIU2.T0(Mode0);
R3:M[3] -> BIU3.T1(Mode0);
R0:M[10] -> IMA0.T1(Mode0) ||R1:M[10] -> IMA1.T2(Mode0) ;
R0:M[11] -> IMA0.T2(Mode0) ||R1:M[11] -> IMA1.T1(Mode0) || IMA0:SetShiftMode(T0) -> SHIFTMODE0(Mode0);//load factor to IMA
IMA1:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
BIU2:wait 0 || IMA0: wait 10 || IMA1: wait 10|| SHU0: wait 14 ||SHU1: wait 14 ||BIU3: wait 17;
MFetch:LPTO %BLOCK @(KI0 - 0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0);
BIU2:Load(T0)(A++) -> IMA1.T0(Mode0) || IMA1: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T1(Mode0) || SHU0: T0+T1(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0)(A++) -> IMA1.T0(Mode0) || IMA1: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T1(Mode0) || SHU1: T0+T1(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BLOCK:
BIU2:wait 0 || IMA0: wait 0 || IMA1: wait 0 || SHU0: wait 0 || SHU1: wait 0 || BIU3: wait 0;
/*
BIU2:wait 0 || IMA0: wait 10 || IMA1: wait 10|| SHU0: wait 10 ||SHU1: wait 10 ||BIU3: wait 13;
MFetch:LPTO %BLOCK_0 @(KI0 - 0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0);
BIU2:Load(T0)(A++) -> IMA1.T0(Mode0) || IMA1: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0);
NOP;
NOP;
NOP;
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T1(Mode0);
BIU2:Load(T0)(A++) -> IMA1.T0(Mode0) || IMA1: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T1(Mode0);
NOP;
NOP;
NOP;
SHU0: T0+T1(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
SHU1: T0+T1(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BLOCK_0:
BIU2:wait 0 || IMA0: wait 0 || IMA1: wait 0 || SHU0: wait 0 || SHU1: wait 0 || BIU3: wait 0;
*/
MFetch:REPEAT @(35);
MFetch:MPU.STOP;

56
MicroCode/Block_Transform/src/mpu0/Transform4.m0.asm
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@ -1,56 +0,0 @@
.section .text.m0, "ax"
.file "Transform4Asm.m0.asm"
// DO NOT MODIFY THE CONTENT ABOVE
.global Transform4Asm
Transform4Asm:
R1: M[0] -> BIU1.T0;
NOP;
NOP;
NOP;
BIU1:Load(T0)(A++) -> M[0](Mode0); //KI
BIU1:Load(T0)(A++) -> M[1](Mode0); //ShiftMode
BIU1:Load(T0)(A++) -> M[2](Mode0); //Input
BIU1:Load(T0)(A++) -> M[3](Mode0); //Output
BIU1:Load(T0)(A++) -> M[10](Mode0); //factor1
BIU1:Load(T0)(A++) -> M[11](Mode0); //factor2
BIU1:Load(T0)(A++) -> M[12](Mode0); //factor3
BIU1:Load(T0)(A++) -> M[13](Mode0); //factor4
NOP;
NOP;
R5:PreConfig(M[0])(Mode0);
R0:M[1] -> IMA0.T0(Mode0) || R5:WriteConf(Mfetch)->KI[0-3](Mode0);
R0:M[1] -> IMA1.T0(Mode0) || R2:M[2] -> BIU2.T0(Mode0);
R2:M[1] -> IMA2.T0(Mode0) || R3:M[3] -> BIU3.T1(Mode0);
R0:M[10] -> IMA0.T1(Mode0) ||R2:M[1] -> IMA3.T0(Mode0) ;
R0:M[11] -> IMA0.T2(Mode0) || R1: M[10] -> IMA1.T2(Mode0) || R2: M[10] -> IMA2.T3(Mode0) || R3: M[10] -> IMA3.T4(Mode0) || IMA0:SetShiftMode(T0) -> SHIFTMODE0(Mode0);//load factor to IMA
R0:M[12] -> IMA0.T3(Mode0) || R1: M[11] -> IMA1.T3(Mode0) || R2: M[11] -> IMA2.T4(Mode0) || R3: M[11] -> IMA3.T1(Mode0) || IMA1:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
R0:M[13] -> IMA0.T4(Mode0) || R1: M[12] -> IMA1.T4(Mode0) || R2: M[12] -> IMA2.T1(Mode0) || R3: M[12] -> IMA3.T2(Mode0) || IMA2:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
R1: M[13] -> IMA1.T1(Mode0) || R2: M[13] -> IMA2.T2(Mode0) || R3: M[13] -> IMA3.T3(Mode0) ||IMA3:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
BIU2:wait 0 || IMA0: wait 10 ||IMA1: wait 10 || IMA2: wait 10 || IMA3: wait 10 || SHU0: wait 14 || SHU1: wait 14 || SHU2: wait 14 || SHU3: wait 14 ||BIU3: wait 17;
MFetch:LPTO %BLOCK @(KI0 - 0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T0(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T0(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T1(Mode0) || SHU0: T0+T1(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T1(Mode0) || SHU1: T0+T1(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T1(Mode0) || SHU2: T0+T1(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T1(Mode0) || SHU3: T0+T1(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) ||IMA0:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) ||IMA1:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) ||IMA2:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) ||IMA3:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) ||IMA0: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0) || SHU0: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) ||IMA1: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0) || SHU1: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) ||IMA2: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T0(Mode0) || SHU2: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) ||IMA3: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T0(Mode0) || SHU3: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BLOCK:
BIU2:wait 0 || IMA0: wait 0 ||IMA1: wait 0 || IMA2: wait 0 || IMA3: wait 0 || SHU0: wait 0 || SHU1: wait 0 || SHU2: wait 0 || SHU3: wait 0 || BIU3: wait 0;
MFetch:REPEAT @(35);
MFetch:MPU.STOP;

118
MicroCode/Block_Transform/src/mpu0/Transform8.m0.asm
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@ -1,118 +0,0 @@
.section .text.m0, "ax"
.file "Transform8Asm.m0.asm"
// DO NOT MODIFY THE CONTENT ABOVE
.global Transform8Asm
//need modify
Transform8Asm:
R1: M[0] -> BIU1.T0;
NOP;
NOP;
NOP;
BIU1:Load(T0)(A++) -> M[0](Mode0); //KI
BIU1:Load(T0)(A++) -> M[1](Mode0); //ShiftMode
BIU1:Load(T0)(A++) -> M[2](Mode0); //Input
BIU1:Load(T0)(A++) -> M[3](Mode0); //Output
BIU1:Load(T0)(A++) -> M[10](Mode0); //factor1
BIU1:Load(T0)(A++) -> M[11](Mode0); //factor2
BIU1:Load(T0)(A++) -> M[12](Mode0); //factor3
BIU1:Load(T0)(A++) -> M[13](Mode0); //factor4
BIU1:Load(T0)(A++) -> M[14](Mode0); //factor5
BIU1:Load(T0)(A++) -> M[15](Mode0); //factor6
BIU1:Load(T0)(A++) -> M[16](Mode0) || R5:PreConfig(M[0])(Mode0);//factor 7
BIU1:Load(T0)(A++) -> M[17](Mode0) || R0:M[1] -> IMA0.T0(Mode0) || R5:WriteConf(Mfetch)->KI[0-3](Mode0);//factor 8
R0:M[1] -> IMA1.T0(Mode0) || R2:M[2] -> BIU2.T0(Mode0) || R5:WriteConf(Mfetch)->KI[4-7](Mode0);
R2:M[1] -> IMA2.T0(Mode0) || R3:M[3] -> BIU3.T1(Mode0) ;
R0:M[10] -> IMA0.T1(Mode0) ||R2:M[1] -> IMA3.T0(Mode0) ;
R0:M[11] -> IMA0.T2(Mode0) || R1: M[10] -> IMA1.T2(Mode0) || R2: M[10] -> IMA2.T3(Mode0) || R3: M[10] -> IMA3.T4(Mode0) || IMA0:SetShiftMode(T0) -> SHIFTMODE0(Mode0);//load factor to IMA
R0:M[12] -> IMA0.T3(Mode0) || R1: M[11] -> IMA1.T3(Mode0) || R2: M[11] -> IMA2.T4(Mode0) ||IMA1:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
R0:M[13] -> IMA0.T4(Mode0) || R1: M[12] -> IMA1.T4(Mode0) || IMA2:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
IMA3:SetShiftMode(T0) -> SHIFTMODE0(Mode0);
R3: M[15] -> IMA3.T1(Mode0);
R2: M[16] -> IMA2.T1(Mode0) || R3: M[16] -> IMA3.T2(Mode0);
R1: M[17] -> IMA1.T1(Mode0) || R2: M[17] -> IMA2.T2(Mode0) || R3: M[17] -> IMA3.T3(Mode0);
BIU2:wait 0 || IMA0: wait 10 ||IMA1: wait 10 || IMA2: wait 10 || IMA3: wait 10 || R0: wait 10 || R1: wait 10 || R2: wait 10 || R3: wait 10 || SHU0: wait 14 || SHU1: wait 14 || SHU2: wait 14 || SHU3: wait 14 ||BIU3: wait 17;
MFetch:LPTO %BLOCK_0 @(KI0 - 0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0) || R0: M[14] -> IMA0.T1(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0) || R1: M[13] -> IMA1.T1(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T0(Mode0) || R2: M[12] -> IMA2.T1(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T0(Mode0) || R3: M[11] -> IMA3.T1(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T1(Mode0) || R0: M[15] -> IMA0.T2(Mode0) || SHU0: T0+T1(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T1(Mode0) || R1: M[14] -> IMA1.T2(Mode0) || SHU1: T0+T1(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T1(Mode0) || R2: M[13] -> IMA2.T2(Mode0) || SHU2: T0+T1(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T1(Mode0) || R3: M[12] -> IMA3.T2(Mode0) || SHU3: T0+T1(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[16] -> IMA0.T3(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[15] -> IMA1.T3(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[14] -> IMA2.T3(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[13] -> IMA3.T3(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[17] -> IMA0.T4(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[16] -> IMA1.T4(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[15] -> IMA2.T4(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[14] -> IMA3.T4(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[10] -> IMA0.T1(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[17] -> IMA1.T1(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[16] -> IMA2.T1(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[15] -> IMA3.T1(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[11] -> IMA0.T2(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[10] -> IMA1.T2(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[17] -> IMA2.T2(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[16] -> IMA3.T2(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[12] -> IMA0.T3(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[11] -> IMA1.T3(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[10] -> IMA2.T3(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[17] -> IMA3.T3(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0)|| R0: M[13] -> IMA0.T4(Mode0) || SHU0: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0)|| R1: M[12] -> IMA1.T4(Mode0) || SHU1: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T0(Mode0)|| R2: M[11] -> IMA2.T4(Mode0) || SHU2: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T0(Mode0)|| R3: M[10] -> IMA3.T4(Mode0) || SHU3: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BLOCK_0:
BIU2:wait 0 || IMA0: wait 0 ||IMA1: wait 0 || IMA2: wait 0 || IMA3: wait 0 || R0: wait 0 || R1: wait 0 || R2: wait 0 || R3: wait 0 || SHU0: wait 0 || SHU1: wait 0 || SHU2: wait 0 || SHU3: wait 0 || BIU3: wait 0;
MFetch:REPEAT @(20);
R0:M[14] -> IMA0.T1(Mode0) || R1:M[13] -> IMA1.T1(Mode0) || R2:M[12] -> IMA2.T1(Mode0) || R3:M[11] -> IMA3.T1(Mode0);
R0:M[15] -> IMA0.T2(Mode0) || R1:M[14] -> IMA1.T2(Mode0) || R2:M[13] -> IMA2.T2(Mode0) || R3:M[12] -> IMA3.T2(Mode0);
R0:M[16] -> IMA0.T3(Mode0) || R1:M[15] -> IMA1.T3(Mode0) || R2:M[14] -> IMA2.T3(Mode0) || R3:M[13] -> IMA3.T3(Mode0);
R0:M[17] -> IMA0.T4(Mode0) || R1:M[16] -> IMA1.T4(Mode0) || R2:M[15] -> IMA2.T4(Mode0) || R3:M[14] -> IMA3.T4(Mode0);
BIU2:wait 0 || IMA0: wait 10 ||IMA1: wait 10 || IMA2: wait 10 || IMA3: wait 10 || R0: wait 10 || R1: wait 10 || R2: wait 10 || R3: wait 10 || SHU0: wait 14 || SHU1: wait 14 || SHU2: wait 14 || SHU3: wait 14 ||BIU3: wait 17;
MFetch:LPTO %BLOCK_1 @(KI0 - 0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0) || R0: M[10] -> IMA0.T1(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0) || R1: M[17] -> IMA1.T1(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T0(Mode0) || R2: M[16] -> IMA2.T1(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T0(Mode0) || R3: M[15] -> IMA3.T1(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T1(Mode0) || R0: M[11] -> IMA0.T2(Mode0) || SHU0: T0+T1(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T1(Mode0) || R1: M[10] -> IMA1.T2(Mode0) || SHU1: T0+T1(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T1(Mode0) || R2: M[17] -> IMA2.T2(Mode0) || SHU2: T0+T1(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T1(Mode0) || R3: M[16] -> IMA3.T2(Mode0) || SHU3: T0+T1(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[12] -> IMA0.T3(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[11] -> IMA1.T3(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[10] -> IMA2.T3(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[17] -> IMA3.T3(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[13] -> IMA0.T4(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[12] -> IMA1.T4(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[11] -> IMA2.T4(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[10] -> IMA3.T4(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[14] -> IMA0.T1(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[13] -> IMA1.T1(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[12] -> IMA2.T1(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T1*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[11] -> IMA3.T1(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[15] -> IMA0.T2(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[14] -> IMA1.T2(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[13] -> IMA2.T2(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T2*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[12] -> IMA3.T2(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU0.T0(Mode0)|| R0: M[16] -> IMA0.T3(Mode0) || SHU0: T2+T0(S) -> SHU0.T2(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU1.T0(Mode0)|| R1: M[15] -> IMA1.T3(Mode0) || SHU1: T2+T0(S) -> SHU1.T2(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU2.T0(Mode0)|| R2: M[14] -> IMA2.T3(Mode0) || SHU2: T2+T0(S) -> SHU2.T2(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3:0 + T3*T0(ShiftMode0)(C)(S)(SSS)(T) ->SHU3.T0(Mode0)|| R3: M[13] -> IMA3.T3(Mode0) || SHU3: T2+T0(S) -> SHU3.T2(Mode0);
BIU2:Load(T0) -> IMA0.T0(Mode0) || IMA0: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU0.T0(Mode0)|| R0: M[17] -> IMA0.T4(Mode0) || SHU0: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0) -> IMA1.T0(Mode0) || IMA1: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU1.T0(Mode0)|| R1: M[16] -> IMA1.T4(Mode0) || SHU1: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0) -> IMA2.T0(Mode0) || IMA2: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU2.T0(Mode0)|| R2: M[15] -> IMA2.T4(Mode0) || SHU2: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BIU2:Load(T0)(A++) -> IMA3.T0(Mode0) || IMA3: 0 + T4*T0(ShiftMode0)(C)(S)(SSS)(T) -> SHU3.T0(Mode0)|| R3: M[14] -> IMA3.T4(Mode0) || SHU3: T2+T0(S) -> BIU3.T0(Mode0) || BIU3:Store(T0,T1)(A++)(Mode0);
BLOCK_1:
BIU2:wait 0 || IMA0: wait 0 ||IMA1: wait 0 || IMA2: wait 0 || IMA3: wait 0 || R0: wait 0 || R1: wait 0 || R2: wait 0 || R3: wait 0 || SHU0: wait 0 || SHU1: wait 0 || SHU2: wait 0 || SHU3: wait 0 || BIU3: wait 0;
MFetch:REPEAT @(35);
MFetch:MPU.STOP;

414
MicroCode/Block_Transform/src/spu/Transform.s.c
View File

@ -1,414 +0,0 @@
#include <stdlib.h>
#include <math.h>
#include <Transform.h>
#define PI 3.1415926
#define imag(x) (x&0xffff)<<16
#define real(x) x&0xffff
//factor range in [0~1]
void GenParam(double thita[], int* i_real,int* i_imag, int degree,int direct){
switch(degree){
case(2):
{
double p_real[2] = {0};
double p_imag[2] = {0};
double G1_I[2] = { cos(thita[0]), cos(thita[0]) };
double G1_Q[2] = { sin(thita[0]), sin(thita[0]) };
double G2_I[2] = { cos(thita[1]),-cos(thita[1]) };
double G2_Q[2] = { sin(thita[1]), -sin(thita[1]) };
double I[2];
double Q[2];
I[0] = (G1_I[0] + G2_I[0]) / 2;
Q[0] = (G1_Q[0] + G2_Q[0]) / 2;
I[1] = (G1_I[1] + G2_I[1]) / 2;
Q[1] = (G1_Q[1] + G2_Q[1]) / 2;
for(int j = 0;j<2;j++){
p_real[j] = I[j];
p_imag[j] = Q[j];
}
//now convert double to int
for(int j=0; j<2; j++)
{
//i_real[j] = (int)(p_real[j]*16384);
//i_imag[j] = (int)(p_imag[j]*16384);
i_real[j] = (int)(p_real[j]*4096);
i_imag[j] = (int)(p_imag[j]*4096);
}
break;
}
case(4):
{
double p_real[4] = {0};
double p_imag[4] = {0};
double G1_I[4] = { cos(thita[0]), cos(thita[0]) ,cos(thita[0]), cos(thita[0])};//[1 1 1 1]
double G1_Q[4] = { sin(thita[0]), sin(thita[0]) ,sin(thita[0]), sin(thita[0])};
double G2_I[4] = { cos(thita[1]),-sin(thita[1]) ,-cos(thita[1]) ,sin(thita[1]) };//[1 i -1 -i]
double G2_Q[4] = { sin(thita[1]),cos(thita[1]) ,-sin(thita[1]) ,-cos(thita[1]) };
double G3_I[4] = { cos(thita[2]), -cos(thita[2]),cos(thita[2]), -cos(thita[2]) };//[1 -1 1 -1]
double G3_Q[4] = { sin(thita[2]), -sin(thita[2]),sin(thita[2]), -sin(thita[2]) };
double G4_I[4] = { cos(thita[3]), sin(thita[3]), -cos(thita[3]) , -sin(thita[3]) };//[1 -i -1 i]
double G4_Q[4] = { sin(thita[3]), -cos(thita[3]), -sin(thita[3]), cos(thita[3]) };
double I[4];
double Q[4];
for(int i =0;i<4;i++){
I[i] = (G1_I[i] + G2_I[i] + G3_I[i] + G4_I[i]) / 4;
Q[i] = (G1_Q[i] + G2_Q[i] + G3_Q[i] + G4_Q[i]) / 4;
}
if(direct == 1){
p_imag[0] = Q[0];
p_real[0] = I[0];
p_imag[1] = Q[3];
p_real[1] = I[3];
p_imag[2] = Q[2];
p_real[2] = I[2];
p_imag[3] = Q[1];
p_real[3] = I[1];
}
else{
for(int j = 0;j<4;j++){
//p_real[j] = (G1_I[j] + G2_I[j] + G3_I[j] + G4_I[j]) / 4;
//p_imag[j] = (G1_Q[j] + G2_Q[j] + G3_Q[j] + G4_Q[j]) / 4;//conj
p_real[j] = I[j];
p_imag[j] = Q[j];
}
}
//now convert double to int
for(int j=0; j<4; j++)
{
//i_real[j] = (int)(p_real[j]*16384);
//i_imag[j] = (int)(p_imag[j]*16384);
i_real[j] = (int)(p_real[j]*4096);
i_imag[j] = (int)(p_imag[j]*4096);
}
break;
}
case(8):
{
double p_real[8] = {0};
double p_imag[8] = {0};
double G1_I[4] = { cos(thita[0]), cos(thita[0]) ,cos(thita[0]), cos(thita[0])};//[1 1 1 1]
double G1_Q[4] = { sin(thita[0]), sin(thita[0]) ,sin(thita[0]), sin(thita[0])};
double G2_I[4] = { cos(thita[1]),-sin(thita[1]) ,-cos(thita[1]) ,sin(thita[1]) };//[1 i -1 -i]
double G2_Q[4] = { sin(thita[1]),cos(thita[1]) ,-sin(thita[1]) ,-cos(thita[1]) };
double G3_I[4] = { cos(thita[2]), -cos(thita[2]),cos(thita[2]), -cos(thita[2]) };//[1 -1 1 -1]
double G3_Q[4] = { sin(thita[2]), -sin(thita[2]),sin(thita[2]), -sin(thita[2]) };
double G4_I[4] = { cos(thita[3]), sin(thita[3]), -cos(thita[3]) , -sin(thita[3]) };//[1 -i -1 i]
double G4_Q[4] = { sin(thita[3]), -cos(thita[3]), -sin(thita[3]), cos(thita[3]) };
double I[8];
double Q[8];
for(int j=0; j<4; j++)
{
I[2*j] = (G1_I[j] + G2_I[j]) / 4;
Q[2*j] = (G1_Q[j] + G2_Q[j]) / 4;
I[2*j+1] = (G3_I[j] + G4_I[j]) / 4;
Q[2*j+1] = (G3_Q[j] + G4_Q[j]) / 4;
}
if(direct == 1){
p_imag[0] = Q[0];
p_real[0] = I[0];
p_imag[1] = Q[7];
p_real[1] = I[7];
p_imag[2] = Q[6];
p_real[2] = I[6];
p_imag[3] = Q[5];
p_real[3] = I[5];
p_imag[4] = Q[4];
p_real[4] = I[4];
p_imag[5] = Q[3];
p_real[5] = I[3];
p_imag[6] = Q[2];
p_real[6] = I[2];
p_imag[7] = Q[1];
p_real[7] = I[1];
}
else{
for(int j = 0;j<8;j++){
p_real[j] = I[j];
p_imag[j] = Q[j];
}
}
//now convert double to int
for(int j=0; j<8; j++)
{
//i_real[j] = (int)(p_real[j]*16384);
//i_imag[j] = (int)(p_imag[j]*16384);
i_real[j] = (int)(p_real[j]*4096);
i_imag[j] = (int)(p_imag[j]*4096);
}
break;
}
}
}
void get_thita(int* current_state, double* thita)
{
int tmp = (current_state[0] + current_state[4]) % 2;
for (int i = 1; i < 9; i++)
{
current_state[i - 1] = current_state[i];
}
current_state[8] = tmp;
int* p = current_state + 9;
tmp = (p[0] + p[2]) % 2;
for (int i = 1; i < 11; i++)
{
p[i - 1] = p[i];
}
p[10] = tmp;
p += 11;
tmp = (p[0] + p[1]+p[3]+p[4]) % 2;
for (int i = 1; i < 13; i++)
{
p[i - 1] = p[i];
}
p[12] = tmp;
thita[0] = 0;
for (int i = 0; i < 3; i++)
{
thita[0] += current_state[i] << i;
}
thita[0] = thita[0] / 8 * 2 * PI;
thita[1] = 0;
for (int i = 0; i < 3; i++)
{
thita[1] += current_state[i+4] << i;
}
thita[1] = thita[1] / 8 * 2 * PI;
thita[2] = 0;
for (int i = 0; i < 3; i++)
{
thita[2] += current_state[i + 7] << i;
}
thita[2] = thita[2] / 8 * 2 * PI;
thita[3] = 0;
for (int i = 0; i < 3; i++)
{
thita[3] += current_state[i + 10] << i;
}
thita[3] = thita[3] / 8 * 2 * PI;
thita[4] = 0;
for (int i = 0; i < 3; i++)
{
thita[4] += current_state[i + 13] << i;
}
thita[4] = thita[4] / 8 * 2 * PI;
thita[5] = 0;
for (int i = 0; i < 3; i++)
{
thita[4] += current_state[i + 16] << i;
}
thita[4] = thita[4] / 8 * 2 * PI;
}
int sign_extend_16_to_32(int num)
{
return (num<<16)>>16;
}
void Transform(int ConfigAddr, int InAddr, int OutAddr, int N, double* thita, int direct)
{
volatile int a;
int *Para = (int *)ConfigAddr;
int i_real[8] = {0};
int i_imag[8] = {0};
GenParam(thita,i_real,i_imag,N,direct);
switch(N)
{
case(2):
{
for(int i=0;i<2;i++){
for(int j=0;j<16;j++){
Para[16*(i+4) + j] = (real(i_real[i])) + (imag(i_imag[i]));
}
}
for(int i=0;i<2;i++){
//Para[i] = 1792;//3584/2
Para[i] = 224;//14*512/(2*16)
}
Para[16*2 + 0] = InAddr; //KB0
Para[16*2 + 1] = InAddr; //KB1
Para[16*2 + 2] = InAddr; //KB2
Para[16*2 + 3] = InAddr; //KB3
//Para[16*2 + 4] = 114688; //KS0
Para[16*2 + 4] = 14336; //KS0 7*512*32/8
//Para[16*2 + 5] = 16384; //KS1
Para[16*2 + 5] = 2048; //KS1 512*32/8
Para[16*2 + 6] = 64; //KS2
Para[16*2 + 7] = 0; //KS3
Para[16*2 + 8] = (2<<16) + 2; //KC0 KI0
Para[16*2 + 9] = (7<<16) + 7; //KC1 KI1
//Para[16*2 + 10] = (256<<16) + 256; //KC2 KI2
Para[16*2 + 10] = (32<<16) + 32; //KC2 KI2 512/16
Para[16*3 + 0] = OutAddr; //KB0
Para[16*3 + 1] = OutAddr; //KB1
Para[16*3 + 2] = OutAddr; //KB2
Para[16*3 + 4] = 14336; //KS0
Para[16*3 + 5] = 2048; //KS1
Para[16*3 + 6] = 64; //KS2
Para[16*3 + 8] = (2<<16) + 2; //KC0 KI0
Para[16*3 + 9] = (7<<16) + 7; //KC1 KI1
Para[16*3 + 10] = (32<<16) + 32; //KC2 KI2
break;
}
case(4):
{
for(int i=0;i<4;i++){
for(int j=0;j<16;j++){
Para[16*(i+4) + j] = (real(i_real[i])) + (imag(i_imag[i]));
}
}
for(int i=0;i<4;i++){
//Para[i] = 896;//3584/4
Para[i] = 128;//4096*2/(4*16)
}
Para[16*2 + 0] = InAddr; //KB0
Para[16*2 + 1] = InAddr; //KB1
Para[16*2 + 2] = InAddr; //KB2
Para[16*2 + 3] = InAddr; //KB3
Para[16*2 + 4] = 4096; //KS0
Para[16*2 + 5] = 64; //KS1
Para[16*2 + 6] = 16384; //KS2
Para[16*2 + 7] = 0; //KS3
Para[16*2 + 8] = (4<<16) + 4; //KC0 KI0
Para[16*2 + 9] = (64<<16) + 64; //KC1 KI1
//Para[16*2 + 10] = (14<<16) + 14; //KC2 KI2
Para[16*2 + 10] = (2<<16) + 2; //KC2 KI2 change to 2 one time handle 2 row
Para[16*3 + 0] = OutAddr; //KB0
Para[16*3 + 1] = OutAddr; //KB1
Para[16*3 + 2] = OutAddr; //KB2
Para[16*3 + 4] = 4096; //KS0
Para[16*3 + 5] = 64; //KS1
Para[16*3 + 6] = 16384; //KS2
Para[16*3 + 8] = (4<<16) + 4; //KC0 KI0
Para[16*3 + 9] = (64<<16) + 64; //KC1 KI1
//Para[16*3 + 10] = (14<<16) + 14; //KC2 KI2
Para[16*3 + 10] = (2<<16) + 2; //KC2 KI2
break;
}
case(8):
{
for(int i=0;i<N;i++){
for(int j=0;j<16;j++){
Para[16*(i+4) + j] = (real(i_real[i])) + (imag(i_imag[i]));
}
}
for(int i=0;i<N;i++){
Para[i] = 8;//64/8
}
Para[16*2 + 0] = InAddr; //KB0
Para[16*2 + 1] = InAddr; //KB1
Para[16*2 + 2] = InAddr; //KB2
Para[16*2 + 3] = InAddr; //KB3
Para[16*2 + 4] = 512; //KS0
Para[16*2 + 5] = 64; //KS1
Para[16*2 + 6] = 0; //KS2
//Para[16*2 + 7] = 0; //KS3
Para[16*2 + 8] = (8<<16) + 8; //KC0 KI0
Para[16*2 + 9] = (8<<16) + 8; //KC1 KI1
Para[16*2 + 10] = (8<<16) + 8; //KC2 KI2
Para[16*3 + 0] = OutAddr; //KB0
Para[16*3 + 1] = OutAddr; //KB1
Para[16*3 + 2] = OutAddr; //KB2
Para[16*3 + 4] = 512; //KS0
Para[16*3 + 5] = 64; //KS1
Para[16*3 + 6] = 2048; //KS2
Para[16*3 + 8] = (4<<16) + 4; //KC0 KI0
Para[16*3 + 9] = (8<<16) + 8; //KC1 KI1
Para[16*3 + 10] = (2<<16) + 2; //KC2 KI2
/*
Para[16*3 + 0] = OutAddr; //KB0
Para[16*3 + 1] = OutAddr; //KB1
Para[16*3 + 2] = OutAddr; //KB2
Para[16*3 + 4] = 64; //KS0
Para[16*3 + 5] = 512; //KS1
//Para[16*3 + 6] = 0; //KS2
Para[16*3 + 8] = (8<<16) + 8; //KC0 KI0
Para[16*3 + 9] = (8<<16) + 8; //KC1 KI1
//Para[16*3 + 10] = 0; //KC2 KI2
*/
break;
}
}
}
void RowCopy(int* Matrix,int* Block,int idx,int direct)
{
int RowOffset = 4096*2;
//idx from 0 to 6
int BaseAddr = RowOffset*idx;
if(direct == 1)
{
//load data from Matrix
for(int i = BaseAddr;i<BaseAddr+RowOffset;i++)
{
Block[i-BaseAddr] = Matrix[i];
}
}
else
{
//store data to Matrix
for(int i = BaseAddr;i<BaseAddr+RowOffset;i++)
{
Matrix[i] = Block[i-BaseAddr];
}
}
}
void ColCopy(int* Matrix,int* Block,int idx,int direct)
{
int ColOffset = 512;
int RowOffset = 4096;
int BaseAddr = idx*ColOffset;
if(direct == 1)
{
for(int i = 0;i<14;i++){
for(int j = 0;j<ColOffset;j++)
{
Block[j+i*ColOffset] = Matrix[BaseAddr+i*RowOffset+j];
}
}
}
else
{
for(int i = 0;i<14;i++){
for(int j = 0;j<ColOffset;j++)
{
Matrix[BaseAddr+i*RowOffset+j] = Block[j+i*ColOffset];
}
}
}
}

40
MicroCode/Block_Transform/src/spu/ucp2_utils.s.c
View File

@ -1,40 +0,0 @@
#include "ucps2.h"
#include <ucp2_utils.h>
#define MAX_SIZE 256
__DM0 char RESULT[MAX_SIZE];
// Write to RESULT in DM0
void write_to_dm0(char* src, unsigned int size)
{
size = (size > MAX_SIZE) ? MAX_SIZE : size;
for (unsigned int i = 0; i < size; i++) {
RESULT[i] = src[i];
}
}
void print_string(char *string)
{
unsigned int i = 0;
while (string[i] != 0) {
print_char(string[i]);
i++;
}
return;
}
// print one char
void print_char(unsigned char src)
{
char * ptr = (char *)0xffffffff; // Temporary simulator output address
*ptr = src;
return;
}
void print_int(unsigned int src)
{
unsigned int * ptr = (unsigned int *)0xfffffff8; // Temporary simulator output address
*ptr = src;
return;
}