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重构Recv_symb，删除impl后缀的h, .s.c，优化代码格式

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HUOHUO 2025-05-31 09:00:59 -07:00
parent 60c55abfd4
commit d351b36790
24 changed files with 561 additions and 801 deletions
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8
.vscode/settings.json vendored
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@ -48,6 +48,12 @@
"test_macro.h": "c",
"receiver_sync_macro.h": "c",
"osp_ape.h": "c",
"transmitter_struct.h": "c"
"transmitter_struct.h": "c",
"receiver_symb_struct.h": "c",
"freoffest.h": "c",
"cordicsc.h": "c",
"interface_rec_symb2_rec_bit.h": "c",
"agcshiftmultisym.h": "c",
"ifft4096.h": "c"
}
}

16
APELib/Receiver_bit/src/receiver_Bit_Init.s.c
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@ -41,22 +41,6 @@ void Receiver_Bit_Init()
//SM
// //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括：
// // 1). 置信度表uint16_t Q_W_Lut[2016] (n-5)
// // 2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5)
// // 3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1)
// // 4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check())
// // 5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v)
// //获取地址
// ret = osp_get_cfgfile("nr_puxch_lut_sm.dat",
// (uint32_t *)&lutDdrAddr,
// (int32_t *)&(g_receiver_bit_table_param.pucch_lut_length));
// g_receiver_bit_table_param.pucch_lut_sm_ptr = SM0_BASE;
// ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr,
// (uint64_t)g_receiver_bit_table_param.pucch_lut_sm_ptr,
// g_receiver_bit_table_param.pucch_lut_length,
// DMA_TAG_G2G,
// 1);
//9. 微码配置文件ddr地址初始化
ret = osp_get_cfgfile("Receiver_Bit_cfg_dm0.dat",

10
APELib/Receiver_symb/inc/ChannelEstImpl.h
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@ -1,10 +0,0 @@
//#ifndef REMOVE_MC_TEST
#ifndef CHANNELESTIMPL_H_
#define CHANNELESTIMPL_H_
#include "ucps2.h"
#include <ChannelEst.h>
#include "stdio.h"
void ChannelEstImpl(int *ConfigAddr, int *InAddr1, int *InAddr2, int *OutAddr);
#endif //DEBUG_MC

45
APELib/Receiver_symb/inc/channelEquImpl.h
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@ -1,45 +0,0 @@
//#ifndef REMOVE_MC_TEST
#ifndef CHANNELEQUIMPL_H_
#define CHANNELEQUIMPL_H_
#include "ucps2.h"
#include "stdio.h"
#include <Equalizer_1port.h>
#include <Fft4096Int32.h>
#include <IFFT4096.h>
#include "IFFT4096DataTurn.h"
#include "AddCP.h"
#include "ape_common.h"
#include "type_define.h"
#include "ByteCopy.h"
#include "common.h"
#include "AgcShiftForFftInt32.h"
void ChannelEquImpl(
int *CfgFft4096,
int *CfgEQ21Part1,
int *ConfigBaseAddr3,
int *CfgIFFT4096,
int *ConfigDataTurn,
int *ConfigAddCp,
int *CfgByteCopy,
int *CfgAgcShift,
int *CfgAgcMultiSym,
int *available_ptr_dm0,
int *available_ptr_dm1,
int *available_ptr_dm2,
int *available_ptr_dm3,
int *InChannelEst_ddr_ptr,
int *InData_ddr_ptr,
int *signal0, // DM2
int *InputNoise,
int *W4096, // DM2
int *CalAddr0,
int *CalAddr1,
int *CalAddr2,
int *Lut_phase,
int *AgcFactor,
int *Lut_agcMultiSymFactor,
int res_ptr
);
#endif //DEBUG_MC

12
APELib/Receiver_symb/inc/freOffCompImpl.h
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@ -1,12 +0,0 @@
#ifndef FREOFFCOMPIMPL_H_
#define FREOFFCOMPIMPL_H_
#include "ucps2.h"
#include "ucpm2.h"
#include "ape_common.h"
#include "type_define.h"
MPU_ENTRY void freOffCompAsm(v16u32 src);
void freOffCompImpl(int* ConfigAddr_comp, int* ConfigAddr_cordic, int *freEstOutAddr,int* data_ptr_ddr,int* res_ptr_ddr, int *ava_ptr_dm2, int *ava_ptr_dm3);
#endif /* FREQOFFSETEST_H_ */

12
APELib/Receiver_symb/inc/freOffEstImpl.h
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@ -1,12 +0,0 @@
#ifndef FREOFFESTIMPL_H_
#define FREOFFESTIMPL_H_
#include "ucps2.h"
#include "ucpm2.h"
MPU_ENTRY void freOffEstAsm(v16u32 src);
void freOffEstImpl(int* ConfigBaseAddr_est,int *InputAddr0,int *InputAddr1, int *freEstOutAddr);
#endif

20
APELib/Receiver_symb/inc/receiver_symb_func.h
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@ -22,13 +22,24 @@
#include "osp_ape.h"
#include "task_define.h"
#include "trace.h"
#include "freOffEstImpl.h"
#include "freOffCompImpl.h"
#include "Transform.h"
#include "interface_rec_symb2_rec_bit.h"
//include mpu header files
#include "ByteCopy.h"
#include "ByteSet.h"
#include "freOffEst.h"
#include "cordicSC.h"
#include "freOffComp.h"
#include "ChannelEst.h"
#include "Transform.h"
#include "ByteSet.h"
#include "AgcShiftMultiSym.h"
#include "AgcShiftForFftInt32.h"
#include "Fft4096Int32.h"
#include "Equalizer_1port.h"
#include "IFFT4096DataTurn.h"
#include "IFFT4096.h"
#include "AddCP.h"
//微码配置空间偏移结构体
@ -38,6 +49,7 @@ extern uint32_t *receiver_symb_config_dm1_ptr;
extern uint32_t *receiver_symb_config_dm2_ptr;
extern uint32_t *receiver_symb_config_dm3_ptr;
extern int32_t storedfreoffestvalue ;
extern uint32_t g_symb2bit_buffer_sel;
void Receiver_Symb_Init();
void Receiver_Symb_Task(receiver_sync2symb_t* msg_ptr, uint32_t msg_len);

41
APELib/Receiver_symb/inc/receiver_symb_macro.h
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@ -16,32 +16,29 @@
//微码配置空间长度定义，单位为word(4Byte)
#define RECEIVER_SYMB_FreOffEst_CFG1_LENGTH (0x0090)
#define RECEIVER_SYMB_FreOffComp_CFG2_LENGTH (0x0040)
#define RECEIVER_SYMB_FreOffCordic_CFG3_LENGTH (0x0070)
#define RECEIVER_SYMB_ChannelEst_CFG4_LENGTH (0x0070)
#define RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH (0x0350)
#define RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH (0x00E0)
#define RECEIVER_SYMB_EQ1Part2_CFG6_1_LENGTH (0x00C0)
#define RECEIVER_SYMB_IFFT4096_CFG7_LENGTH (0x0360)
#define RECEIVER_SYMB_IFFT4096_TURN_CFG7_LENGTH (0x0070)
#define RECEIVER_SYMB_AgcShiftFft_CFG7_LENGTH (0x0070)
#define RECEIVER_SYMB_IFFT4096_AddCP_CFG7_LENGTH (0x0130)
#define RECEIVER_SYMB_DeTransform2_CFG8_LENGTH (0x0060)
#define RECEIVER_SYMB_DeTransform4_CFG9_LENGTH (0x0080)
#define RECEIVER_SYMB_Transform8_CFG10_LENGTH (0x00c0)
#define RECEIVER_SYMB_ByteSet_CFG10_LENGTH (0x0040)
#define RECEIVER_SYMB_ByteCopy_CFG10_LENGTH (0x0030)
#define RECEIVER_SYMB_FreOffEst_CFG1_LENGTH (0x0090)
#define RECEIVER_SYMB_FreOffComp_CFG2_LENGTH (0x0040)
#define RECEIVER_SYMB_FreOffCordic_CFG3_LENGTH (0x0070)
#define RECEIVER_SYMB_ChannelEst_CFG4_LENGTH (0x0070)
#define RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH (0x0350)
#define RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH (0x00E0)
#define RECEIVER_SYMB_EQ1Part2_CFG7_LENGTH (0x00C0)
#define RECEIVER_SYMB_IFFT4096_CFG8_LENGTH (0x0360)
#define RECEIVER_SYMB_IFFT4096_TURN_CFG9_LENGTH (0x0070)
#define RECEIVER_SYMB_AgcShiftFft_CFG10_LENGTH (0x0070)
#define RECEIVER_SYMB_AddCP_CFG11_LENGTH (0x0130)
#define RECEIVER_SYMB_DeTransform2_CFG12_LENGTH (0x0060)
#define RECEIVER_SYMB_DeTransform4_CFG13_LENGTH (0x0080)
#define RECEIVER_SYMB_Transform8_CFG14_LENGTH (0x00c0)
#define RECEIVER_SYMB_ByteSet_CFG15_LENGTH (0x0040)
#define RECEIVER_SYMB_ByteCopy_CFG16_LENGTH (0x0030)
#define RECEIVER_SYMB_AgcMultiSym_CFG17_LENGTH (0x0070)
#define RECEIVER_SYMB_FREOFF_CFG_LENGTH (RECEIVER_SYMB_FreOffEst_CFG1_LENGTH + RECEIVER_SYMB_FreOffComp_CFG2_LENGTH + RECEIVER_SYMB_FreOffCordic_CFG3_LENGTH )//0x140
#define RECEIVER_SYMB_CHANNELEST_CFG_LENGTH (RECEIVER_SYMB_ChannelEst_CFG4_LENGTH)//0x70
#define RECEIVER_SYMB_CHANNELEQU_CFG_LENGTH (RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH + RECEIVER_SYMB_EQ1Part2_CFG6_1_LENGTH + RECEIVER_SYMB_IFFT4096_CFG7_LENGTH + RECEIVER_SYMB_IFFT4096_TURN_CFG7_LENGTH + RECEIVER_SYMB_AgcShiftFft_CFG7_LENGTH + RECEIVER_SYMB_IFFT4096_AddCP_CFG7_LENGTH )
#define RECEIVER_SYMB_CHANNELEQU_CFG_LENGTH (RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH + RECEIVER_SYMB_EQ1Part2_CFG7_LENGTH + RECEIVER_SYMB_IFFT4096_CFG8_LENGTH + RECEIVER_SYMB_IFFT4096_TURN_CFG9_LENGTH + RECEIVER_SYMB_AgcShiftFft_CFG10_LENGTH + RECEIVER_SYMB_AddCP_CFG11_LENGTH )
//A60
#define RECEIVER_SYMB_DeTransformer_CFG_LENGTH (RECEIVER_SYMB_DeTransform2_CFG8_LENGTH + RECEIVER_SYMB_DeTransform4_CFG9_LENGTH + RECEIVER_SYMB_Transform8_CFG10_LENGTH)
#define RECEIVER_SYMB_DeTransformer_CFG_LENGTH (RECEIVER_SYMB_DeTransform2_CFG12_LENGTH + RECEIVER_SYMB_DeTransform4_CFG13_LENGTH + RECEIVER_SYMB_Transform8_CFG14_LENGTH)
//1A0
#define RECEIVER_SYMB_COMMEN_CFG_LENGTH (RECEIVER_SYMB_FREOFF_CFG_LENGTH + RECEIVER_SYMB_CHANNELEST_CFG_LENGTH + RECEIVER_SYMB_CHANNELEQU_CFG_LENGTH + RECEIVER_SYMB_DeTransformer_CFG_LENGTH)

27
APELib/Receiver_symb/inc/receiver_symb_struct.h
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@ -26,9 +26,17 @@ typedef struct receiver_symb_table_param_s
uint32_t ChannelEst_CFG4_Offset;
uint32_t Fft4096Int32_CFG5_Offset;
uint32_t EQ21Part1_CFG6_Offset;
uint32_t IFFT4096_CFG7_Offset;
uint32_t DeTransform2_CFG8_Offset;
uint32_t DeTransform4_CFG9_Offset;
uint32_t EQ1Part2_CFG7_Offset;
uint32_t IFFT4096_CFG8_Offset;
uint32_t IFFTDatTurn_CFG9_Offset;
uint32_t Agcshift_CFG10_Offset;
uint32_t AddCP_CFG11_Offset;
uint32_t DeTransform2_CFG12_Offset;
uint32_t DeTransform4_CFG13_Offset;
uint32_t Transform8_CFG14_Offset;
uint32_t ByteSet_CFG15_Offset;
uint32_t ByteCopy_CFG16_Offset;
uint32_t AgcMultiSym_CFG17_Offset;
// 存储微码参数表的ddr基地址和长度
uint32_t receiver_symb_config0_ddr_ptr;//receiver DM0微码配置文件ddr地址
uint32_t receiver_symb_config0_length;//receiver DM0微码配置文件ddr长度
@ -40,12 +48,15 @@ typedef struct receiver_symb_table_param_s
uint32_t receiver_symb_config3_length;//receiver DM3微码配置文件ddr地址
//SPU查找表在SM中的偏移地址
uint32_t PilotOrig_LUT1_Offset;
uint32_t EqW4096_LUT2_Offset;
uint32_t EqFactor0_LUT3_Offset;
uint32_t EqFactor1_LUT4_Offset;
uint32_t EqFactor_LUT5_Offset;
uint32_t EqCpPhase_LUT6_Offset;
uint32_t AgcShiftFft_LUT7_Offset;
uint32_t AgcMultiSymFactor_LUT8_Offset;
// SPU LUT SM基地址和长度
uint32_t pucch_lut_sm_ptr; //PUCCH查找表在SM中的基地址
uint32_t pucch_lut_length; //PUCCH查找表总长度
}receiver_symb_table_param_t;

25
APELib/Receiver_symb/src/ChannelEstImpl.s.c
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@ -1,25 +0,0 @@
#include <ChannelEstImpl.h>
#include <ChannelEst.h>
#include "ucps2.h"
#include "ucpm2.h"
#include "common.h"
#include "ape_common.h"
#include "drv_ape.h"
void ChannelEstImpl(int *ConfigAddr, int *InAddr1, int *InAddr2, int *OutAddr)
{
for(int i=0;i<32;i++){
InAddr1[i+1024] = InAddr1[i];
InAddr2[i+1024] = InAddr2[i];
}
ChannelEst(ConfigAddr, MPU_ADDR(InAddr1),MPU_ADDR(InAddr2),MPU_ADDR(OutAddr));
ape_csu_task_lookup(DMA_TAG_G2L, 1);
SVRReg[0] = MPU_ADDR(ConfigAddr);
channelEstAsm(SVRReg);
return;
}

28
APELib/Receiver_symb/src/TransformImpl.s.c
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@ -1,28 +0,0 @@
#include <TransformImpl.h>
#include <Transform.h>
#include "ucps2.h"
#include "ucpm2.h"
void TransformImpl(v16u32 * SVRReg,int *ConfigAddr, int InAddr, int OutAddr, int N, double* db_real, double* db_imag, int direct){
SVRReg[0] = (v16u32){0, 0, 0, 0,
0x40, 0, 0, 0,
0xff00ff, 0, 0, 0x0000,
0xffff, 0x6, 0, 0};
volatile int a;
Transform((int)ConfigAddr,MPU_ADDR(InAddr),MPU_ADDR(OutAddr), N, db_real, db_imag, direct);
SVRReg[0][0] = MPU_ADDR(ConfigAddr);
if(N==2){
Transform2Asm(*SVRReg);
}
else if(N==4){
Transform4Asm(*SVRReg);
}
a = __ucps2_getStatB();
__ucps2_delay();
}

343
APELib/Receiver_symb/src/channelEquImpl.s.c
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@ -1,343 +0,0 @@
#include "ucps2.h"
#include "ucpm2.h"
#include <channelEquImpl.h>
#include "trace.h"
#include "AgcShiftMultiSym.h"
#include "log_interface.h"
#ifdef IDE_TEST
#include <Test_Func.h>
#endif
void ChannelEquImpl(
int *CfgFft4096,
int *CfgEQ21Part1,
int *ConfigBaseAddr3,
int *CfgIFFT4096,
int *ConfigDataTurn,
int *ConfigAddCp,
int *CfgByteCopy,
int *CfgAgcShift,
int *CfgAgcMultiSym,
int *available_ptr_dm0,
int *available_ptr_dm1,
int *available_ptr_dm2,
int *available_ptr_dm3,
int *InChannelEst_ddr_ptr,
int *InData_ddr_ptr,
int *signal0,
int *InputNoise,
int *W4096 ,
int *CalAddr0,
int *CalAddr1,
int *CalAddr2,
int *Lut_phase,
int *AgcFactor,
int *Lut_agcMultiSymFactor,
int res_ptr
){
volatile int a = 1;
int numSym = 7 ; ///7;
int Scale = 13;
int NRE=4096;
int ShiftFactor[] = {7,1,0,0,0,0,0,0,0,0,0,0};
int NumCB = 2;
int16_t baseScale = 2;
for(int ii=0;ii<16;ii++){
AgcFactor[ii] = 3;
}
for(int i=0;i<NumCB;i++){
int16_t pre_scale = 0;
int *Scalep = available_ptr_dm0;
int *Scale0 = available_ptr_dm0 + 0x0040;
int *Scales = available_ptr_dm0 + 0x0080;
int *tmp0 = (int*)(((int)available_ptr_dm1 + 0x4000 - 1) & ~(0x4000 - 1)); // LENGTH: 0x2000
int *Fft_est_dm3_ptr = (int*)(((int)available_ptr_dm3 + 0x4000 - 1) & ~(0x4000 - 1)); // LENGTH: 0x1000
int *channelEst_dm0_ptr = (int*)(((int)Scales + 0x0100 + 0x4000 - 1) & ~(0x4000 - 1));
/*****************************************FFT of channelEst*****************************************/
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer(
(uint64_t)(InChannelEst_ddr_ptr + 4096*i) ,
(uint64_t)DM_TO_CSU_ADDR(Fft_est_dm3_ptr),
4096*4,
DMA_TAG_G2L,
1);
ape_csu_task_lookup(DMA_TAG_G2L, 1);
AgcShiftForFftInt32(
(int)CfgAgcShift,
MPU_ADDR(Fft_est_dm3_ptr),
MPU_ADDR(Fft_est_dm3_ptr),
4096,
1,
MPU_ADDR(AgcFactor),
MPU_ADDR(AgcFactor),
MPU_ADDR(channelEst_dm0_ptr),
MPU_ADDR(channelEst_dm0_ptr)
);
SVRReg[0] = MPU_ADDR(CfgAgcShift);
AgcShiftForFftInt32Asm(SVRReg);
WAIT_MPU_STOP;
Fft4096Int32(
(int)CfgFft4096,
1,
Scale,
ShiftFactor,
MPU_ADDR(W4096), //DM2
MPU_ADDR(channelEst_dm0_ptr), //DM0
MPU_ADDR(available_ptr_dm2), //DM2
MPU_ADDR(Fft_est_dm3_ptr), //DM3
MPU_ADDR(tmp0), //DM1
MPU_ADDR(Scalep),
MPU_ADDR(Scale0)
);
SVRReg[0] = MPU_ADDR(CfgFft4096);
Fft4096Int32Asm(SVRReg);
WAIT_MPU_STOP;
/*ape_csu_dma_1D_L2G_ch0ch1_transfer(
(uint64_t)DM_TO_CSU_ADDR(Fft_est_dm3_ptr),
(uint64_t)0x84c00000,
4096*4 ,
DMA_TAG_L2G,
1);
*/
//构造第二根天线
ByteCopy((int)CfgByteCopy, MPU_ADDR(channelEst_dm0_ptr),MPU_ADDR(Fft_est_dm3_ptr + 4096),16384);
SVRReg[0] = MPU_ADDR(CfgByteCopy);
ByteCopyAsm(SVRReg);
if(i==1){
InData_ddr_ptr = InData_ddr_ptr + 7*(68+4096) + 1024 + 72;
}
/*****************************************channelEqu*****************************************/
int *Fft_outputdata_dm3_ptr = Fft_est_dm3_ptr + 0x2000;
int *InData_dm0_ptr = channelEst_dm0_ptr + 0x2000;
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer(
(uint64_t)(InData_ddr_ptr + 68) ,
(uint64_t)DM_TO_CSU_ADDR(Fft_outputdata_dm3_ptr),
4096*4,
DMA_TAG_G2L,
1);
WAIT_MPU_STOP;
ape_csu_task_lookup(DMA_TAG_G2L, 1);
for(int j=0;j<numSym;j++){
AgcShiftForFftInt32(
(int)CfgAgcShift,
MPU_ADDR(Fft_outputdata_dm3_ptr),
MPU_ADDR(Fft_outputdata_dm3_ptr),
4096,
1,
MPU_ADDR(AgcFactor),
MPU_ADDR(AgcFactor),
MPU_ADDR(InData_dm0_ptr),
MPU_ADDR(InData_dm0_ptr)
);
SVRReg[0] = MPU_ADDR(CfgAgcShift);
AgcShiftForFftInt32Asm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 12, *Fft_outputdata_dm3_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 13, *(Fft_outputdata_dm3_ptr+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 14, *InData_dm0_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 15, *(InData_dm0_ptr+1));
// FFT of Data
Fft4096Int32(
(int)CfgFft4096,
1,
Scale,
ShiftFactor,
MPU_ADDR(W4096),
MPU_ADDR(InData_dm0_ptr), //DM0
MPU_ADDR(available_ptr_dm2), //DM2
MPU_ADDR(Fft_outputdata_dm3_ptr), //DM3
MPU_ADDR(tmp0), //DM1
MPU_ADDR(Scalep),
MPU_ADDR(Scale0)
);
SVRReg[0] = MPU_ADDR((int)CfgFft4096);
Fft4096Int32Asm(SVRReg);
WAIT_MPU_STOP;
/* -------------- 拉齐信道估计FFT ------------*/
int16_t shiftScale = Scalep[0] & (0xFFFF) - baseScale;
if(shiftScale!=pre_scale){
Lut_agcMultiSymFactor[0] = shiftScale - pre_scale;
pre_scale = (int16_t)Lut_agcMultiSymFactor[0] + pre_scale;
//tmp0暂存移位后FFT结果
AgcShiftMultiSym((int)CfgAgcMultiSym, MPU_ADDR(Fft_est_dm3_ptr), 8192,1, MPU_ADDR(tmp0),MPU_ADDR(Lut_agcMultiSymFactor));
SVRReg[0] = MPU_ADDR(CfgAgcMultiSym);
AgcShiftMultiSymAsm(SVRReg);
WAIT_MPU_STOP;
ByteCopy((int)CfgByteCopy, MPU_ADDR(tmp0),MPU_ADDR(Fft_est_dm3_ptr),16384*2);
SVRReg[0] = MPU_ADDR(CfgByteCopy);
ByteCopyAsm(SVRReg);
WAIT_MPU_STOP;
}
// 构造第二根天线数据，与第一根相同
ByteCopy((int)CfgByteCopy, MPU_ADDR(InData_dm0_ptr),MPU_ADDR(Fft_outputdata_dm3_ptr + 4096),16384);
SVRReg[0] = MPU_ADDR(CfgByteCopy);
ByteCopyAsm(SVRReg);
int *Equ_Output = InData_dm0_ptr + 0x1000; //LENGTH 0x2000 (the second ant occupied additional space 0x1000)
int *InOut2_dm1_ptr = tmp0; //LENGTH 0x1000
int *InOut3_dm0_ptr = InData_dm0_ptr + 0x3000; //LENGTH 0x2000
int *InOut1_dm1_ptr = tmp0 + 0x1000; //LENGTH 0x1000
WAIT_MPU_STOP;
EQ21Part1(
CfgEQ21Part1,
NRE,
1,
MPU_ADDR(Fft_est_dm3_ptr), //dm3 信道估计fft
MPU_ADDR(InputNoise), //dm3 噪声全0
MPU_ADDR(Fft_outputdata_dm3_ptr), //dm3 数据fft
MPU_ADDR(Equ_Output), //dm0
MPU_ADDR(InOut1_dm1_ptr), //dm1
MPU_ADDR(InOut2_dm1_ptr), //dm1
MPU_ADDR(InOut3_dm0_ptr) //dm0
);
SVRReg[0] = MPU_ADDR(CfgEQ21Part1);
EQ21Part1Asm(SVRReg);
int *Equ_Output_2 = available_ptr_dm2; //第一根天线均衡输出
int *Equ_Output_21 = available_ptr_dm2 + 0x2000; //第二根天线均衡输出
EQ1Part2(
ConfigBaseAddr3,
NRE,
1,
MPU_ADDR(Equ_Output),
MPU_ADDR(InOut1_dm1_ptr),
MPU_ADDR(InOut2_dm1_ptr),
MPU_ADDR(InOut3_dm0_ptr),
MPU_ADDR(Equ_Output_2),
MPU_ADDR(Equ_Output_21)
);
WAIT_MPU_STOP;
SVRReg[0]= MPU_ADDR(ConfigBaseAddr3);
EQ1Part2Asm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 16, *Equ_Output_2);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 17, *(Equ_Output_2+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 18, *(Equ_Output_2+2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 19, *(Equ_Output_2+3));
//提前准备下一块数据
if(j<numSym-1){
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(InData_ddr_ptr + (68+4096)*(j+1) + 68), //(68+4096)*(j+1) + 68)
(uint64_t)DM_TO_CSU_ADDR(Fft_outputdata_dm3_ptr),
4096*4,
DMA_TAG_G2L,
0);
}
/****************************** IFFT ****************************************8*/
int *Temp1 = Fft_outputdata_dm3_ptr + 0x1000; // 缓存
IFFT4096DataTurn(
(int)ConfigDataTurn,
1,
1,
MPU_ADDR(Equ_Output_2), //dm2
MPU_ADDR(tmp0), //dm1 无效
MPU_ADDR(Equ_Output), //dm0
MPU_ADDR(Temp1) //dm3 无效
);
SVRReg[0]= MPU_ADDR(ConfigDataTurn);
IFFT4096DataTurnAsm(SVRReg);
WAIT_MPU_STOP;
int *Temp0 = available_ptr_dm2; // buff, Equ_Output_2
IFFT4096(
(int)CfgIFFT4096,
1,
MPU_ADDR(Temp0), //DM2
MPU_ADDR(Temp1), //DM3
MPU_ADDR(Equ_Output), //DM0
MPU_ADDR(tmp0), //DM1
MPU_ADDR(CalAddr0), //DM2
MPU_ADDR(CalAddr1), //DM3
MPU_ADDR(CalAddr2)); //DM1
SVRReg[0] = MPU_ADDR(CfgIFFT4096);
IFFT4096Asm(SVRReg);
WAIT_MPU_STOP;
int CPLength0 = 352;
int CPLength1 = 288;
AddCP(
(int) ConfigAddCp,
2,
1,
CPLength0,
CPLength1,
MPU_ADDR(Equ_Output), //DM0
MPU_ADDR(tmp0), //DM1 invalid
MPU_ADDR(Equ_Output_2), //DM2
MPU_ADDR(Temp1), //DM3 invalid
MPU_ADDR(Lut_phase) //
);
SVRReg[0] = MPU_ADDR(ConfigAddCp);
AddCPAsm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 20, *(Equ_Output_2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 21, *(Equ_Output_2+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 22, *(Equ_Output_2+2));
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_L2G_ch0ch1_transfer(
(uint64_t)DM_TO_CSU_ADDR((Equ_Output_2+CPLength0)),
(uint64_t)res_ptr,
4096*4 ,
DMA_TAG_L2G,
1);
res_ptr = res_ptr + 16384;
}
}
return;
}

364
APELib/Receiver_symb/src/channelEqu_proc.s.c
View File

@ -1,6 +1,5 @@
#include "receiver_symb_func.h"
#include "ByteSet.h"
void ChannelEqu_Proc(
@ -13,10 +12,7 @@ void ChannelEqu_Proc(
)
{
//局部变量定义
int32_t *cfg_addr = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_FREOFF_CFG_LENGTH + RECEIVER_SYMB_CHANNELEST_CFG_LENGTH;
int32_t *lut_addr = receiver_symb_config_dm2_ptr + RECEIVER_SYMB_PilotOrig_LUT1_LENGTH;
uint32_t *ConfigByteSet = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_COMMEN_CFG_LENGTH;
uint32_t *ConfigByteSet = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.ByteSet_CFG15_Offset ;
uint32_t res_ptr = CHANNELEQU_DATA_DDR_PTR; //Store result of Equ
@ -38,51 +34,339 @@ void ChannelEqu_Proc(
// Configuration
uint32_t *CfgFft4096Int32 = cfg_addr;
uint32_t *CfgEQ21Part1 = cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH;
uint32_t *CfgEQ1Part2 = cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH;
uint32_t *CfgIFFT4096 = cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH + RECEIVER_SYMB_EQ1Part2_CFG6_1_LENGTH;
uint32_t *CfgIFFT4096TURN = cfg_addr + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH + RECEIVER_SYMB_EQ1Part2_CFG6_1_LENGTH + RECEIVER_SYMB_IFFT4096_CFG7_LENGTH;
uint32_t *CfgAgcShift = CfgIFFT4096TURN + RECEIVER_SYMB_IFFT4096_TURN_CFG7_LENGTH;
uint32_t *CfgIFFT4096AddCP = CfgIFFT4096TURN + RECEIVER_SYMB_IFFT4096_TURN_CFG7_LENGTH + RECEIVER_SYMB_AgcShiftFft_CFG7_LENGTH;
uint32_t *CfgFft4096Int32 = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.Fft4096Int32_CFG5_Offset;
uint32_t *CfgEQ21Part1 = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.EQ21Part1_CFG6_Offset;
uint32_t *CfgEQ1Part2 = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.EQ1Part2_CFG7_Offset;
uint32_t *CfgIFFT4096 = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.IFFT4096_CFG8_Offset;
uint32_t *CfgIFFT4096TURN = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.IFFTDatTurn_CFG9_Offset;
uint32_t *CfgAgcShift = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.Agcshift_CFG10_Offset;
uint32_t *CfgIFFT4096AddCP = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.AddCP_CFG11_Offset;
uint32_t *CfgByteCopy = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_COMMEN_CFG_LENGTH + RECEIVER_SYMB_ByteSet_CFG10_LENGTH;
uint32_t *CfgAgcMultiSym = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_COMMEN_CFG_LENGTH + RECEIVER_SYMB_ByteSet_CFG10_LENGTH + RECEIVER_SYMB_ByteCopy_CFG10_LENGTH;
uint32_t *CfgByteCopy = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.ByteCopy_CFG16_Offset;
uint32_t *CfgAgcMultiSym = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.AgcMultiSym_CFG17_Offset;
// LUT
uint32_t *Lut_W4096 = lut_addr;
uint32_t *Lut_EqFactor0 = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH;
uint32_t *Lut_EqFactor1 = receiver_symb_config_dm3_ptr;
uint32_t *Lut_EqFactor = receiver_symb_config_dm1_ptr;
uint32_t *Lut_Zero = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + RECEIVER_SYMB_EqFactor1_LUT4_LENGTH; //useless
uint32_t *Lut_phase = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + RECEIVER_SYMB_EqFactor1_LUT4_LENGTH + RECEIVER_SYMB_EqFactor_LUT5_LENGTH ;
uint32_t *Lut_agcFactor = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + RECEIVER_SYMB_EqFactor1_LUT4_LENGTH + RECEIVER_SYMB_EqFactor_LUT5_LENGTH + RECEIVER_SYMB_EqCpPhase_LUT6_LENGTH;
uint32_t *Lut_agcMultiSymFactor = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + RECEIVER_SYMB_EqFactor1_LUT4_LENGTH + RECEIVER_SYMB_EqFactor_LUT5_LENGTH + RECEIVER_SYMB_EqCpPhase_LUT6_LENGTH + RECEIVER_SYMB_AgcShiftFft_LUT7_LENGTH;
uint32_t *Lut_W4096 = receiver_symb_config_dm2_ptr + g_receiver_symb_table_param.EqW4096_LUT2_Offset;
uint32_t *Lut_EqFactor0 = receiver_symb_config_dm2_ptr + g_receiver_symb_table_param.EqFactor0_LUT3_Offset;
uint32_t *Lut_EqFactor1 = receiver_symb_config_dm3_ptr + g_receiver_symb_table_param.EqFactor_LUT5_Offset;
uint32_t *Lut_EqFactor = receiver_symb_config_dm1_ptr + g_receiver_symb_table_param.EqFactor1_LUT4_Offset;
// uint32_t *Lut_Zero = lut_addr + RECEIVER_SYMB_EqW4096_LUT2_LENGTH + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + RECEIVER_SYMB_EqFactor1_LUT4_LENGTH; //useless
uint32_t *Lut_phase = receiver_symb_config_dm2_ptr + g_receiver_symb_table_param.EqCpPhase_LUT6_Offset ;
uint32_t *Lut_agcFactor = receiver_symb_config_dm2_ptr + g_receiver_symb_table_param.AgcShiftFft_LUT7_Offset;
uint32_t *Lut_agcMultiSymFactor = receiver_symb_config_dm2_ptr + g_receiver_symb_table_param.AgcMultiSymFactor_LUT8_Offset;
// channelEst and data
uint32_t *InputCHEst_ddr_ptr = (uint32_t *)CHANNELEST_DATA_DDR_PTR;
uint32_t *InputData_ddr_ptr = (uint32_t *)(COMPENSATED_DATA_DDR_PTR + 2048*4); //去除导频
ChannelEquImpl(CfgFft4096Int32,CfgEQ21Part1,CfgEQ1Part2,CfgIFFT4096,CfgIFFT4096TURN,CfgIFFT4096AddCP,CfgByteCopy,CfgAgcShift,CfgAgcMultiSym,
available_ptr_dm0,
available_ptr_dm1,
available_ptr_dm2 ,
available_ptr_dm3 ,
InputCHEst_ddr_ptr,
InputData_ddr_ptr,
Lut_Zero,
InputNoise,
Lut_W4096,
Lut_EqFactor0,
Lut_EqFactor1,
Lut_EqFactor,
Lut_phase,
Lut_agcFactor,
Lut_agcMultiSymFactor,
res_ptr
);
int numSym = 7 ; ///7;
int Scale = 13;
int NRE = 4096;
int ShiftFactor[] = {7,1,0,0,0,0,0,0,0,0,0,0};
int NumCB = 2;
const int16_t dataPilotDiff = 5;
// int16_t baseScale = -2;
for(int ii=0;ii<32;ii++)
{
Lut_agcFactor[ii] = 0;
}
for(int i=0;i<NumCB;i++)
{
int16_t pre_scale = 0;
int *Scalep = available_ptr_dm0;
int *Scale0 = available_ptr_dm0 + 0x0040;
int *Scales = available_ptr_dm0 + 0x0080;
int *tmp0 = (int*)(((int)available_ptr_dm1 + 0x4000 - 1) & ~(0x4000 - 1)); // LENGTH: 0x2000
int *Fft_est_dm3_ptr = (int*)(((int)available_ptr_dm3 + 0x4000 - 1) & ~(0x4000 - 1)); // LENGTH: 0x1000
int *channelEst_dm0_ptr = (int*)(((int)Scales + 0x0100 + 0x4000 - 1) & ~(0x4000 - 1));
/*****************************************FFT of channelEst*****************************************/
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer(
(uint64_t)(InputCHEst_ddr_ptr + 4096*i) ,
(uint64_t)DM_TO_CSU_ADDR(Fft_est_dm3_ptr),
4096*4,
DMA_TAG_G2L,
1);
ape_csu_task_lookup(DMA_TAG_G2L, 1);
AgcShiftForFftInt32(
(int)CfgAgcShift,
MPU_ADDR(Fft_est_dm3_ptr),
MPU_ADDR(Fft_est_dm3_ptr),
4096,
1,
MPU_ADDR(Lut_agcFactor),
MPU_ADDR(Lut_agcFactor),
MPU_ADDR(channelEst_dm0_ptr),
MPU_ADDR(channelEst_dm0_ptr)
);
SVRReg[0] = MPU_ADDR(CfgAgcShift);
AgcShiftForFftInt32Asm(SVRReg);
WAIT_MPU_STOP;
Fft4096Int32(
(int)CfgFft4096Int32,
1,
Scale,
ShiftFactor,
MPU_ADDR(Lut_W4096), //DM2
MPU_ADDR(channelEst_dm0_ptr), //DM0
MPU_ADDR(available_ptr_dm2), //DM2
MPU_ADDR(Fft_est_dm3_ptr), //DM3
MPU_ADDR(tmp0), //DM1
MPU_ADDR(Scalep),
MPU_ADDR(Scale0)
);
SVRReg[0] = MPU_ADDR(CfgFft4096Int32);
Fft4096Int32Asm(SVRReg);
WAIT_MPU_STOP;
int16_t pilotFFtScale = Scalep[0] & (0xFFFF);
/*ape_csu_dma_1D_L2G_ch0ch1_transfer(
(uint64_t)DM_TO_CSU_ADDR(Fft_est_dm3_ptr),
(uint64_t)0x84c00000,
4096*4 ,
DMA_TAG_L2G,
1);
*/
//构造第二根天线
ByteCopy((int)CfgByteCopy, MPU_ADDR(channelEst_dm0_ptr),MPU_ADDR(Fft_est_dm3_ptr + 4096),16384);
SVRReg[0] = MPU_ADDR(CfgByteCopy);
ByteCopyAsm(SVRReg);
if(i==1){
InputData_ddr_ptr = InputData_ddr_ptr + 7*(68+4096) + 1024 + 72;
}
/*****************************************channelEqu*****************************************/
int *Fft_outputdata_dm3_ptr = Fft_est_dm3_ptr + 0x2000;
int *InData_dm0_ptr = channelEst_dm0_ptr + 0x2000;
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer(
(uint64_t)(InputData_ddr_ptr + 68) ,
(uint64_t)DM_TO_CSU_ADDR(Fft_outputdata_dm3_ptr),
4096*4,
DMA_TAG_G2L,
1);
WAIT_MPU_STOP;
ape_csu_task_lookup(DMA_TAG_G2L, 1);
for(int j=0;j<numSym;j++)
{
AgcShiftForFftInt32(
(int)CfgAgcShift,
MPU_ADDR(Fft_outputdata_dm3_ptr),
MPU_ADDR(Fft_outputdata_dm3_ptr),
4096,
1,
MPU_ADDR(Lut_agcFactor),
MPU_ADDR(Lut_agcFactor),
MPU_ADDR(InData_dm0_ptr),
MPU_ADDR(InData_dm0_ptr)
);
SVRReg[0] = MPU_ADDR(CfgAgcShift);
AgcShiftForFftInt32Asm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 12, *Fft_outputdata_dm3_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 13, *(Fft_outputdata_dm3_ptr+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 14, *InData_dm0_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 15, *(InData_dm0_ptr+1));
// FFT of Data
Fft4096Int32(
(int)CfgFft4096Int32,
1,
Scale,
ShiftFactor,
MPU_ADDR(Lut_W4096),
MPU_ADDR(InData_dm0_ptr), //DM0
MPU_ADDR(available_ptr_dm2), //DM2
MPU_ADDR(Fft_outputdata_dm3_ptr), //DM3
MPU_ADDR(tmp0), //DM1
MPU_ADDR(Scalep),
MPU_ADDR(Scale0)
);
SVRReg[0] = MPU_ADDR((int)CfgFft4096Int32);
Fft4096Int32Asm(SVRReg);
WAIT_MPU_STOP;
/* -------------- 拉齐信道估计FFT ------------*/
int16_t dataFftScale = Scalep[0] & (0xFFFF);
int16_t shiftScale = pilotFFtScale - dataFftScale - dataPilotDiff;
int cc = i;
int ccc = j;
if(shiftScale!=0){
Lut_agcMultiSymFactor[0] = shiftScale;
//tmp0暂存移位后FFT结果
AgcShiftMultiSym((int)CfgAgcMultiSym, MPU_ADDR(Fft_est_dm3_ptr), 8192,1, MPU_ADDR(tmp0),MPU_ADDR(Lut_agcMultiSymFactor));
SVRReg[0] = MPU_ADDR(CfgAgcMultiSym);
AgcShiftMultiSymAsm(SVRReg);
WAIT_MPU_STOP;
ByteCopy((int)CfgByteCopy, MPU_ADDR(tmp0),MPU_ADDR(Fft_est_dm3_ptr),16384*2);
SVRReg[0] = MPU_ADDR(CfgByteCopy);
ByteCopyAsm(SVRReg);
WAIT_MPU_STOP;
}
// 构造第二根天线数据，与第一根相同
ByteCopy((int)CfgByteCopy, MPU_ADDR(InData_dm0_ptr),MPU_ADDR(Fft_outputdata_dm3_ptr + 4096),16384);
SVRReg[0] = MPU_ADDR(CfgByteCopy);
ByteCopyAsm(SVRReg);
int *Equ_Output = InData_dm0_ptr + 0x1000; //LENGTH 0x2000 (the second ant occupied additional space 0x1000)
int *InOut2_dm1_ptr = tmp0; //LENGTH 0x1000
int *InOut3_dm0_ptr = InData_dm0_ptr + 0x3000; //LENGTH 0x2000
int *InOut1_dm1_ptr = tmp0 + 0x1000; //LENGTH 0x1000
WAIT_MPU_STOP;
EQ21Part1(
CfgEQ21Part1,
NRE,
1,
MPU_ADDR(Fft_est_dm3_ptr), //dm3 信道估计fft
MPU_ADDR(InputNoise), //dm3 噪声全0
MPU_ADDR(Fft_outputdata_dm3_ptr), //dm3 数据fft
MPU_ADDR(Equ_Output), //dm0
MPU_ADDR(InOut1_dm1_ptr), //dm1
MPU_ADDR(InOut2_dm1_ptr), //dm1
MPU_ADDR(InOut3_dm0_ptr) //dm0
);
SVRReg[0] = MPU_ADDR(CfgEQ21Part1);
EQ21Part1Asm(SVRReg);
int *Equ_Output_2 = available_ptr_dm2; //第一根天线均衡输出
int *Equ_Output_21 = available_ptr_dm2 + 0x2000; //第二根天线均衡输出
EQ1Part2(
CfgEQ1Part2,
NRE,
1,
MPU_ADDR(Equ_Output),
MPU_ADDR(InOut1_dm1_ptr),
MPU_ADDR(InOut2_dm1_ptr),
MPU_ADDR(InOut3_dm0_ptr),
MPU_ADDR(Equ_Output_2),
MPU_ADDR(Equ_Output_21)
);
WAIT_MPU_STOP;
SVRReg[0]= MPU_ADDR(CfgEQ1Part2);
EQ1Part2Asm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 16, *Equ_Output_2);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 17, *(Equ_Output_2+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 18, *(Equ_Output_2+2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 19, *(Equ_Output_2+3));
//提前准备下一块数据
if(j<numSym-1){
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(InputData_ddr_ptr + (68+4096)*(j+1) + 68), //(68+4096)*(j+1) + 68)
(uint64_t)DM_TO_CSU_ADDR(Fft_outputdata_dm3_ptr),
4096*4,
DMA_TAG_G2L,
0);
}
/****************************** IFFT ****************************************8*/
int *Temp1 = Fft_outputdata_dm3_ptr + 0x1000; // 缓存
IFFT4096DataTurn(
(int)CfgIFFT4096TURN,
1,
1,
MPU_ADDR(Equ_Output_2), //dm2
MPU_ADDR(tmp0), //dm1 无效
MPU_ADDR(Equ_Output), //dm0
MPU_ADDR(Temp1) //dm3 无效
);
SVRReg[0]= MPU_ADDR(CfgIFFT4096TURN);
IFFT4096DataTurnAsm(SVRReg);
WAIT_MPU_STOP;
int *Temp0 = available_ptr_dm2; // buff, Equ_Output_2
IFFT4096(
(int)CfgIFFT4096,
1,
MPU_ADDR(Temp0), //DM2
MPU_ADDR(Temp1), //DM3
MPU_ADDR(Equ_Output), //DM0
MPU_ADDR(tmp0), //DM1
MPU_ADDR(Lut_EqFactor0), //DM2
MPU_ADDR(Lut_EqFactor1), //DM3
MPU_ADDR(Lut_EqFactor)); //DM1
SVRReg[0] = MPU_ADDR(CfgIFFT4096);
IFFT4096Asm(SVRReg);
WAIT_MPU_STOP;
int CPLength0 = 352;
int CPLength1 = 288;
AddCP(
(int) CfgIFFT4096AddCP,
2,
1,
CPLength0,
CPLength1,
MPU_ADDR(Equ_Output), //DM0
MPU_ADDR(tmp0), //DM1 invalid
MPU_ADDR(Equ_Output_2), //DM2
MPU_ADDR(Temp1), //DM3 invalid
MPU_ADDR(Lut_phase) //
);
SVRReg[0] = MPU_ADDR(CfgIFFT4096AddCP);
AddCPAsm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 20, *(Equ_Output_2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 21, *(Equ_Output_2+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 22, *(Equ_Output_2+2));
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_L2G_ch0ch1_transfer(
(uint64_t)DM_TO_CSU_ADDR((Equ_Output_2+CPLength0)),
(uint64_t)res_ptr,
4096*4 ,
DMA_TAG_L2G,
1);
res_ptr = res_ptr + 16384;
}
}
}

34
APELib/Receiver_symb/src/channelEst_Proc.s.c
View File

@ -1,6 +1,6 @@
#include "receiver_symb_func.h"
#include "ByteSet.h"
void ChannelEst_Proc(
@ -24,13 +24,13 @@ void ChannelEst_Proc(
// Get Configuration and LUT
uint32_t *ConfigAddr_channelEst = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_FreOffEst_CFG1_LENGTH + RECEIVER_SYMB_FreOffComp_CFG2_LENGTH + RECEIVER_SYMB_FreOffCordic_CFG3_LENGTH;
uint32_t *cfg_transform8 = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_FREOFF_CFG_LENGTH + RECEIVER_SYMB_CHANNELEST_CFG_LENGTH + RECEIVER_SYMB_CHANNELEQU_CFG_LENGTH + RECEIVER_SYMB_DeTransform2_CFG8_LENGTH + RECEIVER_SYMB_DeTransform4_CFG9_LENGTH;
uint32_t *ConfigAddr_channelEst = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.ChannelEst_CFG4_Offset;
uint32_t *cfg_transform8 = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.Transform8_CFG14_Offset;
uint32_t *Pilot_orig_LUT = receiver_symb_config_dm2_ptr;
uint32_t *InputPilotAddr = (uint32_t *)time_data_dm0_ptr;
uint32_t *channelEstOutAddr = (uint32_t *)(temp_dm1_ptr);
uint32_t *ConfigByteSet = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_COMMEN_CFG_LENGTH;
uint32_t *ConfigByteSet = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.ByteSet_CFG15_Offset;
ByteSet(ConfigByteSet,0,MPU_ADDR(channelEstOutAddr),32768);
SVRReg[0] = MPU_ADDR(ConfigByteSet);
@ -61,17 +61,37 @@ void ChannelEst_Proc(
double db_imag[4] = {0.9239, 0.5, -0.7071, 0.8660};
uint32_t *PilotTrans = temp_dm3_ptr;
Transform((int)cfg_transform8,MPU_ADDR(Pilot_orig_LUT),MPU_ADDR(PilotTrans), 8, db_real, db_imag, 1);
Transform((int)cfg_transform8,
MPU_ADDR(Pilot_orig_LUT),
MPU_ADDR(PilotTrans),
8,
db_real,
db_imag,
1);
SVRReg[0] = MPU_ADDR(cfg_transform8);
Transform8Asm(SVRReg);
WAIT_MPU_STOP;
// TODO 暂用Pilot_orig_LUT， 此处应使用PilotTrans替换Pilot_orig_LUT 20250529
ChannelEstImpl(ConfigAddr_channelEst, Pilot_orig_LUT, InputPilotAddr, channelEstOutAddr + subIndex*4096);
for(int i=0;i<32;i++){
Pilot_orig_LUT[i+1024] = Pilot_orig_LUT[i];
InputPilotAddr[i+1024] = InputPilotAddr[i];
}
ChannelEst(ConfigAddr_channelEst,
MPU_ADDR(Pilot_orig_LUT),
MPU_ADDR(InputPilotAddr),
MPU_ADDR(channelEstOutAddr + subIndex*4096));
ape_csu_task_lookup(DMA_TAG_G2L, 1);
SVRReg[0] = MPU_ADDR(ConfigAddr_channelEst);
channelEstAsm(SVRReg);
//WAIT_MPU_STOP;
}
//保证最后一次微码计算结束再搬出
WAIT_MPU_STOP;
ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)channelEstOutAddr),
(uint64_t)res_ptr,
4096*2*4 ,

77
APELib/Receiver_symb/src/freOffCompImpl.s.c
View File

@ -1,77 +0,0 @@
#include "ucps2.h"
#include "ucpm2.h"
#include "freOffComp.h"
#include "freOffCompImpl.h"
#include "cordicSC.h"
#include "ape_common.h"
#include "common.h"
#include "trace.h"
//v16u32 KI = {2,4,6};
void freOffCompImpl(int* ConfigAddr_comp, int* ConfigAddr_cordic, int *freEstOutAddr,int* data_ptr_ddr,int* res_ptr_ddr, int *ava_ptr_dm2, int *ava_ptr_dm3){
volatile int a = 1;
int count = 120;
freEstOutAddr[0] = freEstOutAddr[0]>>10;
int increment = freEstOutAddr[0]*128;
uint32_t time0, time1;
for(int i=0;i<4;i++)
{
int res_ptr_offset = i*count*128;
int *input_data_ptr = ava_ptr_dm3;
int *fre_comp_exp_ptr = ava_ptr_dm2;
int *output_data_ptr = freEstOutAddr + 0x1000;
int time_data_length = count*128;
cordicSC(ConfigAddr_cordic,MPU_ADDR(freEstOutAddr),MPU_ADDR(fre_comp_exp_ptr),increment,count);
WAIT_MPU_STOP;
SVRReg[0] = MPU_ADDR(ConfigAddr_cordic);
cordicSCAsm(SVRReg);
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)data_ptr_ddr,
(uint64_t)DM_TO_CSU_ADDR(input_data_ptr),
time_data_length*4,
DMA_TAG_G2L,
1);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 17, *fre_comp_exp_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 18, *(fre_comp_exp_ptr+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 19, *(fre_comp_exp_ptr+2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 20, *freEstOutAddr);
freOffComp(ConfigAddr_comp,MPU_ADDR(input_data_ptr),MPU_ADDR(fre_comp_exp_ptr),MPU_ADDR(output_data_ptr));
ape_csu_task_lookup(DMA_TAG_G2L, 1);
WAIT_MPU_STOP;
SVRReg[0] = MPU_ADDR(ConfigAddr_comp);
freOffCompAsm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 21, *output_data_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 22, *(output_data_ptr+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 23, *(output_data_ptr+2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 24, *(output_data_ptr+3));
ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)output_data_ptr),
(uint64_t)(res_ptr_ddr + res_ptr_offset),
time_data_length*4 ,
DMA_TAG_L2G,
1);
}
return ;
}

28
APELib/Receiver_symb/src/freOffEstImpl.s.c
View File

@ -1,28 +0,0 @@
#include "ucps2.h"
#include "ucpm2.h"
#include "freOffEst.h"
#include "freOffEstImpl.h"
#include "ape_common.h"
#include "common.h"
v16u32 KI = {2,4,6};
void freOffEstImpl(int* ConfigBaseAddr_est, int *InputAddr0,int *InputAddr1,int *freEstOutAddr){
freOffEst(ConfigBaseAddr_est, MPU_ADDR(InputAddr0), MPU_ADDR(InputAddr1), MPU_ADDR(freEstOutAddr));
WAIT_MPU_STOP;
ape_csu_task_lookup(DMA_TAG_G2L, 1);
SVRReg[0] = MPU_ADDR(ConfigBaseAddr_est);
freOffEstAsm(SVRReg);
return ;
}

104
APELib/Receiver_symb/src/freoff_Proc.s.c
View File

@ -19,7 +19,7 @@ void FreOff_Proc(
uint32_t time_data_dm3_ptr = ((((uint32_t)&temp_dm3_ptr[0] + 4095)>>12)<<12);
uint32_t res_ptr = RECEIVER_SYMB_OUT;
uint32_t time0, time1;
time0 = Time_offset(0);
// Read Global Buff
time_data_ddr_ptr = (uint32_t)param_ptr;
time_data_length = 2048;
@ -32,10 +32,10 @@ void FreOff_Proc(
0);
ape_csu_task_lookup(DMA_TAG_G2L, 1);
// Get Configuration
uint32_t *ConfigAddr_est = receiver_symb_config_dm0_ptr;
uint32_t *ConfigAddr_comp = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_FreOffEst_CFG1_LENGTH;
uint32_t *ConfigAddr_cordic = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_FreOffEst_CFG1_LENGTH + RECEIVER_SYMB_FreOffComp_CFG2_LENGTH;
uint32_t *CfgByteCopy= receiver_symb_config_dm0_ptr + RECEIVER_SYMB_COMMEN_CFG_LENGTH + RECEIVER_SYMB_ByteSet_CFG10_LENGTH;
uint32_t *ConfigAddr_est = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.FreOffEst_CFG1_Offset;
uint32_t *ConfigAddr_comp = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.FreOffComp_CFG2_Offset;
uint32_t *ConfigAddr_cordic = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.FreOffCordic_CFG3_Offset;
uint32_t *CfgByteCopy= receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.ByteCopy_CFG16_Offset;
@ -47,15 +47,17 @@ void FreOff_Proc(
uint32_t *freEstOutAddr = (uint32_t *)(temp_dm1_ptr + 0x0020);
ByteCopy((int)CfgByteCopy, MPU_ADDR(InputCPAddr + 1024),MPU_ADDR(InputPilotAddr),1024*4);
ByteCopy((int)CfgByteCopy,
MPU_ADDR(InputCPAddr + 1024),
MPU_ADDR(InputPilotAddr),
1024*4);
SVRReg[0] = MPU_ADDR(CfgByteCopy);
ByteCopyAsm(SVRReg);
//TODO:验证后可以优化删除掉
WAIT_MPU_STOP;
time0 = Time_offset(0);
//20250509
//ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)receiver_symb_config_dm0_ptr),
// (uint64_t)0x84c00000,
@ -65,7 +67,18 @@ void FreOff_Proc(
//ape_csu_task_lookup(DMA_TAG_L2G, 1);
freOffEstImpl(ConfigAddr_est, InputCPAddr, InputPilotAddr, freEstOutAddr);
freOffEst(ConfigAddr_est,
MPU_ADDR(InputCPAddr),
MPU_ADDR(InputPilotAddr),
MPU_ADDR(freEstOutAddr));
WAIT_MPU_STOP;
ape_csu_task_lookup(DMA_TAG_G2L, 1);
SVRReg[0] = MPU_ADDR(ConfigAddr_est);
freOffEstAsm(SVRReg);
WAIT_MPU_STOP;
time1 = Time_offset(0);
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 9, time1-time0);
@ -87,15 +100,68 @@ void FreOff_Proc(
// Frequency Offset Compensate
uint32_t *available_ptr_dm2 = temp_dm2_ptr;
uint32_t *available_ptr_dm3 = temp_dm3_ptr;
freOffCompImpl(
ConfigAddr_comp,
ConfigAddr_cordic,
freEstOutAddr,
(uint32_t *)time_data_ddr_ptr,
(uint32_t *)res_ptr,
available_ptr_dm2,
available_ptr_dm3
);
int count = 120;
freEstOutAddr[0] = freEstOutAddr[0]>>10;
int increment = freEstOutAddr[0]*128;
for(int i=0;i<4;i++)
{
int res_ptr_offset = i*count*128;
int *input_data_ptr = available_ptr_dm3;
int *fre_comp_exp_ptr = available_ptr_dm2;
int *output_data_ptr = freEstOutAddr + 0x1000;
int time_data_length = count*128;
cordicSC(ConfigAddr_cordic,
MPU_ADDR(freEstOutAddr),
MPU_ADDR(fre_comp_exp_ptr),
increment,count);
WAIT_MPU_STOP;
SVRReg[0] = MPU_ADDR(ConfigAddr_cordic);
cordicSCAsm(SVRReg);
ape_csu_task_lookup(DMA_TAG_G2L, 1);
ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)time_data_ddr_ptr,
(uint64_t)DM_TO_CSU_ADDR(input_data_ptr),
time_data_length*4,
DMA_TAG_G2L,
1);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 17, *fre_comp_exp_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 18, *(fre_comp_exp_ptr+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 19, *(fre_comp_exp_ptr+2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 20, *freEstOutAddr);
freOffComp(ConfigAddr_comp,
MPU_ADDR(input_data_ptr),
MPU_ADDR(fre_comp_exp_ptr),
MPU_ADDR(output_data_ptr));
ape_csu_task_lookup(DMA_TAG_G2L, 1);
WAIT_MPU_STOP;
SVRReg[0] = MPU_ADDR(ConfigAddr_comp);
freOffCompAsm(SVRReg);
WAIT_MPU_STOP;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 21, *output_data_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 22, *(output_data_ptr+1));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 23, *(output_data_ptr+2));
TRACE(TRACE_RECEIVER_SYMB_ADDR, 24, *(output_data_ptr+3));
ape_csu_dma_1D_L2G_ch0ch1_transfer((uint64_t)DM_TO_CSU_ADDR((uint32_t)output_data_ptr),
(uint64_t)(res_ptr + res_ptr_offset),
time_data_length*4 ,
DMA_TAG_L2G,
1);
}
time1 = Time_offset(0);
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 10, time1-time0);

32
APELib/Receiver_symb/src/receiver_Symb_Init.s.c
View File

@ -10,7 +10,6 @@
*****************************************************************/
#include "receiver_symb_func.h"
extern uint32_t g_symb2bit_buffer_sel;
/*!
* @brief: Receiver任务启动前的初始化工作
* 初始化全局参数，ddr查找表搬入SM
@ -23,13 +22,38 @@ void Receiver_Symb_Init()
uint32_t lutDdrAddr,idx;
//DM0
g_receiver_symb_table_param.FreOffEst_CFG1_Offset = 0;
g_receiver_symb_table_param.FreOffComp_CFG2_Offset = g_receiver_symb_table_param.FreOffEst_CFG1_Offset + RECEIVER_SYMB_FreOffEst_CFG1_LENGTH;
g_receiver_symb_table_param.FreOffCordic_CFG3_Offset = g_receiver_symb_table_param.FreOffComp_CFG2_Offset + RECEIVER_SYMB_FreOffComp_CFG2_LENGTH;
g_receiver_symb_table_param.ChannelEst_CFG4_Offset = g_receiver_symb_table_param.FreOffCordic_CFG3_Offset + RECEIVER_SYMB_FreOffCordic_CFG3_LENGTH;
g_receiver_symb_table_param.Fft4096Int32_CFG5_Offset = g_receiver_symb_table_param.ChannelEst_CFG4_Offset + RECEIVER_SYMB_ChannelEst_CFG4_LENGTH;
g_receiver_symb_table_param.EQ21Part1_CFG6_Offset = g_receiver_symb_table_param.Fft4096Int32_CFG5_Offset + RECEIVER_SYMB_Fft4096Int32_CFG5_LENGTH;
g_receiver_symb_table_param.EQ1Part2_CFG7_Offset = g_receiver_symb_table_param.EQ21Part1_CFG6_Offset + RECEIVER_SYMB_EQ21Part1_CFG6_LENGTH;
g_receiver_symb_table_param.IFFT4096_CFG8_Offset = g_receiver_symb_table_param.EQ1Part2_CFG7_Offset + RECEIVER_SYMB_EQ1Part2_CFG7_LENGTH;
g_receiver_symb_table_param.IFFTDatTurn_CFG9_Offset = g_receiver_symb_table_param.IFFT4096_CFG8_Offset + RECEIVER_SYMB_IFFT4096_CFG8_LENGTH;
g_receiver_symb_table_param.Agcshift_CFG10_Offset = g_receiver_symb_table_param.IFFTDatTurn_CFG9_Offset + RECEIVER_SYMB_IFFT4096_TURN_CFG9_LENGTH;
g_receiver_symb_table_param.AddCP_CFG11_Offset = g_receiver_symb_table_param.Agcshift_CFG10_Offset + RECEIVER_SYMB_AgcShiftFft_CFG10_LENGTH;
g_receiver_symb_table_param.DeTransform2_CFG12_Offset = g_receiver_symb_table_param.AddCP_CFG11_Offset + RECEIVER_SYMB_AddCP_CFG11_LENGTH;
g_receiver_symb_table_param.DeTransform4_CFG13_Offset = g_receiver_symb_table_param.DeTransform2_CFG12_Offset + RECEIVER_SYMB_DeTransform2_CFG12_LENGTH;
g_receiver_symb_table_param.Transform8_CFG14_Offset = g_receiver_symb_table_param.DeTransform4_CFG13_Offset + RECEIVER_SYMB_DeTransform4_CFG13_LENGTH;
g_receiver_symb_table_param.ByteSet_CFG15_Offset = g_receiver_symb_table_param.Transform8_CFG14_Offset + RECEIVER_SYMB_Transform8_CFG14_LENGTH;
g_receiver_symb_table_param.ByteCopy_CFG16_Offset = g_receiver_symb_table_param.ByteSet_CFG15_Offset + RECEIVER_SYMB_ByteSet_CFG15_LENGTH;
g_receiver_symb_table_param.AgcMultiSym_CFG17_Offset = g_receiver_symb_table_param.ByteCopy_CFG16_Offset + RECEIVER_SYMB_ByteCopy_CFG16_LENGTH;
//DM1
g_receiver_symb_table_param.EqFactor_LUT5_Offset = 0;
//DM2
g_receiver_symb_table_param.PilotOrig_LUT1_Offset = 0;
g_receiver_symb_table_param.EqW4096_LUT2_Offset = g_receiver_symb_table_param.PilotOrig_LUT1_Offset + RECEIVER_SYMB_PilotOrig_LUT1_LENGTH;
g_receiver_symb_table_param.EqFactor0_LUT3_Offset = g_receiver_symb_table_param.EqW4096_LUT2_Offset + RECEIVER_SYMB_EqW4096_LUT2_LENGTH;
//TODO:遗留问题
g_receiver_symb_table_param.EqCpPhase_LUT6_Offset = g_receiver_symb_table_param.EqFactor0_LUT3_Offset + RECEIVER_SYMB_EqFactor0_LUT3_LENGTH + \
RECEIVER_SYMB_EqFactor1_LUT4_LENGTH + RECEIVER_SYMB_EqFactor_LUT5_LENGTH ;
g_receiver_symb_table_param.AgcShiftFft_LUT7_Offset = g_receiver_symb_table_param.EqCpPhase_LUT6_Offset + RECEIVER_SYMB_EqCpPhase_LUT6_LENGTH;
g_receiver_symb_table_param.AgcMultiSymFactor_LUT8_Offset = g_receiver_symb_table_param.AgcShiftFft_LUT7_Offset + RECEIVER_SYMB_AgcShiftFft_LUT7_LENGTH;
//DM3
g_receiver_symb_table_param.EqFactor1_LUT4_Offset = 0;
//SM
g_symb2bit_buffer_sel = 0;

62
APELib/Receiver_symb/src/receiver_Symb_Proc.s.c
View File

@ -9,7 +9,7 @@
*****************************************************************/
#include "receiver_symb_func.h"
uint32_t g_symb2bit_buffer_sel;
receiver_symb2bit_t data_send2bit_task;
/*!
* @brief: Receiver_sync链路处理
@ -40,39 +40,12 @@ void Receiver_Symb_Proc(
//data读入
//获取源数据地址
receiver_sync2symb_t* para_dm_ptr = param_ptr;
//TODO: 计算完成结果需要存到下面两个buffer地址中的一个
//计算完成结果需要存到下面两个buffer地址中的一个
uint32_t cur_out_ddr_ptr = (0 == g_symb2bit_buffer_sel) ? ((uint32_t)RECEIVER_SYMB2BIT_BUFFER0_ADDR) : ((uint32_t)RECEIVER_SYMB2BIT_BUFFER1_ADDR);
//LOG_ERROR_S("%d %d %d %d 0x%08x 0x%08x %d %d\n",para_dm_ptr->sfn, para_dm_ptr->slot, para_dm_ptr->num_data_section,
// para_dm_ptr->proc_id, para_dm_ptr->data_section0_ptr, para_dm_ptr->data_section1_ptr, para_dm_ptr->data_section0_length, para_dm_ptr->data_section1_length);
// if(1 == para_dm_ptr->num_data_section)
// {
// ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(para_dm_ptr->data_section0_ptr),
// (uint64_t)DM_TO_CSU_ADDR(temp_dm0_ptr),
// (para_dm_ptr->data_section0_length)<<2,
// DMA_TAG_G2L,
// 1);
// }
// else
// {
// ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)(para_dm_ptr->data_section0_ptr),
// (uint64_t)DM_TO_CSU_ADDR(temp_dm0_ptr),
// (para_dm_ptr->data_section0_length)<<2,
// DMA_TAG_G2L,
// 0);
// ape_csu_dma_1D_G2L_ch2ch3_transfer((uint64_t)(para_dm_ptr->data_section1_ptr),
// (uint64_t)DM_TO_CSU_ADDR(temp_dm0_ptr + (para_dm_ptr->data_section0_length)),
// (para_dm_ptr->data_section1_length)<<2,
// DMA_TAG_G2L,
// 1);
// }
//更新buffer
g_symb2bit_buffer_sel = (g_symb2bit_buffer_sel + 1) & 0x1;
// //计算结果搬移到外存
// temp_u32 = 1000;//计算byte数
WAIT_MPU_STOP;
ape_csu_task_lookup(DMA_TAG_G2L, 1);
@ -81,47 +54,40 @@ void Receiver_Symb_Proc(
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 4, time0);
FreOff_Proc((uint32_t*)para_dm_ptr->data_section0_ptr, temp_dm0_ptr, temp_dm1_ptr, temp_dm2_ptr, temp_dm3_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 3);
time1 = Time_offset(0);
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 5, time1 -time0);
time0 = time1;
ChannelEst_Proc(param_ptr,temp_dm0_ptr,temp_dm1_ptr,temp_dm2_ptr,temp_dm3_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 4);
time1 = Time_offset(0);
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 6, time1 -time0);
time0 = time1;
TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 4);
time1 = Time_offset(0);
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 6, time1 -time0);
time0 = time1;
ChannelEqu_Proc(param_ptr, temp_dm0_ptr, temp_dm1_ptr, temp_dm2_ptr, temp_dm3_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 5);
time1 = Time_offset(0);
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 7, time1 -time0);
time0 = time1;
// __ucps2_synch(0);
// __ucps2_synch(0);
// __ucps2_synch(0);
// __ucps2_synch(0);
// __ucps2_synch(0);
// __ucps2_dbgbreak();
Transform_Proc(param_ptr, temp_dm0_ptr, temp_dm1_ptr, temp_dm2_ptr, temp_dm3_ptr);
TRACE(TRACE_RECEIVER_SYMB_ADDR, 3, 6);
time1 = Time_offset(0);
TRACE_MAX(TRACE_RECEIVER_SYMB_ADDR, 8, time1 -time0);
time0 = time1;
// #ifdef IDE_TEST
// printf("DataTrans");
// #endif
//return ;
//7.核间消息to APE2
//需要定义结构体
//更新buffer
g_symb2bit_buffer_sel = (g_symb2bit_buffer_sel + 1) & 0x1;
//7.核间消息to APE3/5
data_send2bit_task.proc_id = para_dm_ptr->proc_id;
data_send2bit_task.sfn = para_dm_ptr->sfn;
data_send2bit_task.slot = para_dm_ptr->slot;

3
APELib/Receiver_symb/src/receiver_Symb_Var.s.c
View File

@ -15,4 +15,5 @@ uint32_t *receiver_symb_config_dm0_ptr = NULLPTR;
uint32_t *receiver_symb_config_dm1_ptr = NULLPTR;
uint32_t *receiver_symb_config_dm2_ptr = NULLPTR;
uint32_t *receiver_symb_config_dm3_ptr = NULLPTR;
int32_t storedfreoffestvalue = 1000000;
int32_t storedfreoffestvalue = 1000000;
uint32_t g_symb2bit_buffer_sel;

8
APELib/Receiver_symb/src/transform_Proc.s.c
View File

@ -17,16 +17,14 @@ void Transform_Proc(
uint32_t symbol_SM_addr_in = equ_data_ddr_ptr;
uint32_t symbol_SM_addr_out = TRANSFORMER_DATA_DDR_PTR;
uint32_t *Cfg_DeTransform2 = receiver_symb_config_dm0_ptr + RECEIVER_SYMB_FREOFF_CFG_LENGTH + RECEIVER_SYMB_CHANNELEST_CFG_LENGTH + RECEIVER_SYMB_CHANNELEQU_CFG_LENGTH;
uint32_t *Cfg_DeTransform4 = Cfg_DeTransform2 + RECEIVER_SYMB_DeTransform2_CFG8_LENGTH;
uint32_t *Cfg_DeTransform2 = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.DeTransform2_CFG12_Offset;
uint32_t *Cfg_DeTransform4 = receiver_symb_config_dm0_ptr + g_receiver_symb_table_param.DeTransform4_CFG13_Offset;
uint32_t TransTemp = (uint32_t)(temp_dm1_ptr + 0x1000) ;
uint32_t OutputAddr_Trans = (uint32_t)temp_dm3_ptr;
uint32_t InputAddr_Trans = (uint32_t)temp_dm3_ptr;
volatile int a;
/*****************************************initial*****************************************/
double thita[6];
/*****************************************initial*****************************************/
// double *db_imag = proc_info->transform_para_real;
// double *db_real = proc_info->transform_para_imag;

10
APELib/Receiver_sync/src/receiver_Sync_Init.s.c
View File

@ -45,16 +45,6 @@ void Receiver_Sync_Init()
// // 4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check())
// // 5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v)
// //获取地址
// ret = osp_get_cfgfile("nr_puxch_lut_sm.dat",
// (uint32_t *)&lutDdrAddr,
// (int32_t *)&(g_receiver_sync_table_param.pucch_lut_length));
// g_receiver_sync_table_param.pucch_lut_sm_ptr = SM0_BASE;
// ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr,
// (uint64_t)g_receiver_sync_table_param.pucch_lut_sm_ptr,
// g_receiver_sync_table_param.pucch_lut_length,
// DMA_TAG_G2G,
// 1);
// LOG_ERROR_S("test init\n");
//9. 微码配置文件ddr地址初始化
ret = osp_get_cfgfile("Receiver_Sync_cfg_dm0.dat",
(uint32_t *)&(g_receiver_sync_table_param.receiver_sync_config0_ddr_ptr),

19
APELib/Receiver_sync_first/src/receiver_Sync_First_Init.s.c
View File

@ -35,25 +35,6 @@ void Receiver_Sync_First_Init()
//SM
// //7. SPU查找表dma 搬移到ShareMemory，共257544Byte 包括：
// // 1). 置信度表uint16_t Q_W_Lut[2016] (n-5)
// // 2). 置信度最高的K'个置0的比特掩码表uint32_t I_BitMask_Lut[61056] (K-18,n-5)
// // 3). 解三角交织边长T表 uint8_t T_Lut[8192] (E-1)
// // 4). CRC6校验查找表uint8_t CRC6_Lut[256] (crc6check())
// // 5). 长度≥36的ZC序列q值查找表 uint8_t Zc_q_Lut[840] (nPrbs-3,u,v)
// //获取地址
// ret = osp_get_cfgfile("nr_puxch_lut_sm.dat",
// (uint32_t *)&lutDdrAddr,
// (int32_t *)&(g_receiver_sync_first_table_param.pucch_lut_length));
// g_receiver_sync_first_table_param.pucch_lut_sm_ptr = SM0_BASE;
// ape_csu_dma_1D_G2L_ch0ch1_transfer((uint64_t)lutDdrAddr,
// (uint64_t)g_receiver_sync_first_table_param.pucch_lut_sm_ptr,
// g_receiver_sync_first_table_param.pucch_lut_length,
// DMA_TAG_G2G,
// 1);
// LOG_ERROR_S("test init\n");
//9. 微码配置文件ddr地址初始化
//!!!配置文件是同一个!!!
ret = osp_get_cfgfile("Receiver_Sync_First_cfg_dm0.dat",
(uint32_t *)&(g_receiver_sync_first_table_param.receiver_sync_first_config0_ddr_ptr),

34
Config/Receiver_Symb_cfg_dm0.dat
View File

@ -318,22 +318,22 @@
0x00400006,
0x00000000,
0x00000000,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x0000023b,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000238,
0x00000000,
0x00000000,
0x00000000,
@ -374,7 +374,7 @@
0x00000000,
0x00000000,
0x00000000,
0x00000002,
0x00020002,
0x00000000,
0x00000000,
0x00000000,