// +FHDR------------------------------------------------------------ // Copyright (c) 2022 SmartLogic. // ALL RIGHTS RESERVED // ----------------------------------------------------------------- // Filename : mem_section.h // Author : xianfeng.du // Created On : 2022-06-25 // Last Modified : // ----------------------------------------------------------------- // Description: // // // -FHDR------------------------------------------------------------ #ifndef __MEM_SECTIONS_H__ #define __MEM_SECTIONS_H__ #include "typedef.h" #define MEM_ALIGNED_4BYTES 4 #define MEM_ALIGNED_64BYTES 64 #define SECTION_ALIGNED __attribute__((aligned(MEM_ALIGNED_4BYTES))) //__attribute__((section(".IM"))) #define ALWAYS_INLINE __attribute__((always_inline)) #define DDR0 __attribute__((section(".DDR0"))) #define PET_SRAM_BASE_ADDR 0x08700000 #define PET_SRAM_SIZE 0x20000//128KBytes #define ECS_SRAM_BASE_ADDR 0x07200000 #define ECS_SRAM_SIZE (0x20000 - 0x2000)//128KBytes,reserved 8KBytes for CPRI CSU #define RFM_DM0_BASE_ADDR 0x00200000 #define RFM_DM1_BASE_ADDR 0x00240000 #define RFM_SPU_DM_SIZE 0x20000//128KBytes #define RFM_DM0_SOC_BASE_ADDR 0x8720000 //dm0 in soc address #define RFM_DM0_SOC_ADDR (RFM_DM0_SOC_BASE_ADDR - RFM_DM0_BASE_ADDR) #define UCP_MSG_MEM_BASE_ADDR (0xA0000000) #define UCP_MSG_MEM_SIZE (128*1024*1024)//128MB #define RSV_BASE_ADDR 0x84C00000 typedef struct { uint32_t baseAddr; uint32_t currAddr; uint32_t maxSize; char* memSectionName; } MEM_SECTION_INFO; void memSectionInit(MEM_SECTION_INFO* memSecInfo, uint32_t baseAddr, uint32_t maxSize, char* memSectionName); void memSectionReset(MEM_SECTION_INFO* memSecInfo); void* memSectionAlloc(MEM_SECTION_INFO* memSecInfo, uint32_t allocSize, uint32_t allocAlign, char* varString); //void memSectionAllocPrint(MEM_SECTION_INFO* memSecInfo, uint32_t allocSize, char* varString); MEM_SECTION_INFO* GetPetSramSection(); MEM_SECTION_INFO* GetEcsSramSection(); MEM_SECTION_INFO* GetMsgDdrSection(); MEM_SECTION_INFO* GetRfmDm0Section(); MEM_SECTION_INFO* GetRfmDm1Section(); #endif