ENTRY( __ucps2_init ) ; PROVIDE(__ucps2_istack_bottom = (0x40000 - 0x40)) ; PROVIDE(__ucps2_dstack_bottom = (0x400000 - 0x40)) ;/* DM7 */ PROVIDE(__ucps2_heap_bottom = (0x40000 - 0x40)) ; PROVIDE(__ucps2_d0heap_bottom = 0x23C000) ; PROVIDE(__ucps2_d1heap_bottom = 0x280000) ; PROVIDE(__ucps2_d2heap_bottom = 0x2c0000) ; PROVIDE(__ucps2_d3heap_bottom = 0x300000) ; PROVIDE(__ucps2_d4heap_bottom = 0x340000) ; PROVIDE(__ucps2_d5heap_bottom = 0x380000) ; PROVIDE(__ucps2_d6heap_bottom = 0x3c0000) ; PROVIDE(__ucps2_d7heap_bottom = 0x3FC000) ;/* SPU Vector Stack = 16KB, no MPU Stack */ PROVIDE(__ucps2_mim_dyn_start = 0x70000); CORE(ape1); CACHE_SIZE(128); /**************************************************************** * The segments definition, which affect the load address of the * elf. */ /* All text code & data are in IM */ SECTIONS { /* All .data & .bss are located in IM */ . = 0x20000; /* icache size: 128KB */ /* tag start point for bss */ __ucps2_bss_start = ALIGN(0x4); .sbss : { *(.sbss.1*) } .sbss : { *(.sbss.2*) } .sbss : { *(.sbss.4*) } .sbss : { *(.sbss.8*) } .sbss : { *(.sbss*) ASSERT((. <= 0x40000), "Error: No room for .sbss"); } .bss : { *(.bss*) ASSERT((. <= 0x40000), "Error: No room for .bss"); } __ucps2_bss_end = ALIGN(0x4); .sdata : { *(.sdata.1*) } .sdata : { *(.sdata.2*) } .sdata : { *(.sdata.4*) } .sdata : { *(.sdata.8*) } .sdata : { *(.sdata*) ASSERT((. <= 0x40000), "Error: No room for .sdata"); } HIDDEN(__section_end = ALIGN(4)); /* tag start point for heap */ __ucps2_heap_start = ALIGN(0x8); . = 0x40000; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0) ASSERT((. <= 0x70000), "Error: No room for MPU's .text"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /********************************************/ . = 0x200000; HIDDEN(__section_start = .); .DM0 : AT(__section_end) { *( .DM0 ) ASSERT((. <= 0x23C000), "Error: No room for .DM0"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM0 */ __ucps2_d0heap_start = ALIGN(0x8); . = 0x240000; HIDDEN(__section_start = .); .DM1 : AT(__section_end) { *( .DM1 ) ASSERT((. <= 0x280000), "Error: No room for .DM1"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM1 */ __ucps2_d1heap_start = ALIGN(0x8); . = 0x280000; HIDDEN(__section_start = .); .DM2 : AT(__section_end) { *( .DM2 ) ASSERT((. <= 0x2c0000), "Error: No room for .DM2"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM2 */ __ucps2_d2heap_start = ALIGN(0x8); . = 0x2c0000; HIDDEN(__section_start = .); .DM3 : AT(__section_end) { *( .DM3 ) ASSERT((. <= 0x300000), "Error: No room for .DM3"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM3*/ __ucps2_d3heap_start = ALIGN(0x8); . = 0x300000; HIDDEN(__section_start = .); .DM4 : AT(__section_end) { *( .DM4 ) ASSERT((. <= 0x340000), "Error: No room for .DM4"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM4*/ __ucps2_d4heap_start = ALIGN(0x8); . = 0x340000; HIDDEN(__section_start = .); .DM5 : AT(__section_end) { *( .DM5 ) ASSERT((. <= 0x380000), "Error: No room for .DM5"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM5*/ __ucps2_d5heap_start = ALIGN(0x8); . = 0x380000; HIDDEN(__section_start = .); .DM6 : AT(__section_end) { *( .DM6 ) ASSERT((. <= 0x3c0000), "Error: No room for .DM6"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM6*/ __ucps2_d6heap_start = ALIGN(0x8); . = 0x3C0000; HIDDEN(__section_start = .); .DM7 : AT(__section_end) { *( .DM7 ) ASSERT((. <= 0x3FC000), "Error: No room for .DM7"); } .rodata :{ *(.rodata*) ASSERT((. <= 0x3FC000), "Error: No room for .rodata"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); /* tag start point for heap in DM7*/ __ucps2_d7heap_start = ALIGN(0x8); . = 0x04000000; HIDDEN(__section_start = .); .virt.sm : AT(__section_end) { *(.virt.sm) ASSERT((. <= 0x04200000), "Error: No room for virtual share memory"); } .noinit.MREG : { *(noinit.MREG) } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x91c00000; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.start) ASSERT((. <= 0x93800000), "Error: No room for SPU start .text"); } .text : { *(.text) ASSERT((. <= 0x93800000), "Error: No room for SPU's .text"); } .text : { *(.text.[^m]*) ASSERT((. <= 0x93800000), "Error: No room for SPU's .text"); } .text : { *(.text.m[^0]*) ASSERT((. <= 0x93800000), "Error: No room for SPU's .text"); } HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e200000; __ucps2_mim_ddr0_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr0) ASSERT((. <= 0x9e240000), "Error: No room for MIM DDR0 .text"); } __ucps2_mim_ddr0_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e240000; __ucps2_mim_ddr1_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr1) ASSERT((. <= 0x9e280000), "Error: No room for MIM DDR1 .text"); } __ucps2_mim_ddr1_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e280000; __ucps2_mim_ddr2_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr2) ASSERT((. <= 0x9e2c0000), "Error: No room for MIM DDR2 .text"); } __ucps2_mim_ddr2_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e2c0000; __ucps2_mim_ddr3_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr3) ASSERT((. <= 0x9e300000), "Error: No room for MIM DDR3 .text"); } __ucps2_mim_ddr3_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e300000; __ucps2_mim_ddr4_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr4) ASSERT((. <= 0x9e340000), "Error: No room for MIM DDR4 .text"); } __ucps2_mim_ddr4_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e340000; __ucps2_mim_ddr5_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr5) ASSERT((. <= 0x9e380000), "Error: No room for MIM DDR5 .text"); } __ucps2_mim_ddr5_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e380000; __ucps2_mim_ddr6_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr6) ASSERT((. <= 0x9e3c0000), "Error: No room for MIM DDR6 .text"); } __ucps2_mim_ddr6_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); . = 0x9e3c0000; __ucps2_mim_ddr7_start = .; HIDDEN(__section_start = .); .text : AT(__section_end) { *(.text.m0.ddr7) ASSERT((. <= 0x9e400000), "Error: No room for MIM DDR7 .text"); } __ucps2_mim_ddr7_end = .; HIDDEN(__section_end = ALIGN(4) - __section_start + __section_end); HIDDEN(__section_start = 0xffffffff); HIDDEN(__section_end = 0xffffffff); }