/****************************************************************** * @file nr_phy_macro.h * @brief: [file description] * @author: xuekun.zhang * @Date 2022年1月10日 * COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved. * Change_date Owner Change_content * 2022年1月10日 xuekun.zhang create file *****************************************************************/ #ifndef PHY_MACRO_H #define PHY_MACRO_H //PHY LOG SWITCH #define PHY_LOG_SINGLE_UE_SWITCH //#define PHY_LOG_MULTIPLE_UE_SWITCH #define PHY_LOG_ERROR_STR_SWITCH #define PHY_LOG_INFO_STR_SWITCH #define PHY_LOG_TIME_REC_SWITCH #define NR_SLOT_SYMBOL_NUM 14 #define NR_SUBSFN_SLOT_NUM 2 #define NR_SFN_SUBFRAME_NUM 10 #define NR_SFN_SLOT_NUM 20 #define NR_SFN_NUM 1024 #define NR_PERIOD_SLOT_NUM 10 #define NR_PERIOD_SLOT_NUM_1D3U 5 #define NR_CP_LENGTH_SYMBOL0 352 #define NR_CP_LENGTH_NON_SYMBOL0 288 #define NR_SMAPLE_POINT_PER_SYMBOL 4096 #define NR_SAMPLE_POINT_PER_SLOT 61440 #define NR_SAMPLE_RATE 122880 #define NR_RB_SUBCARRIER_NUM 12 #define NR_MAX_NUM_PRBS (273) // slot 所占的字节数 #define NR_SLOT_DATA_LENGTH (NR_SAMPLE_POINT_PER_SLOT * sizeof(uint32_t)) #define NR_INTEGRATION 0 #define NR_DISTRIBUTED 1 //UL信道类型定义, PUCCH & PUSCH公用 #define NR_UL_CHANNEL_TYPE (CH_AWGN) #define SCS_15KHZ 0 #define SCS_30KHZ 1 #define SCS_60KHZ 2 #define SCS_120KHZ 3 #define SCS_240KHZ 4 #define NR_FRAME_TYPE_TDD 1 #define NR_FRAME_TYPE_FDD 0 #define NR_CP_TYPE_NORMAL 0 #define NR_CP_TYPE_EXTENDED 1 #define MAX_TASKS_PER_APE 8 #define MAX_APES_PER_CELL 8 #define MAX_CELL_NUM (8) #define MAX_NR_CELL (4) #define MAX_UE_NUM (16) #define MAX_PDSCH_UE_NUM (14) #define MAX_DCI_NUM (28) #define TX_MAX_ANTENNA_NUM MAX_NUM_TX_ANTENNAS //TX max antenna num #define RX_MAX_ANTENNA_NUM MAX_NUM_RX_ANTENNAS //RX max antenna num #define SI_RNTI 0xFFFF #define ABS(a) (((a)>0) ? (a) : (-a)) #define MAX(a,b) (((a)>(b)) ? (a) : (b)) #define MIN(a,b) (((a)<(b)) ? (a) : (b)) #endif