jinhong/YB_TX_RX_APE_PRJ
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HUOHUO 1ec60e0b27 Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE 
到5月27日为止的Recv_symb的修改和最新分支合并,遗留两个Recv编译通过问题待确认搜 TODO 带20250528字样的地方
2025-05-27 10:44:21 -07:00
.vscode
Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE
2025-05-27 10:44:21 -07:00
APE0
[bugfix]修复recv_sync的递推逻辑，更新tail的方式
2025-05-22 19:02:25 -07:00
APE3
Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE
2025-05-27 10:44:21 -07:00
APE4
注释所有初始化阶段的LOG输出，避免异常情况
2025-05-26 10:18:06 -07:00
APE5
Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE
2025-05-27 10:44:21 -07:00
APE6
Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE
2025-05-27 10:44:21 -07:00
APE7
1.关闭APE0打印，2.修复Receiver_sync的跟踪最大位置位宽应该为16 3.修复PCIE接受APE4的消息应该使用从DDR读取数据的内联指令
2025-05-20 10:17:26 -07:00
APELib
Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE
2025-05-27 10:44:21 -07:00
Common
1.SOURCE_DATA_DDR_ADDR地址修改为0x84C00000，
2025-05-27 09:49:59 -07:00
Config
Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE
2025-05-27 10:44:21 -07:00
Inc
去除重复的平台定义声明，优化代码目录
2025-03-30 00:18:38 -07:00
Interface
新增recv_symb2bit的数据接口
2025-05-11 08:43:54 -07:00
Lib
PCIE任务新增，部署在APE4上
2025-03-23 07:23:04 -07:00
MicroCode
Merge branch 'PCIE_PILOT_FIX' of http://47.100.68.68:3000/jinhong/YB_TX_RX_SPU into PCIE
2025-05-27 10:44:21 -07:00
Platform/build
PCIE任务新增，部署在APE4上
2025-03-23 07:23:04 -07:00
template_receiver
tx_rx_version rx part first commit
2025-03-02 13:41:38 +08:00
Test
去除重复的平台定义声明，优化代码目录
2025-03-30 00:18:38 -07:00
.gitignore
1.新增Transform_func目录，包含计算transform相关参数的函数
2025-05-04 02:50:10 +08:00
compile.sh
1.更新信道估计模块，2.新增APE3，CORE_ODD区分symb地址相关处理
2025-04-21 09:26:13 -07:00
Makefile
1.同步和位解调调通，同步的微码、测试数据、配置文件改动，位解调的程序和测试数据改动。2.APE4的sync_task的栈空间大小翻倍
2025-05-14 10:04:34 -07:00
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